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[81.2.115.148]) by smtp.gmail.com with ESMTPSA id e9sm11543164wme.3.2019.10.17.06.21.25 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 17 Oct 2019 06:21:25 -0700 (PDT) From: Peter Maydell To: qemu-devel@nongnu.org Subject: [PATCH 1/3] hw/net/fsl_etsec/etsec.c: Switch to transaction-based ptimer API Date: Thu, 17 Oct 2019 14:21:20 +0100 Message-Id: <20191017132122.4402-2-peter.maydell@linaro.org> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20191017132122.4402-1-peter.maydell@linaro.org> References: <20191017132122.4402-1-peter.maydell@linaro.org> MIME-Version: 1.0 X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2a00:1450:4864:20::343 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Jason Wang , Alistair Francis , qemu-arm@nongnu.org, qemu-ppc@nongnu.org, "Edgar E. Iglesias" , David Gibson Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" Switch the fsl_etsec code away from bottom-half based ptimers to the new transaction-based ptimer API. This just requires adding begin/commit calls around the various places that modify the ptimer state, and using the new ptimer_init() function to create the timer. Signed-off-by: Peter Maydell --- hw/net/fsl_etsec/etsec.h | 1 - hw/net/fsl_etsec/etsec.c | 9 +++++---- 2 files changed, 5 insertions(+), 5 deletions(-) -- 2.20.1 Reviewed-by: Richard Henderson Reviewed-by: Philippe Mathieu-Daudé Reviewed-by: Alistair Francis diff --git a/hw/net/fsl_etsec/etsec.h b/hw/net/fsl_etsec/etsec.h index 09d05c21338..7951c3ad65f 100644 --- a/hw/net/fsl_etsec/etsec.h +++ b/hw/net/fsl_etsec/etsec.h @@ -141,7 +141,6 @@ typedef struct eTSEC { uint16_t phy_control; /* Polling */ - QEMUBH *bh; struct ptimer_state *ptimer; /* Whether we should flush the rx queue when buffer becomes available. */ diff --git a/hw/net/fsl_etsec/etsec.c b/hw/net/fsl_etsec/etsec.c index d9b3e8c691e..717de76569a 100644 --- a/hw/net/fsl_etsec/etsec.c +++ b/hw/net/fsl_etsec/etsec.c @@ -34,7 +34,6 @@ #include "etsec.h" #include "registers.h" #include "qemu/log.h" -#include "qemu/main-loop.h" #include "qemu/module.h" /* #define HEX_DUMP */ @@ -195,9 +194,11 @@ static void write_dmactrl(eTSEC *etsec, if (!(value & DMACTRL_WOP)) { /* Start polling */ + ptimer_transaction_begin(etsec->ptimer); ptimer_stop(etsec->ptimer); ptimer_set_count(etsec->ptimer, 1); ptimer_run(etsec->ptimer, 1); + ptimer_transaction_commit(etsec->ptimer); } } @@ -391,10 +392,10 @@ static void etsec_realize(DeviceState *dev, Error **errp) object_get_typename(OBJECT(dev)), dev->id, etsec); qemu_format_nic_info_str(qemu_get_queue(etsec->nic), etsec->conf.macaddr.a); - - etsec->bh = qemu_bh_new(etsec_timer_hit, etsec); - etsec->ptimer = ptimer_init_with_bh(etsec->bh, PTIMER_POLICY_DEFAULT); + etsec->ptimer = ptimer_init(etsec_timer_hit, etsec, PTIMER_POLICY_DEFAULT); + ptimer_transaction_begin(etsec->ptimer); ptimer_set_freq(etsec->ptimer, 100); + ptimer_transaction_commit(etsec->ptimer); } static void etsec_instance_init(Object *obj) From patchwork Thu Oct 17 13:21:21 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Peter Maydell X-Patchwork-Id: 176635 Delivered-To: patch@linaro.org Received: by 2002:a92:7e96:0:0:0:0:0 with SMTP id q22csp959436ill; Thu, 17 Oct 2019 06:53:04 -0700 (PDT) X-Google-Smtp-Source: APXvYqwPcq2AY5FBDLsisNSGXFEdUh6tY2F5toZgRuiSO6E6J0ftBWdF8udwdpv5rqqaQvqD82u/ X-Received: by 2002:a17:90a:cb88:: with SMTP id a8mr4504544pju.85.1571320384351; Thu, 17 Oct 2019 06:53:04 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1571320384; cv=none; d=google.com; s=arc-20160816; b=IFeeExQRnDPdz3dq/j6KnblAepJQU1jXf0e5O0nYT1cVDlDCisdJGjVNHxHW8gpoOt ooIy85kKKsF+ib8lVp0AdX7AgCQnoxn113IkK+RDo8tbygfr/Ox/tZw9OV+4X1cIukE1 JR2l0N2KIKXv4qR4jcocFIrI67uu9/gq2VjdrE8dOpWx4SabzLxnXizQTUSlJvTm0DvZ sZ5fbD1Xixe3ez4xF71E5GdFzaXfheaXScbUkH7addABomBXP20MU5FAA/xCMq3Oqo9Q 0EYvwl0fZUQ1VCaQ/wd3wjllhpDSPZLQ6HJCUaP5ctJjOheB50eL/cPV85TfKk/RHBZX jE/Q== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:cc:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:to:from :dkim-signature; bh=DQC4XpSmd8PGYvkUObRMkiwdpTVp4qnrLAv8MVPjMfc=; b=fDB0+aqrTsFdNR21CeI1RhtHtmQybz+h6e4H4EhgJT51B6gno1gJlgKhnLbv+/UW5J pgIMvwAjPhyL6iiMbUkagHC4WOCAB5oVXbFJOgpJvtbVq4lOK9i86UqCYou68M/S4hP2 nfh//S9e/Szx3Wg+wpZREWI7Xnnbv8LQnuksrXzMN0a8yMBni+TwZ4IRSe0N2Bu9yHF1 L1GzjP4qEUflJPt+vB7RFzsrDsyNfONSe0ZPCbg9dupEYjEMOz+ZPP+D4qhsrphMX7QN wEZDMXW4UwAPcxZI7Or96L/iK3ADdXwpPL77rUpdNjCbIXi4iWbA9peiEwnrLfzIub9z s9iA== ARC-Authentication-Results: i=1; mx.google.com; dkim=fail header.i=@linaro.org header.s=google header.b=BXoRk4ip; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. 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[81.2.115.148]) by smtp.gmail.com with ESMTPSA id e9sm11543164wme.3.2019.10.17.06.21.26 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 17 Oct 2019 06:21:27 -0700 (PDT) From: Peter Maydell To: qemu-devel@nongnu.org Subject: [PATCH 2/3] hw/timer/xilinx_timer.c: Switch to transaction-based ptimer API Date: Thu, 17 Oct 2019 14:21:21 +0100 Message-Id: <20191017132122.4402-3-peter.maydell@linaro.org> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20191017132122.4402-1-peter.maydell@linaro.org> References: <20191017132122.4402-1-peter.maydell@linaro.org> MIME-Version: 1.0 X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2a00:1450:4864:20::342 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Jason Wang , Alistair Francis , qemu-arm@nongnu.org, qemu-ppc@nongnu.org, "Edgar E. Iglesias" , David Gibson Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" Switch the xilinx_timer code away from bottom-half based ptimers to the new transaction-based ptimer API. This just requires adding begin/commit calls around the various places that modify the ptimer state, and using the new ptimer_init() function to create the timer. Signed-off-by: Peter Maydell --- hw/timer/xilinx_timer.c | 13 ++++++++----- 1 file changed, 8 insertions(+), 5 deletions(-) -- 2.20.1 Reviewed-by: Richard Henderson Reviewed-by: Philippe Mathieu-Daudé Reviewed-by: Alistair Francis diff --git a/hw/timer/xilinx_timer.c b/hw/timer/xilinx_timer.c index 92dbff304d9..7191ea54f58 100644 --- a/hw/timer/xilinx_timer.c +++ b/hw/timer/xilinx_timer.c @@ -28,7 +28,6 @@ #include "hw/ptimer.h" #include "hw/qdev-properties.h" #include "qemu/log.h" -#include "qemu/main-loop.h" #include "qemu/module.h" #define D(x) @@ -52,7 +51,6 @@ struct xlx_timer { - QEMUBH *bh; ptimer_state *ptimer; void *parent; int nr; /* for debug. */ @@ -134,6 +132,7 @@ timer_read(void *opaque, hwaddr addr, unsigned int size) return r; } +/* Must be called inside ptimer transaction block */ static void timer_enable(struct xlx_timer *xt) { uint64_t count; @@ -174,8 +173,11 @@ timer_write(void *opaque, hwaddr addr, value &= ~TCSR_TINT; xt->regs[addr] = value & 0x7ff; - if (value & TCSR_ENT) + if (value & TCSR_ENT) { + ptimer_transaction_begin(xt->ptimer); timer_enable(xt); + ptimer_transaction_commit(xt->ptimer); + } break; default: @@ -220,9 +222,10 @@ static void xilinx_timer_realize(DeviceState *dev, Error **errp) xt->parent = t; xt->nr = i; - xt->bh = qemu_bh_new(timer_hit, xt); - xt->ptimer = ptimer_init_with_bh(xt->bh, PTIMER_POLICY_DEFAULT); + xt->ptimer = ptimer_init(timer_hit, xt, PTIMER_POLICY_DEFAULT); + ptimer_transaction_begin(xt->ptimer); ptimer_set_freq(xt->ptimer, t->freq_hz); + ptimer_transaction_commit(xt->ptimer); } memory_region_init_io(&t->mmio, OBJECT(t), &timer_ops, t, "xlnx.xps-timer", From patchwork Thu Oct 17 13:21:22 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Peter Maydell X-Patchwork-Id: 176637 Delivered-To: patch@linaro.org Received: by 2002:a92:7e96:0:0:0:0:0 with SMTP id q22csp960459ill; Thu, 17 Oct 2019 06:53:56 -0700 (PDT) X-Google-Smtp-Source: APXvYqwqxOj2cugecco5LHZBUbxvg0WCttDTXTlGynfUlox00yKu48H4Zc21vnxS0ype0pfdaM3K X-Received: by 2002:a0c:fbcf:: with SMTP id n15mr3953531qvp.183.1571320436832; Thu, 17 Oct 2019 06:53:56 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1571320436; cv=none; d=google.com; s=arc-20160816; b=hMlctz0S/PYSDBkqot6KZfigYGXz7OqREJ6kdh4dPlqYUa8wyHgztXo7o2lW3TLmsL b4qpagdN9GKu2QUWpFn1zFjNIDK1iBXiMJadhm0B4s6+b/9+dXZ1rftYTvFm3k669S2q GNYQHomP/3KmmrVz20FUZlKfxs7Tx/ZeRePUrqIqh+DCDFiPYrP0AxVTq0QT4F4x86uV eftYkIM1ZgEZr+yZnusH2sR/5o5yCb64p8UoaxbpXttvOouN4QR7A40dookLl88F5xcy a3idbWx0f8guBwsU86K0xmtHwqSXyzglmt/njxvJrvzpAeanqPGQsq1MintegEMeTn4B 43Dw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:cc:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:to:from :dkim-signature; bh=KWHu+m1O+EERA4S9NNTm+FIYK5BZF9JX07P8U3F6Cyk=; b=zrO9cZAhgmpblaXFybhNMgZh6GBjkeogH00/t2qFJXaYfJQPzMSB+mpd2J1JY4Kctb Bgmc7oAEKTx3DDugIcehBIQwxnWNKa3NePdWq3m1POmORMNmoSSZNaXJw07Kw0qSLoAH VWu2GqfwR4fe4h6lhG4pTcU8hmUFEQ3ZRRJFL7f60tNJ93DzOCsL/bDqQndTaewdjmII BZwHKciF/LMtTaPMSc0DHCRot/s6t4mv+8LfOyKuevPL1sNVgM2riD7H+kNSgrAMv4Ft 1BRxpnyXTUl2+1Z6FcAxh6s6BOh89n6w8ok2wWrNC/u+kE7KEkaFoiIQ9uuyQeNptfHT pqPQ== ARC-Authentication-Results: i=1; mx.google.com; dkim=fail header.i=@linaro.org header.s=google header.b=iuGkR5zC; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. 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[81.2.115.148]) by smtp.gmail.com with ESMTPSA id e9sm11543164wme.3.2019.10.17.06.21.27 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 17 Oct 2019 06:21:28 -0700 (PDT) From: Peter Maydell To: qemu-devel@nongnu.org Subject: [PATCH 3/3] hw/dma/xilinx_axidma.c: Switch to transaction-based ptimer API Date: Thu, 17 Oct 2019 14:21:22 +0100 Message-Id: <20191017132122.4402-4-peter.maydell@linaro.org> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20191017132122.4402-1-peter.maydell@linaro.org> References: <20191017132122.4402-1-peter.maydell@linaro.org> MIME-Version: 1.0 X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2a00:1450:4864:20::342 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Jason Wang , Alistair Francis , qemu-arm@nongnu.org, qemu-ppc@nongnu.org, "Edgar E. Iglesias" , David Gibson Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" Switch the xilinx_axidma code away from bottom-half based ptimers to the new transaction-based ptimer API. This just requires adding begin/commit calls around the various places that modify the ptimer state, and using the new ptimer_init() function to create the timer. Signed-off-by: Peter Maydell --- hw/dma/xilinx_axidma.c | 9 +++++---- 1 file changed, 5 insertions(+), 4 deletions(-) -- 2.20.1 Reviewed-by: Richard Henderson Reviewed-by: Philippe Mathieu-Daudé Reviewed-by: Alistair Francis diff --git a/hw/dma/xilinx_axidma.c b/hw/dma/xilinx_axidma.c index e035d1f7504..fb3a978e282 100644 --- a/hw/dma/xilinx_axidma.c +++ b/hw/dma/xilinx_axidma.c @@ -31,7 +31,6 @@ #include "hw/ptimer.h" #include "hw/qdev-properties.h" #include "qemu/log.h" -#include "qemu/main-loop.h" #include "qemu/module.h" #include "hw/stream.h" @@ -104,7 +103,6 @@ enum { }; struct Stream { - QEMUBH *bh; ptimer_state *ptimer; qemu_irq irq; @@ -242,6 +240,7 @@ static void stream_complete(struct Stream *s) unsigned int comp_delay; /* Start the delayed timer. */ + ptimer_transaction_begin(s->ptimer); comp_delay = s->regs[R_DMACR] >> 24; if (comp_delay) { ptimer_stop(s->ptimer); @@ -255,6 +254,7 @@ static void stream_complete(struct Stream *s) s->regs[R_DMASR] |= DMASR_IOC_IRQ; stream_reload_complete_cnt(s); } + ptimer_transaction_commit(s->ptimer); } static void stream_process_mem2s(struct Stream *s, StreamSlave *tx_data_dev, @@ -551,9 +551,10 @@ static void xilinx_axidma_realize(DeviceState *dev, Error **errp) struct Stream *st = &s->streams[i]; st->nr = i; - st->bh = qemu_bh_new(timer_hit, st); - st->ptimer = ptimer_init_with_bh(st->bh, PTIMER_POLICY_DEFAULT); + st->ptimer = ptimer_init(timer_hit, st, PTIMER_POLICY_DEFAULT); + ptimer_transaction_begin(st->ptimer); ptimer_set_freq(st->ptimer, s->freqhz); + ptimer_transaction_commit(st->ptimer); } return;