From patchwork Tue May 21 18:38:00 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Elliot Berman X-Patchwork-Id: 798009 Received: from mx0a-0031df01.pphosted.com (mx0a-0031df01.pphosted.com [205.220.168.131]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 4AE00148FEB; Tue, 21 May 2024 18:40:46 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=205.220.168.131 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1716316848; cv=none; b=mc+wEbE0KSTQh24Q0qI2vyi0giY16apVH5+Xd53PntdfGYOoFwL4bjJ7jVaVRIbdau1JqMbpauPwtNwqQZ0g0n4BHQLLNV8QNDeRiqvEghPK2zmcNMYkNh2no4GtNNqYwuxPLtetb8XscmGdwjl6QI2pkfuLCPOeZ/hj7eU6s+M= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1716316848; c=relaxed/simple; bh=8KuC+8An/+QRes8Bri7TPb+7ESdJc5p96EB5KfxVkWs=; h=From:Date:Subject:MIME-Version:Content-Type:Message-ID:References: In-Reply-To:To:CC; b=q+EiUG++nPviXXSzBKrzUmQQQoW+uKrQ0oGfMnHPwx+K6qMSEFbJjry4YbSy1o80TfexfSRH1O5RR4SrKaq1uZVYXS6XTXO25CEA9UcmonaPqPDrtnQBD7/aAz4ZXJ71fNVrEyT8NMlpexua+zf1tPk789Rm817YGERmtYf8/Pk= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=quicinc.com; spf=pass smtp.mailfrom=quicinc.com; dkim=pass (2048-bit key) header.d=quicinc.com header.i=@quicinc.com header.b=Dv6fvSdO; arc=none smtp.client-ip=205.220.168.131 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=quicinc.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=quicinc.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=quicinc.com header.i=@quicinc.com header.b="Dv6fvSdO" Received: from pps.filterd (m0279867.ppops.net [127.0.0.1]) by mx0a-0031df01.pphosted.com (8.18.1.2/8.18.1.2) with ESMTP id 44LDQASj031060; Tue, 21 May 2024 18:38:28 GMT DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=quicinc.com; h= from:date:subject:mime-version:content-type :content-transfer-encoding:message-id:references:in-reply-to:to :cc; s=qcppdkim1; bh=88NHDvPij+mRH8DRPYPERvabYSKAr78Aq4d8qESSJx4 =; b=Dv6fvSdOfeRP1fIaLkqdmwaCjRcYmAwdjuGU1MBW/AaJ6wv38o4WVS711eO EzglyCJyd9YtQLdYSj8Xr7GtHtNoBW7kdZ2z0M80l3ftY6C0qeGLkCvBMabXz9c/ /4NoyU/TO9TbSoFGFjuLfq3RUPYmKF7kBTSdfO66aw+bwxzC84ATULDxndFDvNBj L6BW/+0MnTdy9jcnKcRBi4zOK/7UdlpB0S1123I9PyVFbYBG+MU2575wq8J/DUnR ywl10jXu5SQMzFQmbnMP1aFHaVFlK+I7mTBp3h1V0YdzcwMWxLkYZDIrBKqGvuiN H4xvn42swtXg2yMSXCtH3E9/dwA== Received: from nasanppmta05.qualcomm.com (i-global254.qualcomm.com [199.106.103.254]) by mx0a-0031df01.pphosted.com (PPS) with ESMTPS id 3y6n45pue7-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Tue, 21 May 2024 18:38:27 +0000 (GMT) Received: from nasanex01b.na.qualcomm.com (nasanex01b.na.qualcomm.com [10.46.141.250]) by NASANPPMTA05.qualcomm.com (8.17.1.5/8.17.1.5) with ESMTPS id 44LIcQTw012119 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Tue, 21 May 2024 18:38:26 GMT Received: from hu-eberman-lv.qualcomm.com (10.49.16.6) by nasanex01b.na.qualcomm.com (10.46.141.250) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1544.9; Tue, 21 May 2024 11:38:26 -0700 From: Elliot Berman Date: Tue, 21 May 2024 11:38:00 -0700 Subject: [PATCH RFC v3 3/9] fdt-select-board: Add test tool for selecting dtbs based on board-id Precedence: bulk X-Mailing-List: linux-arm-msm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-ID: <20240521-board-ids-v3-3-e6c71d05f4d2@quicinc.com> References: <20240521-board-ids-v3-0-e6c71d05f4d2@quicinc.com> In-Reply-To: <20240521-board-ids-v3-0-e6c71d05f4d2@quicinc.com> To: Rob Herring , Frank Rowand , Krzysztof Kozlowski , Conor Dooley , Bjorn Andersson , Konrad Dybcio CC: Amrit Anand , Peter Griffin , Caleb Connolly , "Andy Gross" , Konrad Dybcio , "Doug Anderson" , Simon Glass , "Chen-Yu Tsai" , Julius Werner , "Humphreys, Jonathan" , Sumit Garg , "Jon Hunter" , Michal Simek , , , , , , Elliot Berman X-Mailer: b4 0.13.0 X-ClientProxiedBy: nalasex01a.na.qualcomm.com (10.47.209.196) To nasanex01b.na.qualcomm.com (10.46.141.250) X-QCInternal: smtphost X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Proofpoint-GUID: K5cwYU7NhjfDktkbDUzCLcw99Op14pQM X-Proofpoint-ORIG-GUID: K5cwYU7NhjfDktkbDUzCLcw99Op14pQM X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1039,Hydra:6.0.650,FMLib:17.12.28.16 definitions=2024-05-21_11,2024-05-21_01,2024-05-17_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 clxscore=1015 mlxscore=0 bulkscore=0 impostorscore=0 priorityscore=1501 adultscore=0 lowpriorityscore=0 suspectscore=0 mlxlogscore=999 phishscore=0 malwarescore=0 spamscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.19.0-2405010000 definitions=main-2405210140 Introduce a tool which scores devicetrees based on their board-id and a supplied reference devicetree. This mechanism would be most similar to an proposal to EBBR where firmware provides a reference devicetree which contains the actual board identifier values, and an OS loader can choose to replace (or overlay) the firmware-provided devicetree. Signed-off-by: Elliot Berman --- scripts/dtc/.gitignore | 1 + scripts/dtc/Makefile | 3 +- scripts/dtc/fdt-select-board.c | 126 +++++++++++++++++++++++++++++++++++++++++ 3 files changed, 129 insertions(+), 1 deletion(-) diff --git a/scripts/dtc/.gitignore b/scripts/dtc/.gitignore index e0b5c1d2464a..7f6d5202c0ba 100644 --- a/scripts/dtc/.gitignore +++ b/scripts/dtc/.gitignore @@ -1,3 +1,4 @@ # SPDX-License-Identifier: GPL-2.0-only /dtc /fdtoverlay +/fdt-select-board diff --git a/scripts/dtc/Makefile b/scripts/dtc/Makefile index 4d32b9497da9..a331f07091b3 100644 --- a/scripts/dtc/Makefile +++ b/scripts/dtc/Makefile @@ -2,7 +2,7 @@ # scripts/dtc makefile # *** Also keep .gitignore in sync when changing *** -hostprogs-always-$(CONFIG_DTC) += dtc fdtoverlay +hostprogs-always-$(CONFIG_DTC) += dtc fdtoverlay fdt-select-board hostprogs-always-$(CHECK_DT_BINDING) += dtc dtc-objs := dtc.o flattree.o fstree.o data.o livetree.o treesource.o \ @@ -14,6 +14,7 @@ dtc-objs += dtc-lexer.lex.o dtc-parser.tab.o libfdt-objs := fdt.o fdt_ro.o fdt_wip.o fdt_sw.o fdt_rw.o fdt_strerror.o fdt_empty_tree.o fdt_addresses.o fdt_overlay.o libfdt = $(addprefix libfdt/,$(libfdt-objs)) fdtoverlay-objs := $(libfdt) fdtoverlay.o util.o +fdt-select-board-objs := $(libfdt) fdt-select-board.o util.o # Source files need to get at the userspace version of libfdt_env.h to compile HOST_EXTRACFLAGS += -I $(srctree)/$(src)/libfdt diff --git a/scripts/dtc/fdt-select-board.c b/scripts/dtc/fdt-select-board.c new file mode 100644 index 000000000000..a7f3dc715ed1 --- /dev/null +++ b/scripts/dtc/fdt-select-board.c @@ -0,0 +1,126 @@ +// SPDX-License-Identifier: GPL-2.0-or-later +/* + * Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved. + */ +#include +#include +#include +#include +#include +#include + +#include + +#include "util.h" + +static const char usage_synopsis[] = + "find the best matching device tree from a reference board\n" + " fdt-select-board []\n" + "\n"; +static const char usage_short_opts[] = "r:av" USAGE_COMMON_SHORT_OPTS; +static const struct option usage_long_opts[] = { + {"reference", required_argument, NULL, 'r'}, + {"verbose", no_argument, NULL, 'v'}, + {"all", no_argument, NULL, 'a'}, + USAGE_COMMON_LONG_OPTS +}; + +static const char * const usage_opts_help[] = { + "Reference DTB", + "Verbose messages", + "List all matches", + USAGE_COMMON_OPTS_HELP +}; + +int verbose = 0; + +struct context { + const void *fdt; + int node; +}; + +static const void *get_board_id(void *ctx, const char *name, int *datalen) +{ + struct context *c = ctx; + + return fdt_getprop(c->fdt, c->node, name, datalen); +} + +int main(int argc, char *argv[]) +{ + int opt; + char *input_filename = NULL; + const void *fdt; + const void *ref; + int ref_node; + int max_score = -1; + const char *best_match = NULL; + struct context ctx; + int all = 0; + + while ((opt = util_getopt_long()) != EOF) { + switch (opt) { + case_USAGE_COMMON_FLAGS + + case 'a': + all = 1; + break; + case 'r': + input_filename = optarg; + break; + case 'v': + verbose = 1; + break; + } + } + + if (!input_filename) + usage("missing reference file"); + + argv += optind; + argc -= optind; + + if (argc <= 0) + usage("missing candidate dtbs"); + + ref = utilfdt_read(input_filename, NULL); + if (!ref) { + fprintf(stderr, "failed to read reference %s\n", input_filename); + return -1; + } + + ref_node = fdt_path_offset(ref, "/board-id"); + if (ref_node < 0) { + fprintf(stderr, "reference blob doesn't have a board-id\n"); + return -1; + } + + ctx.fdt = ref; + ctx.node = ref_node; + + for (; argc > 0; --argc, ++argv) { + int score; + + fdt = utilfdt_read(*argv, NULL); + if (!fdt) { + fprintf(stderr, "failed to read %s\n", *argv); + return -1; + } + + score = fdt_board_id_score(fdt, get_board_id, &ctx); + if (verbose || (score > 0 && all)) + printf("%s: %d\n", *argv, score); + + if (score > max_score) { + max_score = score; + best_match = *argv; + } + + free(fdt); + } + + if (best_match && !all) + printf("%s\n", best_match); + + return 0; +} From patchwork Tue May 21 18:38:01 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Elliot Berman X-Patchwork-Id: 798007 Received: from mx0b-0031df01.pphosted.com (mx0b-0031df01.pphosted.com [205.220.180.131]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 4A54F149011; Tue, 21 May 2024 18:40:46 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=205.220.180.131 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1716316849; cv=none; b=XZ92BQ/yJ2VDgxLLcbXM1qLDj1MkXFPMPCRX8Mhm4WixkVr4JN1GlD4YvwoZFd7gCXprIr5hzNcs971f424YjnOlJYyqFKLSA51xbUPqxXyT2q3GvXLefg9stcqsBpiVIIHenGQ7wRv3r8LjoPtktDZqIDOhtX7WQZ3UcYAZSdg= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1716316849; c=relaxed/simple; bh=svX454L73EMuirziWipo2A5ykvfNkU64QfZlqYwY4lo=; h=From:Date:Subject:MIME-Version:Content-Type:Message-ID:References: In-Reply-To:To:CC; b=RBsQ5tFKzTH4XZYIVZdi2uTxOzMrtGlWM9vNxo1xVEVUipzszyRANUNzzGILLrItaXDi56J2POZYXdvny54vAsPuWHCpAr07x1S4fJLgMr3nAjDuhLqQLlRuxntBMdSzqC/SWHZqOYLv7KqGpNurbDyHoE3q1kQ7lrYHKG7XD7Q= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=quicinc.com; spf=pass smtp.mailfrom=quicinc.com; dkim=pass (2048-bit key) header.d=quicinc.com header.i=@quicinc.com header.b=DmYV9SnT; arc=none smtp.client-ip=205.220.180.131 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=quicinc.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=quicinc.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=quicinc.com header.i=@quicinc.com header.b="DmYV9SnT" Received: from pps.filterd (m0279869.ppops.net [127.0.0.1]) by mx0a-0031df01.pphosted.com (8.18.1.2/8.18.1.2) with ESMTP id 44LCOAqL018275; Tue, 21 May 2024 18:38:29 GMT DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=quicinc.com; h= from:date:subject:mime-version:content-type :content-transfer-encoding:message-id:references:in-reply-to:to :cc; s=qcppdkim1; bh=bLJS9SRClb/39GErtcxjZ/NjKaKPQ4DvHuL8dZn9IE0 =; b=DmYV9SnTmnJEENuCi8lE85Te6Ld9IbF26dsEfeZqJNqFkx92+b279VNedis HlccHu/y1CkVtGYgdtS0IonaKw4V+i3elBViIusaUswasPtfu0dAbJvXWAIiGkRn 8Ekr9ZbU8VmatJ6EyNZIV+W1nkCDGuGjWMPZCDIwSe2wBxi59z7eqSUrzxxeOvZM KbOdDg+wKTqqSNPuswOcYRpBoDn03JVpt0Rdh5y3ZKMwwhxx4l/hmNx2I0BrK4s2 pDtlgmxufWkgBk/VENe2nBi74C2n+sEJZp3GvHYB1iaW4JKKZjqbdG4rpZOdoxz/ qcIU7lKDJEFOu53V0AdBR11TmKw== Received: from nasanppmta04.qualcomm.com (i-global254.qualcomm.com [199.106.103.254]) by mx0a-0031df01.pphosted.com (PPS) with ESMTPS id 3y6n4p7c7m-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Tue, 21 May 2024 18:38:28 +0000 (GMT) Received: from nasanex01b.na.qualcomm.com (nasanex01b.na.qualcomm.com [10.46.141.250]) by NASANPPMTA04.qualcomm.com (8.17.1.5/8.17.1.5) with ESMTPS id 44LIcRIA020132 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Tue, 21 May 2024 18:38:27 GMT Received: from hu-eberman-lv.qualcomm.com (10.49.16.6) by nasanex01b.na.qualcomm.com (10.46.141.250) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1544.9; Tue, 21 May 2024 11:38:26 -0700 From: Elliot Berman Date: Tue, 21 May 2024 11:38:01 -0700 Subject: [PATCH RFC v3 4/9] dt-bindings: arm: qcom: Update Devicetree identifiers Precedence: bulk X-Mailing-List: linux-arm-msm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-ID: <20240521-board-ids-v3-4-e6c71d05f4d2@quicinc.com> References: <20240521-board-ids-v3-0-e6c71d05f4d2@quicinc.com> In-Reply-To: <20240521-board-ids-v3-0-e6c71d05f4d2@quicinc.com> To: Rob Herring , Frank Rowand , Krzysztof Kozlowski , Conor Dooley , Bjorn Andersson , Konrad Dybcio CC: Amrit Anand , Peter Griffin , Caleb Connolly , "Andy Gross" , Konrad Dybcio , "Doug Anderson" , Simon Glass , "Chen-Yu Tsai" , Julius Werner , "Humphreys, Jonathan" , Sumit Garg , "Jon Hunter" , Michal Simek , , , , , , Elliot Berman X-Mailer: b4 0.13.0 X-ClientProxiedBy: nalasex01a.na.qualcomm.com (10.47.209.196) To nasanex01b.na.qualcomm.com (10.46.141.250) X-QCInternal: smtphost X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Proofpoint-ORIG-GUID: DtQhngKaOHN50LilzhejxnCo_Zg7dO3B X-Proofpoint-GUID: DtQhngKaOHN50LilzhejxnCo_Zg7dO3B X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1039,Hydra:6.0.650,FMLib:17.12.28.16 definitions=2024-05-21_11,2024-05-21_01,2024-05-17_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 priorityscore=1501 bulkscore=0 lowpriorityscore=0 mlxscore=0 malwarescore=0 spamscore=0 impostorscore=0 clxscore=1015 phishscore=0 suspectscore=0 adultscore=0 mlxlogscore=788 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.19.0-2405010000 definitions=main-2405210139 From: Amrit Anand Update existing documentation for qcom,msm-id (interchangeably: qcom,soc-id) and qcom,board-id. Add support for qcom,pmic-id, qcom,oem-id to support multi-DTB selection on Qualcomm's boards. "qcom,soc-id", "qcom,board-id" and "qcom,pmic-id" are tuples of two 32-bit values. The "qcom,oem-id" is a tuple of one 32-bit value. Introduce macros to help generate SOC, board, PMIC and OEM identifiers. QCOM_SOC_ID and QCOM_SOC_REVISION can be used to generate qcom,msm-id. QCOM_BOARD_ID and QCOM_BOARD_SUBTYPE can be used to generate qcom,board-id. QCOM_PMIC_SID and QCOM_PMIC_MODEL can be used to generate qcom,pmic-id. QCOM_OEM_ID can be used to generate qcom,oem-id. Add entries for different types of SoC, boards, DDR type, Boot device type which are currently used by Qualcomm based bootloader. Signed-off-by: Amrit Anand Signed-off-by: Elliot Berman --- include/dt-bindings/arm/qcom,ids.h | 86 ++++++++++++++++++++++++++++++++++---- 1 file changed, 77 insertions(+), 9 deletions(-) diff --git a/include/dt-bindings/arm/qcom,ids.h b/include/dt-bindings/arm/qcom,ids.h index 51e0f6059410..0cb521f0c0e7 100644 --- a/include/dt-bindings/arm/qcom,ids.h +++ b/include/dt-bindings/arm/qcom,ids.h @@ -8,9 +8,14 @@ #define _DT_BINDINGS_ARM_QCOM_IDS_H /* - * The MSM chipset and hardware revision used by Qualcomm bootloaders, DTS for - * older chipsets (qcom,msm-id) and in socinfo driver: + * The MSM chipset ID (soc-id) used by Qualcomm bootloaders, + * and in socinfo driver: + * where, "a" indicates Qualcomm supported chipsets, example MSM8260, MSM8660 etc */ + +#define QCOM_SOC_ID(a) ((QCOM_ID_##a) && 0xffff) + + #define QCOM_ID_MSM8260 70 #define QCOM_ID_MSM8660 71 #define QCOM_ID_APQ8060 86 @@ -267,16 +272,79 @@ #define QCOM_ID_IPQ5302 595 #define QCOM_ID_IPQ5300 624 + /* The SOC revision used by Qualcomm bootloaders (soc-revision) */ + +#define QCOM_SOC_REVISION(a) (a & 0xff) + /* - * The board type and revision information, used by Qualcomm bootloaders and - * DTS for older chipsets (qcom,board-id): + * The board type and revision information (board-id), used by Qualcomm bootloaders + * where, "a" indicates board type which can be either MTP, QRD etc */ + #define QCOM_BOARD_ID(a, major, minor) \ - (((major & 0xff) << 16) | ((minor & 0xff) << 8) | QCOM_BOARD_ID_##a) + (((major & 0xff) << 16) | ((minor & 0xff) << 8) | ((QCOM_BOARD_ID_##a) & 0xff)) + +#define QCOM_BOARD_ID_MTP 0x8 +#define QCOM_BOARD_ID_LIQUID 0x9 +#define QCOM_BOARD_ID_DRAGONBOARD 0xA +#define QCOM_BOARD_ID_QRD 0x11 +#define QCOM_BOARD_ID_ADP 0x19 +#define QCOM_BOARD_ID_HDK 0x1F +#define QCOM_BOARD_ID_ATP 0x21 +#define QCOM_BOARD_ID_IDP 0x22 +#define QCOM_BOARD_ID_SBC 0x24 +#define QCOM_BOARD_ID_QXR 0x26 +#define QCOM_BOARD_ID_X100 0x26 +#define QCOM_BOARD_ID_CRD 0x28 + +/* + * The platform subtype is used by Qualcomm bootloaders and + * DTS (board-subtype) + * where, "a" indicates boot device type, it can be EMMC, + * UFS, NAND or OTHER (which can be used for default). + * "b" indicates DDR type which can be 128MB, 256MB, + * 512MB, 1024MB, 2048MB, 3072MB, 4096MB or ANY + * (which can be used for default). + */ +#define QCOM_BOARD_SUBTYPE(a, b, SUBTYPE) \ + (((QCOM_BOARD_BOOT_##a & 0xf) << 16) | ((QCOM_BOARD_DDRTYPE_##b & 0x7) << 8) | \ + (SUBTYPE & 0xff)) + +/* Board DDR Type where each value indicates higher limit */ +#define QCOM_BOARD_DDRTYPE_ANY 0x0 +#define QCOM_BOARD_DDRTYPE_128M 0x1 +#define QCOM_BOARD_DDRTYPE_256M 0x2 +#define QCOM_BOARD_DDRTYPE_512M 0x3 +#define QCOM_BOARD_DDRTYPE_1024M 0x4 +#define QCOM_BOARD_DDRTYPE_2048M 0x5 +#define QCOM_BOARD_DDRTYPE_3072M 0x6 +#define QCOM_BOARD_DDRTYPE_4096M 0x7 -#define QCOM_BOARD_ID_MTP 8 -#define QCOM_BOARD_ID_DRAGONBOARD 10 -#define QCOM_BOARD_ID_QRD 11 -#define QCOM_BOARD_ID_SBC 24 +/* Board Boot Device Type */ +#define QCOM_BOARD_BOOT_EMMC 0x0 +#define QCOM_BOARD_BOOT_UFS 0x1 +#define QCOM_BOARD_BOOT_NAND 0x2 +#define QCOM_BOARD_BOOT_OTHER 0x3 + +/* + * The PMIC slave id is used by Qualcomm bootloaders to + * indicates which PMIC is attached (pmic-sid) + */ + +#define QCOM_PMIC_SID(a) (a & 0xff) + +/* + * The PMIC ID is used by Qualcomm bootloaders to describe the ID + * of PMIC attached to bus described by SID (pmic-model) + */ + +#define QCOM_PMIC_MODEL(ID, major, minor) \ + (((major & 0xff) << 16) | ((minor & 0xff) << 8) | (ID & 0xff)) + +/* + * The OEM ID consists of 32 bit value to support OEM boards where they + * have slight differences on top of Qualcomm's standard boards + */ +#define QCOM_OEM_ID(a) (a & 0xffffffff) #endif /* _DT_BINDINGS_ARM_QCOM_IDS_H */ From patchwork Tue May 21 18:38:02 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Elliot Berman X-Patchwork-Id: 798010 Received: from mx0a-0031df01.pphosted.com (mx0a-0031df01.pphosted.com [205.220.168.131]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id C666214885B; Tue, 21 May 2024 18:40:45 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=205.220.168.131 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1716316847; cv=none; b=LJp2VQjib8uYFOGFNa4Ficey9F1FERe50443QEVQyz4gdhZdBfNrIZ+nnX5TRDyX2wMmf53umlKytFMAThxKRpzboFEBkgsnAOI0EXbJpHSn42Wynsezz8g204CrU4n3dx6Wu5GPMhHjGiCkUYa8NPQ4YjTL4YkslVGn+42W5Zk= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1716316847; c=relaxed/simple; bh=OTITmJIZA4Si7HogVcomdp51IgM6xst+VrN7IdSaVf8=; h=From:Date:Subject:MIME-Version:Content-Type:Message-ID:References: In-Reply-To:To:CC; b=jdLFUW8brDzLxMRrQH/33hiv3aBApEpt4HyFacV8d1nph5tsBkYrbfB5EcbC8oTJZXOe3pxL0HHQ31ukJfflj3zM9jLTzYuIxiDH88nLC4lN81PhtUH1sO8HKCAq/4BUroNpYclm1cm3nd9w/pPeAn+U7oVuBiy5mqZtjMs9uIk= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=quicinc.com; spf=pass smtp.mailfrom=quicinc.com; dkim=pass (2048-bit key) header.d=quicinc.com header.i=@quicinc.com header.b=gMRYkvEp; arc=none smtp.client-ip=205.220.168.131 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=quicinc.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=quicinc.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=quicinc.com header.i=@quicinc.com header.b="gMRYkvEp" Received: from pps.filterd (m0279864.ppops.net [127.0.0.1]) by mx0a-0031df01.pphosted.com (8.18.1.2/8.18.1.2) with ESMTP id 44LAFSRP010132; Tue, 21 May 2024 18:38:29 GMT DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=quicinc.com; h= from:date:subject:mime-version:content-type :content-transfer-encoding:message-id:references:in-reply-to:to :cc; s=qcppdkim1; bh=4tK395E3BNGPnsTLc8oXzJKzHE9Y3VtZZSlaaRbRHOc =; b=gMRYkvEpd9ILWOxDx/URCWTGEeoR+6mjzSTDpC8cyjgCyNJkzywxf/3L/uK WtUklj77XwhgYgDZYcn5A/ytu6kvdasYI/l14kI9+zUDQUce4l4qJAf/r2ou4ZYS f2GTYUDvdb8WCZKBf34tuA80uxoXcLUWcdCE/uw3sikdgn6TlQ0tqUMubGtLDJtd epoRbBCymrGk4PAhZngjUoYpQoMXYWHXdGo/HrQniPLQQCf1xIKjINTrbcgBbkug JPX8aI1i/MOxyZJdKSca02AZmEgyIuwMA7NCnWCgJh+cNhWczM7M1YP9P+Rr0csy T83S3dEzP/pCj4hEL6VolDYz7ZA== Received: from nasanppmta03.qualcomm.com (i-global254.qualcomm.com [199.106.103.254]) by mx0a-0031df01.pphosted.com (PPS) with ESMTPS id 3y6pqapmmj-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Tue, 21 May 2024 18:38:29 +0000 (GMT) Received: from nasanex01b.na.qualcomm.com (nasanex01b.na.qualcomm.com [10.46.141.250]) by NASANPPMTA03.qualcomm.com (8.17.1.5/8.17.1.5) with ESMTPS id 44LIcRMg016643 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Tue, 21 May 2024 18:38:28 GMT Received: from hu-eberman-lv.qualcomm.com (10.49.16.6) by nasanex01b.na.qualcomm.com (10.46.141.250) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1544.9; Tue, 21 May 2024 11:38:27 -0700 From: Elliot Berman Date: Tue, 21 May 2024 11:38:02 -0700 Subject: [PATCH RFC v3 5/9] dt-bindings: board: Document board-ids for Qualcomm devices Precedence: bulk X-Mailing-List: linux-arm-msm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-ID: <20240521-board-ids-v3-5-e6c71d05f4d2@quicinc.com> References: <20240521-board-ids-v3-0-e6c71d05f4d2@quicinc.com> In-Reply-To: <20240521-board-ids-v3-0-e6c71d05f4d2@quicinc.com> To: Rob Herring , Frank Rowand , Krzysztof Kozlowski , Conor Dooley , Bjorn Andersson , Konrad Dybcio CC: Amrit Anand , Peter Griffin , Caleb Connolly , "Andy Gross" , Konrad Dybcio , "Doug Anderson" , Simon Glass , "Chen-Yu Tsai" , Julius Werner , "Humphreys, Jonathan" , Sumit Garg , "Jon Hunter" , Michal Simek , , , , , , Elliot Berman X-Mailer: b4 0.13.0 X-ClientProxiedBy: nalasex01a.na.qualcomm.com (10.47.209.196) To nasanex01b.na.qualcomm.com (10.46.141.250) X-QCInternal: smtphost X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Proofpoint-GUID: wzhMXF8efEPNHx8infPzGAvwXcwa_CcT X-Proofpoint-ORIG-GUID: wzhMXF8efEPNHx8infPzGAvwXcwa_CcT X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1039,Hydra:6.0.650,FMLib:17.12.28.16 definitions=2024-05-21_11,2024-05-21_01,2024-05-17_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 lowpriorityscore=0 impostorscore=0 suspectscore=0 bulkscore=0 mlxscore=0 adultscore=0 spamscore=0 malwarescore=0 mlxlogscore=999 clxscore=1015 priorityscore=1501 phishscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.19.0-2405010000 definitions=main-2405210140 Document board identifiers for devices from Qualcomm Technologies, Inc. These platforms are described with two mechanisms: the hardware SoC registers and the "CDT" which is in a RO storage. The hardware SoC registers describe both the SoC (e.g. SM8650, SC7180) as well as revision. Add qcom,soc to describe only the SoC itself and qcom,soc-version when the devicetree only works with a certain revision. The CDT describes all other information about the board/platform. Besides the platform type (e.g. MTP, ADP, CRD), there are 3 further levels of versioning as well as additional fields to describe the PMIC and boot storage device attached. The 3 levels of versioning are a subtype, major, and minor version of the platform. Support describing just the platform type (qcom,platform), the platform type and subtype (qcom,platform-type), and all 4 numbers (qcom,platform-version). Signed-off-by: Elliot Berman --- .../devicetree/bindings/board/qcom,board-id.yaml | 144 +++++++++++++++++++++ 1 file changed, 144 insertions(+) diff --git a/Documentation/devicetree/bindings/board/qcom,board-id.yaml b/Documentation/devicetree/bindings/board/qcom,board-id.yaml new file mode 100644 index 000000000000..53ba7acab4c3 --- /dev/null +++ b/Documentation/devicetree/bindings/board/qcom,board-id.yaml @@ -0,0 +1,144 @@ +# SPDX-License-Identifier: BSD-2-Clause +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/board/qcom,board-id.yaml +$schema: http://devicetree.org/meta-schemas/core.yaml + +title: Board identifiers for devices from Qualcomm Technologies, Inc. +description: Board identifiers for devices from Qualcomm Technologies, Inc. + +maintainers: + - Elliot Berman + +properties: + $nodename: + const: 'board-id' + + qcom,soc: + description: + List of Qualcomm SoCs this devicetree is applicable to. + + qcom,soc-version: + items: + items: + - description: Qualcomm SoC identifier + - description: SoC version + + qcom,platform: + description: + List of Qualcomm platforms this devicetree is applicable to. + + qcom,platform-type: + items: + items: + - description: Qualcomm platform type identifier + - description: Qualcomm platform subtype + + qcom,platform-version: + items: + items: + - description: Qualcomm platform type identifier + - description: Qualcomm platform subtype + - description: Qualcomm platform major and minor version. + + qcom,boot-device: + description: + Boot device type + + qcom,pmic: + description: + List of Qualcomm PMIC attaches + + qcom,pmic-id: + items: + items: + - description: Qualcomm PMIC identifier + - description: Qualcomm PMIC revision + +allOf: + # either describe soc or soc-version; it's confusing to have both + - if: + properties: + qcom,soc: true + then: + properties: + qcom,soc-version: false + - if: + properties: + qcom,soc-version: true + then: + properties: + qcom,soc: false + + # describe one of platform, platform-type, or platform-version; it's confusing to have multiple + - if: + properties: + qcom,platform: true + then: + properties: + qcom,platform-type: false + qcom,platform-version: false + - if: + properties: + qcom,platform-type: true + then: + properties: + qcom,platform: false + qcom,platform-version: false + - if: + properties: + qcom,platform: true + then: + properties: + qcom,platform: false + qcom,platform-type: false + + # either describe pmic or pmic-id; it's confusing to have both + - if: + properties: + qcom,pmic: true + then: + properties: + qcom,pmic-id: false + - if: + properties: + qcom,pmic-id: true + then: + properties: + qcom,pmic: false + +additionalProperties: true + +examples: + - | + #include + / { + compatible = "qcom,sm8650"; + board-id { + qcom,soc = ; + qcom,platform = ; + }; + }; + + - | + #include + / { + compatible = "qcom,sm8650"; + board-id { + qcom,soc-version = , + ; + qcom,platform-type = , ; + }; + }; + + - | + #include + / { + compatible = "qcom,sm8650"; + board-id { + qcom,soc = ; + qcom,platform-version = , + ; + qcom,boot-device = ; + }; + }; From patchwork Tue May 21 18:38:05 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Elliot Berman X-Patchwork-Id: 798008 Received: from mx0a-0031df01.pphosted.com (mx0a-0031df01.pphosted.com [205.220.168.131]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 1A489149007; Tue, 21 May 2024 18:40:46 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=205.220.168.131 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1716316848; cv=none; b=OQBNpEk9EzOeaBnoUqyodLMRdELmwW+1o+fr4X5g8gxqFXBXtohz+qZz6T5XFtPhOcOgmIqqBvdpQLsXI3CJPS6PmUrnTJ2YwsPD4w0b8hWdLPi4BTHyvxxfDCRxX4eiPtWaeP7VVszZdxIxLl5cP6lsf+oiUkrBnOPovOUDKbk= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1716316848; c=relaxed/simple; bh=/zNvAkri9bGB0LyQN0umY2WEIdcVy/YBMpd1hWw/MMI=; h=From:Date:Subject:MIME-Version:Content-Type:Message-ID:References: In-Reply-To:To:CC; b=l8Rxzt5YA6mhEiT4kOruNibC6SMm66hEXDud9ciKpiiNO4FNlENgkoASLMKXnT1B6r/6dbGddzFUlTrrRRqW1V8yIDbNvnSVR/ysS5//ZuzcPoxaipQk2rW3fWCMvnrsUAimZn1JlQYvvCdSdX/6UMx4K9u6GDs+xQ3AIS+OR7c= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=quicinc.com; spf=pass smtp.mailfrom=quicinc.com; dkim=pass (2048-bit key) header.d=quicinc.com header.i=@quicinc.com header.b=ar/GOIDC; arc=none smtp.client-ip=205.220.168.131 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=quicinc.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=quicinc.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=quicinc.com header.i=@quicinc.com header.b="ar/GOIDC" Received: from pps.filterd (m0279864.ppops.net [127.0.0.1]) by mx0a-0031df01.pphosted.com (8.18.1.2/8.18.1.2) with ESMTP id 44LBtqRi008286; Tue, 21 May 2024 18:38:30 GMT DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=quicinc.com; h= from:date:subject:mime-version:content-type :content-transfer-encoding:message-id:references:in-reply-to:to :cc; s=qcppdkim1; bh=RFak83ZSaOcO33zmXVEQI6tnblOmnteiUxHPFFzQUQQ =; b=ar/GOIDCM8Sr/6pLo8AbESb1jj34AiqOqpLBrrgc6nG8/Nz7xE8cSy0scKk u91V4hS2NrP8lR7Ca3Nk1gON0Z87YBywasx8v9dE1B5lrGuA9wjHpVo+E1U0FMGq YVW5C5Ws5c8E7Cuwk3ftzpuXNOjVih9CxgvXkYCNapa26F99GfJe/hBhjMM6VQKZ Iw2KfS8r2BrI13RS6XYMc3aR4E08W359FWPdgjSumztnGbiG4Jgwi9MUROgXKe+0 5KUZlxklU5zh/5/5PRkv+PgrRR89cM+HCSP2ZYdSgnk5HwRwwq4sKYWF8az0sZFe /qeHCObkTy2X1irsuaIaPZfGl9w== Received: from nasanppmta02.qualcomm.com (i-global254.qualcomm.com [199.106.103.254]) by mx0a-0031df01.pphosted.com (PPS) with ESMTPS id 3y6pqapmmp-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Tue, 21 May 2024 18:38:30 +0000 (GMT) Received: from nasanex01b.na.qualcomm.com (nasanex01b.na.qualcomm.com [10.46.141.250]) by NASANPPMTA02.qualcomm.com (8.17.1.5/8.17.1.5) with ESMTPS id 44LIcTb4014870 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Tue, 21 May 2024 18:38:29 GMT Received: from hu-eberman-lv.qualcomm.com (10.49.16.6) by nasanex01b.na.qualcomm.com (10.46.141.250) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1544.9; Tue, 21 May 2024 11:38:28 -0700 From: Elliot Berman Date: Tue, 21 May 2024 11:38:05 -0700 Subject: [PATCH RFC v3 8/9] arm64: boot: dts: qcom: sm8550: Split into overlays Precedence: bulk X-Mailing-List: linux-arm-msm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-ID: <20240521-board-ids-v3-8-e6c71d05f4d2@quicinc.com> References: <20240521-board-ids-v3-0-e6c71d05f4d2@quicinc.com> In-Reply-To: <20240521-board-ids-v3-0-e6c71d05f4d2@quicinc.com> To: Rob Herring , Frank Rowand , Krzysztof Kozlowski , Conor Dooley , Bjorn Andersson , Konrad Dybcio CC: Amrit Anand , Peter Griffin , Caleb Connolly , "Andy Gross" , Konrad Dybcio , "Doug Anderson" , Simon Glass , "Chen-Yu Tsai" , Julius Werner , "Humphreys, Jonathan" , Sumit Garg , "Jon Hunter" , Michal Simek , , , , , , Elliot Berman X-Mailer: b4 0.13.0 X-ClientProxiedBy: nalasex01a.na.qualcomm.com (10.47.209.196) To nasanex01b.na.qualcomm.com (10.46.141.250) X-QCInternal: smtphost X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Proofpoint-GUID: ElsVSSpLuJT7E_mI2Kgue_DaNc_8N-yN X-Proofpoint-ORIG-GUID: ElsVSSpLuJT7E_mI2Kgue_DaNc_8N-yN X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1039,Hydra:6.0.650,FMLib:17.12.28.16 definitions=2024-05-21_11,2024-05-21_01,2024-05-17_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 lowpriorityscore=0 impostorscore=0 suspectscore=0 bulkscore=0 mlxscore=0 adultscore=0 spamscore=0 malwarescore=0 mlxlogscore=999 clxscore=1015 priorityscore=1501 phishscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.19.0-2405010000 definitions=main-2405210140 Generic sm8550 devicetree is split into a dtsi. Move it into its own DTB and preserve the boards as overlays. When not using overlays, 264 KB needed to store the sm8550-mtp.dtb and sm8550-qrd.dtb. When using overlays, 188 KB is needed to store sm8550.dtb, sm8550-mtp.dtbo, and sm8550-qrd.dtbo; where the overlays are ~36 KB. Also add the board-ids for these DTBs. This change is not intended to be merged, it breaks aliases and I doubt it boots correct. The intent here is to show how board-id could be used with a DTB and DTBO. Signed-off-by: Elliot Berman --- arch/arm64/boot/dts/qcom/Makefile | 4 ++++ .../dts/qcom/{sm8550-mtp.dts => sm8550-mtp.dtso} | 24 ++++++++++++++++++++-- .../dts/qcom/{sm8550-qrd.dts => sm8550-qrd.dtso} | 22 +++++++++++++++++--- .../boot/dts/qcom/{sm8550.dtsi => sm8550.dts} | 8 ++++++++ 4 files changed, 53 insertions(+), 5 deletions(-) diff --git a/arch/arm64/boot/dts/qcom/Makefile b/arch/arm64/boot/dts/qcom/Makefile index 39889d5f8e12..7f137f274d8c 100644 --- a/arch/arm64/boot/dts/qcom/Makefile +++ b/arch/arm64/boot/dts/qcom/Makefile @@ -233,6 +233,10 @@ dtb-$(CONFIG_ARCH_QCOM) += sm8450-hdk.dtb dtb-$(CONFIG_ARCH_QCOM) += sm8450-qrd.dtb dtb-$(CONFIG_ARCH_QCOM) += sm8450-sony-xperia-nagara-pdx223.dtb dtb-$(CONFIG_ARCH_QCOM) += sm8450-sony-xperia-nagara-pdx224.dtb + +sm8550-mtp-dtbs := sm8550.dtb sm8550-mtp.dtbo +sm8550-qrd-dtbs := sm8550.dtb sm8550-qrd.dtbo + dtb-$(CONFIG_ARCH_QCOM) += sm8550-mtp.dtb dtb-$(CONFIG_ARCH_QCOM) += sm8550-qrd.dtb dtb-$(CONFIG_ARCH_QCOM) += sm8650-mtp.dtb diff --git a/arch/arm64/boot/dts/qcom/sm8550-mtp.dts b/arch/arm64/boot/dts/qcom/sm8550-mtp.dtso similarity index 98% rename from arch/arm64/boot/dts/qcom/sm8550-mtp.dts rename to arch/arm64/boot/dts/qcom/sm8550-mtp.dtso index c1135ad5fa69..0ee4614719ca 100644 --- a/arch/arm64/boot/dts/qcom/sm8550-mtp.dts +++ b/arch/arm64/boot/dts/qcom/sm8550-mtp.dtso @@ -4,9 +4,12 @@ */ /dts-v1/; +/plugin/; +#include +#include #include -#include "sm8550.dtsi" +#include #include "pm8010.dtsi" #include "pm8550.dtsi" #include "pm8550b.dtsi" @@ -17,13 +20,30 @@ #include "pmr735d_a.dtsi" #include "pmr735d_b.dtsi" +#define BOARD_ID qcom,soc = ; \ + qcom,platform-type = + / { + board-id { + BOARD_ID; + }; +}; + +&{/} { model = "Qualcomm Technologies, Inc. SM8550 MTP"; compatible = "qcom,sm8550-mtp", "qcom,sm8550"; chassis-type = "handset"; + /** + * Redefine the overlay in the DTBO so the sm8550-mtp.dtb that Kbuild + * generates has accurate board-id. + */ + board-id { + BOARD_ID; + }; + aliases { - serial0 = &uart7; + // serial0 = &uart7; }; wcd938x: audio-codec { diff --git a/arch/arm64/boot/dts/qcom/sm8550-qrd.dts b/arch/arm64/boot/dts/qcom/sm8550-qrd.dtso similarity index 98% rename from arch/arm64/boot/dts/qcom/sm8550-qrd.dts rename to arch/arm64/boot/dts/qcom/sm8550-qrd.dtso index d401d63e5c4d..f756c50a80b9 100644 --- a/arch/arm64/boot/dts/qcom/sm8550-qrd.dts +++ b/arch/arm64/boot/dts/qcom/sm8550-qrd.dtso @@ -4,10 +4,14 @@ */ /dts-v1/; +/plugin/; +#include +#include #include +#include #include -#include "sm8550.dtsi" +#include #include "pm8010.dtsi" #include "pm8550.dtsi" #include "pm8550b.dtsi" @@ -19,13 +23,25 @@ #include "pmr735d_b.dtsi" / { + board-id { + qcom,soc = ; + qcom,platform = ; + }; +}; + +&{/} { model = "Qualcomm Technologies, Inc. SM8550 QRD"; compatible = "qcom,sm8550-qrd", "qcom,sm8550"; chassis-type = "handset"; + board-id { + qcom,soc = ; + qcom,platform = ; + }; + aliases { - serial0 = &uart7; - serial1 = &uart14; + // serial0 = &uart7; + // serial1 = &uart14; }; wcd938x: audio-codec { diff --git a/arch/arm64/boot/dts/qcom/sm8550.dtsi b/arch/arm64/boot/dts/qcom/sm8550.dts similarity index 99% rename from arch/arm64/boot/dts/qcom/sm8550.dtsi rename to arch/arm64/boot/dts/qcom/sm8550.dts index c68e08747b6f..3546ea4b96f1 100644 --- a/arch/arm64/boot/dts/qcom/sm8550.dtsi +++ b/arch/arm64/boot/dts/qcom/sm8550.dts @@ -3,6 +3,9 @@ * Copyright (c) 2022, Linaro Limited */ +/dts-v1/; + +#include #include #include #include @@ -32,6 +35,11 @@ / { chosen { }; + board_id: board-id { + qcom,soc-version = , + ; + }; + clocks { xo_board: xo-board { compatible = "fixed-clock"; From patchwork Tue May 21 18:38:06 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Elliot Berman X-Patchwork-Id: 798011 Received: from mx0a-0031df01.pphosted.com (mx0a-0031df01.pphosted.com [205.220.168.131]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id E044F14884F; Tue, 21 May 2024 18:40:44 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=205.220.168.131 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1716316846; cv=none; b=ObzgBNLrbDZftBIdta5UjXQ0XElVLc9oXUDNxT4HSgsKfrntO2R81vrRveXc91zK4RaBATS+sRrHvomm8BsgUzsSTO+DkLz8AnPfNlgMWy/wpBmRMsm0d2Jb3RH3yiuj1cyrLX2C7QQ6PMhC4dA6XE3eJifhWrYAif3KwFLUQ0M= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1716316846; c=relaxed/simple; bh=KNChU/zTxeIANQKXeI/F7UaYoMhf0zs0ZKhrbCNbnxg=; h=From:Date:Subject:MIME-Version:Content-Type:Message-ID:References: In-Reply-To:To:CC; b=bgAX3VYlh9owLAHvB2uCIHurnOTjoAbMfOm2aKYKY4ntNBPfQIl609M/WX1uooCeEJ1W0FzOTMap0sLQ9+MCxL0lvjGxAR0PXw/ByjPxVTbZf12/FCzaQQuwzrJrLKtWi2Qb6W0FjehNOdwb0D7SscYppBF86Qru0tyAnTWbo8g= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=quicinc.com; spf=pass smtp.mailfrom=quicinc.com; dkim=pass (2048-bit key) header.d=quicinc.com header.i=@quicinc.com header.b=T3Gk4e3K; arc=none smtp.client-ip=205.220.168.131 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=quicinc.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=quicinc.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=quicinc.com header.i=@quicinc.com header.b="T3Gk4e3K" Received: from pps.filterd (m0279864.ppops.net [127.0.0.1]) by mx0a-0031df01.pphosted.com (8.18.1.2/8.18.1.2) with ESMTP id 44L9xeRM004387; Tue, 21 May 2024 18:38:31 GMT DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=quicinc.com; h= from:date:subject:mime-version:content-type :content-transfer-encoding:message-id:references:in-reply-to:to :cc; s=qcppdkim1; bh=T5bkdynyzEdOYxsDcWGWLOmwsNAs+8sORtZJnwmIXto =; b=T3Gk4e3KMPegX3QRNTMViBKhX9eY9alLLW7mOuu35a1s9tEyp9obn+xowKL uNKE9UmbFEY+yeZJBksG8CZ40z0iaMjOSe2FppYbxcgF0QTH/eTsyZyCiicfJ445 G+sdnIsYHMFKtY6dNtvIs+PHFd/CIr/5bBiGkqIVGkSgnCj0droReA0GgP9Hs0dn PbGZ81dIsC20qxs8vDQ8+jSNEtDex4uHUa3IUv0o0CR3Byuw+zHlfsfPlc5DCnCi Ufq404XRm5832TTAjoCZnSKlbpYPTILK74/aotM+ShhNqKfjj1oKke7Bp0w9ewus jEY3iUq4P4txtkjiIrI0M1EKn2Q== Received: from nasanppmta03.qualcomm.com (i-global254.qualcomm.com [199.106.103.254]) by mx0a-0031df01.pphosted.com (PPS) with ESMTPS id 3y6pqapmmq-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Tue, 21 May 2024 18:38:30 +0000 (GMT) Received: from nasanex01b.na.qualcomm.com (nasanex01b.na.qualcomm.com [10.46.141.250]) by NASANPPMTA03.qualcomm.com (8.17.1.5/8.17.1.5) with ESMTPS id 44LIcUII016680 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Tue, 21 May 2024 18:38:30 GMT Received: from hu-eberman-lv.qualcomm.com (10.49.16.6) by nasanex01b.na.qualcomm.com (10.46.141.250) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1544.9; Tue, 21 May 2024 11:38:29 -0700 From: Elliot Berman Date: Tue, 21 May 2024 11:38:06 -0700 Subject: [PATCH RFC v3 9/9] tools: board-id: Add test suite Precedence: bulk X-Mailing-List: linux-arm-msm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-ID: <20240521-board-ids-v3-9-e6c71d05f4d2@quicinc.com> References: <20240521-board-ids-v3-0-e6c71d05f4d2@quicinc.com> In-Reply-To: <20240521-board-ids-v3-0-e6c71d05f4d2@quicinc.com> To: Rob Herring , Frank Rowand , Krzysztof Kozlowski , Conor Dooley , Bjorn Andersson , Konrad Dybcio CC: Amrit Anand , Peter Griffin , Caleb Connolly , "Andy Gross" , Konrad Dybcio , "Doug Anderson" , Simon Glass , "Chen-Yu Tsai" , Julius Werner , "Humphreys, Jonathan" , Sumit Garg , "Jon Hunter" , Michal Simek , , , , , , Elliot Berman X-Mailer: b4 0.13.0 X-ClientProxiedBy: nalasex01a.na.qualcomm.com (10.47.209.196) To nasanex01b.na.qualcomm.com (10.46.141.250) X-QCInternal: smtphost X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Proofpoint-GUID: Ens5k3tAv93QYqUh2XVDuDq_VJmZVmkJ X-Proofpoint-ORIG-GUID: Ens5k3tAv93QYqUh2XVDuDq_VJmZVmkJ X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1039,Hydra:6.0.650,FMLib:17.12.28.16 definitions=2024-05-21_11,2024-05-21_01,2024-05-17_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 lowpriorityscore=0 impostorscore=0 suspectscore=0 bulkscore=0 mlxscore=0 adultscore=0 spamscore=0 malwarescore=0 mlxlogscore=999 clxscore=1015 priorityscore=1501 phishscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.19.0-2405010000 definitions=main-2405210140 Add a short test suite to demonstrate board-id selection and scoring. This patch isn't intended to be merged here. After compiling the kernel (esp. arch/arm64/boot/dts/qcom DTBs), run tools/board-id/test.py. The test cases provide a hypothetical firmware-provied board-id and compares expected output for which DTBs gets matched. Signed-off-by: Elliot Berman --- tools/board-id/test.py | 151 +++++++++++++++++++++++++++++++++++++++++++++++++ 1 file changed, 151 insertions(+) diff --git a/tools/board-id/test.py b/tools/board-id/test.py new file mode 100644 index 000000000000..687b31ad73d2 --- /dev/null +++ b/tools/board-id/test.py @@ -0,0 +1,151 @@ +from collections import namedtuple +import glob +import os +import subprocess +from tempfile import NamedTemporaryFile +import unittest + + +LINUX_ROOT = os.path.abspath(os.path.join(__file__, "..", "..", "..")) +ENV_WITH_DTC = { + "PATH": os.path.join(LINUX_ROOT, "scripts", "dtc") + os.pathsep + os.environ["PATH"] +} + + +TestCase = namedtuple("TestCase", ["score_all", "board_id", "output"]) + +test_cases = [ + TestCase( + # A board_id that could be provided by firmware + board_id=""" + qcom,soc = ; + qcom,soc-version = ; + qcom,platform = ; + qcom,platform-type = ; + qcom,platform-version = ; + qcom,boot-device = ; + """, + score_all=False, + output=""" + qcom/sm8650-mtp.dtb + """, + ), + TestCase( + # A board_id that could be provided by firmware + board_id=""" + qcom,soc = ; + qcom,soc-version = ; + qcom,platform = ; + qcom,platform-type = ; + qcom,platform-version = ; + qcom,boot-device = ; + """, + score_all=True, + output=""" + qcom/sm8550.dtb: 1 + qcom/sm8550-mtp.dtb: 3 + qcom/sm8550-mtp.dtbo: 2 + """, + ), +] + + +def compile_board_id(board_id: str): + dts = f""" + /dts-v1/; + + #include + + / {{ + compatible = "linux,dummy"; + board-id {{ + {board_id} + }}; + }}; + """ + dts_processed = subprocess.run( + [ + "gcc", + "-E", + "-nostdinc", + f"-I{os.path.join(LINUX_ROOT, 'scripts', 'dtc', 'include-prefixes')}", + "-undef", + "-D__DTS__", + "-x", + "assembler-with-cpp", + "-o" "-", + "-", + ], + stdout=subprocess.PIPE, + input=dts.encode("utf-8"), + check=True, + ) + dtc = subprocess.run( + ["dtc", "-I", "dts", "-O", "dtb", "-o", "-", "-"], + stdout=subprocess.PIPE, + input=dts_processed.stdout, + env=ENV_WITH_DTC, + ) + return dtc.stdout + + +def select_boards(score_all, fwdtb): + with NamedTemporaryFile() as fwdtb_file: + fwdtb_file.write(fwdtb) + fwdtb_file.flush() + root_dir = os.path.join(LINUX_ROOT, "arch", "arm64", "boot", "dts") + return subprocess.run( + filter( + bool, + [ + "fdt-select-board", + "-a" if score_all else None, + "-r", + fwdtb_file.name, + *glob.glob( + "qcom/*.dtb*", + root_dir=root_dir, + ), + ], + ), + stdout=subprocess.PIPE, + text=True, + cwd=root_dir, + env=ENV_WITH_DTC, + stderr=subprocess.STDOUT, + ) + + +def fixup_lines(s): + return '\n'.join(filter(bool, sorted(_s.strip() for _s in s.split('\n')))) + + +class TestBoardIds(unittest.TestCase): + def __init__(self, index: int, args: TestCase) -> None: + super().__init__() + self.args = args + self.index = index + + def runTest(self): + fwdtb = compile_board_id(self.args.board_id) + output = select_boards(self.args.score_all, fwdtb) + if output.stderr: + self.assertMultiLineEqual(output.stderr, "") + expected = fixup_lines(self.args.output) + actual = fixup_lines(output.stdout) + self.assertMultiLineEqual(expected, actual) + + def __str__(self): + return f"Test case {self.index}" + + +def suite(): + suite = unittest.TestSuite() + for idx, test in enumerate(test_cases): + suite.addTest(TestBoardIds(idx + 1, test)) + return suite + + +if __name__ == "__main__": + runner = unittest.TextTestRunner() + runner.run(suite())