From patchwork Sat May 25 23:29:22 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: =?utf-8?b?SmFzb24tSkggTGluICjmnpfnnb/npaUp?= X-Patchwork-Id: 799036 Received: from mailgw02.mediatek.com (unknown [210.61.82.184]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 7575112A172; Sat, 25 May 2024 23:29:41 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=210.61.82.184 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1716679783; cv=none; b=T6UIQFBip9pEPqDqN5lgoVGs0U517T4fE8e9BWypwuurTdNDhPrGR4fvYy13133NFYYT8Rmkg3pdBKI7IYklTWDlfwt20fLVARU5WzIbBwyhJaz0esyX8Cgeg/sqICin6LxX2fp/xaOsSm46gQEyX0Gl9aWtdsjl7OcZw1h+ZZg= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1716679783; c=relaxed/simple; bh=aR5P48A0xy2jVUKre35XATRvEBuSmtNAp87wGaXHkCs=; h=From:To:CC:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version:Content-Type; b=BvI+k0Pk9X0VfZjiZyQ0AXWQI0fWFMIl4nw7m+/Pdf0LqMQJda458Sh40AQNRP2Yrx33YRuUs754bfsKOui7CUg4py2b4fPio5AK2WbgQWv7HNv2hENAZGFH4cBnfMKy6PbYrMfQunSq6nb6G5UPuxlGz3qglXZQmiusCuDvzdY= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=mediatek.com; spf=pass smtp.mailfrom=mediatek.com; dkim=pass (1024-bit key) header.d=mediatek.com header.i=@mediatek.com header.b=dhTGVw77; arc=none smtp.client-ip=210.61.82.184 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=mediatek.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=mediatek.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=mediatek.com header.i=@mediatek.com header.b="dhTGVw77" X-UUID: a31ef9a41aee11efbfff99f2466cf0b4-20240526 DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=mediatek.com; s=dk; h=Content-Type:MIME-Version:References:In-Reply-To:Message-ID:Date:Subject:CC:To:From; bh=5VmR6jlRXpOCtlALHy2T0+cuGx0Qi/VITbN/ISJH/Ng=; b=dhTGVw77+tcBk+o3ayDHj9mNMDfUHb2Of7v2rmAv9QaE0xBJWh5a6po1+pXPmOmGHKAXlRF5Vnswmq7BZn7XmgXyenTAkLfK2lIv/ugVxZTElBVkkBfGGmxDiKhk6f5a8vh+JT9HdDxykfSBX2jrUrvNtPS/DrhMPiQ3EeWyWsI=; X-CID-P-RULE: Release_Ham X-CID-O-INFO: VERSION:1.1.38, REQID:fe4f7b84-3ef4-445d-889e-ff19c4d421b4, IP:0, U RL:0,TC:0,Content:0,EDM:0,RT:0,SF:0,FILE:0,BULK:0,RULE:Release_Ham,ACTION: release,TS:0 X-CID-META: VersionHash:82c5f88, CLOUDID:e9ee4f84-4f93-4875-95e7-8c66ea833d57, B ulkID:nil,BulkQuantity:0,Recheck:0,SF:102,TC:nil,Content:0,EDM:-3,IP:nil,U RL:11|1,File:nil,RT:nil,Bulk:nil,QS:nil,BEC:nil,COL:0,OSI:0,OSA:0,AV:0,LES :1,SPR:NO,DKR:0,DKP:0,BRR:0,BRE:0 X-CID-BVR: 0 X-CID-BAS: 0,_,0,_ X-CID-FACTOR: TF_CID_SPAM_SNR,TF_CID_SPAM_ULN X-UUID: a31ef9a41aee11efbfff99f2466cf0b4-20240526 Received: from mtkmbs11n2.mediatek.inc [(172.21.101.187)] by mailgw02.mediatek.com (envelope-from ) (Generic MTA with TLSv1.2 ECDHE-RSA-AES256-GCM-SHA384 256/256) with ESMTP id 1899028262; Sun, 26 May 2024 07:29:31 +0800 Received: from mtkmbs13n1.mediatek.inc (172.21.101.193) by MTKMBS09N1.mediatek.inc (172.21.101.35) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1118.26; Sun, 26 May 2024 07:29:30 +0800 Received: from mtksdccf07.mediatek.inc (172.21.84.99) by mtkmbs13n1.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.2.1118.26 via Frontend Transport; Sun, 26 May 2024 07:29:30 +0800 From: Jason-JH.Lin To: Chun-Kuang Hu , AngeloGioacchino Del Regno , Maxime Ripard CC: David Airlie , Daniel Vetter , Matthias Brugger , , , , , , , , Jason-ch Chen , "Jason-JH . Lin" , Singo Chang , Nancy Lin , Shawn Sung , , Jeffrey Kardatzke , CK Hu , Hsiao Chien Sung Subject: [PATCH v6 1/7] drm/mediatek: Add interface to allocate MediaTek GEM buffer Date: Sun, 26 May 2024 07:29:22 +0800 Message-ID: <20240525232928.5524-2-jason-jh.lin@mediatek.com> X-Mailer: git-send-email 2.18.0 In-Reply-To: <20240525232928.5524-1-jason-jh.lin@mediatek.com> References: <20240525232928.5524-1-jason-jh.lin@mediatek.com> Precedence: bulk X-Mailing-List: linux-media@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-MTK: N From: CK Hu Add an interface to allocate MediaTek GEM buffers, allow the IOCTLs to be used by render nodes. This patch also sets the RENDER driver feature. TODO: Drop this path after we change all the usages of this ioctl to DMA_HEAP_IOCTL_ALLOC in the user sapce. Signed-off-by: CK Hu Signed-off-by: Hsiao Chien Sung --- drivers/gpu/drm/mediatek/mtk_drm_drv.c | 13 +++++++- drivers/gpu/drm/mediatek/mtk_gem.c | 31 +++++++++++++++++ drivers/gpu/drm/mediatek/mtk_gem.h | 8 +++++ include/uapi/drm/mediatek_drm.h | 46 ++++++++++++++++++++++++++ 4 files changed, 97 insertions(+), 1 deletion(-) create mode 100644 include/uapi/drm/mediatek_drm.h diff --git a/drivers/gpu/drm/mediatek/mtk_drm_drv.c b/drivers/gpu/drm/mediatek/mtk_drm_drv.c index b5f605751b0a..11e1555e9aa4 100644 --- a/drivers/gpu/drm/mediatek/mtk_drm_drv.c +++ b/drivers/gpu/drm/mediatek/mtk_drm_drv.c @@ -23,6 +23,7 @@ #include #include #include +#include #include "mtk_crtc.h" #include "mtk_ddp_comp.h" @@ -570,6 +571,11 @@ static void mtk_drm_kms_deinit(struct drm_device *drm) component_unbind_all(drm->dev, drm); } +static const struct drm_ioctl_desc mtk_ioctls[] = { + DRM_IOCTL_DEF_DRV(MTK_GEM_CREATE, mtk_gem_create_ioctl, + DRM_UNLOCKED | DRM_AUTH | DRM_RENDER_ALLOW), +}; + DEFINE_DRM_GEM_FOPS(mtk_drm_fops); /* @@ -585,12 +591,17 @@ static struct drm_gem_object *mtk_gem_prime_import(struct drm_device *dev, } static const struct drm_driver mtk_drm_driver = { - .driver_features = DRIVER_MODESET | DRIVER_GEM | DRIVER_ATOMIC, + .driver_features = DRIVER_MODESET | DRIVER_GEM | DRIVER_ATOMIC | + DRIVER_RENDER, .dumb_create = mtk_gem_dumb_create, .gem_prime_import = mtk_gem_prime_import, .gem_prime_import_sg_table = mtk_gem_prime_import_sg_table, + + .ioctls = mtk_ioctls, + .num_ioctls = ARRAY_SIZE(mtk_ioctls), + .fops = &mtk_drm_fops, .name = DRIVER_NAME, diff --git a/drivers/gpu/drm/mediatek/mtk_gem.c b/drivers/gpu/drm/mediatek/mtk_gem.c index a172456d1d7b..91f6cfa3f1b7 100644 --- a/drivers/gpu/drm/mediatek/mtk_gem.c +++ b/drivers/gpu/drm/mediatek/mtk_gem.c @@ -5,9 +5,11 @@ #include #include +#include #include #include +#include #include #include #include @@ -286,3 +288,32 @@ void mtk_gem_prime_vunmap(struct drm_gem_object *obj, struct iosys_map *map) mtk_gem->kvaddr = NULL; kfree(mtk_gem->pages); } + +int mtk_gem_create_ioctl(struct drm_device *dev, void *data, + struct drm_file *file_priv) +{ + struct mtk_gem_obj *mtk_gem; + struct drm_mtk_gem_create *args = data; + int ret; + + mtk_gem = mtk_gem_create(dev, args->size, false); + if (IS_ERR(mtk_gem)) + return PTR_ERR(mtk_gem); + + /* + * allocate a id of idr table where the obj is registered + * and handle has the id what user can see. + */ + ret = drm_gem_handle_create(file_priv, &mtk_gem->base, &args->handle); + if (ret) + goto err_handle_create; + + /* drop reference from allocate - handle holds it now. */ + drm_gem_object_put(&mtk_gem->base); + + return 0; + +err_handle_create: + mtk_gem_free_object(&mtk_gem->base); + return ret; +} diff --git a/drivers/gpu/drm/mediatek/mtk_gem.h b/drivers/gpu/drm/mediatek/mtk_gem.h index 66e5f154f698..b71a7e7b405a 100644 --- a/drivers/gpu/drm/mediatek/mtk_gem.h +++ b/drivers/gpu/drm/mediatek/mtk_gem.h @@ -45,4 +45,12 @@ struct drm_gem_object *mtk_gem_prime_import_sg_table(struct drm_device *dev, int mtk_gem_prime_vmap(struct drm_gem_object *obj, struct iosys_map *map); void mtk_gem_prime_vunmap(struct drm_gem_object *obj, struct iosys_map *map); +/* + * request gem object creation and buffer allocation as the size + * that it is calculated with framebuffer information such as width, + * height and bpp. + */ +int mtk_gem_create_ioctl(struct drm_device *dev, void *data, + struct drm_file *file_priv); + #endif diff --git a/include/uapi/drm/mediatek_drm.h b/include/uapi/drm/mediatek_drm.h new file mode 100644 index 000000000000..821f7a732365 --- /dev/null +++ b/include/uapi/drm/mediatek_drm.h @@ -0,0 +1,46 @@ +/* SPDX-License-Identifier: GPL-2.0+ WITH Linux-syscall-note */ +/* + * Copyright (c) 2015 MediaTek Inc. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +#ifndef _UAPI_MEDIATEK_DRM_H +#define _UAPI_MEDIATEK_DRM_H + +#include + +#ifdef __KERNEL__ +#include +#else +#include +#endif + +/** + * User-desired buffer creation information structure. + * + * @size: user-desired memory allocation size. + * - this size value would be page-aligned internally. + * @flags: user request for setting memory type or cache attributes. + * @handle: returned a handle to created gem object. + * - this handle will be set by gem module of kernel side. + */ +struct drm_mtk_gem_create { + uint64_t size; + uint32_t flags; + uint32_t handle; +}; + +#define DRM_MTK_GEM_CREATE 0x00 + +#define DRM_IOCTL_MTK_GEM_CREATE DRM_IOWR(DRM_COMMAND_BASE + \ + DRM_MTK_GEM_CREATE, struct drm_mtk_gem_create) + +#endif /* _UAPI_MEDIATEK_DRM_H */ From patchwork Sat May 25 23:29:24 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: =?utf-8?b?SmFzb24tSkggTGluICjmnpfnnb/npaUp?= X-Patchwork-Id: 799037 Received: from mailgw02.mediatek.com (unknown [210.61.82.184]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id AEAC5129E8C; Sat, 25 May 2024 23:29:40 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=210.61.82.184 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1716679782; cv=none; b=q+OcYK6wmqxNexN4rfn0j4+GMb58nzM7zjSNNicOqyZs4ORgXeM/05EGQKjUIpcF1Knl1XkJpRlcv3gh42gFII8PWTNESVK+I+zitph5EocBtkgT3QCerS6ldE+k4WECXSs2r5uj/c0mrLKWM1L7Zqs8Qor4UJtrbx3kjuuiR7Q= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1716679782; c=relaxed/simple; bh=kAT1kI42aTRbdU2G8m6JsH4CuoZbkywfG+0+IE8D9wM=; h=From:To:CC:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version:Content-Type; b=RMBo6IXr2PAHNOqymfiLWwi9PG4SVwXewIU4aDDZfYybFbbBLUwgzn/tXTB4Ba0plUPw5XoSdL6+5Ju9PXy0MA2Utt2GvXLYpBlUjsLGCrPWVLTXyp+qZIQ+XRc8l9FO3lw+lwxPiGoACmsIcakWZCYOymwKYpiwSpDgzp1tGe0= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=mediatek.com; spf=pass smtp.mailfrom=mediatek.com; dkim=pass (1024-bit key) header.d=mediatek.com header.i=@mediatek.com header.b=K/Rt7iQG; arc=none smtp.client-ip=210.61.82.184 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=mediatek.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=mediatek.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=mediatek.com header.i=@mediatek.com header.b="K/Rt7iQG" X-UUID: a3d5e83a1aee11efbfff99f2466cf0b4-20240526 DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=mediatek.com; s=dk; h=Content-Type:MIME-Version:References:In-Reply-To:Message-ID:Date:Subject:CC:To:From; bh=FIgc95P0LFsWq8dY96d3Fluun5dhhpnGnJPt14WABDE=; b=K/Rt7iQG/x0ebGbWglX7+vV0EXEbqBCoYHjpRc8kNqMoa9CyZNoSnyu3VQECKWEhhNg37AoY1ZdDNC7Kc/9E6THiNq2UUEvCzeS1tfcMxA0H7sKKHoz8H24WpD6+Pk7krHDPOR2wgVD+PDHbWIoHMUFNhWXogc37cj01fHrmRjk=; X-CID-P-RULE: Release_Ham X-CID-O-INFO: VERSION:1.1.38, REQID:e6427a10-d6e7-438b-a330-104173a2c13e, IP:0, U RL:0,TC:0,Content:-25,EDM:0,RT:0,SF:0,FILE:0,BULK:0,RULE:Release_Ham,ACTIO N:release,TS:-25 X-CID-META: VersionHash:82c5f88, CLOUDID:67d53693-e2c0-40b0-a8fe-7c7e47299109, B ulkID:nil,BulkQuantity:0,Recheck:0,SF:102,TC:nil,Content:0,EDM:-3,IP:nil,U RL:0,File:nil,RT:nil,Bulk:nil,QS:nil,BEC:nil,COL:0,OSI:0,OSA:0,AV:0,LES:1, SPR:NO,DKR:0,DKP:0,BRR:0,BRE:0 X-CID-BVR: 0,NGT X-CID-BAS: 0,NGT,0,_ X-CID-FACTOR: TF_CID_SPAM_SNR X-UUID: a3d5e83a1aee11efbfff99f2466cf0b4-20240526 Received: from mtkmbs13n1.mediatek.inc [(172.21.101.193)] by mailgw02.mediatek.com (envelope-from ) (Generic MTA with TLSv1.2 ECDHE-RSA-AES256-GCM-SHA384 256/256) with ESMTP id 824009790; Sun, 26 May 2024 07:29:32 +0800 Received: from mtkmbs13n1.mediatek.inc (172.21.101.193) by mtkmbs10n1.mediatek.inc (172.21.101.34) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1118.26; Sun, 26 May 2024 07:29:30 +0800 Received: from mtksdccf07.mediatek.inc (172.21.84.99) by mtkmbs13n1.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.2.1118.26 via Frontend Transport; Sun, 26 May 2024 07:29:30 +0800 From: Jason-JH.Lin To: Chun-Kuang Hu , AngeloGioacchino Del Regno , Maxime Ripard CC: David Airlie , Daniel Vetter , Matthias Brugger , , , , , , , , "Jason-ch Chen" , "Jason-JH . Lin" , Singo Chang , "Nancy Lin" , Shawn Sung , , Jeffrey Kardatzke Subject: [PATCH v6 3/7] drm/mediatek: Add secure buffer control flow to mtk_drm_gem Date: Sun, 26 May 2024 07:29:24 +0800 Message-ID: <20240525232928.5524-4-jason-jh.lin@mediatek.com> X-Mailer: git-send-email 2.18.0 In-Reply-To: <20240525232928.5524-1-jason-jh.lin@mediatek.com> References: <20240525232928.5524-1-jason-jh.lin@mediatek.com> Precedence: bulk X-Mailing-List: linux-media@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-TM-AS-Product-Ver: SMEX-14.0.0.3152-9.1.1006-23728.005 X-TM-AS-Result: No-10--8.374900-8.000000 X-TMASE-MatchedRID: ZCn+RolpoOMXSulpnju2HwNJ3EDwuUClKx5ICGp/WtFLgo8+IIHbcFFS bftPdDEZoeiq4rYt7pKGxGUv98m662cxJsW2zGmLwCZxkTHxcckRKRMYqsuVUKw26SKPp7rTBgH mCxujQvwZB0R4cFpbTeKOmN63egZIkKjL2IOi2LAVglQa/gMvfF7OZ6hrwwnzRi9INZ1ZpGG8l4 J1PwHfQtaU6+nmai7Rg76TUEbY/o+jgTsRPYZdS47Su3QulAZ5/Hd4CUWIS/HOMdbgLsryf83+w mITvMn44vM1YF6AJbZ/Q8GCVf1zYgtuKBGekqUpI/NGWt0UYPDg2HVhKpGjzSemQbospQn1i4m8 Ius6insfCKYorH/qEFrVflnGTvH9 X-TM-AS-User-Approved-Sender: No X-TM-AS-User-Blocked-Sender: No X-TMASE-Result: 10--8.374900-8.000000 X-TMASE-Version: SMEX-14.0.0.3152-9.1.1006-23728.005 X-TM-SNTS-SMTP: 0135431C2B218892C2ADBEB833FCB3971EB1EC60AA0E18E66BC1269587605A012000:8 X-MTK: N Add secure buffer control flow to mtk_drm_gem. When user space takes DRM_MTK_GEM_CREATE_RESTRICTED flag and size to create a mtk_drm_gem object, mtk_drm_gem will find a matched size dma buffer from secure dma-heap and bind it to mtk_drm_gem object. TODO: 1. Drop the mtk_gem_create_from_heap() after we change the ioctl to DMA_HEAP_IOCTL_ALLOC. 2. Checking the private data of dmabuf instead of strncmp the exp_name. Signed-off-by: Jason-JH.Lin Signed-off-by: Hsiao Chien Sung --- drivers/gpu/drm/mediatek/mtk_drm_drv.c | 2 +- drivers/gpu/drm/mediatek/mtk_gem.c | 85 +++++++++++++++++++++++++- drivers/gpu/drm/mediatek/mtk_gem.h | 4 ++ 3 files changed, 89 insertions(+), 2 deletions(-) diff --git a/drivers/gpu/drm/mediatek/mtk_drm_drv.c b/drivers/gpu/drm/mediatek/mtk_drm_drv.c index 11e1555e9aa4..ff40ca5dd2a0 100644 --- a/drivers/gpu/drm/mediatek/mtk_drm_drv.c +++ b/drivers/gpu/drm/mediatek/mtk_drm_drv.c @@ -573,7 +573,7 @@ static void mtk_drm_kms_deinit(struct drm_device *drm) static const struct drm_ioctl_desc mtk_ioctls[] = { DRM_IOCTL_DEF_DRV(MTK_GEM_CREATE, mtk_gem_create_ioctl, - DRM_UNLOCKED | DRM_AUTH | DRM_RENDER_ALLOW), + DRM_AUTH | DRM_RENDER_ALLOW), }; DEFINE_DRM_GEM_FOPS(mtk_drm_fops); diff --git a/drivers/gpu/drm/mediatek/mtk_gem.c b/drivers/gpu/drm/mediatek/mtk_gem.c index 91f6cfa3f1b7..118ea7f0a71c 100644 --- a/drivers/gpu/drm/mediatek/mtk_gem.c +++ b/drivers/gpu/drm/mediatek/mtk_gem.c @@ -5,6 +5,8 @@ #include #include +#include +#include #include #include @@ -103,6 +105,81 @@ struct mtk_gem_obj *mtk_gem_create(struct drm_device *dev, return ERR_PTR(ret); } +struct mtk_gem_obj *mtk_gem_create_from_heap(struct drm_device *dev, + const char *heap, size_t size) +{ + struct mtk_drm_private *priv = dev->dev_private; + struct mtk_gem_obj *mtk_gem; + struct drm_gem_object *obj; + struct dma_heap *dma_heap; + struct dma_buf *dma_buf; + struct dma_buf_attachment *attach; + struct sg_table *sgt; + struct iosys_map map = {}; + int ret; + + mtk_gem = mtk_gem_init(dev, size); + if (IS_ERR(mtk_gem)) + return ERR_CAST(mtk_gem); + + obj = &mtk_gem->base; + + dma_heap = dma_heap_find(heap); + if (!dma_heap) { + DRM_ERROR("heap find fail\n"); + goto err_gem_free; + } + dma_buf = dma_heap_buffer_alloc(dma_heap, size, + O_RDWR | O_CLOEXEC, DMA_HEAP_VALID_HEAP_FLAGS); + if (IS_ERR(dma_buf)) { + DRM_ERROR("buffer alloc fail\n"); + dma_heap_put(dma_heap); + goto err_gem_free; + } + dma_heap_put(dma_heap); + + attach = dma_buf_attach(dma_buf, priv->dma_dev); + if (IS_ERR(attach)) { + DRM_ERROR("attach fail, return\n"); + dma_buf_put(dma_buf); + goto err_gem_free; + } + + sgt = dma_buf_map_attachment(attach, DMA_BIDIRECTIONAL); + if (IS_ERR(sgt)) { + DRM_ERROR("map failed, detach and return\n"); + dma_buf_detach(dma_buf, attach); + dma_buf_put(dma_buf); + goto err_gem_free; + } + obj->import_attach = attach; + mtk_gem->dma_addr = sg_dma_address(sgt->sgl); + mtk_gem->sg = sgt; + mtk_gem->size = dma_buf->size; + + if (!strcmp(heap, "restricted_mtk_cm") || !strcmp(heap, "restricted_mtk_cma")) { + /* secure buffer can not be mapped */ + mtk_gem->secure = true; + } else { + ret = dma_buf_vmap(dma_buf, &map); + mtk_gem->kvaddr = map.vaddr; + if (ret) { + DRM_ERROR("map failed, ret=%d\n", ret); + dma_buf_unmap_attachment(attach, sgt, DMA_BIDIRECTIONAL); + dma_buf_detach(dma_buf, attach); + dma_buf_put(dma_buf); + mtk_gem->kvaddr = NULL; + } + } + + return mtk_gem; + +err_gem_free: + drm_gem_object_release(obj); + kfree(mtk_gem); + return ERR_PTR(-ENOMEM); +} + void mtk_gem_free_object(struct drm_gem_object *obj) { struct mtk_gem_obj *mtk_gem = to_mtk_gem_obj(obj); @@ -230,7 +307,9 @@ struct drm_gem_object *mtk_gem_prime_import_sg_table(struct drm_device *dev, if (IS_ERR(mtk_gem)) return ERR_CAST(mtk_gem); + mtk_gem->secure = (!strncmp(attach->dmabuf->exp_name, "restricted", 10)); mtk_gem->dma_addr = sg_dma_address(sg->sgl); + mtk_gem->size = attach->dmabuf->size; mtk_gem->sg = sg; return &mtk_gem->base; @@ -296,7 +375,11 @@ int mtk_gem_create_ioctl(struct drm_device *dev, void *data, struct drm_mtk_gem_create *args = data; int ret; - mtk_gem = mtk_gem_create(dev, args->size, false); + if (args->flags & DRM_MTK_GEM_CREATE_RESTRICTED) + mtk_gem = mtk_gem_create_from_heap(dev, "restricted_mtk_cma", args->size); + else + mtk_gem = mtk_gem_create(dev, args->size, false); + if (IS_ERR(mtk_gem)) return PTR_ERR(mtk_gem); diff --git a/drivers/gpu/drm/mediatek/mtk_gem.h b/drivers/gpu/drm/mediatek/mtk_gem.h index b71a7e7b405a..7f6b23b9875a 100644 --- a/drivers/gpu/drm/mediatek/mtk_gem.h +++ b/drivers/gpu/drm/mediatek/mtk_gem.h @@ -27,9 +27,11 @@ struct mtk_gem_obj { void *cookie; void *kvaddr; dma_addr_t dma_addr; + size_t size; unsigned long dma_attrs; struct sg_table *sg; struct page **pages; + bool secure; }; #define to_mtk_gem_obj(x) container_of(x, struct mtk_gem_obj, base) @@ -37,6 +39,8 @@ struct mtk_gem_obj { void mtk_gem_free_object(struct drm_gem_object *gem); struct mtk_gem_obj *mtk_gem_create(struct drm_device *dev, size_t size, bool alloc_kmap); +struct mtk_gem_obj *mtk_gem_create_from_heap(struct drm_device *dev, + const char *heap, size_t size); int mtk_gem_dumb_create(struct drm_file *file_priv, struct drm_device *dev, struct drm_mode_create_dumb *args); struct sg_table *mtk_gem_prime_get_sg_table(struct drm_gem_object *obj); From patchwork Sat May 25 23:29:25 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: =?utf-8?b?SmFzb24tSkggTGluICjmnpfnnb/npaUp?= X-Patchwork-Id: 799039 Received: from mailgw01.mediatek.com (unknown [60.244.123.138]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 820E44E1C3; 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Lin" , Singo Chang , Nancy Lin , Shawn Sung , , Jeffrey Kardatzke Subject: [PATCH v6 4/7] drm/mediatek: Add secure identify flag and funcution to mtk_drm_plane Date: Sun, 26 May 2024 07:29:25 +0800 Message-ID: <20240525232928.5524-5-jason-jh.lin@mediatek.com> X-Mailer: git-send-email 2.18.0 In-Reply-To: <20240525232928.5524-1-jason-jh.lin@mediatek.com> References: <20240525232928.5524-1-jason-jh.lin@mediatek.com> Precedence: bulk X-Mailing-List: linux-media@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-MTK: N Add is_sec flag to identify current mtk_drm_plane is secure. Add mtk_plane_is_sec_fb() to check current drm_framebuffer is secure. Signed-off-by: Jason-JH.Lin Signed-off-by: Hsiao Chien Sung --- drivers/gpu/drm/mediatek/mtk_plane.c | 18 ++++++++++++++++++ drivers/gpu/drm/mediatek/mtk_plane.h | 2 ++ 2 files changed, 20 insertions(+) diff --git a/drivers/gpu/drm/mediatek/mtk_plane.c b/drivers/gpu/drm/mediatek/mtk_plane.c index 4625deb21d40..478206f21fd0 100644 --- a/drivers/gpu/drm/mediatek/mtk_plane.c +++ b/drivers/gpu/drm/mediatek/mtk_plane.c @@ -210,6 +210,7 @@ static void mtk_plane_update_new_state(struct drm_plane_state *new_state, mtk_plane_state->pending.height = drm_rect_height(&new_state->dst); mtk_plane_state->pending.rotation = new_state->rotation; mtk_plane_state->pending.color_encoding = new_state->color_encoding; + mtk_plane_state->pending.is_secure = mtk_plane_fb_is_secure(fb); } static void mtk_plane_atomic_async_update(struct drm_plane *plane, @@ -348,3 +349,20 @@ int mtk_plane_init(struct drm_device *dev, struct drm_plane *plane, return 0; } + +bool mtk_plane_fb_is_secure(struct drm_framebuffer *fb) +{ + struct drm_gem_object *gem = NULL; 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Lin" , Singo Chang , "Nancy Lin" , Shawn Sung , , Jeffrey Kardatzke Subject: [PATCH v6 7/7] drm/mediatek: Add cmdq_insert_backup_cookie before secure pkt finalize Date: Sun, 26 May 2024 07:29:28 +0800 Message-ID: <20240525232928.5524-8-jason-jh.lin@mediatek.com> X-Mailer: git-send-email 2.18.0 In-Reply-To: <20240525232928.5524-1-jason-jh.lin@mediatek.com> References: <20240525232928.5524-1-jason-jh.lin@mediatek.com> Precedence: bulk X-Mailing-List: linux-media@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-TM-AS-Product-Ver: SMEX-14.0.0.3152-9.1.1006-23728.005 X-TM-AS-Result: No-10--11.595200-8.000000 X-TMASE-MatchedRID: XAa2d/45j8Tob/hVdrvnXjPDkSOzeDWW+eBf9ovw8I27eXIF2U7rKy+8 OxujShyxE/UmhJjBrzZC3mgca9yt8kttpN+KVVd9syNb+yeIRArvJY9pBzgg1P+RKQghHjkeBgH mCxujQvyjmrD+IUq29hI7tf+6KnxtiBoFctaOhN8jRwcsjqWGAgrefVId6fzVCqIJhrrDy2/jZY 67L74Lw7o3/co+ykK6UFTYnego7LJccQ8eam5EfRRFJJyf5BJe3QfwsVk0UbtuRXh7bFKB7gRuY qpRzYwt5tYzjYMxVNFdPwsV1FdNCbaRD1c+EJMdvuvB6gAgryg= X-TM-AS-User-Approved-Sender: No X-TM-AS-User-Blocked-Sender: No X-TMASE-Result: 10--11.595200-8.000000 X-TMASE-Version: SMEX-14.0.0.3152-9.1.1006-23728.005 X-TM-SNTS-SMTP: 9AEA3DB8CB88483491FE005922C30F1CE0AE72AEC367029CE1464088C652F4422000:8 X-MTK: N Add cmdq_insert_backup_cookie to append some commands before EOC: 1. Get GCE HW thread execute count from the GCE HW register. 2. Add 1 to the execute count and then store into a shared memory. 3. Set a software event siganl as secure irq to GCE HW. Since the value of execute count + 1 is stored in a shared memory, CMDQ driver in the normal world can use it to handle task done in irq handler and CMDQ driver in the secure world will use it to schedule the task slot for each secure thread. Signed-off-by: Jason-JH.Lin Signed-off-by: Hsiao Chien Sung --- drivers/gpu/drm/mediatek/mtk_crtc.c | 3 +++ 1 file changed, 3 insertions(+) diff --git a/drivers/gpu/drm/mediatek/mtk_crtc.c b/drivers/gpu/drm/mediatek/mtk_crtc.c index 59f6263ae806..0df9bf695f65 100644 --- a/drivers/gpu/drm/mediatek/mtk_crtc.c +++ b/drivers/gpu/drm/mediatek/mtk_crtc.c @@ -178,6 +178,7 @@ void mtk_crtc_disable_secure_state(struct drm_crtc *crtc) cmdq_sec_pkt_set_data(&mtk_crtc->sec_cmdq_handle, sec_scn); + cmdq_sec_insert_backup_cookie(&mtk_crtc->sec_cmdq_handle); cmdq_pkt_finalize(&mtk_crtc->sec_cmdq_handle); dma_sync_single_for_device(mtk_crtc->sec_cmdq_client.chan->mbox->dev, mtk_crtc->sec_cmdq_handle.pa_base, @@ -795,6 +796,8 @@ static void mtk_crtc_update_config(struct mtk_crtc *mtk_crtc, bool needs_vblank) cmdq_pkt_clear_event(cmdq_handle, mtk_crtc->cmdq_event); cmdq_pkt_wfe(cmdq_handle, mtk_crtc->cmdq_event, false); mtk_crtc_ddp_config(crtc, cmdq_handle); + if (cmdq_handle->sec_data) + cmdq_sec_insert_backup_cookie(cmdq_handle); cmdq_pkt_finalize(cmdq_handle); dma_sync_single_for_device(cmdq_client.chan->mbox->dev, cmdq_handle->pa_base,