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Sun, 09 Jun 2024 18:12:27 -0700 (PDT) From: Sam Protsenko To: Tom Rini , Minkyu Kang , Peng Fan , Jaehoon Chung , Simon Glass Cc: Quentin Schulz , Philipp Tomsich , Kever Yang , Eugeniy Paltsev , Peter Robinson , Jonas Karlman , Yang Xiwen , Ferass El Hafidi , Sean Anderson , u-boot@lists.denx.de, uboot-snps-arc@synopsys.com Subject: [PATCH v2 01/40] mmc: dw_mmc: Remove common.h Date: Sun, 9 Jun 2024 20:11:47 -0500 Message-Id: <20240610011226.4050-2-semen.protsenko@linaro.org> X-Mailer: git-send-email 2.39.2 In-Reply-To: <20240610011226.4050-1-semen.protsenko@linaro.org> References: <20240610011226.4050-1-semen.protsenko@linaro.org> MIME-Version: 1.0 X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.39 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.103.8 at phobos.denx.de X-Virus-Status: Clean common.h header is marked for removal treewide and shouldn't be used. Remove it from DW MMC driver. No functional change. Signed-off-by: Sam Protsenko Reviewed-by: Quentin Schulz --- Changes in v2: - Added R-b tag from Quentin drivers/mmc/dw_mmc.c | 1 - 1 file changed, 1 deletion(-) diff --git a/drivers/mmc/dw_mmc.c b/drivers/mmc/dw_mmc.c index e1036641452a..e6107c770fe3 100644 --- a/drivers/mmc/dw_mmc.c +++ b/drivers/mmc/dw_mmc.c @@ -6,7 +6,6 @@ */ #include -#include #include #include #include From patchwork Mon Jun 10 01:11:48 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sam Protsenko X-Patchwork-Id: 802936 Delivered-To: patch@linaro.org Received: by 2002:adf:f147:0:b0:35b:5a80:51b4 with SMTP id y7csp1734299wro; Sun, 9 Jun 2024 18:13:31 -0700 (PDT) X-Forwarded-Encrypted: i=2; AJvYcCWzTP3iqiLo+8yHZOKSD2yuZTfgXOny6wamaEM38+nbvny4mB9cCOHXV11fChvg13atDwOtW1I5Of3g6PdpIiOb X-Google-Smtp-Source: AGHT+IF5QfN+YEJ1swW3leyj6Wkgv4G6bFlq+iulS4yOZUf7tutxlWHXO7Gqo1LaGPbJPRarMVRM X-Received: by 2002:a17:906:eea:b0:a62:fc9d:6fec with SMTP id a640c23a62f3a-a6cd74bf905mr507867066b.34.1717982011200; Sun, 09 Jun 2024 18:13:31 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1717982011; cv=none; d=google.com; s=arc-20160816; b=Dr5ZbPHP0HP5sjK8YNKog4YtkjZ3AoqpGaJoAhSV4YdBjsVnEQI/2k7HIxvLzyFSvl aHsH72NUb70UsP50qcbctsDViDDNzli12v1NRy/N/5BtKE5dGEucJG8q+svCy0jSFnJD PKgZnFIIIN/zlvDinqA/3kn1YVoLDNOEPGrTwieiGInXfeJ8FDStzoe2FeBnH5K4xoqR vYFwpKzwbJBHUTUAMuKOt0/+hO+sLfFQBseGWWwl9ZP1V+hx5CufYYdJGN5DBvQgs+vG Pe483QR6//LCQinvAIFpgGBvFP+fiLjmb7pJCE1vkWhjn466aTsLa1Tbh/+LDNzRe21+ +yLg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:cc:to :from:dkim-signature; bh=lVo1KnMaaxcTD3uxagIxh+Vl8qN05WrLHUaAeLL9aiE=; fh=kGj/qEIHOFXLUDbig1aBysj/RhxgphDNVnVya2TNl4U=; b=QI5+1uQtv9kM1N2ngaVZtCGIlN8dneWKXd6fN+9JIMh1cLoJl1MzYiEhnhYp/dWXjy Pv27WFL1xCjztydmLL4xq0ZiwoyHdMfun92M33tRgR14cuOrsJSW549Y3PDS50KCqdW6 tIIsu90G0NfY8PpovOAbdcM6573dMxSXGTqHppK+HMbiEpiaJdFEX0rRlIsRGA9DkY5a Qadu0LZJEjFlg/ruTXWT24pHQsktJu+QFdOXwtk9HexQtIzJFtHz/1/2CwgMQ2hpkMhO i+oGXYPgsdv8FGz7LWQI+7rEfS6RPY557Pyx1sxronehv6WR1DaBvYBWLu4Td/h1Y0Wj mqLQ==; dara=google.com ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=KUVLh6qW; spf=pass (google.com: domain of u-boot-bounces@lists.denx.de designates 2a01:238:438b:c500:173d:9f52:ddab:ee01 as permitted sender) smtp.mailfrom=u-boot-bounces@lists.denx.de; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from phobos.denx.de (phobos.denx.de. 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Sun, 09 Jun 2024 18:12:28 -0700 (PDT) From: Sam Protsenko To: Tom Rini , Minkyu Kang , Peng Fan , Jaehoon Chung , Simon Glass Cc: Quentin Schulz , Philipp Tomsich , Kever Yang , Eugeniy Paltsev , Peter Robinson , Jonas Karlman , Yang Xiwen , Ferass El Hafidi , Sean Anderson , u-boot@lists.denx.de, uboot-snps-arc@synopsys.com Subject: [PATCH v2 02/40] mmc: dw_mmc: Remove unused version field from struct dwmci_host Date: Sun, 9 Jun 2024 20:11:48 -0500 Message-Id: <20240610011226.4050-3-semen.protsenko@linaro.org> X-Mailer: git-send-email 2.39.2 In-Reply-To: <20240610011226.4050-1-semen.protsenko@linaro.org> References: <20240610011226.4050-1-semen.protsenko@linaro.org> MIME-Version: 1.0 X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.39 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.103.8 at phobos.denx.de X-Virus-Status: Clean Nobody seems to use it, so just remove it. No functional change. Signed-off-by: Sam Protsenko Reviewed-by: Quentin Schulz --- Changes in v2: - Added R-b tag from Quentin include/dwmmc.h | 1 - 1 file changed, 1 deletion(-) diff --git a/include/dwmmc.h b/include/dwmmc.h index 136a95b8cdb6..39024fb38aaa 100644 --- a/include/dwmmc.h +++ b/include/dwmmc.h @@ -163,7 +163,6 @@ struct dwmci_host { void *ioaddr; unsigned int quirks; unsigned int caps; - unsigned int version; unsigned int clock; unsigned int bus_hz; unsigned int div; From patchwork Mon Jun 10 01:11:49 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sam Protsenko X-Patchwork-Id: 802933 Delivered-To: patch@linaro.org Received: by 2002:adf:f147:0:b0:35b:5a80:51b4 with SMTP id y7csp1734149wro; Sun, 9 Jun 2024 18:12:56 -0700 (PDT) X-Forwarded-Encrypted: i=2; AJvYcCWS47OC+i/nyPaT9ee/f0zV2NBktetQWQi+LJwSNp5SG0fo//WJS8N7ZSgRuPYsRkfQxCYAM3Vy7IxdSHwd7ZHI X-Google-Smtp-Source: AGHT+IEBEcE47A2dRknihqqPKsn7BiGzjoWYn3V8T7SIsU2rwyzH+DoaaWlA5FJYpA18cSg91E9V X-Received: by 2002:a17:906:3e56:b0:a6f:233:3b66 with SMTP id a640c23a62f3a-a6f023346ffmr250259366b.59.1717981976086; Sun, 09 Jun 2024 18:12:56 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1717981976; cv=none; d=google.com; s=arc-20160816; b=ROPz6xQHzvH/JhmR2HJSnstf9fVdpGd/lshfMNrE27tvBdizYb78k69YXHhkpD1Twy u2uDkUILenDP94zIBQrcyjxjq1+Anq8NU3VOroAPI0WswaZbkaKgRsnO7kQBoeuBve9S YY0zuNQg5BHUfcF1LC0PEAXPLM7ltp/vzwa+2THGdnPdzc26a4JFnjX30fLElvfWaKyq HbPWn4ngIDfox/Gf1OggYr8byS3FVTxMHqGgV4xVmco/2k1Pk5kPSOBYziOsPMd1+N0s 7XZLeo1R3vJ1DZegPqvmcezGsgpaNGQC65VPCtVPvEpoV8yYIRFM7TG6DDTCLjtG8B3N ILnQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:cc:to :from:dkim-signature; bh=QfopE55UdYqTHl0ZSw6yaRaxTdvu4b9RkdayIjD6Dd4=; fh=20cuTcdWtU0Ntuqng7eSeHrDfE8tCgAxJKDnGTuL0OU=; b=Q1gndoy75qJlYakczmg7qKUZzb7kpgu+LITVsBsR2ON+ebe3IKA+0EWKqh6BC5n3UN +lKudOsTpSQMHLvDJ/Uz8J8o9M37891fjswgyA+Z/6p2syp7TYXGAwNmdURpIniJxIEV ky6yj+t+u/uNTrB/EG4eClMybRYV3Ka6mxQnJi/qyrg6ZOM14nEHoM/v7xleNT3W+u5s EJrf0Hbq2Fq8RDTNUMT1bYUBJEnF7WawnsUoBQNnU6o/OVy+sHnBPbwAqGuyVA1Bx67O PQ0XtQMmUGay3OUwmvrw42xLAP73lZPBe8/f04eaC3L60tLnZFs5CZqLZckE+X/tP+PD SSTQ==; dara=google.com ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=HjQTgRqk; spf=pass (google.com: domain of u-boot-bounces@lists.denx.de designates 85.214.62.61 as permitted sender) smtp.mailfrom=u-boot-bounces@lists.denx.de; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from phobos.denx.de (phobos.denx.de. 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No functional change. Signed-off-by: Sam Protsenko Reviewed-by: Quentin Schulz --- Changes in v2: - Added R-b tag from Quentin drivers/mmc/dw_mmc.c | 7 +++++++ include/dwmmc.h | 7 ------- 2 files changed, 7 insertions(+), 7 deletions(-) diff --git a/drivers/mmc/dw_mmc.c b/drivers/mmc/dw_mmc.c index e6107c770fe3..9d668b3d8813 100644 --- a/drivers/mmc/dw_mmc.c +++ b/drivers/mmc/dw_mmc.c @@ -20,6 +20,13 @@ #define PAGE_SIZE 4096 +struct dwmci_idmac { + u32 flags; + u32 cnt; + u32 addr; + u32 next_addr; +} __aligned(ARCH_DMA_MINALIGN); + static int dwmci_wait_reset(struct dwmci_host *host, u32 value) { unsigned long timeout = 1000; diff --git a/include/dwmmc.h b/include/dwmmc.h index 39024fb38aaa..7e4acf096dce 100644 --- a/include/dwmmc.h +++ b/include/dwmmc.h @@ -198,13 +198,6 @@ struct dwmci_host { bool fifo_mode; }; -struct dwmci_idmac { - u32 flags; - u32 cnt; - u32 addr; - u32 next_addr; -} __aligned(ARCH_DMA_MINALIGN); - static inline void dwmci_writel(struct dwmci_host *host, int reg, u32 val) { writel(val, host->ioaddr + reg); From patchwork Mon Jun 10 01:11:50 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sam Protsenko X-Patchwork-Id: 802934 Delivered-To: patch@linaro.org Received: by 2002:adf:f147:0:b0:35b:5a80:51b4 with SMTP id y7csp1734191wro; Sun, 9 Jun 2024 18:13:10 -0700 (PDT) X-Forwarded-Encrypted: i=2; AJvYcCWb8ghGKknbBmxBHvL8yI2J7eIczQcHaHSripwws9olgpneI2O1soutdRJa7LJWCHhj1eIGhrQ5EhDFhXM9H9Mq X-Google-Smtp-Source: AGHT+IF/cePH6SRPn3OJj521/UN1sOYoZ/UJMcJjetWtLWk1JKprVChufZ3ijfkqSn0IeF1wiaA0 X-Received: by 2002:ac2:4559:0:b0:52b:de5c:823c with SMTP id 2adb3069b0e04-52bde5c8392mr3539664e87.16.1717981989848; Sun, 09 Jun 2024 18:13:09 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1717981989; cv=none; d=google.com; s=arc-20160816; b=ZTRfFswqtH2fpf39lIPwJxlCkFD5iN1GnRt+Ue/F2pUIc3sSz4BPdZdAOEMDIhzD2s byMNjD/uqQ+mOqE7CcvmGE26iTHMW0P3oa1D4stKlo7GzBthtzVPIu8qLZ9Y7H85wUFI rjhVjEhzYyaFeh/7xJJmpiH8liwywPNjWoGQTmMMv/jyt01tV9SKcJx12MTeT3sVskBD YYbGVtxTsHgC3VBCtG43aSEEyJYosAqKhrFYmwWk7dkCT3qJaKVi5ALfAQSZZnQPsUoY WaILdt3epE3uyQU+e+RbLU+/ktf47ge1fI7ZFC9tsbRIX2X4xWQSelKOwsteE95Q5H5M 2ecw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:cc:to :from:dkim-signature; bh=b+xllyps4gbf32TUxPHwewG9pl28JW9QwciqLLGp954=; fh=+tXQYb58VYx0hG7SRpFRHTJ4iobVSUqUz50Xq9ZSQJE=; b=NlpQPec+69DEd4HSVo+JJ4fNaIuiBuhijK0GHDuPD74O1mQ7RnVKvBkvMcozWw5hsp 3sEFPfUhR9hz//p8I9LqnkV8IMydDzDUk3BcGYAs4ckEWt5k0uj6J4wszazXzsnzOPLh epHFjA5FsnmdlQpWA7GzfplU19+6CY8Dkl1t//5g/P+LDlqngDQ7ezxsf0tBXIxAyN7C gn16GeOwdDwfcqdZ5ZNsXP0Wb3XkbbJyN3MtMsEFAAl5yYouH+xRqDMlM84G6EyPsxI0 /FoU1au5Ipow4TE1iyO64FvTFY6DcfiPk+2r9a762uDy4BM37H2OGpyASb4NBfVcgyXA QTvg==; dara=google.com ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=O+ftkQ6q; spf=pass (google.com: domain of u-boot-bounces@lists.denx.de designates 2a01:238:438b:c500:173d:9f52:ddab:ee01 as permitted sender) smtp.mailfrom=u-boot-bounces@lists.denx.de; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from phobos.denx.de (phobos.denx.de. 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Sun, 09 Jun 2024 18:12:29 -0700 (PDT) From: Sam Protsenko To: Tom Rini , Minkyu Kang , Peng Fan , Jaehoon Chung , Simon Glass Cc: Quentin Schulz , Philipp Tomsich , Kever Yang , Eugeniy Paltsev , Peter Robinson , Jonas Karlman , Yang Xiwen , Ferass El Hafidi , Sean Anderson , u-boot@lists.denx.de, uboot-snps-arc@synopsys.com Subject: [PATCH v2 04/40] mmc: dw_mmc: Extract waiting for data busy into a separate routine Date: Sun, 9 Jun 2024 20:11:50 -0500 Message-Id: <20240610011226.4050-5-semen.protsenko@linaro.org> X-Mailer: git-send-email 2.39.2 In-Reply-To: <20240610011226.4050-1-semen.protsenko@linaro.org> References: <20240610011226.4050-1-semen.protsenko@linaro.org> MIME-Version: 1.0 X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.39 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.103.8 at phobos.denx.de X-Virus-Status: Clean Waiting for data busy is a logically separate operation and should be implemented as a separate routine. Follow Linux kernel example and extract it from dwmci_send_cmd(). This way it doesn't clutter dwmci_send_cmd() function, and can be reused later in other cases. No functional change. Signed-off-by: Sam Protsenko Reviewed-by: Quentin Schulz --- Changes in v2: - Added R-b tag from Quentin drivers/mmc/dw_mmc.c | 25 ++++++++++++++++--------- 1 file changed, 16 insertions(+), 9 deletions(-) diff --git a/drivers/mmc/dw_mmc.c b/drivers/mmc/dw_mmc.c index 9d668b3d8813..a82f6a96db39 100644 --- a/drivers/mmc/dw_mmc.c +++ b/drivers/mmc/dw_mmc.c @@ -246,6 +246,21 @@ static int dwmci_set_transfer_mode(struct dwmci_host *host, return mode; } +static void dwmci_wait_while_busy(struct dwmci_host *host, struct mmc_cmd *cmd) +{ + unsigned int timeout = 500; /* msec */ + ulong start; + + start = get_timer(0); + while (dwmci_readl(host, DWMCI_STATUS) & DWMCI_BUSY) { + if (get_timer(start) > timeout) { + debug("%s: Timeout on data busy, continue anyway\n", + __func__); + break; + } + } +} + #ifdef CONFIG_DM_MMC static int dwmci_send_cmd(struct udevice *dev, struct mmc_cmd *cmd, struct mmc_data *data) @@ -260,19 +275,11 @@ static int dwmci_send_cmd(struct mmc *mmc, struct mmc_cmd *cmd, ALLOC_CACHE_ALIGN_BUFFER(struct dwmci_idmac, cur_idmac, data ? DIV_ROUND_UP(data->blocks, 8) : 0); int ret = 0, flags = 0, i; - unsigned int timeout = 500; u32 retry = 100000; u32 mask, ctrl; - ulong start = get_timer(0); struct bounce_buffer bbstate; - while (dwmci_readl(host, DWMCI_STATUS) & DWMCI_BUSY) { - if (get_timer(start) > timeout) { - debug("%s: Timeout on data busy, continue anyway\n", __func__); - break; - } - } - + dwmci_wait_while_busy(host, cmd); dwmci_writel(host, DWMCI_RINTSTS, DWMCI_INTMSK_ALL); if (data) { From patchwork Mon Jun 10 01:11:51 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sam Protsenko X-Patchwork-Id: 802935 Delivered-To: patch@linaro.org Received: by 2002:adf:f147:0:b0:35b:5a80:51b4 with SMTP id y7csp1734222wro; Sun, 9 Jun 2024 18:13:19 -0700 (PDT) X-Forwarded-Encrypted: i=2; AJvYcCWKt2Zm1iK3NtvJpfeIC/39Qd3/LY+La7i8ZEF0kocr/YgLfXwOFNoJPl5kHsTJCTKZ4s5yO1QIa+rjDf6YkyAV X-Google-Smtp-Source: AGHT+IGxSEoKMQZvfPe7R+/EYs0lFPLlKk2AS1yx+LN/waaN2MUaGvk9tO3Egqpngl8Nk7wqWGn1 X-Received: by 2002:a17:906:c8c1:b0:a6d:fbed:7953 with SMTP id a640c23a62f3a-a6dfbed7a3cmr542906166b.27.1717981999665; Sun, 09 Jun 2024 18:13:19 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1717981999; cv=none; d=google.com; s=arc-20160816; b=ZgUOeqCODTjQEENRD7+ZYh/znnHJOUUELiqrfgeN6soyQLMquS8PDa3SykxU5tivWp ix5YZTUnd2BlC/zjzeK+tGWhJ49A8juLW91b7jzfwPiDzXA8ukYR8qjoIPegbdK40SW+ lOsA1iGkkqRbHtLEV8wVCxvCEn+lhMAylBGCru+LmpY7MIPYGhTy1SI4H5X+BTk5FN2H qFRiNHuEfZJZVCjPnjoXi1S4d+UdR8hmoqNU4UdjNZsMmcD8YE7wzqqkziZM+xmTSavW lCz9ZBnp8cULMm/5KnL8VfJGYZV6g3JZVbqaxyQ8OCBfQolJ6zcGHavz2xqqgFhw4lap 0YmA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:cc:to :from:dkim-signature; bh=8viY7SbYuROR2eM2ZSnRIvO0crt+QSUsF5mzdu0K1oo=; fh=FEcGjA7/Fi7Z/3T4cmQmfK7OiKynqrgjZDEXqOQT9ag=; b=CQufaTmmQSRkuttqyvu/GzsaA9kC2kTH+YMEwjcF8KvXohThDUTvKBwoCCS8gXrKla 9NnAHQAgvgHWXp75lvfQ33fPDN6yXl/aZUUoXPmd223475NMQlSFliidTTq8JvAieE0k 6hSuqS80SIvIYvJuMd6EGXrDb0S8hnDTK7Gs55XsiiJMSrm69AN9l2D0zflRPUVtHear oiQ6yJMunwkqmQ1B2mnkzZE5bF1zP27gbFYmx9sIpDs+CSg5ER/mMzfVoXLHUKw4wzHB DE+tOFZHlxmkvzREUmop2B2u+FBg7A3rrIKC+VDHzeY3rn93NvDCoCnw4kcuiwvA8k1k U9Xw==; dara=google.com ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=XumNLUb7; spf=pass (google.com: domain of u-boot-bounces@lists.denx.de designates 85.214.62.61 as permitted sender) smtp.mailfrom=u-boot-bounces@lists.denx.de; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from phobos.denx.de (phobos.denx.de. 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No functional change. Signed-off-by: Sam Protsenko Reviewed-by: Quentin Schulz --- Changes in v2: - Added R-b tag from Quentin drivers/mmc/dw_mmc.c | 25 +++++++++++++++---------- 1 file changed, 15 insertions(+), 10 deletions(-) diff --git a/drivers/mmc/dw_mmc.c b/drivers/mmc/dw_mmc.c index a82f6a96db39..cbfb8d3b8683 100644 --- a/drivers/mmc/dw_mmc.c +++ b/drivers/mmc/dw_mmc.c @@ -540,6 +540,20 @@ static int dwmci_set_ios(struct mmc *mmc) return 0; } +static void dwmci_init_fifo(struct dwmci_host *host) +{ + if (!host->fifoth_val) { + u32 fifo_size; + + fifo_size = dwmci_readl(host, DWMCI_FIFOTH); + fifo_size = ((fifo_size & RX_WMARK_MASK) >> RX_WMARK_SHIFT) + 1; + host->fifoth_val = MSIZE(0x2) | RX_WMARK(fifo_size / 2 - 1) | + TX_WMARK(fifo_size / 2); + } + + dwmci_writel(host, DWMCI_FIFOTH, host->fifoth_val); +} + static int dwmci_init(struct mmc *mmc) { struct dwmci_host *host = mmc->priv; @@ -564,16 +578,7 @@ static int dwmci_init(struct mmc *mmc) dwmci_writel(host, DWMCI_IDINTEN, 0); dwmci_writel(host, DWMCI_BMOD, 1); - - if (!host->fifoth_val) { - uint32_t fifo_size; - - fifo_size = dwmci_readl(host, DWMCI_FIFOTH); - fifo_size = ((fifo_size & RX_WMARK_MASK) >> RX_WMARK_SHIFT) + 1; - host->fifoth_val = MSIZE(0x2) | RX_WMARK(fifo_size / 2 - 1) | - TX_WMARK(fifo_size / 2); - } - dwmci_writel(host, DWMCI_FIFOTH, host->fifoth_val); + dwmci_init_fifo(host); dwmci_writel(host, DWMCI_CLKENA, 0); dwmci_writel(host, DWMCI_CLKSRC, 0); From patchwork Mon Jun 10 01:11:52 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sam Protsenko X-Patchwork-Id: 802937 Delivered-To: patch@linaro.org Received: by 2002:adf:f147:0:b0:35b:5a80:51b4 with SMTP id y7csp1734331wro; Sun, 9 Jun 2024 18:13:41 -0700 (PDT) X-Forwarded-Encrypted: i=2; AJvYcCWOhvsu8o4thXowGf3OjNyUBdGEd4kvhdIhL8k9iH+8N73+/wmPW2AZT2IBO+F+hzQfNQlqpWU+TbLymX4OzxCk X-Google-Smtp-Source: AGHT+IHe2QiiJrTjM/UIWeoKiLpM2p8HcTVhLPhiaZ6mGEtEEfp+A3VOHfELlYi9njnWysAMp4j/ X-Received: by 2002:a05:651c:150:b0:2e5:61f4:2c11 with SMTP id 38308e7fff4ca-2eadce9a12cmr57953591fa.45.1717982021530; Sun, 09 Jun 2024 18:13:41 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1717982021; cv=none; d=google.com; s=arc-20160816; b=zDdHgUDzV84TVWeZFacy8aZeOTnnHUit2BWrT2qNOAf6j4G75XPuh1nmkxssRbWy57 fWW/l2NeSqsLgKTOIEWyJvgMkinxZRdg1ZjyODiQ0PUZRErjpsvJlKUbmSSa+ThVWyz4 +TWknTUTCAX43FaFic2TmT7XrjvhoSP6IDJ63IfA/AJJRCZ6A0LobcvdygBSt9ohM74r wCzY9KtPI+0yCA0evY6V7xC60hTsURMvFWyqmck2CDpw8INt4zlRSgnYYzEGq4Y3eqZb mNVWT3ZHh/X2C25i4urkpI3ilaVvn+6QDb0VUDaofLwhL98hEdY3kAMQS/M5XI913XYD 42TQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:cc:to :from:dkim-signature; bh=9nd4em9gOiHJXkkv3B9uErPXnC9QG1DOG02CNBUp5pw=; fh=i1wSYAQ23HHndbpQcjH+KhDwWsgGeOB+dAiPmlNs0S0=; b=eZaI9ur39MbEbLqo5GN3XKdp69P7MDxoe0eP7sJA8Ap2lIq+NZAq8VNSxZah79h1gn iHi1hqHeztzeEzCGyFFkSpkecDz+1DFCxHeaLgAHEtkkDKV8mdgqOptHAIsmLPUC0qTZ URWe5FrwIxeypjMzYpcpDJ621iPXj9RCymtHR/NsKmmPoIoWQPkum/BkSdpsBS2uDxwQ /7S+1SGvR8pwtDR2dHkHO3TjsDTk+cwR3LzRpnoFO0eWw7OnEERQ/na5ENXEF50WFJaT jYn3fpAOw7rMfGxgDgIgkamApVMPwK9lN9kOBSLKp4h/N++zTKQYmOsSQBh75dId89qy yiFg==; dara=google.com ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=LKr1USlH; spf=pass (google.com: domain of u-boot-bounces@lists.denx.de designates 85.214.62.61 as permitted sender) smtp.mailfrom=u-boot-bounces@lists.denx.de; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from phobos.denx.de (phobos.denx.de. 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It's a procedure recommended in TRM, so it's better to keep it in a dedicated function to make the code clearer. While at it also extract the clock control code into a separate routine to avoid code duplication in dwmci_setup_bus(). No functional change. Signed-off-by: Sam Protsenko --- Changes in v2: - Moved CLKSRC after disabling the clock as recommended in TRM, to avoid possible glitch - Extracted div update into a separate function with corresponding comment - Changed the patch subject and reworked the commit message drivers/mmc/dw_mmc.c | 81 +++++++++++++++++++++++++++----------------- 1 file changed, 50 insertions(+), 31 deletions(-) diff --git a/drivers/mmc/dw_mmc.c b/drivers/mmc/dw_mmc.c index cbfb8d3b8683..7bf3279ee9ec 100644 --- a/drivers/mmc/dw_mmc.c +++ b/drivers/mmc/dw_mmc.c @@ -412,11 +412,56 @@ static int dwmci_send_cmd(struct mmc *mmc, struct mmc_cmd *cmd, return ret; } -static int dwmci_setup_bus(struct dwmci_host *host, u32 freq) +static int dwmci_control_clken(struct dwmci_host *host, bool on) { - u32 div, status; + const u32 val = on ? DWMCI_CLKEN_ENABLE | DWMCI_CLKEN_LOW_PWR : 0; + const u32 cmd_only_clk = DWMCI_CMD_PRV_DAT_WAIT | DWMCI_CMD_UPD_CLK; int timeout = 10000; + u32 status; + + dwmci_writel(host, DWMCI_CLKENA, val); + + /* Inform CIU */ + dwmci_writel(host, DWMCI_CMD, DWMCI_CMD_START | cmd_only_clk); + do { + status = dwmci_readl(host, DWMCI_CMD); + if (timeout-- < 0) { + debug("%s: Timeout!\n", __func__); + return -ETIMEDOUT; + } + } while (status & DWMCI_CMD_START); + + return 0; +} + +/* + * Update the clock divider. + * + * To prevent a clock glitch keep the clock stopped during the update of + * clock divider and clock source. + */ +static int dwmci_update_div(struct dwmci_host *host, u32 div) +{ + int ret; + + /* Disable clock */ + ret = dwmci_control_clken(host, false); + if (ret) + return ret; + + /* Set clock to desired speed */ + dwmci_writel(host, DWMCI_CLKDIV, div); + dwmci_writel(host, DWMCI_CLKSRC, 0); + + /* Enable clock */ + return dwmci_control_clken(host, true); +} + +static int dwmci_setup_bus(struct dwmci_host *host, u32 freq) +{ + u32 div; unsigned long sclk; + int ret; if ((freq == host->clock) || (freq == 0)) return 0; @@ -439,35 +484,9 @@ static int dwmci_setup_bus(struct dwmci_host *host, u32 freq) else div = DIV_ROUND_UP(sclk, 2 * freq); - dwmci_writel(host, DWMCI_CLKENA, 0); - dwmci_writel(host, DWMCI_CLKSRC, 0); - - dwmci_writel(host, DWMCI_CLKDIV, div); - dwmci_writel(host, DWMCI_CMD, DWMCI_CMD_PRV_DAT_WAIT | - DWMCI_CMD_UPD_CLK | DWMCI_CMD_START); - - do { - status = dwmci_readl(host, DWMCI_CMD); - if (timeout-- < 0) { - debug("%s: Timeout!\n", __func__); - return -ETIMEDOUT; - } - } while (status & DWMCI_CMD_START); - - dwmci_writel(host, DWMCI_CLKENA, DWMCI_CLKEN_ENABLE | - DWMCI_CLKEN_LOW_PWR); - - dwmci_writel(host, DWMCI_CMD, DWMCI_CMD_PRV_DAT_WAIT | - DWMCI_CMD_UPD_CLK | DWMCI_CMD_START); - - timeout = 10000; - do { - status = dwmci_readl(host, DWMCI_CMD); - if (timeout-- < 0) { - debug("%s: Timeout!\n", __func__); - return -ETIMEDOUT; - } - } while (status & DWMCI_CMD_START); + ret = dwmci_update_div(host, div); + if (ret) + return ret; host->clock = freq; From patchwork Mon Jun 10 01:11:53 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sam Protsenko X-Patchwork-Id: 802938 Delivered-To: patch@linaro.org Received: by 2002:adf:f147:0:b0:35b:5a80:51b4 with SMTP id y7csp1734374wro; Sun, 9 Jun 2024 18:13:52 -0700 (PDT) X-Forwarded-Encrypted: i=2; AJvYcCVBpvpjxqE8R+KakdKOiDgu4JbSkJKeMk1lq3W5niD/cl+Csb6i8PTxHtjPyXVuYLQDH9XPSLmS3AuUNwhDKL+6 X-Google-Smtp-Source: AGHT+IEBIqvZGO53x1rJ4PSN2aVhG+sHCAnkQmmz0M+huhLrjw/emJmIy2hlpAsrnj5G9SyrlEtk X-Received: by 2002:a17:907:7d8f:b0:a6f:d7a:d650 with SMTP id a640c23a62f3a-a6f0d7ad8fcmr308829666b.50.1717982032179; Sun, 09 Jun 2024 18:13:52 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1717982032; cv=none; d=google.com; s=arc-20160816; b=GbX8g/rUkkSgdoYxiu3W5EAmdgoNdtBAKPd8uqNtkOm1whTD+rpGibLKmfrZu/iN28 6VFPsNAPYZf95O7mGyoWiRGTumWBDO0JnkusFHPLlzVuROGCJiR94sRvlB2l8PBQdkS7 nwdMM0T/jEVbI3gdQTH3CwHYVDSpMyzOdyblUVHZ4IHjFm61djy56QFOetxIR9yNA0LM uUJNveXQg7OUp5rtgi4BwaD59vE3Si4sx6wLNWBbdJrkQrYYrbhjus5PnMxHA0Z3AZZJ 25a+9Lr+DEvui/Y3AM5qJ+N4ooPEBYkA4AARkpqV5B1jQQAaSaX4Y0CjAX823JL+Yogh QdVw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:cc:to :from:dkim-signature; bh=lPGi4Kzt/yp52MxH8jri7SB79TNuMSqNI79PcYdBi/w=; fh=oec11W2mHoSa6+JgXEENYFmdVsC8aCF3GP6KQHjqJlA=; b=lNhQDb5ZGQLAPoKDuTPa38Ost44KX9eUUCdGccCnFgYgONOwB2AAAKCw9rd50tR3Yv hefDgqXgfP4l3wa3RTLMWAfRFd9XAl8aihE9eanbcQcHfsBjr5Y/SEuQH9FZc7ucYo+e BnU7BPXgYHUMhRb3pHw8f4J4cAYO4nwema4l2R5W0GwQfNjkE8TdcbX5Lb+AMO0pmNh7 9gYPbOXpPRSzQF6QY59bHghEUt1jtvOek+38Cdn+Z974g6AZc3qOvr1KqtUnlnleOVIK hDScSHUtuoc1P7T82m1NdshdE0Zh3wo7uJtUe1FgzmqlmKi2PIICJFWdKI/Iam6MAKlj lD5g==; dara=google.com ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=vn+Q7w4g; spf=pass (google.com: domain of u-boot-bounces@lists.denx.de designates 85.214.62.61 as permitted sender) smtp.mailfrom=u-boot-bounces@lists.denx.de; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from phobos.denx.de (phobos.denx.de. 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Extract it into a dedicated function to make dwmci_data_transfer() easier to read and reduce the indentation level of the code. No functional change. Signed-off-by: Sam Protsenko --- drivers/mmc/dw_mmc.c | 107 +++++++++++++++++++++---------------------- 1 file changed, 53 insertions(+), 54 deletions(-) diff --git a/drivers/mmc/dw_mmc.c b/drivers/mmc/dw_mmc.c index 7bf3279ee9ec..37a1125fba4f 100644 --- a/drivers/mmc/dw_mmc.c +++ b/drivers/mmc/dw_mmc.c @@ -140,25 +140,67 @@ static unsigned int dwmci_get_timeout(struct mmc *mmc, const unsigned int size) return timeout; } -static int dwmci_data_transfer(struct dwmci_host *host, struct mmc_data *data) +static int dwmci_data_transfer_fifo(struct dwmci_host *host, + struct mmc_data *data, u32 mask) { - struct mmc *mmc = host->mmc; + const u32 fifo_depth = (((host->fifoth_val & RX_WMARK_MASK) >> + RX_WMARK_SHIFT) + 1) * 2; + const u32 int_rx = mask & (DWMCI_INTMSK_RXDR | DWMCI_INTMSK_DTO); + const u32 int_tx = mask & DWMCI_INTMSK_TXDR; int ret = 0; - u32 timeout, mask, size, i, len = 0; - u32 *buf = NULL; - ulong start = get_timer(0); - u32 fifo_depth = (((host->fifoth_val & RX_WMARK_MASK) >> - RX_WMARK_SHIFT) + 1) * 2; + u32 len = 0, size, i; + u32 *buf; + + size = (data->blocksize * data->blocks) / 4; + if (!host->fifo_mode || !size) + return 0; - size = data->blocksize * data->blocks; if (data->flags == MMC_DATA_READ) buf = (unsigned int *)data->dest; else buf = (unsigned int *)data->src; - timeout = dwmci_get_timeout(mmc, size); + if (data->flags == MMC_DATA_READ && int_rx) { + dwmci_writel(host, DWMCI_RINTSTS, int_rx); + while (size) { + ret = dwmci_fifo_ready(host, DWMCI_FIFO_EMPTY, &len); + if (ret < 0) + break; + + len = (len >> DWMCI_FIFO_SHIFT) & DWMCI_FIFO_MASK; + len = min(size, len); + for (i = 0; i < len; i++) + *buf++ = dwmci_readl(host, DWMCI_DATA); + size = size > len ? (size - len) : 0; + } + } else if (data->flags == MMC_DATA_WRITE && int_tx) { + while (size) { + ret = dwmci_fifo_ready(host, DWMCI_FIFO_FULL, &len); + if (ret < 0) + break; + + len = fifo_depth - ((len >> DWMCI_FIFO_SHIFT) & + DWMCI_FIFO_MASK); + len = min(size, len); + for (i = 0; i < len; i++) + dwmci_writel(host, DWMCI_DATA, *buf++); + size = size > len ? (size - len) : 0; + } + dwmci_writel(host, DWMCI_RINTSTS, DWMCI_INTMSK_TXDR); + } - size /= 4; + return ret; +} + +static int dwmci_data_transfer(struct dwmci_host *host, struct mmc_data *data) +{ + struct mmc *mmc = host->mmc; + int ret = 0; + u32 timeout, mask, size; + ulong start = get_timer(0); + + size = data->blocksize * data->blocks; + timeout = dwmci_get_timeout(mmc, size); for (;;) { mask = dwmci_readl(host, DWMCI_RINTSTS); @@ -169,50 +211,7 @@ static int dwmci_data_transfer(struct dwmci_host *host, struct mmc_data *data) break; } - if (host->fifo_mode && size) { - len = 0; - if (data->flags == MMC_DATA_READ && - (mask & (DWMCI_INTMSK_RXDR | DWMCI_INTMSK_DTO))) { - dwmci_writel(host, DWMCI_RINTSTS, - mask & (DWMCI_INTMSK_RXDR | - DWMCI_INTMSK_DTO)); - while (size) { - ret = dwmci_fifo_ready(host, - DWMCI_FIFO_EMPTY, - &len); - if (ret < 0) - break; - - len = (len >> DWMCI_FIFO_SHIFT) & - DWMCI_FIFO_MASK; - len = min(size, len); - for (i = 0; i < len; i++) - *buf++ = - dwmci_readl(host, DWMCI_DATA); - size = size > len ? (size - len) : 0; - } - } else if (data->flags == MMC_DATA_WRITE && - (mask & DWMCI_INTMSK_TXDR)) { - while (size) { - ret = dwmci_fifo_ready(host, - DWMCI_FIFO_FULL, - &len); - if (ret < 0) - break; - - len = fifo_depth - ((len >> - DWMCI_FIFO_SHIFT) & - DWMCI_FIFO_MASK); - len = min(size, len); - for (i = 0; i < len; i++) - dwmci_writel(host, DWMCI_DATA, - *buf++); - size = size > len ? (size - len) : 0; - } - dwmci_writel(host, DWMCI_RINTSTS, - DWMCI_INTMSK_TXDR); - } - } + ret = dwmci_data_transfer_fifo(host, data, mask); /* Data arrived correctly. */ if (mask & DWMCI_INTMSK_DTO) { From patchwork Mon Jun 10 01:11:54 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sam Protsenko X-Patchwork-Id: 802939 Delivered-To: patch@linaro.org Received: by 2002:adf:f147:0:b0:35b:5a80:51b4 with SMTP id y7csp1734400wro; Sun, 9 Jun 2024 18:14:03 -0700 (PDT) X-Forwarded-Encrypted: i=2; AJvYcCWtexqWdu4eUoYyPp3dCqvgVTKK1Uq6OAXU3ipgMl8zeni1SgO/fCtWSrNCSp6ahet6XA1TlMmOsF6T4QjLrzVm X-Google-Smtp-Source: AGHT+IHqEfrO7KU//F+hBTJqiHo+Bh5u6oAzId79NY2TUcqNdS49SxxAhxixqG7FnuogJ1Vaob7C X-Received: by 2002:a50:c31b:0:b0:57c:74ea:8d24 with SMTP id 4fb4d7f45d1cf-57c74ea8f6amr1723101a12.18.1717982043327; Sun, 09 Jun 2024 18:14:03 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1717982043; cv=none; d=google.com; s=arc-20160816; b=uEj9Y42Jx5EFCeICliwjzoxOZwmNKmd5cU69t0xRVn+BECFvBOSFHt6GT1oQ1oqdHM GNgccENjmsWnx3i5mmSsUMSnQ3CCAuEVXF4+Xk/dnYBOIUHjofA+FL/U6xgj6UsAsx58 XPANdOjxhx76kWhcfXP+qaJJFhpDOAw7P+ydTkzIdS27ETyWBWyS5MvEcAVMljztzMGB CLQUNrIdUcTiTnKiGU0wOdiwhUgh5n2ndVeLD7OFvNl2jyNoAkuYSBSlP9NBOFpt0NFt CuNzzDarQm1EWbgYz9yYoNeiIS7BKMoLBX98JwBJNOCnu7a2XW6uncK7wZTHcsoIrZGm dXpg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:cc:to :from:dkim-signature; bh=kmQzsdi9Soif9EzjVQYm9oTsPMvYEvpChPnpkt76le8=; fh=mNo5gg+WO0QrH0G5uMkr8aWV9b78G/iFuIiNHSK9xfA=; b=D/kIUSQa3qbOCgZNtuuzIYRpiKDbykDWLTSMYv21ppSyPIlfAlUxF8UyCd3WzaU/M3 0gTsFegqsahPUh8UjIQSqOGUJzfyr8+pLnxQLlBK7XnChuAArMdGthQt9lw2jggv0so9 ShtUwW/SQQ1Ro5bwDi6hTOvTNInwkRJdPaD9345g4rF8FXvkmUlBc1RSig4ZPzww+x4f 09JiIdlMC1vxQ0yaQtBJXwALNbuerMGyz+7YIMKoT1jTDUzwga/G9k8/qM6SjRhuBRF1 jG1lcOqgqi8+cdTfcCDRUYTBcd4HMQUZ1BbtyfsIeOsY924/267KHUj/ZEJPVBOPpahh yy8w==; dara=google.com ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=KL5GKd9b; spf=pass (google.com: domain of u-boot-bounces@lists.denx.de designates 85.214.62.61 as permitted sender) smtp.mailfrom=u-boot-bounces@lists.denx.de; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from phobos.denx.de (phobos.denx.de. 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No functional change. Signed-off-by: Sam Protsenko Reviewed-by: Quentin Schulz --- Changes in v2: - Added R-b tag from Quentin drivers/mmc/dw_mmc.c | 51 ++++++++++++++++++++++++++------------------ 1 file changed, 30 insertions(+), 21 deletions(-) diff --git a/drivers/mmc/dw_mmc.c b/drivers/mmc/dw_mmc.c index 37a1125fba4f..7b20f4936b62 100644 --- a/drivers/mmc/dw_mmc.c +++ b/drivers/mmc/dw_mmc.c @@ -233,6 +233,33 @@ static int dwmci_data_transfer(struct dwmci_host *host, struct mmc_data *data) return ret; } +static int dwmci_dma_transfer(struct dwmci_host *host, uint flags, + struct bounce_buffer *bbstate) +{ + int ret; + u32 mask, ctrl; + + if (flags == MMC_DATA_READ) + mask = DWMCI_IDINTEN_RI; + else + mask = DWMCI_IDINTEN_TI; + + ret = wait_for_bit_le32(host->ioaddr + DWMCI_IDSTS, + mask, true, 1000, false); + if (ret) + debug("%s: DWMCI_IDINTEN mask 0x%x timeout\n", __func__, mask); + + /* Clear interrupts */ + dwmci_writel(host, DWMCI_IDSTS, DWMCI_IDINTEN_MASK); + + ctrl = dwmci_readl(host, DWMCI_CTRL); + ctrl &= ~DWMCI_DMA_EN; + dwmci_writel(host, DWMCI_CTRL, ctrl); + + bounce_buffer_stop(bbstate); + return ret; +} + static int dwmci_set_transfer_mode(struct dwmci_host *host, struct mmc_data *data) { @@ -275,7 +302,7 @@ static int dwmci_send_cmd(struct mmc *mmc, struct mmc_cmd *cmd, data ? DIV_ROUND_UP(data->blocks, 8) : 0); int ret = 0, flags = 0, i; u32 retry = 100000; - u32 mask, ctrl; + u32 mask; struct bounce_buffer bbstate; dwmci_wait_while_busy(host, cmd); @@ -384,26 +411,8 @@ static int dwmci_send_cmd(struct mmc *mmc, struct mmc_cmd *cmd, if (data) { ret = dwmci_data_transfer(host, data); - - /* only dma mode need it */ - if (!host->fifo_mode) { - if (data->flags == MMC_DATA_READ) - mask = DWMCI_IDINTEN_RI; - else - mask = DWMCI_IDINTEN_TI; - ret = wait_for_bit_le32(host->ioaddr + DWMCI_IDSTS, - mask, true, 1000, false); - if (ret) - debug("%s: DWMCI_IDINTEN mask 0x%x timeout.\n", - __func__, mask); - /* clear interrupts */ - dwmci_writel(host, DWMCI_IDSTS, DWMCI_IDINTEN_MASK); - - ctrl = dwmci_readl(host, DWMCI_CTRL); - ctrl &= ~(DWMCI_DMA_EN); - dwmci_writel(host, DWMCI_CTRL, ctrl); - bounce_buffer_stop(&bbstate); - } + if (!host->fifo_mode) + ret = dwmci_dma_transfer(host, data->flags, &bbstate); } udelay(100); From patchwork Mon Jun 10 01:11:55 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sam Protsenko X-Patchwork-Id: 802940 Delivered-To: patch@linaro.org Received: by 2002:adf:f147:0:b0:35b:5a80:51b4 with SMTP id y7csp1734438wro; Sun, 9 Jun 2024 18:14:14 -0700 (PDT) X-Forwarded-Encrypted: i=2; AJvYcCU2mBZiwL89oO6ktAx6GNhIebf9f2eoGbZWwPx4/NQZpZvdMe+CPHUrHNP//Ef+/B7RQc31hNvFOkrlVKbPzw4T X-Google-Smtp-Source: AGHT+IErWsD1euD+Junp9evHsH/3rDY6MOWJlKJhxMuhV5xr208Yxng9HiuBfjVZFmX9y7OBDHB6 X-Received: by 2002:a50:8e48:0:b0:57c:60e5:c2d7 with SMTP id 4fb4d7f45d1cf-57c60e5c454mr4580257a12.1.1717982053995; Sun, 09 Jun 2024 18:14:13 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1717982053; cv=none; d=google.com; s=arc-20160816; b=hIfk8XHCwlIODgOR3PMJNpmz2IcPFjJRQnlApHI0JgC+MrmSWlwZkziiUcMUoVC+d0 DYu+lU/dZVBiwxIYt9kc3K2Pu5/OZ1XRvKZEscABVUmP5/ERitUoEHOVveSVRJT/LyKo ql8wZALCw6Ew1RBMVfgsZapkm8v6eq7MEsrM2l7yH81Npv4bh46qzmL3UaqOg70BvO3Q /wABmltBG6wQ3atNfp3mhVnAlkLLh0cP7TxvKyqwbSGSO++QAtMz9jM5a32DVlRZnRDa 4sgPQJiBHvWX5INuQtYy93ZxwD8u+LTbiPv5obTka8QTDQ8tExXa0gat1HlZzvk8VfLc 2ZXg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:cc:to :from:dkim-signature; bh=0146DouQsOatr7usL3FKhQq9K5snmF+YpxZgikTni/U=; fh=VY9y++H4yC+t2Bkqz2UrtrWtB6nmlZ721bJOW6PPde8=; b=RrUfThoRyXA0XS/81bpO1BZbkYyG6BkHrqvifabYYQmSV4o0I8D5KObDnpmmtdp6St /q/fynM4K8lbcu76f/jW2qCR/QsceTwhT7Lt7IoUzsmf/MsDCZYGu5Rva5mLw4Bxi3id 1WswZTTVtSXs8dh7vDlQfv6540p9j4ciXclIoN6059nrgEmGNTVsl/kRqnlljXRwz4lq rgspsUieB+A94F7iG3XrJSS8G8Qjl+xWgjIys3gGyvr7CYNOkCGIniVDwzpwiN5p3bS6 upf4oJVqM4eLK7ACOHyBv/hxG1V+YcTIYlcLIwnl7SDjErfKS3T8puusrt0l+j06XRXm /IPQ==; dara=google.com ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=CvPgEEaP; spf=pass (google.com: domain of u-boot-bounces@lists.denx.de designates 85.214.62.61 as permitted sender) smtp.mailfrom=u-boot-bounces@lists.denx.de; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from phobos.denx.de (phobos.denx.de. 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No functional change. Signed-off-by: Sam Protsenko Reviewed-by: Quentin Schulz --- Changes in v2: - Added R-b tag from Quentin drivers/mmc/dw_mmc.c | 52 ++++++++++++++++++++++++++------------------ 1 file changed, 31 insertions(+), 21 deletions(-) diff --git a/drivers/mmc/dw_mmc.c b/drivers/mmc/dw_mmc.c index 7b20f4936b62..8bec43f0bd16 100644 --- a/drivers/mmc/dw_mmc.c +++ b/drivers/mmc/dw_mmc.c @@ -53,47 +53,57 @@ static void dwmci_set_idma_desc(struct dwmci_idmac *idmac, desc->next_addr = (ulong)desc + sizeof(struct dwmci_idmac); } -static void dwmci_prepare_data(struct dwmci_host *host, - struct mmc_data *data, +static void dwmci_prepare_desc(struct mmc_data *data, struct dwmci_idmac *cur_idmac, void *bounce_buffer) { - unsigned long ctrl; - unsigned int i = 0, flags, cnt, blk_cnt; + struct dwmci_idmac *desc = cur_idmac; ulong data_start, data_end; + unsigned int blk_cnt, i; - + data_start = (ulong)cur_idmac; blk_cnt = data->blocks; - dwmci_wait_reset(host, DWMCI_CTRL_FIFO_RESET); + for (i = 0;; i++) { + unsigned int flags, cnt; - /* Clear IDMAC interrupt */ - dwmci_writel(host, DWMCI_IDSTS, 0xFFFFFFFF); - - data_start = (ulong)cur_idmac; - dwmci_writel(host, DWMCI_DBADDR, (ulong)cur_idmac); - - do { - flags = DWMCI_IDMAC_OWN | DWMCI_IDMAC_CH ; - flags |= (i == 0) ? DWMCI_IDMAC_FS : 0; + flags = DWMCI_IDMAC_OWN | DWMCI_IDMAC_CH; + if (i == 0) + flags |= DWMCI_IDMAC_FS; if (blk_cnt <= 8) { flags |= DWMCI_IDMAC_LD; cnt = data->blocksize * blk_cnt; } else cnt = data->blocksize * 8; - dwmci_set_idma_desc(cur_idmac, flags, cnt, - (ulong)bounce_buffer + (i * PAGE_SIZE)); + dwmci_set_idma_desc(desc, flags, cnt, + (ulong)bounce_buffer + i * PAGE_SIZE); + desc++; - cur_idmac++; if (blk_cnt <= 8) break; blk_cnt -= 8; - i++; - } while(1); + } - data_end = (ulong)cur_idmac; + data_end = (ulong)desc; flush_dcache_range(data_start, roundup(data_end, ARCH_DMA_MINALIGN)); +} + +static void dwmci_prepare_data(struct dwmci_host *host, + struct mmc_data *data, + struct dwmci_idmac *cur_idmac, + void *bounce_buffer) +{ + unsigned long ctrl; + + dwmci_wait_reset(host, DWMCI_CTRL_FIFO_RESET); + + /* Clear IDMAC interrupt */ + dwmci_writel(host, DWMCI_IDSTS, 0xFFFFFFFF); + + dwmci_writel(host, DWMCI_DBADDR, (ulong)cur_idmac); + + dwmci_prepare_desc(data, cur_idmac, bounce_buffer); ctrl = dwmci_readl(host, DWMCI_CTRL); ctrl |= DWMCI_IDMAC_EN | DWMCI_DMA_EN; From patchwork Mon Jun 10 01:11:56 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sam Protsenko X-Patchwork-Id: 802941 Delivered-To: patch@linaro.org Received: by 2002:adf:f147:0:b0:35b:5a80:51b4 with SMTP id y7csp1734487wro; Sun, 9 Jun 2024 18:14:23 -0700 (PDT) X-Forwarded-Encrypted: i=2; AJvYcCWKz53pnTe3Z0IrX2bO2A64+CkYRX2dmm7OlJQNhAwcMM1rAtZhlrOql6KtUPify7hoa75+yVVDY5cyo4+n8BEw X-Google-Smtp-Source: AGHT+IGteSBzLpo3sMiCNDBnl1ryLzuHTbybLOibr7L1KjExaNvrqqtCTudPH2eTp/QDE1KQiDxH X-Received: by 2002:a17:907:9728:b0:a6f:1600:62cb with SMTP id a640c23a62f3a-a6f16007dd8mr210516966b.3.1717982063601; Sun, 09 Jun 2024 18:14:23 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1717982063; cv=none; d=google.com; s=arc-20160816; b=DD+Cafb4hjEL5bTQbfInge//+mdrgcjKWvF4QfmCjCD6wKQ8g+PUzRlaZ1Uh6cOSFt DGhVo/k+qV4NBBrSEWrT28/TlJa+CXoWV1NAwilJqyXUByzkUwzdvG9SsdcZTZ8Rr4mx rOv/JI3k1oMnsTwGR65thw3Iui5B4MYysEw4Wz3kjUVVboN0QJn5YjTIcFEppNWQqq9K 2cksZlvsELWCCwV5I4NpRorwYtrPSZW2uzAxY1cMehASD2TZTNJUlTjsY5AatqubaRIP GFaoyigHe8Zcl8dPKhSQnSLTRho7OZUFjMHfg5/fML24jbEMII2VXKl/lwRDgpv1En+j OOmQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:cc:to :from:dkim-signature; bh=Ul4x83pvUauiV7lNM4UeKwyz1dPih6c34KL/rocNKoU=; fh=eUCvL8z+X5zdcBV1dGhZFhV/Xv82kXeK9G7gZTf61uQ=; b=p8G+ILgyCiDhM1PzHOu7v+aEG2ZoZF9r9nIo+E/kRtUs34Yw0/eeT/z0fq7kQHeVRw FnAp9kerN8w3IE4cMtHQp6QgBJKRrcf1LN0tWfg9QnIRmb6KwOt2wF8CR17C6jBksL3q THYW4NVgj0KrsfZD2dGTs6HIYKuQSCaXU5UT8p6SikCtCcMibhcyKbCSD06zO3pMIY0k SuNSDw6O5pOqS8d/EFHHbuFxy/U3WNyGDpo85t5mGzsaWwwyCzgkHb3SdyqHdEZ+IfbX b3PaYvinyxZNfcwcUc0IMaYWUQYK5DJJ9crM7Wi47NkS/0bJAIHmVyyGy7aBBKGS2qzq su/A==; dara=google.com ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=hJQnpIc3; spf=pass (google.com: domain of u-boot-bounces@lists.denx.de designates 85.214.62.61 as permitted sender) smtp.mailfrom=u-boot-bounces@lists.denx.de; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from phobos.denx.de (phobos.denx.de. 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While at it, make use of virt_to_phys() to make it more obvious in which places the physical addresses have to be used. No functional change. Signed-off-by: Sam Protsenko --- drivers/mmc/dw_mmc.c | 43 +++++++++++++++++++++++-------------------- 1 file changed, 23 insertions(+), 20 deletions(-) diff --git a/drivers/mmc/dw_mmc.c b/drivers/mmc/dw_mmc.c index 8bec43f0bd16..a77023ff4cd6 100644 --- a/drivers/mmc/dw_mmc.c +++ b/drivers/mmc/dw_mmc.c @@ -20,11 +20,12 @@ #define PAGE_SIZE 4096 -struct dwmci_idmac { - u32 flags; - u32 cnt; - u32 addr; - u32 next_addr; +/* Internal DMA Controller (IDMAC) descriptor for 32-bit addressing mode */ +struct dwmci_idmac32 { + u32 des0; /* Control descriptor */ + u32 des1; /* Buffer size */ + u32 des2; /* Buffer physical address */ + u32 des3; /* Next descriptor physical address */ } __aligned(ARCH_DMA_MINALIGN); static int dwmci_wait_reset(struct dwmci_host *host, u32 value) @@ -42,22 +43,23 @@ static int dwmci_wait_reset(struct dwmci_host *host, u32 value) return 0; } -static void dwmci_set_idma_desc(struct dwmci_idmac *idmac, - u32 desc0, u32 desc1, u32 desc2) +static void dwmci_set_idma_desc32(struct dwmci_idmac32 *desc, u32 control, + u32 buf_size, u32 buf_addr) { - struct dwmci_idmac *desc = idmac; + phys_addr_t desc_phys = virt_to_phys(desc); + u32 next_desc_phys = desc_phys + sizeof(struct dwmci_idmac32); - desc->flags = desc0; - desc->cnt = desc1; - desc->addr = desc2; - desc->next_addr = (ulong)desc + sizeof(struct dwmci_idmac); + desc->des0 = control; + desc->des1 = buf_size; + desc->des2 = buf_addr; + desc->des3 = next_desc_phys; } static void dwmci_prepare_desc(struct mmc_data *data, - struct dwmci_idmac *cur_idmac, + struct dwmci_idmac32 *cur_idmac, void *bounce_buffer) { - struct dwmci_idmac *desc = cur_idmac; + struct dwmci_idmac32 *desc32 = cur_idmac; ulong data_start, data_end; unsigned int blk_cnt, i; @@ -65,6 +67,7 @@ static void dwmci_prepare_desc(struct mmc_data *data, blk_cnt = data->blocks; for (i = 0;; i++) { + phys_addr_t buf_phys = virt_to_phys(bounce_buffer); unsigned int flags, cnt; flags = DWMCI_IDMAC_OWN | DWMCI_IDMAC_CH; @@ -76,22 +79,22 @@ static void dwmci_prepare_desc(struct mmc_data *data, } else cnt = data->blocksize * 8; - dwmci_set_idma_desc(desc, flags, cnt, - (ulong)bounce_buffer + i * PAGE_SIZE); - desc++; + dwmci_set_idma_desc32(desc32, flags, cnt, + buf_phys + i * PAGE_SIZE); + desc32++; if (blk_cnt <= 8) break; blk_cnt -= 8; } - data_end = (ulong)desc; + data_end = (ulong)desc32; flush_dcache_range(data_start, roundup(data_end, ARCH_DMA_MINALIGN)); } static void dwmci_prepare_data(struct dwmci_host *host, struct mmc_data *data, - struct dwmci_idmac *cur_idmac, + struct dwmci_idmac32 *cur_idmac, void *bounce_buffer) { unsigned long ctrl; @@ -308,7 +311,7 @@ static int dwmci_send_cmd(struct mmc *mmc, struct mmc_cmd *cmd, { #endif struct dwmci_host *host = mmc->priv; - ALLOC_CACHE_ALIGN_BUFFER(struct dwmci_idmac, cur_idmac, + ALLOC_CACHE_ALIGN_BUFFER(struct dwmci_idmac32, cur_idmac, data ? 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Next changes were made: 1. Check which DMA address mode is supported in current IP-core version. HCON register (bit 27) indicates whether it's 32-bit or 64-bit addressing. Add boolean .dma_64bit_address field to struct dwmci_host and store the result there. dwmci_init_dma() function is introduced for doing so, which is called on driver's init. 2. Add 64-bit DMA descriptor (struct dwmci_idmac64) and use it in dwmci_prepare_desc() in case if .dma_64bit_address field is true. A new dwmci_set_idma_desc64() function was added for populating that descriptor. 3. Add registers for 64-bit DMA capable blocks. To make the access to IDMAC registers universal between 32-bit / 64-bit cases, a new struct dwmci_idmac_regs (and corresponding host->regs field) was introduced, which abstracts the hardware by being set to appropriate offset constants on init. All direct calls to IDMAC registers were correspondingly replaced by accessing host->regs. 4. Allocate and use 64-bit DMA descriptors buffer in case when IDMAC is 64-bit capable. Extract all the code (except for the IDMAC descriptors buffer allocation) from dwmci_send_cmd() to dwmci_send_cmd_common(), so that it's possible to keep IDMAC buffer (either 32-bit or 64-bit) on stack during send_cmd routine. The insights for this implementation were taken from Linux kernel DW MMC driver. Signed-off-by: Sam Protsenko --- Changes in v2: - Replaced CONFIG_IS_ENABLED() with #ifdef drivers/mmc/dw_mmc.c | 152 ++++++++++++++++++++++++++++++++++--------- include/dwmmc.h | 39 ++++++++++- 2 files changed, 160 insertions(+), 31 deletions(-) diff --git a/drivers/mmc/dw_mmc.c b/drivers/mmc/dw_mmc.c index a77023ff4cd6..7aa3dbbe83ad 100644 --- a/drivers/mmc/dw_mmc.c +++ b/drivers/mmc/dw_mmc.c @@ -28,6 +28,39 @@ struct dwmci_idmac32 { u32 des3; /* Next descriptor physical address */ } __aligned(ARCH_DMA_MINALIGN); +/* Internal DMA Controller (IDMAC) descriptor for 64-bit addressing mode */ +struct dwmci_idmac64 { + u32 des0; /* Control descriptor */ + u32 des1; /* Reserved */ + u32 des2; /* Buffer sizes */ + u32 des3; /* Reserved */ + u32 des4; /* Lower 32-bits of Buffer Address Pointer 1 */ + u32 des5; /* Upper 32-bits of Buffer Address Pointer 1 */ + u32 des6; /* Lower 32-bits of Next Descriptor Address */ + u32 des7; /* Upper 32-bits of Next Descriptor Address */ +} __aligned(ARCH_DMA_MINALIGN); + +/* Register offsets for DW MMC blocks with 32-bit IDMAC */ +static const struct dwmci_idmac_regs dwmci_idmac_regs32 = { + .dbaddrl = DWMCI_DBADDR, + .idsts = DWMCI_IDSTS, + .idinten = DWMCI_IDINTEN, + .dscaddrl = DWMCI_DSCADDR, + .bufaddrl = DWMCI_BUFADDR, +}; + +/* Register offsets for DW MMC blocks with 64-bit IDMAC */ +static const struct dwmci_idmac_regs dwmci_idmac_regs64 = { + .dbaddrl = DWMCI_DBADDRL, + .dbaddru = DWMCI_DBADDRU, + .idsts = DWMCI_IDSTS64, + .idinten = DWMCI_IDINTEN64, + .dscaddrl = DWMCI_DSCADDRL, + .dscaddru = DWMCI_DSCADDRU, + .bufaddrl = DWMCI_BUFADDRL, + .bufaddru = DWMCI_BUFADDRU, +}; + static int dwmci_wait_reset(struct dwmci_host *host, u32 value) { unsigned long timeout = 1000; @@ -55,11 +88,27 @@ static void dwmci_set_idma_desc32(struct dwmci_idmac32 *desc, u32 control, desc->des3 = next_desc_phys; } -static void dwmci_prepare_desc(struct mmc_data *data, - struct dwmci_idmac32 *cur_idmac, - void *bounce_buffer) +static void dwmci_set_idma_desc64(struct dwmci_idmac64 *desc, u32 control, + u32 buf_size, u64 buf_addr) +{ + phys_addr_t desc_phys = virt_to_phys(desc); + u64 next_desc_phys = desc_phys + sizeof(struct dwmci_idmac64); + + desc->des0 = control; + desc->des1 = 0; + desc->des2 = buf_size; + desc->des3 = 0; + desc->des4 = buf_addr & 0xffffffff; + desc->des5 = buf_addr >> 32; + desc->des6 = next_desc_phys & 0xffffffff; + desc->des7 = next_desc_phys >> 32; +} + +static void dwmci_prepare_desc(struct dwmci_host *host, struct mmc_data *data, + void *cur_idmac, void *bounce_buffer) { struct dwmci_idmac32 *desc32 = cur_idmac; + struct dwmci_idmac64 *desc64 = cur_idmac; ulong data_start, data_end; unsigned int blk_cnt, i; @@ -79,34 +128,47 @@ static void dwmci_prepare_desc(struct mmc_data *data, } else cnt = data->blocksize * 8; - dwmci_set_idma_desc32(desc32, flags, cnt, - buf_phys + i * PAGE_SIZE); - desc32++; + if (host->dma_64bit_address) { + dwmci_set_idma_desc64(desc64, flags, cnt, + buf_phys + i * PAGE_SIZE); + desc64++; + } else { + dwmci_set_idma_desc32(desc32, flags, cnt, + buf_phys + i * PAGE_SIZE); + desc32++; + } if (blk_cnt <= 8) break; blk_cnt -= 8; } - data_end = (ulong)desc32; + if (host->dma_64bit_address) + data_end = (ulong)desc64; + else + data_end = (ulong)desc32; flush_dcache_range(data_start, roundup(data_end, ARCH_DMA_MINALIGN)); } static void dwmci_prepare_data(struct dwmci_host *host, struct mmc_data *data, - struct dwmci_idmac32 *cur_idmac, + void *cur_idmac, void *bounce_buffer) { + const u32 idmacl = virt_to_phys(cur_idmac) & 0xffffffff; + const u32 idmacu = (u64)virt_to_phys(cur_idmac) >> 32; unsigned long ctrl; dwmci_wait_reset(host, DWMCI_CTRL_FIFO_RESET); /* Clear IDMAC interrupt */ - dwmci_writel(host, DWMCI_IDSTS, 0xFFFFFFFF); + dwmci_writel(host, host->regs->idsts, 0xffffffff); - dwmci_writel(host, DWMCI_DBADDR, (ulong)cur_idmac); + dwmci_writel(host, host->regs->dbaddrl, idmacl); + if (host->dma_64bit_address) + dwmci_writel(host, host->regs->dbaddru, idmacu); - dwmci_prepare_desc(data, cur_idmac, bounce_buffer); + dwmci_prepare_desc(host, data, cur_idmac, bounce_buffer); ctrl = dwmci_readl(host, DWMCI_CTRL); ctrl |= DWMCI_IDMAC_EN | DWMCI_DMA_EN; @@ -257,13 +319,13 @@ static int dwmci_dma_transfer(struct dwmci_host *host, uint flags, else mask = DWMCI_IDINTEN_TI; - ret = wait_for_bit_le32(host->ioaddr + DWMCI_IDSTS, + ret = wait_for_bit_le32(host->ioaddr + host->regs->idsts, mask, true, 1000, false); if (ret) debug("%s: DWMCI_IDINTEN mask 0x%x timeout\n", __func__, mask); /* Clear interrupts */ - dwmci_writel(host, DWMCI_IDSTS, DWMCI_IDINTEN_MASK); + dwmci_writel(host, host->regs->idsts, DWMCI_IDINTEN_MASK); ctrl = dwmci_readl(host, DWMCI_CTRL); ctrl &= ~DWMCI_DMA_EN; @@ -300,20 +362,10 @@ static void dwmci_wait_while_busy(struct dwmci_host *host, struct mmc_cmd *cmd) } } -#ifdef CONFIG_DM_MMC -static int dwmci_send_cmd(struct udevice *dev, struct mmc_cmd *cmd, - struct mmc_data *data) +static int dwmci_send_cmd_common(struct dwmci_host *host, struct mmc_cmd *cmd, + struct mmc_data *data, void *cur_idmac) { - struct mmc *mmc = mmc_get_mmc_dev(dev); -#else -static int dwmci_send_cmd(struct mmc *mmc, struct mmc_cmd *cmd, - struct mmc_data *data) -{ -#endif - struct dwmci_host *host = mmc->priv; - ALLOC_CACHE_ALIGN_BUFFER(struct dwmci_idmac32, cur_idmac, - data ? DIV_ROUND_UP(data->blocks, 8) : 0); - int ret = 0, flags = 0, i; + int ret, flags = 0, i; u32 retry = 100000; u32 mask; struct bounce_buffer bbstate; @@ -433,6 +485,28 @@ static int dwmci_send_cmd(struct mmc *mmc, struct mmc_cmd *cmd, return ret; } +#ifdef CONFIG_DM_MMC +static int dwmci_send_cmd(struct udevice *dev, struct mmc_cmd *cmd, + struct mmc_data *data) +{ + struct mmc *mmc = mmc_get_mmc_dev(dev); +#else +static int dwmci_send_cmd(struct mmc *mmc, struct mmc_cmd *cmd, + struct mmc_data *data) +{ +#endif + struct dwmci_host *host = mmc->priv; + const size_t buf_size = data ? DIV_ROUND_UP(data->blocks, 8) : 0; + + if (host->dma_64bit_address) { + ALLOC_CACHE_ALIGN_BUFFER(struct dwmci_idmac64, idmac, buf_size); + return dwmci_send_cmd_common(host, cmd, data, idmac); + } else { + ALLOC_CACHE_ALIGN_BUFFER(struct dwmci_idmac32, idmac, buf_size); + return dwmci_send_cmd_common(host, cmd, data, idmac); + } +} + static int dwmci_control_clken(struct dwmci_host *host, bool on) { const u32 val = on ? DWMCI_CLKEN_ENABLE | DWMCI_CLKEN_LOW_PWR : 0; @@ -594,6 +668,27 @@ static void dwmci_init_fifo(struct dwmci_host *host) dwmci_writel(host, DWMCI_FIFOTH, host->fifoth_val); } +static void dwmci_init_dma(struct dwmci_host *host) +{ + int addr_config; + + if (host->fifo_mode) + return; + + addr_config = (dwmci_readl(host, DWMCI_HCON) >> 27) & 0x1; + if (addr_config == 1) { + host->dma_64bit_address = true; + host->regs = &dwmci_idmac_regs64; + debug("%s: IDMAC supports 64-bit address mode\n", __func__); + } else { + host->dma_64bit_address = false; + host->regs = &dwmci_idmac_regs32; + debug("%s: IDMAC supports 32-bit address mode\n", __func__); + } + + dwmci_writel(host, host->regs->idinten, DWMCI_IDINTEN_MASK); +} + static int dwmci_init(struct mmc *mmc) { struct dwmci_host *host = mmc->priv; @@ -616,16 +711,13 @@ static int dwmci_init(struct mmc *mmc) dwmci_writel(host, DWMCI_TMOUT, 0xFFFFFFFF); - dwmci_writel(host, DWMCI_IDINTEN, 0); dwmci_writel(host, DWMCI_BMOD, 1); dwmci_init_fifo(host); + dwmci_init_dma(host); dwmci_writel(host, DWMCI_CLKENA, 0); dwmci_writel(host, DWMCI_CLKSRC, 0); - if (!host->fifo_mode) - dwmci_writel(host, DWMCI_IDINTEN, DWMCI_IDINTEN_MASK); - return 0; } diff --git a/include/dwmmc.h b/include/dwmmc.h index 7e4acf096dce..de18fda68ac8 100644 --- a/include/dwmmc.h +++ b/include/dwmmc.h @@ -44,12 +44,22 @@ #define DWMCI_UHS_REG 0x074 #define DWMCI_BMOD 0x080 #define DWMCI_PLDMND 0x084 +#define DWMCI_DATA 0x200 +/* Registers to support IDMAC 32-bit address mode */ #define DWMCI_DBADDR 0x088 #define DWMCI_IDSTS 0x08C #define DWMCI_IDINTEN 0x090 #define DWMCI_DSCADDR 0x094 #define DWMCI_BUFADDR 0x098 -#define DWMCI_DATA 0x200 +/* Registers to support IDMAC 64-bit address mode */ +#define DWMCI_DBADDRL 0x088 +#define DWMCI_DBADDRU 0x08c +#define DWMCI_IDSTS64 0x090 +#define DWMCI_IDINTEN64 0x094 +#define DWMCI_DSCADDRL 0x098 +#define DWMCI_DSCADDRU 0x09c +#define DWMCI_BUFADDRL 0x0a0 +#define DWMCI_BUFADDRU 0x0a4 /* Interrupt Mask register */ #define DWMCI_INTMSK_ALL 0xffffffff @@ -142,6 +152,29 @@ /* quirks */ #define DWMCI_QUIRK_DISABLE_SMU (1 << 0) +/** + * struct dwmci_idmac_regs - Offsets of IDMAC registers + * + * @dbaddrl: Descriptor base address, lower 32 bits + * @dbaddru: Descriptor base address, upper 32 bits + * @idsts: Internal DMA status + * @idinten: Internal DMA interrupt enable + * @dscaddrl: IDMAC descriptor address, lower 32 bits + * @dscaddru: IDMAC descriptor address, upper 32 bits + * @bufaddrl: Current data buffer address, lower 32 bits + * @bufaddru: Current data buffer address, upper 32 bits + */ +struct dwmci_idmac_regs { + u32 dbaddrl; + u32 dbaddru; + u32 idsts; + u32 idinten; + u32 dscaddrl; + u32 dscaddru; + u32 bufaddrl; + u32 bufaddru; +}; + /** * struct dwmci_host - Information about a designware MMC host * @@ -157,6 +190,8 @@ * @fifoth_val: Value for FIFOTH register (or 0 to leave unset) * @mmc: Pointer to generic MMC structure for this device * @priv: Private pointer for use by controller + * @dma_64bit_address: Whether DMA supports 64-bit address mode or not + * @regs: Registers that can vary for different DW MMC block versions */ struct dwmci_host { const char *name; @@ -196,6 +231,8 @@ struct dwmci_host { /* use fifo mode to read and write data */ bool fifo_mode; + bool dma_64bit_address; + const struct dwmci_idmac_regs *regs; }; static inline void dwmci_writel(struct dwmci_host *host, int reg, u32 val) From patchwork Mon Jun 10 01:11:58 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sam Protsenko X-Patchwork-Id: 802943 Delivered-To: patch@linaro.org Received: by 2002:adf:f147:0:b0:35b:5a80:51b4 with SMTP id y7csp1734557wro; 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The FIFOTH register value will be calculated using fifo-depth value in DW MMC core (dw_mmc.c). This change reduces code duplication in platform drivers, and pulls common FIFOTH register value calculation into core dw_mmc driver where it belongs. No functional change. Signed-off-by: Sam Protsenko Reviewed-by: Yang Xiwen --- drivers/mmc/dw_mmc.c | 21 +++++++++++++-------- drivers/mmc/exynos_dw_mmc.c | 10 +++++----- drivers/mmc/ftsdc010_mci.h | 1 - drivers/mmc/hi6220_dw_mmc.c | 7 +++---- drivers/mmc/nexell_dw_mmc.c | 5 +---- drivers/mmc/rockchip_dw_mmc.c | 5 +---- drivers/mmc/snps_dw_mmc.c | 6 ++---- drivers/mmc/socfpga_dw_mmc.c | 4 ++-- include/dwmmc.h | 4 ++-- 9 files changed, 29 insertions(+), 34 deletions(-) diff --git a/drivers/mmc/dw_mmc.c b/drivers/mmc/dw_mmc.c index 7aa3dbbe83ad..8af665a00222 100644 --- a/drivers/mmc/dw_mmc.c +++ b/drivers/mmc/dw_mmc.c @@ -218,8 +218,6 @@ static unsigned int dwmci_get_timeout(struct mmc *mmc, const unsigned int size) static int dwmci_data_transfer_fifo(struct dwmci_host *host, struct mmc_data *data, u32 mask) { - const u32 fifo_depth = (((host->fifoth_val & RX_WMARK_MASK) >> - RX_WMARK_SHIFT) + 1) * 2; const u32 int_rx = mask & (DWMCI_INTMSK_RXDR | DWMCI_INTMSK_DTO); const u32 int_tx = mask & DWMCI_INTMSK_TXDR; int ret = 0; @@ -254,8 +252,8 @@ static int dwmci_data_transfer_fifo(struct dwmci_host *host, if (ret < 0) break; - len = fifo_depth - ((len >> DWMCI_FIFO_SHIFT) & - DWMCI_FIFO_MASK); + len = host->fifo_depth - ((len >> DWMCI_FIFO_SHIFT) & + DWMCI_FIFO_MASK); len = min(size, len); for (i = 0; i < len; i++) dwmci_writel(host, DWMCI_DATA, *buf++); @@ -656,16 +654,23 @@ static int dwmci_set_ios(struct mmc *mmc) static void dwmci_init_fifo(struct dwmci_host *host) { - if (!host->fifoth_val) { + u32 fifo_thr, fifoth_val; + + if (!host->fifo_depth) { u32 fifo_size; + /* + * Automatically detect FIFO depth from FIFOTH register. + * Power-on value of RX_WMark is FIFO_DEPTH-1. + */ fifo_size = dwmci_readl(host, DWMCI_FIFOTH); fifo_size = ((fifo_size & RX_WMARK_MASK) >> RX_WMARK_SHIFT) + 1; - host->fifoth_val = MSIZE(0x2) | RX_WMARK(fifo_size / 2 - 1) | - TX_WMARK(fifo_size / 2); + host->fifo_depth = fifo_size; } - dwmci_writel(host, DWMCI_FIFOTH, host->fifoth_val); + fifo_thr = host->fifo_depth / 2; + fifoth_val = MSIZE(0x2) | RX_WMARK(fifo_thr - 1) | TX_WMARK(fifo_thr); + dwmci_writel(host, DWMCI_FIFOTH, fifoth_val); } static void dwmci_init_dma(struct dwmci_host *host) diff --git a/drivers/mmc/exynos_dw_mmc.c b/drivers/mmc/exynos_dw_mmc.c index 2f849c43b129..14cb0c05cb55 100644 --- a/drivers/mmc/exynos_dw_mmc.c +++ b/drivers/mmc/exynos_dw_mmc.c @@ -151,8 +151,8 @@ static int do_dwmci_init(struct dwmci_host *host) return exynos_dwmci_core_init(host); } -static int exynos_dwmci_get_config(const void *blob, int node, - struct dwmci_host *host, +static int exynos_dwmci_get_config(struct udevice *dev, const void *blob, + int node, struct dwmci_host *host, struct dwmci_exynos_priv_data *priv) { int err = 0; @@ -201,7 +201,7 @@ static int exynos_dwmci_get_config(const void *blob, int node, priv->sdr_timing = DWMMC_MMC2_SDR_TIMING_VAL; } - host->fifoth_val = fdtdec_get_int(blob, node, "fifoth_val", 0); + host->fifo_depth = dev_read_u32_default(dev, "fifo-depth", 0); host->bus_hz = fdtdec_get_int(blob, node, "bus_hz", 0); host->div = fdtdec_get_int(blob, node, "div", 0); @@ -217,8 +217,8 @@ static int exynos_dwmmc_probe(struct udevice *dev) struct dwmci_host *host = &priv->host; int err; - err = exynos_dwmci_get_config(gd->fdt_blob, dev_of_offset(dev), host, - priv); + err = exynos_dwmci_get_config(dev, gd->fdt_blob, dev_of_offset(dev), + host, priv); if (err) return err; err = do_dwmci_init(host); diff --git a/drivers/mmc/ftsdc010_mci.h b/drivers/mmc/ftsdc010_mci.h index 782d92be2f5f..36187cfa04f6 100644 --- a/drivers/mmc/ftsdc010_mci.h +++ b/drivers/mmc/ftsdc010_mci.h @@ -28,7 +28,6 @@ struct ftsdc010_chip { int dev_index; int dev_id; int buswidth; - u32 fifoth_val; struct mmc *mmc; void *priv; bool fifo_mode; diff --git a/drivers/mmc/hi6220_dw_mmc.c b/drivers/mmc/hi6220_dw_mmc.c index dc0210402bd2..e0b473f3f55c 100644 --- a/drivers/mmc/hi6220_dw_mmc.c +++ b/drivers/mmc/hi6220_dw_mmc.c @@ -37,7 +37,7 @@ struct hi6220_dwmmc_priv_data { struct hisi_mmc_data { unsigned int clock; bool use_fifo; - u32 fifoth_val; + u32 fifo_depth; }; static int hi6220_dwmmc_of_to_plat(struct udevice *dev) @@ -126,7 +126,7 @@ static int hi6220_dwmmc_probe(struct udevice *dev) host->mmc = &plat->mmc; host->fifo_mode = mmc_data->use_fifo; - host->fifoth_val = mmc_data->fifoth_val; + host->fifo_depth = mmc_data->fifo_depth; host->mmc->priv = &priv->host; upriv->mmc = host->mmc; host->mmc->dev = dev; @@ -159,8 +159,7 @@ static const struct hisi_mmc_data hi6220_mmc_data = { static const struct hisi_mmc_data hi3798mv2x_mmc_data = { .clock = 50000000, .use_fifo = false, - // FIFO depth is 256 - .fifoth_val = MSIZE(4) | RX_WMARK(0x7f) | TX_WMARK(0x80), + .fifo_depth = 256, }; static const struct udevice_id hi6220_dwmmc_ids[] = { diff --git a/drivers/mmc/nexell_dw_mmc.c b/drivers/mmc/nexell_dw_mmc.c index 2723e4887cf7..aad848ca2825 100644 --- a/drivers/mmc/nexell_dw_mmc.c +++ b/drivers/mmc/nexell_dw_mmc.c @@ -187,10 +187,7 @@ static int nexell_dwmmc_probe(struct udevice *dev) struct dwmci_host *host = &priv->host; struct udevice *pwr_dev __maybe_unused; - host->fifoth_val = MSIZE(0x2) | - RX_WMARK(priv->fifo_size / 2 - 1) | - TX_WMARK(priv->fifo_size / 2); - + host->fifo_depth = priv->fifo_size; host->fifo_mode = priv->fifo_mode; dwmci_setup_cfg(&plat->cfg, host, priv->max_freq, priv->min_freq); diff --git a/drivers/mmc/rockchip_dw_mmc.c b/drivers/mmc/rockchip_dw_mmc.c index ad4529d6afa8..d52ae9cb6fd8 100644 --- a/drivers/mmc/rockchip_dw_mmc.c +++ b/drivers/mmc/rockchip_dw_mmc.c @@ -139,10 +139,7 @@ static int rockchip_dwmmc_probe(struct udevice *dev) if (ret < 0) return ret; #endif - host->fifoth_val = MSIZE(0x2) | - RX_WMARK(priv->fifo_depth / 2 - 1) | - TX_WMARK(priv->fifo_depth / 2); - + host->fifo_depth = priv->fifo_depth; host->fifo_mode = priv->fifo_mode; #if CONFIG_IS_ENABLED(MMC_PWRSEQ) diff --git a/drivers/mmc/snps_dw_mmc.c b/drivers/mmc/snps_dw_mmc.c index 0134399e3934..4a72f41ef16f 100644 --- a/drivers/mmc/snps_dw_mmc.c +++ b/drivers/mmc/snps_dw_mmc.c @@ -82,7 +82,7 @@ static int snps_dwmmc_of_to_plat(struct udevice *dev) host->ioaddr = dev_read_addr_ptr(dev); /* - * If fifo-depth is unset don't set fifoth_val - we will try to + * If fifo-depth is unset don't set fifo_depth - we will try to * auto detect it. */ ret = dev_read_u32(dev, "fifo-depth", &fifo_depth); @@ -90,9 +90,7 @@ static int snps_dwmmc_of_to_plat(struct udevice *dev) if (fifo_depth < FIFO_MIN || fifo_depth > FIFO_MAX) return -EINVAL; - host->fifoth_val = MSIZE(0x2) | - RX_WMARK(fifo_depth / 2 - 1) | - TX_WMARK(fifo_depth / 2); + host->fifo_depth = fifo_depth; } host->buswidth = dev_read_u32_default(dev, "bus-width", 4); diff --git a/drivers/mmc/socfpga_dw_mmc.c b/drivers/mmc/socfpga_dw_mmc.c index 387cb8b6b50a..f795472d10f7 100644 --- a/drivers/mmc/socfpga_dw_mmc.c +++ b/drivers/mmc/socfpga_dw_mmc.c @@ -135,8 +135,8 @@ static int socfpga_dwmmc_of_to_plat(struct udevice *dev) * We only have one dwmmc block on gen5 SoCFPGA. */ host->dev_index = 0; - host->fifoth_val = MSIZE(0x2) | - RX_WMARK(fifo_depth / 2 - 1) | TX_WMARK(fifo_depth / 2); + + host->fifo_depth = fifo_depth; priv->drvsel = fdtdec_get_uint(gd->fdt_blob, dev_of_offset(dev), "drvsel", 3); priv->smplsel = fdtdec_get_uint(gd->fdt_blob, dev_of_offset(dev), diff --git a/include/dwmmc.h b/include/dwmmc.h index de18fda68ac8..7bb456e792b4 100644 --- a/include/dwmmc.h +++ b/include/dwmmc.h @@ -187,7 +187,7 @@ struct dwmci_idmac_regs { * @dev_index: Arbitrary device index for use by controller * @dev_id: Arbitrary device ID for use by controller * @buswidth: Bus width in bits (8 or 4) - * @fifoth_val: Value for FIFOTH register (or 0 to leave unset) + * @fifo_depth: Depth of FIFO, bytes (or 0 for automatic detection) * @mmc: Pointer to generic MMC structure for this device * @priv: Private pointer for use by controller * @dma_64bit_address: Whether DMA supports 64-bit address mode or not @@ -204,7 +204,7 @@ struct dwmci_host { int dev_index; int dev_id; int buswidth; - u32 fifoth_val; + u32 fifo_depth; struct mmc *mmc; void *priv; From patchwork Mon Jun 10 01:11:59 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sam Protsenko X-Patchwork-Id: 802944 Delivered-To: patch@linaro.org Received: by 2002:adf:f147:0:b0:35b:5a80:51b4 with SMTP id y7csp1734607wro; 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Sun, 09 Jun 2024 18:12:35 -0700 (PDT) From: Sam Protsenko To: Tom Rini , Minkyu Kang , Peng Fan , Jaehoon Chung , Simon Glass Cc: Quentin Schulz , Philipp Tomsich , Kever Yang , Eugeniy Paltsev , Peter Robinson , Jonas Karlman , Yang Xiwen , Ferass El Hafidi , Sean Anderson , u-boot@lists.denx.de, uboot-snps-arc@synopsys.com Subject: [PATCH v2 13/40] mmc: dw_mmc: Fix kernel-doc comments in dwmmc.h Date: Sun, 9 Jun 2024 20:11:59 -0500 Message-Id: <20240610011226.4050-14-semen.protsenko@linaro.org> X-Mailer: git-send-email 2.39.2 In-Reply-To: <20240610011226.4050-1-semen.protsenko@linaro.org> References: <20240610011226.4050-1-semen.protsenko@linaro.org> MIME-Version: 1.0 X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.39 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.103.8 at phobos.denx.de X-Virus-Status: Clean Rework kernel-doc comments in dwmmc.h header so it's actually possible to generate a proper documentation from it usin scripts/kernel-doc script, with no errors. No functional change. Signed-off-by: Sam Protsenko --- include/dwmmc.h | 41 ++++++++++++++++++++++------------------- 1 file changed, 22 insertions(+), 19 deletions(-) diff --git a/include/dwmmc.h b/include/dwmmc.h index 7bb456e792b4..77c8989148a1 100644 --- a/include/dwmmc.h +++ b/include/dwmmc.h @@ -182,6 +182,7 @@ struct dwmci_idmac_regs { * @ioaddr: Base I/O address of controller * @quirks: Quick flags - see DWMCI_QUIRK_... * @caps: Capabilities - see MMC_MODE_... + * @clock: Current clock frequency (after internal divider), Hz * @bus_hz: Bus speed in Hz, if @get_mmc_clk() is NULL * @div: Arbitrary clock divider value for use by controller * @dev_index: Arbitrary device index for use by controller @@ -190,6 +191,10 @@ struct dwmci_idmac_regs { * @fifo_depth: Depth of FIFO, bytes (or 0 for automatic detection) * @mmc: Pointer to generic MMC structure for this device * @priv: Private pointer for use by controller + * @clksel: (Optional) Platform function to run when speed/width is changed + * @board_init: (Optional) Platform function to run on init + * @cfg: Internal MMC configuration, for !CONFIG_BLK cases + * @fifo_mode: Use FIFO mode (not DMA) to read and write data * @dma_64bit_address: Whether DMA supports 64-bit address mode or not * @regs: Registers that can vary for different DW MMC block versions */ @@ -210,9 +215,12 @@ struct dwmci_host { int (*clksel)(struct dwmci_host *host); void (*board_init)(struct dwmci_host *host); - /** - * Get / set a particular MMC clock frequency + * @get_mmc_clk: (Optional) Platform function to get/set a particular + * MMC clock frequency + * + * @host: DWMMC host + * @freq: Frequency the host is trying to achieve * * This is used to request the current clock frequency of the clock * that drives the DWMMC peripheral. The caller will then use this @@ -220,16 +228,12 @@ struct dwmci_host { * required MMC bus clock frequency. If you want to handle the * clock external to DWMMC, use @freq to select the frequency and * return that value too. Then DWMMC will put itself in bypass mode. - * - * @host: DWMMC host - * @freq: Frequency the host is trying to achieve */ unsigned int (*get_mmc_clk)(struct dwmci_host *host, uint freq); #ifndef CONFIG_BLK struct mmc_config cfg; #endif - /* use fifo mode to read and write data */ bool fifo_mode; bool dma_64bit_address; const struct dwmci_idmac_regs *regs; @@ -267,6 +271,10 @@ static inline u8 dwmci_readb(struct dwmci_host *host, int reg) #ifdef CONFIG_BLK /** * dwmci_setup_cfg() - Set up the configuration for DWMMC + * @cfg: Configuration structure to fill in (generally &plat->mmc) + * @host: DWMMC host + * @max_clk: Maximum supported clock speed in Hz (e.g. 150000000) + * @min_clk: Minimum supported clock speed in Hz (e.g. 400000) * * This is used to set up a DWMMC device when you are using CONFIG_BLK. * @@ -291,28 +299,23 @@ static inline u8 dwmci_readb(struct dwmci_host *host, int reg) * struct rockchip_mmc_plat *plat = dev_get_plat(dev); * * See rockchip_dw_mmc.c for an example. - * - * @cfg: Configuration structure to fill in (generally &plat->mmc) - * @host: DWMMC host - * @max_clk: Maximum supported clock speed in HZ (e.g. 150000000) - * @min_clk: Minimum supported clock speed in HZ (e.g. 400000) */ void dwmci_setup_cfg(struct mmc_config *cfg, struct dwmci_host *host, u32 max_clk, u32 min_clk); /** * dwmci_bind() - Set up a new MMC block device + * @dev: Device to set up + * @mmc: Pointer to mmc structure (normally &plat->mmc) + * @cfg: Empty configuration structure (generally &plat->cfg). This is + * normally all zeroes at this point. The only purpose of passing + * this in is to set mmc->cfg to it. * * This is used to set up a DWMMC block device when you are using CONFIG_BLK. * It should be called from your driver's bind() method. * * See rockchip_dw_mmc.c for an example. * - * @dev: Device to set up - * @mmc: Pointer to mmc structure (normally &plat->mmc) - * @cfg: Empty configuration structure (generally &plat->cfg). This is - * normally all zeroes at this point. The only purpose of passing - * this in is to set mmc->cfg to it. * Return: 0 if OK, -ve if the block device could not be created */ int dwmci_bind(struct udevice *dev, struct mmc *mmc, struct mmc_config *cfg); @@ -320,12 +323,12 @@ int dwmci_bind(struct udevice *dev, struct mmc *mmc, struct mmc_config *cfg); #else /** * add_dwmci() - Add a new DWMMC interface + * @host: DWMMC host structure + * @max_clk: Maximum supported clock speed in Hz (e.g. 150000000) + * @min_clk: Minimum supported clock speed in Hz (e.g. 400000) * * This is used when you are not using CONFIG_BLK. Convert your driver over! * - * @host: DWMMC host structure - * @max_clk: Maximum supported clock speed in HZ (e.g. 150000000) - * @min_clk: Minimum supported clock speed in HZ (e.g. 400000) * Return: 0 if OK, -ve on error */ int add_dwmci(struct dwmci_host *host, u32 max_clk, u32 min_clk); From patchwork Mon Jun 10 01:12:00 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sam Protsenko X-Patchwork-Id: 802946 Delivered-To: patch@linaro.org Received: by 2002:adf:f147:0:b0:35b:5a80:51b4 with SMTP id y7csp1734676wro; Sun, 9 Jun 2024 18:15:14 -0700 (PDT) X-Forwarded-Encrypted: i=2; AJvYcCW60ipFCGKTF0D54nRGoxNxpVpzBHytOdzBTX3zbPbhaOfCXLQk4qaG7WvSlGTXDM/gycALNq0Ymhx+haeht8IQ X-Google-Smtp-Source: AGHT+IHbq8WQ5Y5arZ0PIMBaC8ECYzcmxJv345DWa8mUuBGBgGLNYBjya0C75OosY4lXHaHsYKs0 X-Received: by 2002:a19:7514:0:b0:52b:d48e:32e8 with SMTP id 2adb3069b0e04-52bd48e3370mr2764837e87.45.1717982114755; Sun, 09 Jun 2024 18:15:14 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1717982114; cv=none; d=google.com; s=arc-20160816; b=zfneD2CebM8q1MyqEiKHLkGLEhbMoAnn99E79AQEGs6wA+ozJ0xkFAAnnWh0FQ/bBk rZInr7KVrUKfSfVElk59ELjiqoVfekksxsGJq+Y/22Ho32+3t75PyQnYraAXSCLvUieR Nh2OLIZm19FSaaXGmxQPrvfDam7OLIhypR4Zo7ecSQTdSGTP+9sqLuye/vLGZ7oGyYSW /nWLot27dD87Tjs96bD75fxnTlh90+UvXyi9YCOmQaQ6qVarRZVjFSkfQu1Yx9viAcZd pL+on7KKsXiwC2FFEMA6aovoNEYWhyHlA0ncXrV3A3wK3vzxPxOuhfNzEG2G0zUz1N/v lWbw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:cc:to :from:dkim-signature; bh=cd70O6XiQGCDtob3jT6zoGrK29umM/zpSIgPUgpeTtM=; fh=qnnSzJJ5j0jvr8jtaqiXbx1AenkwGv2GUSDGLURqw3s=; b=NRW+fQJL8OCjywsHRwUuckvGEGSa/NTftsgsg3gMsMy5DYk8k6cof2jpuAqAllonJJ Yv4wzNTzBnxn8EQ0XkaXIbJg/XmXhA+/YeSxJA9Mq2BGX84cn0NHnpZtTxIcYeS2LPVP XULXl50rCWNVnW29t0wOyeSgtcqxgeGQ27XccenayYnZSnyYSty9k1qKeMRKRw7hTqE4 10Bu/hyQgPCC+zhogDVyesUMOxo6JtZ+NBGnkefNwtaeSkY2TwVeZ6C/hfqnSB7SkubU iVhTWIMfjtgSGH7AV2Depif4pSTNXAOhB8omUFVjMY0RLDoxly1obMtVLfPDSw55cUAc ub6g==; dara=google.com ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=f82mzstk; spf=pass (google.com: domain of u-boot-bounces@lists.denx.de designates 85.214.62.61 as permitted sender) smtp.mailfrom=u-boot-bounces@lists.denx.de; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from phobos.denx.de (phobos.denx.de. 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No functional change. Signed-off-by: Sam Protsenko Reviewed-by: Quentin Schulz --- Changes in v2: - Added R-b tag from Quentin drivers/mmc/dw_mmc.c | 69 ++++++++++---------- include/dwmmc.h | 149 ++++++++++++++++++++++--------------------- 2 files changed, 110 insertions(+), 108 deletions(-) diff --git a/drivers/mmc/dw_mmc.c b/drivers/mmc/dw_mmc.c index 8af665a00222..8551eac70185 100644 --- a/drivers/mmc/dw_mmc.c +++ b/drivers/mmc/dw_mmc.c @@ -125,8 +125,9 @@ static void dwmci_prepare_desc(struct dwmci_host *host, struct mmc_data *data, if (blk_cnt <= 8) { flags |= DWMCI_IDMAC_LD; cnt = data->blocksize * blk_cnt; - } else + } else { cnt = data->blocksize * 8; + } if (host->dma_64bit_address) { dwmci_set_idma_desc64(desc64, flags, cnt, @@ -150,10 +151,8 @@ static void dwmci_prepare_desc(struct dwmci_host *host, struct mmc_data *data, flush_dcache_range(data_start, roundup(data_end, ARCH_DMA_MINALIGN)); } -static void dwmci_prepare_data(struct dwmci_host *host, - struct mmc_data *data, - void *cur_idmac, - void *bounce_buffer) +static void dwmci_prepare_data(struct dwmci_host *host, struct mmc_data *data, + void *cur_idmac, void *bounce_buffer) { const u32 idmacl = virt_to_phys(cur_idmac) & 0xffffffff; const u32 idmacu = (u64)virt_to_phys(cur_idmac) >> 32; @@ -277,7 +276,7 @@ static int dwmci_data_transfer(struct dwmci_host *host, struct mmc_data *data) for (;;) { mask = dwmci_readl(host, DWMCI_RINTSTS); - /* Error during data transfer. */ + /* Error during data transfer */ if (mask & (DWMCI_DATA_ERR | DWMCI_DATA_TOUT)) { debug("%s: DATA ERROR!\n", __func__); ret = -EINVAL; @@ -286,16 +285,15 @@ static int dwmci_data_transfer(struct dwmci_host *host, struct mmc_data *data) ret = dwmci_data_transfer_fifo(host, data, mask); - /* Data arrived correctly. */ + /* Data arrived correctly */ if (mask & DWMCI_INTMSK_DTO) { ret = 0; break; } - /* Check for timeout. */ + /* Check for timeout */ if (get_timer(start) > timeout) { - debug("%s: Timeout waiting for data!\n", - __func__); + debug("%s: Timeout waiting for data!\n", __func__); ret = -ETIMEDOUT; break; } @@ -317,8 +315,8 @@ static int dwmci_dma_transfer(struct dwmci_host *host, uint flags, else mask = DWMCI_IDINTEN_TI; - ret = wait_for_bit_le32(host->ioaddr + host->regs->idsts, - mask, true, 1000, false); + ret = wait_for_bit_le32(host->ioaddr + host->regs->idsts, mask, true, + 1000, false); if (ret) debug("%s: DWMCI_IDINTEN mask 0x%x timeout\n", __func__, mask); @@ -334,7 +332,7 @@ static int dwmci_dma_transfer(struct dwmci_host *host, uint flags, } static int dwmci_set_transfer_mode(struct dwmci_host *host, - struct mmc_data *data) + struct mmc_data *data) { unsigned long mode; @@ -380,12 +378,12 @@ static int dwmci_send_cmd_common(struct dwmci_host *host, struct mmc_cmd *cmd, } else { if (data->flags == MMC_DATA_READ) { ret = bounce_buffer_start(&bbstate, - (void*)data->dest, + (void *)data->dest, data->blocksize * data->blocks, GEN_BB_WRITE); } else { ret = bounce_buffer_start(&bbstate, - (void*)data->src, + (void *)data->src, data->blocksize * data->blocks, GEN_BB_READ); } @@ -420,9 +418,9 @@ static int dwmci_send_cmd_common(struct dwmci_host *host, struct mmc_cmd *cmd, if (cmd->resp_type & MMC_RSP_CRC) flags |= DWMCI_CMD_CHECK_CRC; - flags |= (cmd->cmdidx | DWMCI_CMD_START | DWMCI_CMD_USE_HOLD_REG); + flags |= cmd->cmdidx | DWMCI_CMD_START | DWMCI_CMD_USE_HOLD_REG; - debug("Sending CMD%d\n",cmd->cmdidx); + debug("Sending CMD%d\n", cmd->cmdidx); dwmci_writel(host, DWMCI_CMD, flags); @@ -436,7 +434,7 @@ static int dwmci_send_cmd_common(struct dwmci_host *host, struct mmc_cmd *cmd, } if (i == retry) { - debug("%s: Timeout.\n", __func__); + debug("%s: Timeout\n", __func__); return -ETIMEDOUT; } @@ -449,18 +447,17 @@ static int dwmci_send_cmd_common(struct dwmci_host *host, struct mmc_cmd *cmd, * below shall be debug(). eMMC cards also do not favor * CMD8, please keep that in mind. */ - debug("%s: Response Timeout.\n", __func__); + debug("%s: Response Timeout\n", __func__); return -ETIMEDOUT; } else if (mask & DWMCI_INTMSK_RE) { - debug("%s: Response Error.\n", __func__); + debug("%s: Response Error\n", __func__); return -EIO; } else if ((cmd->resp_type & MMC_RSP_CRC) && (mask & DWMCI_INTMSK_RCRC)) { - debug("%s: Response CRC Error.\n", __func__); + debug("%s: Response CRC Error\n", __func__); return -EIO; } - if (cmd->resp_type & MMC_RSP_PRESENT) { if (cmd->resp_type & MMC_RSP_136) { cmd->response[0] = dwmci_readl(host, DWMCI_RESP3); @@ -556,24 +553,24 @@ static int dwmci_setup_bus(struct dwmci_host *host, u32 freq) unsigned long sclk; int ret; - if ((freq == host->clock) || (freq == 0)) + if (freq == host->clock || freq == 0) return 0; + /* - * If host->get_mmc_clk isn't defined, - * then assume that host->bus_hz is source clock value. - * host->bus_hz should be set by user. + * If host->get_mmc_clk isn't defined, then assume that host->bus_hz is + * source clock value. host->bus_hz should be set by user. */ - if (host->get_mmc_clk) + if (host->get_mmc_clk) { sclk = host->get_mmc_clk(host, freq); - else if (host->bus_hz) + } else if (host->bus_hz) { sclk = host->bus_hz; - else { - debug("%s: Didn't get source clock value.\n", __func__); + } else { + debug("%s: Didn't get source clock value\n", __func__); return -EINVAL; } if (sclk == freq) - div = 0; /* bypass mode */ + div = 0; /* bypass mode */ else div = DIV_ROUND_UP(sclk, 2 * freq); @@ -597,7 +594,7 @@ static int dwmci_set_ios(struct mmc *mmc) struct dwmci_host *host = (struct dwmci_host *)mmc->priv; u32 ctype, regs; - debug("Buswidth = %d, clock: %d\n", mmc->bus_width, mmc->clock); + debug("Bus width = %d, clock: %d\n", mmc->bus_width, mmc->clock); dwmci_setup_bus(host, mmc->clock); switch (mmc->bus_width) { @@ -711,10 +708,10 @@ static int dwmci_init(struct mmc *mmc) /* Enumerate at 400KHz */ dwmci_setup_bus(host, mmc->cfg->f_min); - dwmci_writel(host, DWMCI_RINTSTS, 0xFFFFFFFF); + dwmci_writel(host, DWMCI_RINTSTS, 0xffffffff); dwmci_writel(host, DWMCI_INTMASK, 0); - dwmci_writel(host, DWMCI_TMOUT, 0xFFFFFFFF); + dwmci_writel(host, DWMCI_TMOUT, 0xffffffff); dwmci_writel(host, DWMCI_BMOD, 1); dwmci_init_fifo(host); @@ -748,7 +745,7 @@ static const struct mmc_ops dwmci_ops = { #endif void dwmci_setup_cfg(struct mmc_config *cfg, struct dwmci_host *host, - u32 max_clk, u32 min_clk) + u32 max_clk, u32 min_clk) { cfg->name = host->name; #ifndef CONFIG_DM_MMC @@ -784,7 +781,7 @@ int add_dwmci(struct dwmci_host *host, u32 max_clk, u32 min_clk) dwmci_setup_cfg(&host->cfg, host, max_clk, min_clk); host->mmc = mmc_create(&host->cfg, host); - if (host->mmc == NULL) + if (!host->mmc) return -1; return 0; diff --git a/include/dwmmc.h b/include/dwmmc.h index 77c8989148a1..a99b2f3bf0cc 100644 --- a/include/dwmmc.h +++ b/include/dwmmc.h @@ -15,31 +15,31 @@ #define DWMCI_CTRL 0x000 #define DWMCI_PWREN 0x004 #define DWMCI_CLKDIV 0x008 -#define DWMCI_CLKSRC 0x00C +#define DWMCI_CLKSRC 0x00c #define DWMCI_CLKENA 0x010 #define DWMCI_TMOUT 0x014 #define DWMCI_CTYPE 0x018 -#define DWMCI_BLKSIZ 0x01C +#define DWMCI_BLKSIZ 0x01c #define DWMCI_BYTCNT 0x020 #define DWMCI_INTMASK 0x024 #define DWMCI_CMDARG 0x028 -#define DWMCI_CMD 0x02C +#define DWMCI_CMD 0x02c #define DWMCI_RESP0 0x030 #define DWMCI_RESP1 0x034 #define DWMCI_RESP2 0x038 -#define DWMCI_RESP3 0x03C +#define DWMCI_RESP3 0x03c #define DWMCI_MINTSTS 0x040 #define DWMCI_RINTSTS 0x044 #define DWMCI_STATUS 0x048 -#define DWMCI_FIFOTH 0x04C +#define DWMCI_FIFOTH 0x04c #define DWMCI_CDETECT 0x050 #define DWMCI_WRTPRT 0x054 #define DWMCI_GPIO 0x058 -#define DWMCI_TCMCNT 0x05C +#define DWMCI_TCMCNT 0x05c #define DWMCI_TBBCNT 0x060 #define DWMCI_DEBNCE 0x064 #define DWMCI_USRID 0x068 -#define DWMCI_VERID 0x06C +#define DWMCI_VERID 0x06c #define DWMCI_HCON 0x070 #define DWMCI_UHS_REG 0x074 #define DWMCI_BMOD 0x080 @@ -47,7 +47,7 @@ #define DWMCI_DATA 0x200 /* Registers to support IDMAC 32-bit address mode */ #define DWMCI_DBADDR 0x088 -#define DWMCI_IDSTS 0x08C +#define DWMCI_IDSTS 0x08c #define DWMCI_IDINTEN 0x090 #define DWMCI_DSCADDR 0x094 #define DWMCI_BUFADDR 0x098 @@ -63,94 +63,94 @@ /* Interrupt Mask register */ #define DWMCI_INTMSK_ALL 0xffffffff -#define DWMCI_INTMSK_RE (1 << 1) -#define DWMCI_INTMSK_CDONE (1 << 2) -#define DWMCI_INTMSK_DTO (1 << 3) -#define DWMCI_INTMSK_TXDR (1 << 4) -#define DWMCI_INTMSK_RXDR (1 << 5) -#define DWMCI_INTMSK_RCRC (1 << 6) -#define DWMCI_INTMSK_DCRC (1 << 7) -#define DWMCI_INTMSK_RTO (1 << 8) -#define DWMCI_INTMSK_DRTO (1 << 9) -#define DWMCI_INTMSK_HTO (1 << 10) -#define DWMCI_INTMSK_FRUN (1 << 11) -#define DWMCI_INTMSK_HLE (1 << 12) -#define DWMCI_INTMSK_SBE (1 << 13) -#define DWMCI_INTMSK_ACD (1 << 14) -#define DWMCI_INTMSK_EBE (1 << 15) - -/* Raw interrupt Regsiter */ -#define DWMCI_DATA_ERR (DWMCI_INTMSK_EBE | DWMCI_INTMSK_SBE | DWMCI_INTMSK_HLE |\ - DWMCI_INTMSK_FRUN | DWMCI_INTMSK_EBE | DWMCI_INTMSK_DCRC) -#define DWMCI_DATA_TOUT (DWMCI_INTMSK_HTO | DWMCI_INTMSK_DRTO) +#define DWMCI_INTMSK_RE BIT(1) +#define DWMCI_INTMSK_CDONE BIT(2) +#define DWMCI_INTMSK_DTO BIT(3) +#define DWMCI_INTMSK_TXDR BIT(4) +#define DWMCI_INTMSK_RXDR BIT(5) +#define DWMCI_INTMSK_RCRC BIT(6) +#define DWMCI_INTMSK_DCRC BIT(7) +#define DWMCI_INTMSK_RTO BIT(8) +#define DWMCI_INTMSK_DRTO BIT(9) +#define DWMCI_INTMSK_HTO BIT(10) +#define DWMCI_INTMSK_FRUN BIT(11) +#define DWMCI_INTMSK_HLE BIT(12) +#define DWMCI_INTMSK_SBE BIT(13) +#define DWMCI_INTMSK_ACD BIT(14) +#define DWMCI_INTMSK_EBE BIT(15) + +/* Raw interrupt register */ +#define DWMCI_DATA_ERR (DWMCI_INTMSK_EBE | DWMCI_INTMSK_SBE | \ + DWMCI_INTMSK_HLE | DWMCI_INTMSK_FRUN | \ + DWMCI_INTMSK_EBE | DWMCI_INTMSK_DCRC) +#define DWMCI_DATA_TOUT (DWMCI_INTMSK_HTO | DWMCI_INTMSK_DRTO) + /* CTRL register */ -#define DWMCI_CTRL_RESET (1 << 0) -#define DWMCI_CTRL_FIFO_RESET (1 << 1) -#define DWMCI_CTRL_DMA_RESET (1 << 2) -#define DWMCI_DMA_EN (1 << 5) -#define DWMCI_CTRL_SEND_AS_CCSD (1 << 10) -#define DWMCI_IDMAC_EN (1 << 25) +#define DWMCI_CTRL_RESET BIT(0) +#define DWMCI_CTRL_FIFO_RESET BIT(1) +#define DWMCI_CTRL_DMA_RESET BIT(2) +#define DWMCI_DMA_EN BIT(5) +#define DWMCI_CTRL_SEND_AS_CCSD BIT(10) +#define DWMCI_IDMAC_EN BIT(25) #define DWMCI_RESET_ALL (DWMCI_CTRL_RESET | DWMCI_CTRL_FIFO_RESET |\ DWMCI_CTRL_DMA_RESET) /* CMD register */ -#define DWMCI_CMD_RESP_EXP (1 << 6) -#define DWMCI_CMD_RESP_LENGTH (1 << 7) -#define DWMCI_CMD_CHECK_CRC (1 << 8) -#define DWMCI_CMD_DATA_EXP (1 << 9) -#define DWMCI_CMD_RW (1 << 10) -#define DWMCI_CMD_SEND_STOP (1 << 12) -#define DWMCI_CMD_ABORT_STOP (1 << 14) -#define DWMCI_CMD_PRV_DAT_WAIT (1 << 13) -#define DWMCI_CMD_UPD_CLK (1 << 21) -#define DWMCI_CMD_USE_HOLD_REG (1 << 29) -#define DWMCI_CMD_START (1 << 31) +#define DWMCI_CMD_RESP_EXP BIT(6) +#define DWMCI_CMD_RESP_LENGTH BIT(7) +#define DWMCI_CMD_CHECK_CRC BIT(8) +#define DWMCI_CMD_DATA_EXP BIT(9) +#define DWMCI_CMD_RW BIT(10) +#define DWMCI_CMD_SEND_STOP BIT(12) +#define DWMCI_CMD_ABORT_STOP BIT(14) +#define DWMCI_CMD_PRV_DAT_WAIT BIT(13) +#define DWMCI_CMD_UPD_CLK BIT(21) +#define DWMCI_CMD_USE_HOLD_REG BIT(29) +#define DWMCI_CMD_START BIT(31) /* CLKENA register */ -#define DWMCI_CLKEN_ENABLE (1 << 0) -#define DWMCI_CLKEN_LOW_PWR (1 << 16) +#define DWMCI_CLKEN_ENABLE BIT(0) +#define DWMCI_CLKEN_LOW_PWR BIT(16) -/* Card-type registe */ +/* Card type register */ #define DWMCI_CTYPE_1BIT 0 -#define DWMCI_CTYPE_4BIT (1 << 0) -#define DWMCI_CTYPE_8BIT (1 << 16) +#define DWMCI_CTYPE_4BIT BIT(0) +#define DWMCI_CTYPE_8BIT BIT(16) -/* Status Register */ -#define DWMCI_FIFO_EMPTY (1 << 2) -#define DWMCI_FIFO_FULL (1 << 3) -#define DWMCI_BUSY (1 << 9) +/* Status register */ +#define DWMCI_FIFO_EMPTY BIT(2) +#define DWMCI_FIFO_FULL BIT(3) +#define DWMCI_BUSY BIT(9) #define DWMCI_FIFO_MASK 0x1fff #define DWMCI_FIFO_SHIFT 17 -/* FIFOTH Register */ +/* FIFOTH register */ #define MSIZE(x) ((x) << 28) #define RX_WMARK(x) ((x) << 16) #define TX_WMARK(x) (x) #define RX_WMARK_SHIFT 16 #define RX_WMARK_MASK (0xfff << RX_WMARK_SHIFT) -#define DWMCI_IDMAC_OWN (1 << 31) -#define DWMCI_IDMAC_CH (1 << 4) -#define DWMCI_IDMAC_FS (1 << 3) -#define DWMCI_IDMAC_LD (1 << 2) +#define DWMCI_IDMAC_OWN BIT(31) +#define DWMCI_IDMAC_CH BIT(4) +#define DWMCI_IDMAC_FS BIT(3) +#define DWMCI_IDMAC_LD BIT(2) -/* Bus Mode Register */ -#define DWMCI_BMOD_IDMAC_RESET (1 << 0) -#define DWMCI_BMOD_IDMAC_FB (1 << 1) -#define DWMCI_BMOD_IDMAC_EN (1 << 7) +/* Bus Mode register */ +#define DWMCI_BMOD_IDMAC_RESET BIT(0) +#define DWMCI_BMOD_IDMAC_FB BIT(1) +#define DWMCI_BMOD_IDMAC_EN BIT(7) /* UHS register */ -#define DWMCI_DDR_MODE (1 << 16) +#define DWMCI_DDR_MODE BIT(16) /* Internal IDMAC interrupt defines */ -#define DWMCI_IDINTEN_RI BIT(1) -#define DWMCI_IDINTEN_TI BIT(0) +#define DWMCI_IDINTEN_RI BIT(1) +#define DWMCI_IDINTEN_TI BIT(0) +#define DWMCI_IDINTEN_MASK (DWMCI_IDINTEN_TI | DWMCI_IDINTEN_RI) -#define DWMCI_IDINTEN_MASK (DWMCI_IDINTEN_TI | \ - DWMCI_IDINTEN_RI) - -/* quirks */ -#define DWMCI_QUIRK_DISABLE_SMU (1 << 0) +/* Quirks */ +#define DWMCI_QUIRK_DISABLE_SMU BIT(0) /** * struct dwmci_idmac_regs - Offsets of IDMAC registers @@ -230,6 +230,7 @@ struct dwmci_host { * return that value too. Then DWMMC will put itself in bypass mode. */ unsigned int (*get_mmc_clk)(struct dwmci_host *host, uint freq); + #ifndef CONFIG_BLK struct mmc_config cfg; #endif @@ -253,6 +254,7 @@ static inline void dwmci_writeb(struct dwmci_host *host, int reg, u8 val) { writeb(val, host->ioaddr + reg); } + static inline u32 dwmci_readl(struct dwmci_host *host, int reg) { return readl(host->ioaddr + reg); @@ -269,6 +271,7 @@ static inline u8 dwmci_readb(struct dwmci_host *host, int reg) } #ifdef CONFIG_BLK + /** * dwmci_setup_cfg() - Set up the configuration for DWMMC * @cfg: Configuration structure to fill in (generally &plat->mmc) @@ -301,7 +304,7 @@ static inline u8 dwmci_readb(struct dwmci_host *host, int reg) * See rockchip_dw_mmc.c for an example. */ void dwmci_setup_cfg(struct mmc_config *cfg, struct dwmci_host *host, - u32 max_clk, u32 min_clk); + u32 max_clk, u32 min_clk); /** * dwmci_bind() - Set up a new MMC block device @@ -321,6 +324,7 @@ void dwmci_setup_cfg(struct mmc_config *cfg, struct dwmci_host *host, int dwmci_bind(struct udevice *dev, struct mmc *mmc, struct mmc_config *cfg); #else + /** * add_dwmci() - Add a new DWMMC interface * @host: DWMMC host structure @@ -332,6 +336,7 @@ int dwmci_bind(struct udevice *dev, struct mmc *mmc, struct mmc_config *cfg); * Return: 0 if OK, -ve on error */ int add_dwmci(struct dwmci_host *host, u32 max_clk, u32 min_clk); + #endif /* !CONFIG_BLK */ #ifdef CONFIG_DM_MMC From patchwork Mon Jun 10 01:12:01 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sam Protsenko X-Patchwork-Id: 802947 Delivered-To: patch@linaro.org Received: by 2002:adf:f147:0:b0:35b:5a80:51b4 with SMTP id y7csp1734722wro; Sun, 9 Jun 2024 18:15:24 -0700 (PDT) X-Forwarded-Encrypted: i=2; AJvYcCVg4lGN4yKYGRIg1/n/FsMKRtZKq00EAG1AsTxwI4LYlQDus5qFa38qbei3H2y3bi6/tjvd5SnjHZz5/RLlDDEc X-Google-Smtp-Source: AGHT+IFbHeR+IH2IDpH7c+ovbbBINKJyvsWpTnbMQOZT9BZi3lnPByftHS0FbbAsIaLx6th11rDD X-Received: by 2002:a17:906:71c1:b0:a6c:717d:b97b with SMTP id a640c23a62f3a-a6cd6ff8ab2mr470447866b.34.1717982124565; Sun, 09 Jun 2024 18:15:24 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1717982124; cv=none; d=google.com; s=arc-20160816; b=qnHG488pg01WAT00cNEMjX99qYVFqAKIIstu+u7wVjcbLoCIrnzc8TAzkEj52Wv8bL j9T1gEVrg/YuSZrjCGEPM2s4IiWwC3b66DpgXCJR74ubmh+Y647P5CaXZ9c4Yq9eCKK3 EwrnJkYXHONlG33xpvnIOcnS6ikkC3rkyqbJ3xlK993m8nPhP59/ERkN/Zo3eNWzNbPg zdIUnSNGrDQMG5deDdquRk+In+u4o+0ryDQx/65KjCaxxUnEfIjXdZqVYFDkyMde728G 4LuyqsQ5WKb4cfnblYLYlubmLwXntJmC614YvIM8BTZkIze2iyY5Ly3+WtpOzVZcsI1b udKQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:cc:to :from:dkim-signature; bh=m9D3lerFK752PlADc+6gNEau9V4hSr3EplD1k2lukUI=; fh=JWPoiK1182ybFxpaPmjRhAxmtXjBajiFpzHRXMuulik=; b=y6JxcsM4+fLbWGqVelxMZodGvyQoAoapE8zlWrQ+lO8T8pQOnzrkLxIcpVR4uggds5 xJVIRlRmEruFM5CELmVL9K6kOz7GgfiPLmt4n5ii7se9UBjmiuJZQO1+beEONDa5r8YF PCWdbe5DzAPjbwnRwA79UmZ1Vvcyh5tGlFPiTfIfBgqOpRjoHkfDk9R/ghQPVWNDQUfY /cOKEefQb7Q5e/L/nnAM+AEDMdMAWh/NVC/YOmibl8WTp7df1Xt6XiurtIjKRGWJ50SV EVRXQ5VfOpIWCWxcKWRpEsKm+JzMFRv+X/aKGI1drNl459SamNsvj2CM5yqYLoFfnUen ngKw==; dara=google.com ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=FaDqUi4I; spf=pass (google.com: domain of u-boot-bounces@lists.denx.de designates 2a01:238:438b:c500:173d:9f52:ddab:ee01 as permitted sender) smtp.mailfrom=u-boot-bounces@lists.denx.de; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from phobos.denx.de (phobos.denx.de. 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Sun, 09 Jun 2024 18:12:37 -0700 (PDT) From: Sam Protsenko To: Tom Rini , Minkyu Kang , Peng Fan , Jaehoon Chung , Simon Glass Cc: Quentin Schulz , Philipp Tomsich , Kever Yang , Eugeniy Paltsev , Peter Robinson , Jonas Karlman , Yang Xiwen , Ferass El Hafidi , Sean Anderson , u-boot@lists.denx.de, uboot-snps-arc@synopsys.com Subject: [PATCH v2 15/40] arm: dts: exynos: Add upstream DW MMC properties to all Exynos dts Date: Sun, 9 Jun 2024 20:12:01 -0500 Message-Id: <20240610011226.4050-16-semen.protsenko@linaro.org> X-Mailer: git-send-email 2.39.2 In-Reply-To: <20240610011226.4050-1-semen.protsenko@linaro.org> References: <20240610011226.4050-1-semen.protsenko@linaro.org> MIME-Version: 1.0 X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.39 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.103.8 at phobos.denx.de X-Virus-Status: Clean Some device tree properties for DW MMC block were updated in Linux kernel. Let's follow its example and rework corresponding properties in all Exynos device trees. Don't remove outdated properties yet, it'll be done later once DW MMC driver is updated accordingly to read the updated properties instead of outdated ones. Next properties are added: * samsung,dw-mshc-ciu-div and samsung,dw-mshc-sdr-timing: They were derived from outdated samsung,timing property. * fifo-depth (generic replacement for fifoth_val): FIFO depth was calculated from fifoth_val (using expressions from FIFOTH register description in TRM): fifo-depth = ((fifoth_val >> 16) + 1) * 2 * bus-width: generic replacement for samsung,bus-width * clock-frequency: generic replacement for bus_hz * non-removable: generic replacement for samsung,removable = <0> No functional change. Signed-off-by: Sam Protsenko --- arch/arm/dts/exynos4210-origen.dts | 1 + arch/arm/dts/exynos4210-trats.dts | 2 ++ arch/arm/dts/exynos4210-universal_c210.dts | 2 ++ arch/arm/dts/exynos4412-odroid.dts | 6 ++++++ arch/arm/dts/exynos4412-trats2.dts | 8 ++++++++ arch/arm/dts/exynos5250-arndale.dts | 6 ++++++ arch/arm/dts/exynos5250-smdk5250.dts | 7 +++++++ arch/arm/dts/exynos5250-snow.dts | 7 +++++++ arch/arm/dts/exynos5250-spring.dts | 4 ++++ arch/arm/dts/exynos5420-smdk5420.dts | 7 +++++++ arch/arm/dts/exynos5422-odroidxu3.dts | 2 ++ arch/arm/dts/exynos54xx.dtsi | 7 +++++++ 12 files changed, 59 insertions(+) diff --git a/arch/arm/dts/exynos4210-origen.dts b/arch/arm/dts/exynos4210-origen.dts index 65a5fcd67eff..a4915de2c49c 100644 --- a/arch/arm/dts/exynos4210-origen.dts +++ b/arch/arm/dts/exynos4210-origen.dts @@ -26,6 +26,7 @@ &sdhci2 { samsung,bus-width = <4>; + bus-width = <4>; samsung,timing = <1 2 3>; cd-gpios = <&gpk2 2 0>; status = "okay"; diff --git a/arch/arm/dts/exynos4210-trats.dts b/arch/arm/dts/exynos4210-trats.dts index 05989ee97e5b..4fbdf4730994 100644 --- a/arch/arm/dts/exynos4210-trats.dts +++ b/arch/arm/dts/exynos4210-trats.dts @@ -241,6 +241,7 @@ &sdhci0 { samsung,bus-width = <8>; + bus-width = <8>; samsung,timing = <1 3 3>; pwr-gpios = <&gpk0 2 0>; status = "okay"; @@ -248,6 +249,7 @@ &sdhci2 { samsung,bus-width = <4>; + bus-width = <4>; samsung,timing = <1 2 3>; cd-gpios = <&gpx3 4 0>; status = "okay"; diff --git a/arch/arm/dts/exynos4210-universal_c210.dts b/arch/arm/dts/exynos4210-universal_c210.dts index 610a8ad2e71e..1b3ac1fee15f 100644 --- a/arch/arm/dts/exynos4210-universal_c210.dts +++ b/arch/arm/dts/exynos4210-universal_c210.dts @@ -236,6 +236,7 @@ &sdhci0 { samsung,bus-width = <8>; + bus-width = <8>; samsung,timing = <1 3 3>; pwr-gpios = <&gpk0 2 0>; status = "okay"; @@ -243,6 +244,7 @@ &sdhci2 { samsung,bus-width = <4>; + bus-width = <4>; samsung,timing = <1 2 3>; cd-gpios = <&gpx3 4 0>; status = "okay"; diff --git a/arch/arm/dts/exynos4412-odroid.dts b/arch/arm/dts/exynos4412-odroid.dts index ce08e8dc1ebb..24e96ed05868 100644 --- a/arch/arm/dts/exynos4412-odroid.dts +++ b/arch/arm/dts/exynos4412-odroid.dts @@ -243,9 +243,15 @@ &mshc_0 { samsung,bus-width = <8>; + bus-width = <8>; samsung,timing = <2 1 0>; + samsung,dw-mshc-ciu-div = <0>; + samsung,dw-mshc-sdr-timing = <2 1>; samsung,removable = <0>; + non-removable; fifoth_val = <0x203f0040>; + fifo-depth = <0x80>; + clock-frequency = <400000000>; bus_hz = <400000000>; div = <0x3>; index = <4>; diff --git a/arch/arm/dts/exynos4412-trats2.dts b/arch/arm/dts/exynos4412-trats2.dts index c4db137e01f6..30758ffa1ef9 100644 --- a/arch/arm/dts/exynos4412-trats2.dts +++ b/arch/arm/dts/exynos4412-trats2.dts @@ -109,6 +109,7 @@ sdhci@12510000 { samsung,bus-width = <8>; + bus-width = <8>; samsung,timing = <1 3 3>; pwr-gpios = <&gpk0 4 0>; status = "disabled"; @@ -432,6 +433,7 @@ &sdhci0 { samsung,bus-width = <8>; + bus-width = <8>; samsung,timing = <1 3 3>; pwr-gpios = <&gpk0 4 0>; status = "disabled"; @@ -439,6 +441,7 @@ &sdhci2 { samsung,bus-width = <4>; + bus-width = <4>; samsung,timing = <1 2 3>; cd-gpios = <&gpk2 2 0>; status = "okay"; @@ -446,9 +449,14 @@ &mshc_0 { samsung,bus-width = <8>; + bus-width = <8>; samsung,timing = <2 1 0>; + samsung,dw-mshc-ciu-div = <0>; + samsung,dw-mshc-sdr-timing = <2 1>; samsung,removable = <0>; + non-removable; fifoth_val = <0x203f0040>; + clock-frequency = <400000000>; bus_hz = <400000000>; div = <0x3>; index = <4>; diff --git a/arch/arm/dts/exynos5250-arndale.dts b/arch/arm/dts/exynos5250-arndale.dts index 60309c61f302..7f84589c97a2 100644 --- a/arch/arm/dts/exynos5250-arndale.dts +++ b/arch/arm/dts/exynos5250-arndale.dts @@ -28,7 +28,10 @@ mmc@12200000 { samsung,bus-width = <8>; + bus-width = <8>; samsung,timing = <1 3 3>; + samsung,dw-mshc-ciu-div = <3>; + samsung,dw-mshc-sdr-timing = <1 3>; }; mmc@12210000 { @@ -37,7 +40,10 @@ mmc@12220000 { samsung,bus-width = <4>; + bus-width = <4>; samsung,timing = <1 2 3>; + samsung,dw-mshc-ciu-div = <3>; + samsung,dw-mshc-sdr-timing = <1 2>; }; mmc@12230000 { diff --git a/arch/arm/dts/exynos5250-smdk5250.dts b/arch/arm/dts/exynos5250-smdk5250.dts index afe0cca48a93..882db2d1f608 100644 --- a/arch/arm/dts/exynos5250-smdk5250.dts +++ b/arch/arm/dts/exynos5250-smdk5250.dts @@ -146,8 +146,12 @@ mmc@12200000 { samsung,bus-width = <8>; + bus-width = <8>; samsung,timing = <1 3 3>; + samsung,dw-mshc-ciu-div = <3>; + samsung,dw-mshc-sdr-timing = <1 3>; samsung,removable = <0>; + non-removable; }; mmc@12210000 { @@ -156,7 +160,10 @@ mmc@12220000 { samsung,bus-width = <4>; + bus-width = <4>; samsung,timing = <1 2 3>; + samsung,dw-mshc-ciu-div = <3>; + samsung,dw-mshc-sdr-timing = <1 2>; samsung,removable = <1>; }; diff --git a/arch/arm/dts/exynos5250-snow.dts b/arch/arm/dts/exynos5250-snow.dts index e41f2d3041e2..bcf04d5c07c0 100644 --- a/arch/arm/dts/exynos5250-snow.dts +++ b/arch/arm/dts/exynos5250-snow.dts @@ -302,8 +302,12 @@ mmc@12200000 { samsung,bus-width = <8>; + bus-width = <8>; samsung,timing = <1 3 3>; + samsung,dw-mshc-ciu-div = <3>; + samsung,dw-mshc-sdr-timing = <1 3>; samsung,removable = <0>; + non-removable; }; mmc@12210000 { @@ -312,7 +316,10 @@ mmc@12220000 { samsung,bus-width = <4>; + bus-width = <4>; samsung,timing = <1 2 3>; + samsung,dw-mshc-ciu-div = <3>; + samsung,dw-mshc-sdr-timing = <1 2>; samsung,removable = <1>; }; diff --git a/arch/arm/dts/exynos5250-spring.dts b/arch/arm/dts/exynos5250-spring.dts index 77e7a6b9e45a..7270a546a795 100644 --- a/arch/arm/dts/exynos5250-spring.dts +++ b/arch/arm/dts/exynos5250-spring.dts @@ -104,8 +104,12 @@ mmc@12200000 { samsung,bus-width = <8>; + bus-width = <8>; samsung,timing = <1 3 3>; + samsung,dw-mshc-ciu-div = <3>; + samsung,dw-mshc-sdr-timing = <1 3>; samsung,removable = <0>; + non-removable; }; mmc@12210000 { diff --git a/arch/arm/dts/exynos5420-smdk5420.dts b/arch/arm/dts/exynos5420-smdk5420.dts index 7a5da674fbed..1f27baafebaf 100644 --- a/arch/arm/dts/exynos5420-smdk5420.dts +++ b/arch/arm/dts/exynos5420-smdk5420.dts @@ -107,8 +107,12 @@ mmc@12200000 { samsung,bus-width = <8>; + bus-width = <8>; samsung,timing = <1 3 3>; + samsung,dw-mshc-ciu-div = <3>; + samsung,dw-mshc-sdr-timing = <1 3>; samsung,removable = <0>; + non-removable; samsung,pre-init; }; @@ -118,7 +122,10 @@ mmc@12220000 { samsung,bus-width = <4>; + bus-width = <4>; samsung,timing = <1 2 3>; + samsung,dw-mshc-ciu-div = <3>; + samsung,dw-mshc-sdr-timing = <1 2>; samsung,removable = <1>; }; diff --git a/arch/arm/dts/exynos5422-odroidxu3.dts b/arch/arm/dts/exynos5422-odroidxu3.dts index 9d055d066fd3..767b3e415d58 100644 --- a/arch/arm/dts/exynos5422-odroidxu3.dts +++ b/arch/arm/dts/exynos5422-odroidxu3.dts @@ -281,10 +281,12 @@ mmc@12200000 { fifoth_val = <0x201f0020>; + fifo-depth = <0x40>; }; mmc@12220000 { fifoth_val = <0x201f0020>; + fifo-depth = <0x40>; }; emmc-reset { diff --git a/arch/arm/dts/exynos54xx.dtsi b/arch/arm/dts/exynos54xx.dtsi index 221da8b4850b..fd74166c7e48 100644 --- a/arch/arm/dts/exynos54xx.dtsi +++ b/arch/arm/dts/exynos54xx.dtsi @@ -120,8 +120,12 @@ mmc@12200000 { samsung,bus-width = <8>; + bus-width = <8>; samsung,timing = <1 3 3>; + samsung,dw-mshc-ciu-div = <3>; + samsung,dw-mshc-sdr-timing = <1 3>; samsung,removable = <0>; + non-removable; samsung,pre-init; }; @@ -131,7 +135,10 @@ mmc@12220000 { samsung,bus-width = <4>; + bus-width = <4>; samsung,timing = <1 2 3>; + samsung,dw-mshc-ciu-div = <3>; + samsung,dw-mshc-sdr-timing = <1 2>; samsung,removable = <1>; }; From patchwork Mon Jun 10 01:12:02 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sam Protsenko X-Patchwork-Id: 802945 Delivered-To: patch@linaro.org Received: by 2002:adf:f147:0:b0:35b:5a80:51b4 with SMTP id y7csp1734647wro; Sun, 9 Jun 2024 18:15:04 -0700 (PDT) X-Forwarded-Encrypted: i=2; AJvYcCVWiiIVmKU0eanvntBgHQF5qMRGu4GvEXHDhwH8FbA7h0GKsACTBBDm7KKI+nigod2R+5ZbFYdFMm6OLzlomN4V X-Google-Smtp-Source: AGHT+IHpLLc5cNahk7+4CCk4FzuVVBpTHOLL2DXydO/xfKEjjJZNtAO7lRQpWxTu0sUqKBRaPAlS X-Received: by 2002:a17:906:c209:b0:a6f:28a3:3bf with SMTP id a640c23a62f3a-a6f28a3092emr5008866b.3.1717982104478; Sun, 09 Jun 2024 18:15:04 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1717982104; cv=none; d=google.com; s=arc-20160816; b=BUNqLKcH3qguIAEyXHCe7ISR9p6S5bB2CpSjpMvL14b6OGkASvDcm4T39txtgXjuU1 LW/3Tojz/Ud2Xhw3A0Xrm2J2fTR5bvB3GWH3N/diGlGi+QxHoNBS5jXjmlQ6L82RavOU rIb2gSMPMLcIrnEcYfTbBJ8HOYRcl3RdC6lL8uBhI02c5DKuoxkaL/O/MG+7msmkfeD8 duIUzkoP/B1N0o0bLhC2xmytgBLUB7+CWEC9KOqKYG3WeCcvo5RFqpzYhXslGI0AuiCs WJ9TnglkPANbGH5eNfaOJw4RtulMiG/PCkPFAkTrwBmxA/4dbhKssDipzsfQr796eMLm v6sw== ARC-Message-Signature: i=1; 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Sun, 09 Jun 2024 18:12:38 -0700 (PDT) From: Sam Protsenko To: Tom Rini , Minkyu Kang , Peng Fan , Jaehoon Chung , Simon Glass Cc: Quentin Schulz , Philipp Tomsich , Kever Yang , Eugeniy Paltsev , Peter Robinson , Jonas Karlman , Yang Xiwen , Ferass El Hafidi , Sean Anderson , u-boot@lists.denx.de, uboot-snps-arc@synopsys.com Subject: [PATCH v2 16/40] dt-bindings: exynos: Update bindings doc for DW MMC controller Date: Sun, 9 Jun 2024 20:12:02 -0500 Message-Id: <20240610011226.4050-17-semen.protsenko@linaro.org> X-Mailer: git-send-email 2.39.2 In-Reply-To: <20240610011226.4050-1-semen.protsenko@linaro.org> References: <20240610011226.4050-1-semen.protsenko@linaro.org> MIME-Version: 1.0 X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.39 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.103.8 at phobos.denx.de X-Virus-Status: Clean Update the bindings doc for Exynos DW MMC block to follow the upstream example and reflect the latest changes made in corresponding Linux kernel bindings. Signed-off-by: Sam Protsenko --- doc/device-tree-bindings/exynos/dwmmc.txt | 46 +++++++++++++---------- 1 file changed, 27 insertions(+), 19 deletions(-) diff --git a/doc/device-tree-bindings/exynos/dwmmc.txt b/doc/device-tree-bindings/exynos/dwmmc.txt index 694d1959162c..d90792be8599 100644 --- a/doc/device-tree-bindings/exynos/dwmmc.txt +++ b/doc/device-tree-bindings/exynos/dwmmc.txt @@ -12,7 +12,9 @@ SOC specific and Board specific properties are channel specific. Required SoC Specific Properties: - compatible: should be - - samsung,exynos-dwmmc: for exynos platforms + - samsung,exynos4412-dw-mshc: for Exynos4 platforms + - samsung,exynos-dwmmc: for Exynos5 platforms + - samsung,exynos7-dw-mshc-smu: for Exynos7 platforms (with SMU block) - reg: physical base address of the controller and length of memory mapped region. @@ -23,32 +25,38 @@ Required Board Specific Properties: - #address-cells: should be 1. - #size-cells: should be 0. -- samsung,bus-width: The width of the bus used to interface the devices +- bus-width: The width of the bus used to interface the devices supported by DWC_mobile_storage (SD-MMC/EMMC/SDIO). . Typically the bus width is 4 or 8. -- samsung,timing: The timing values to be written into the - Drv/sample clock selection register of corresponding channel. - . It is comprised of 3 values corresponding to the 3 fileds - 'SelClk_sample', 'SelClk_drv' and 'DIVRATIO' of CLKSEL register. - . SelClk_sample: Select sample clock among 8 shifted clocks. - . SelClk_drv: Select drv clock among 8 shifted clocks. - . DIVRATIO: Clock Divide ratio select. - . The above 3 values are used by the clock phase shifter. +- samsung,dw-mshc-ciu-div: The divider value for the card interface unit (ciu) + clock (0..7). +- samsung,dw-mshc-sdr-timing: The timing values for single data rate (SDR) mode + operation. + . First value is CIU clock phase shift value for TX mode (0..7). + . Second value is CIU clock phase shift value for RX mode (0..7). +- samsung,dw-mshc-ddr-timing: The timing values for double data rate (DDR) mode + operation. If missing, values from samsung,dw-mshc-sdr-timing are used. + . First value is CIU clock phase shift value for TX mode (0..7). + . Second value is CIU clock phase shift value for RX mode (0..7). Example: mmc@12200000 { - samsung,bus-width = <8>; - samsung,timing = <1 3 3>; - samsung,removable = <1>; -} + bus-width = <8>; + non-removable; + samsung,dw-mshc-ciu-div = <3>; + samsung,dw-mshc-sdr-timing = <1 3>; + samsung,dw-mshc-ddr-timing = <0 2>; +}; + In the above example, . The bus width is 8 - . Timing is comprised of 3 values as explained below + . Divider value for CLKSEL register is 3. The CIU clock rate will be + calculated as SDCLKIN / (3 + 1). + . SDR and DDR timings are comprised of 2 values as explained below 1 - SelClk_sample 3 - SelClk_drv - 3 - DIVRATIO - . The 'removable' flag indicates whether the the particilar device + . The 'non-removable' flag indicates whether the particular device cannot be removed (always present) or it is a removable device. - 1 - Indicates that the device is removable. - 0 - Indicates that the device cannot be removed. + Flag is present - Indicates that the device cannot be removed. + Flag is not present - Indicates that the device is removable. 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Sun, 09 Jun 2024 18:12:38 -0700 (PDT) From: Sam Protsenko To: Tom Rini , Minkyu Kang , Peng Fan , Jaehoon Chung , Simon Glass Cc: Quentin Schulz , Philipp Tomsich , Kever Yang , Eugeniy Paltsev , Peter Robinson , Jonas Karlman , Yang Xiwen , Ferass El Hafidi , Sean Anderson , u-boot@lists.denx.de, uboot-snps-arc@synopsys.com Subject: [PATCH v2 17/40] arm: exynos: Add header guard for dwmmc.h Date: Sun, 9 Jun 2024 20:12:03 -0500 Message-Id: <20240610011226.4050-18-semen.protsenko@linaro.org> X-Mailer: git-send-email 2.39.2 In-Reply-To: <20240610011226.4050-1-semen.protsenko@linaro.org> References: <20240610011226.4050-1-semen.protsenko@linaro.org> MIME-Version: 1.0 X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.39 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.103.8 at phobos.denx.de X-Virus-Status: Clean Add missing header guard to prevent possible build errors. Fixes: 77b55e8cfcee ("ARM: exynos: move SoC sources to mach-exynos") Signed-off-by: Sam Protsenko --- arch/arm/mach-exynos/include/mach/dwmmc.h | 5 +++++ 1 file changed, 5 insertions(+) diff --git a/arch/arm/mach-exynos/include/mach/dwmmc.h b/arch/arm/mach-exynos/include/mach/dwmmc.h index 59c28ed54c58..811e9a04c6e3 100644 --- a/arch/arm/mach-exynos/include/mach/dwmmc.h +++ b/arch/arm/mach-exynos/include/mach/dwmmc.h @@ -4,6 +4,9 @@ * Jaehoon Chung */ +#ifndef __ASM_ARM_ARCH_DWMMC_H +#define __ASM_ARM_ARCH_DWMMC_H + #define DWMCI_CLKSEL 0x09C #define DWMCI_SET_SAMPLE_CLK(x) (x) #define DWMCI_SET_DRV_CLK(x) ((x) << 16) @@ -25,3 +28,5 @@ /* CLKSEL Register */ #define DWMCI_DIVRATIO_BIT 24 #define DWMCI_DIVRATIO_MASK 0x7 + +#endif /* __ASM_ARM_ARCH_DWMMC_H */ From patchwork Mon Jun 10 01:12:04 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sam Protsenko X-Patchwork-Id: 802949 Delivered-To: patch@linaro.org Received: by 2002:adf:f147:0:b0:35b:5a80:51b4 with SMTP id y7csp1734817wro; Sun, 9 Jun 2024 18:15:45 -0700 (PDT) X-Forwarded-Encrypted: i=2; AJvYcCW4V88YO6ba7AU5bY4fur2LgCZmTBs7pgVXro0hX7fcXqw9yEosTH+A88lUZW7ks7kkw428bcIGPwpBKTsBEnx9 X-Google-Smtp-Source: AGHT+IHb7EggDpobnDIsDVkqevtC2MrP/wEqkbNFj7VtdrWzJVgmjRFiBpWltdkZNsNwEIIIUa6M X-Received: by 2002:a17:906:2a14:b0:a6f:2448:a274 with SMTP id a640c23a62f3a-a6f2448a3f6mr29800166b.59.1717982145235; Sun, 09 Jun 2024 18:15:45 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1717982145; cv=none; d=google.com; s=arc-20160816; b=TQB2P187hiS+8y6LZZDtnCahHLRJLX10m49PPe5KzkZUYwqvBizV+RC/QkBE2s6hFX M3OR7G8vvrUHkPWFooLNqQDqVeP5/DiLCrTp/5OSF5McBB1fbWko98my5K9dHBqAdRst 2+71/+E3uFfrt/iE9icqJjG0+kqRw0PxuotXYSIQVGXTJIlEs7VPDDwlbFR9D4JOOENA M5SDGPeR6SAjvcPwCBCSDtwYBU0EgF6hQb2u0zJT++XOyeQhtyniRofAC7YuBa3JfmPc RzYfDMtVifQBVtNAsTlapieD4Fp02b+vCnak5fD/9sbNGlcMVbm+kVJtBFRl2Az8iJ6L FTog== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:cc:to :from:dkim-signature; bh=bCjyQx/0jLeoyYpM8IqEJbONYckgIBxdTVXk9Pljolw=; fh=5svQwgiGHzt6zquzvXsZZCcLCsxiZr60cFpssbkvFsw=; b=qjio1SEnc7ACWTNXvKc3Tn6CY20zCzX43DcmRT2JZzXjEGxINi3Bh2gH1L2zm0J8+u q0h+9RfACpDGEqVJ3+LVwVLmxw2W3+p6SFOHl8ZjsWvLq98HB5klsFFdME2hmy8GC7l9 rUOR2fVSGWEOcb4AOMWPn5CJSJm6t2IQc5b89MCuKu+jharrVS9sAU/ETaOz/2vI/V00 1DALdRqg8oWdrFDEW9obAaFJtzpP8DuzrzRPKI/mo2cdBjADOTNllxGGnhaXqXFy9NR2 xrbBX+UAhN5Jr4D8yRxH7B2b13vTz+T1OdEUQZr8+oI6qocwAJz/h4575sV91fFb+LU3 gt9w==; dara=google.com ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=wna+KWkr; spf=pass (google.com: domain of u-boot-bounces@lists.denx.de designates 85.214.62.61 as permitted sender) smtp.mailfrom=u-boot-bounces@lists.denx.de; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from phobos.denx.de (phobos.denx.de. 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Use livetree API instead (dev_read_addr_ptr()), which handles this correctly. Fixes: a082a2dde061 ("EXYNOS5: DWMMC: Added FDT support for DWMMC") Signed-off-by: Sam Protsenko --- drivers/mmc/exynos_dw_mmc.c | 7 +++---- 1 file changed, 3 insertions(+), 4 deletions(-) diff --git a/drivers/mmc/exynos_dw_mmc.c b/drivers/mmc/exynos_dw_mmc.c index 14cb0c05cb55..1f69e193f601 100644 --- a/drivers/mmc/exynos_dw_mmc.c +++ b/drivers/mmc/exynos_dw_mmc.c @@ -156,7 +156,7 @@ static int exynos_dwmci_get_config(struct udevice *dev, const void *blob, struct dwmci_exynos_priv_data *priv) { int err = 0; - u32 base, timing[3]; + u32 timing[3]; /* Extract device id for each mmc channel */ host->dev_id = pinmux_decode_periph_id(blob, node); @@ -174,12 +174,11 @@ static int exynos_dwmci_get_config(struct udevice *dev, const void *blob, host->buswidth = fdtdec_get_int(blob, node, "samsung,bus-width", 4); /* Set the base address from the device node */ - base = fdtdec_get_addr(blob, node, "reg"); - if (!base) { + host->ioaddr = dev_read_addr_ptr(dev); + if (!host->ioaddr) { printf("DWMMC%d: Can't get base address\n", host->dev_index); return -EINVAL; } - host->ioaddr = (void *)base; /* Extract the timing info from the node */ err = fdtdec_get_int_array(blob, node, "samsung,timing", timing, 3); From patchwork Mon Jun 10 01:12:05 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sam Protsenko X-Patchwork-Id: 802950 Delivered-To: patch@linaro.org Received: by 2002:adf:f147:0:b0:35b:5a80:51b4 with SMTP id y7csp1734854wro; Sun, 9 Jun 2024 18:15:54 -0700 (PDT) X-Forwarded-Encrypted: i=2; AJvYcCWcTyPDkQMvPCTenB1yGxRIvFRIOqAc4HbCsSVFYOZGZFdeqBg9bsPbFGK5iCU9bEBCrxtVz3I2B8G7Ya4rbsIQ X-Google-Smtp-Source: AGHT+IEx5UIMnJ+LlzeAcxh1UV1iULvBJm+iIkaBK43+JLDcdcU2GabIq8GW/qJvyLSwbrv/lwbu X-Received: by 2002:a17:907:9618:b0:a6f:270b:28fd with SMTP id a640c23a62f3a-a6f270b2d45mr18509666b.10.1717982154790; Sun, 09 Jun 2024 18:15:54 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1717982154; cv=none; d=google.com; s=arc-20160816; b=YxFBQsAGPQOBb4gVXUIoZR93vtYfpLH6mf59vqOrB+A27X/PSqwGfpjBx0kpzgBRcG iLNzAV5pJgbUnWk61ztyaCToXs5Ut8+coXce05JHFNQOR1lvxq/A8+PIBuOWXPH9bAxZ hk2qnHYMUQy72vXbwlSEYjXui7/K206FCEvLpDMyNUMg8wV7u6WbJSqqK3W2PQvni9oX sYuniAdaqEmWhCg/qutZlCEO5LBan5i3mbfOwCAta09NN5A/IjFhabny1RsNBzKieTrR xC4XX1I0vg95RHkVL2Bf1yldMkkT/lHTSr2xmiQsqxUNaonSBiZ9aRNB5YPWqLHUnCVu 572A== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:cc:to :from:dkim-signature; bh=H0FlBtORU2YphyJoC9ALjRrQBtrihTvdGD8zX7T+j5s=; fh=r8k64SbM8tqS5HoQ8uEJDlphUO1JbjYNu5KrH2K0svg=; b=DhuyfnfiKy7wC9JkOKeBvHvkokFQeKLVTYiKfQ9BHHYgtia+k1YUTH2JWgjpylBXTU DXCZyPyolsggVoqWdMW4Vmpqa80S1MRodCzSCUBJP8+qWuIOcOU/q+zLVP8X7GB2rtFe FO2o0aAfooOFvp+lvEEESgEzBeMIFE+xwq9nZPvoQzEQXS+qQj5RUtduWkz/Smelrw6z r10HsMputZFrJc9hUYCKgW2t8DhfMepJEf5It+wD4qoaTqiwRhn4Yg2fOljS+LJgHnd/ HfeV/hngbmcqOO9jMoNsEt/jdAklnd0qzIKb/m4slbueXVMIUW5+hEuhLwnSSFhL/9M4 h8TQ==; dara=google.com ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=AlGoqp7t; spf=pass (google.com: domain of u-boot-bounces@lists.denx.de designates 85.214.62.61 as permitted sender) smtp.mailfrom=u-boot-bounces@lists.denx.de; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from phobos.denx.de (phobos.denx.de. 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This makes *priv pointer invalid and may lead to Synchronous Abort during its dereference later in exynos_dwmci_board_init(). Fix it by extracting exynos_dwmmc_get_priv() helper from exynos_dwmci_clksel() and using it for getting the private data in exynos_dwmci_board_init() Fixes: 3537ee879e04 ("mmc: exynos_dw_mmc: support the Driver mode for Exynos") Signed-off-by: Sam Protsenko --- drivers/mmc/exynos_dw_mmc.c | 20 +++++++++++++------- 1 file changed, 13 insertions(+), 7 deletions(-) diff --git a/drivers/mmc/exynos_dw_mmc.c b/drivers/mmc/exynos_dw_mmc.c index 1f69e193f601..8e80bd6a059f 100644 --- a/drivers/mmc/exynos_dw_mmc.c +++ b/drivers/mmc/exynos_dw_mmc.c @@ -42,18 +42,24 @@ struct dwmci_exynos_priv_data { u32 sdr_timing; }; +static struct dwmci_exynos_priv_data *exynos_dwmmc_get_priv( + struct dwmci_host *host) +{ +#ifdef CONFIG_DM_MMC + return container_of(host, struct dwmci_exynos_priv_data, host); +#else + return host->priv; +#endif +} + /* * Function used as callback function to initialise the * CLKSEL register for every mmc channel. */ static int exynos_dwmci_clksel(struct dwmci_host *host) { -#ifdef CONFIG_DM_MMC - struct dwmci_exynos_priv_data *priv = - container_of(host, struct dwmci_exynos_priv_data, host); -#else - struct dwmci_exynos_priv_data *priv = host->priv; -#endif + struct dwmci_exynos_priv_data *priv = exynos_dwmmc_get_priv(host); + dwmci_writel(host, DWMCI_CLKSEL, priv->sdr_timing); return 0; @@ -83,7 +89,7 @@ unsigned int exynos_dwmci_get_clk(struct dwmci_host *host, uint freq) static void exynos_dwmci_board_init(struct dwmci_host *host) { - struct dwmci_exynos_priv_data *priv = host->priv; + struct dwmci_exynos_priv_data *priv = exynos_dwmmc_get_priv(host); if (host->quirks & DWMCI_QUIRK_DISABLE_SMU) { dwmci_writel(host, EMMCP_MPSBEGIN0, 0); From patchwork Mon Jun 10 01:12:06 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sam Protsenko X-Patchwork-Id: 802951 Delivered-To: patch@linaro.org Received: by 2002:adf:f147:0:b0:35b:5a80:51b4 with SMTP id y7csp1734882wro; Sun, 9 Jun 2024 18:16:04 -0700 (PDT) X-Forwarded-Encrypted: i=2; AJvYcCX/Bh49nTkgabwuii1y3sHjTex24rYKLZWSlCTRS9bz4dE7YVqUwJ5MwjfyCsK0LOSpHMllrp2joIRlaJG0obSr X-Google-Smtp-Source: AGHT+IEIZDjAuceUwmmjqWgEup69B6Qu713caoK8E9w76yNhFcUf14s6QffCvmb9s8Pvbq6hIAFy X-Received: by 2002:a50:9e06:0:b0:57a:2a46:701 with SMTP id 4fb4d7f45d1cf-57c50902d83mr4685778a12.19.1717982164347; Sun, 09 Jun 2024 18:16:04 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1717982164; cv=none; d=google.com; s=arc-20160816; b=BjEWtp1rP+NStn1wfvOwIrXrGp98OgVAka4M9RjP7onzOyuEWtQKt3UHw/mzyTejmL Pe4XMKDCiJamHkzGXqrR8tp6XGlk7qEfYxz5dZnd/cO6xCIPG7wyU9+DUvsvM8jFbkAh TmZTHWHtyH1Hz9zDrW5TzU7xUyQd2VgDvcnpMokoIEq6dvX9u/df0myuyP72vw9QPX3N tpXwmDYs6Tm9kqeaidtXFWAeVdj0crSY+bGv2HD3dEWTycA0w+SWrFmDM0Nv4Xqe0cWb kZpIzJzW6m3X+9r2FICRK+O8mzhv0Jprp/YX7UAYkgDMUVWI38iFUSAjWRq+AQg9E2uB +XzQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:cc:to :from:dkim-signature; bh=kUlSrGaFAyyOiQQdsehGkSzrSRXQT/CDiakY96Iprr8=; fh=ZBjtqn4P6gikzDezncS2rDLKLR83308qUB027TtVc7E=; b=VRPV/4wwmUPkF/GSEk2ExQdMkS9wtJYKDx51mgmoCEah7PgKbvwK0R1GSDVIZ9gGgP f7VmS9Cxrr5puS3mTC6ZCxUpXCXU8UiO4EqPli5hI18UppSI4Aqi+fuPlfMOqTEnPmLM nxdv5KWuiJV+oMSmbPV7aBBlV2961cnG2hn2HumEcQQiztxkx1Z22IyPRecx2YRaM8cR 2okSJczadiAaW1JyaRK0Fwkhk3iOUFSVPJEnJSckenZUN0TRbehyYOYAL9XXp0q580mC lGFIecWHyB8QNsJogCLQ93rSK8Tl3J3OtCkDfwLbuIp9puhQeEW+gUhF9WzAejrwgxwW bpDQ==; dara=google.com ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b="Q/pH8txl"; spf=pass (google.com: domain of u-boot-bounces@lists.denx.de designates 2a01:238:438b:c500:173d:9f52:ddab:ee01 as permitted sender) smtp.mailfrom=u-boot-bounces@lists.denx.de; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from phobos.denx.de (phobos.denx.de. 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Sun, 09 Jun 2024 18:12:41 -0700 (PDT) From: Sam Protsenko To: Tom Rini , Minkyu Kang , Peng Fan , Jaehoon Chung , Simon Glass Cc: Quentin Schulz , Philipp Tomsich , Kever Yang , Eugeniy Paltsev , Peter Robinson , Jonas Karlman , Yang Xiwen , Ferass El Hafidi , Sean Anderson , u-boot@lists.denx.de, uboot-snps-arc@synopsys.com Subject: [PATCH v2 20/40] mmc: exynos_dw_mmc: Don't call pinmux functions on ARM64 chips Date: Sun, 9 Jun 2024 20:12:06 -0500 Message-Id: <20240610011226.4050-21-semen.protsenko@linaro.org> X-Mailer: git-send-email 2.39.2 In-Reply-To: <20240610011226.4050-1-semen.protsenko@linaro.org> References: <20240610011226.4050-1-semen.protsenko@linaro.org> MIME-Version: 1.0 X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.39 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.103.8 at phobos.denx.de X-Virus-Status: Clean Pinmux configuration on ARM64 platforms must be performed during startup in pinctrl driver using info from device tree. exynos_pinmux_config() and pinmux_decode_periph_id() are only available on ARM32 platforms, so don't call those functions on ARM64 platforms. Instead of the latter function, use "non-removable" property from device tree to derive the dev_index value. This fixes next linking errors on ARM64 platforms: ld: drivers/mmc/exynos_dw_mmc.o: in function `exynos_dwmci_get_config': undefined reference to `pinmux_decode_periph_id' ld: drivers/mmc/exynos_dw_mmc.o: in function `do_dwmci_init': undefined reference to `exynos_pinmux_config' Fixes: a082a2dde061 ("EXYNOS5: DWMMC: Added FDT support for DWMMC") Signed-off-by: Sam Protsenko --- Changes in v2: - Replaced CONFIG_IS_ENABLED() with #ifdef drivers/mmc/exynos_dw_mmc.c | 9 +++++++++ 1 file changed, 9 insertions(+) diff --git a/drivers/mmc/exynos_dw_mmc.c b/drivers/mmc/exynos_dw_mmc.c index 8e80bd6a059f..2ed8429d0a40 100644 --- a/drivers/mmc/exynos_dw_mmc.c +++ b/drivers/mmc/exynos_dw_mmc.c @@ -145,6 +145,7 @@ static int exynos_dwmci_core_init(struct dwmci_host *host) static int do_dwmci_init(struct dwmci_host *host) { +#ifdef CONFIG_CPU_V7A int flag, err; flag = host->buswidth == 8 ? PINMUX_FLAG_8BIT_MODE : PINMUX_FLAG_NONE; @@ -153,6 +154,7 @@ static int do_dwmci_init(struct dwmci_host *host) printf("DWMMC%d not configure\n", host->dev_index); return err; } +#endif return exynos_dwmci_core_init(host); } @@ -164,6 +166,7 @@ static int exynos_dwmci_get_config(struct udevice *dev, const void *blob, int err = 0; u32 timing[3]; +#ifdef CONFIG_CPU_V7A /* Extract device id for each mmc channel */ host->dev_id = pinmux_decode_periph_id(blob, node); @@ -175,6 +178,12 @@ static int exynos_dwmci_get_config(struct udevice *dev, const void *blob, printf("DWMMC%d: Can't get the dev index\n", host->dev_index); return -EINVAL; } +#else + if (dev_read_bool(dev, "non-removable")) + host->dev_index = 0; /* eMMC */ + else + host->dev_index = 2; /* SD card */ +#endif /* Get the bus width from the device node (Default is 4bit buswidth) */ host->buswidth = fdtdec_get_int(blob, node, "samsung,bus-width", 4); From patchwork Mon Jun 10 01:12:07 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sam Protsenko X-Patchwork-Id: 802952 Delivered-To: patch@linaro.org Received: by 2002:adf:f147:0:b0:35b:5a80:51b4 with SMTP id y7csp1734910wro; Sun, 9 Jun 2024 18:16:14 -0700 (PDT) X-Forwarded-Encrypted: i=2; AJvYcCWPcaxPZzL5NdME9975Kr7kScxDiRxsO+6o/CDuoDkMS6wsM4fYcKS1Hy45eTKAkGOEZLmYeNwc4moCNdGf2KPY X-Google-Smtp-Source: AGHT+IHLuA8VOpFZJM4gGQTt+mA0gjDma/A+mkeJbzfxER0+hxZ88lP3z5ZuBGfhiCubljByF4Kl X-Received: by 2002:a05:651c:b21:b0:2eb:e89c:122f with SMTP id 38308e7fff4ca-2ebe89c130cmr5971841fa.7.1717982174106; Sun, 09 Jun 2024 18:16:14 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1717982174; cv=none; d=google.com; s=arc-20160816; b=G0WnNlidjkvBTXMLNRSb7PxCy+dynCH+5wAYC2N+O5q3Whp8Gg9ZBM7hO1GaIq7mSS P796EXzmP8svUlqaG0G2wHy3lI7YRpNPBvh9H+M3vCioKwlGNbHBbkXCBTp6xnzwkhv+ Exp/JxhUQQ0fYQjBrRcD8fu1we7XVRhwY3RLo1xO8HyhptHWz9/lRNiorHoaHJHmLYXr zhQ6Sd9VK2ve2oRTPctzg86ceM5PEG/Y6gnM0eqTf4As6vH8bYeDprBwTbYAWvppm4QB LDdXiRaF60EBXd1+Y54X5YLhtG/Aq6ouyiEM+PCX6U3Fo8ouFe49qe/+3eNlHEwlZjBL xgOg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:cc:to :from:dkim-signature; bh=FG2Oxenjnbcd30HfuLqSQ1Lz7rLB218tcgxxzpWdkac=; fh=ohxlZ1CnfgTowCKPnLJSI0DW5EeJsve1b/rdKC3YSAg=; b=ReW+yIzG5sn63DaS2c3o7Hs6Hk8dQt3XuM/eBo5ZHSnrs62xlEPR72WpNvfS+7te/L 0mMcc9rzMzbSbxYNk1MhXzXXw0NtkaYmzAjmB/6wuaRqI7cb7bsvfgFnRTX/Myx15IXS gfyK+G295E+Eu7WjUqmdqv6cLwQ45z7v42/REMWr5CAHpEHxX0uPybbJinh8Gihybrdc Ad9tyTITOCeuJAm2Qo5n8HVR561Fq5T3If6PGTTasRCRC9fKDnZ0Fbb6AnovG/QgMPEL 6Rhr4/uLT2cdZI3qzP8hlfZB0ntXR029YqQy7pRw+0pqNNQcTKh9Zc5Aju7ujQ3UUBUT 9tJg==; dara=google.com ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b="LCzfGqp/"; spf=pass (google.com: domain of u-boot-bounces@lists.denx.de designates 85.214.62.61 as permitted sender) smtp.mailfrom=u-boot-bounces@lists.denx.de; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from phobos.denx.de (phobos.denx.de. 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In that case corresponding CCF functions can be used to get/set the clock rates. Moreover, already existing get_mmc_clk() and set_mmc_clk() calls are only implemented for CONFIG_CPU_V7A (i.e. ARM32 chips). In case of ARM64 chips that config option is not defined, so build will crash on linking stage, with errors like these: ld: drivers/mmc/exynos_dw_mmc.o: in function `exynos_dwmci_get_sclk': undefined reference to `get_mmc_clk' ld: drivers/mmc/exynos_dw_mmc.o: in function `exynos_dwmci_set_sclk': undefined reference to `set_mmc_clk' Fix that issue by using CCF clocks API on ARM64 platforms for getting and setting the source clock (sclk = SDCLKIN = CIU) rate. To implement this, first extract the existing ARM32 clock control code into helper functions with more generic signatures to abstract getting/setting the sclk rate. Then add CCF clock support to those functions for ARM64 platforms. Fixes: a082a2dde061 ("EXYNOS5: DWMMC: Added FDT support for DWMMC") Signed-off-by: Sam Protsenko --- Changes in v2: - Replaced CONFIG_IS_ENABLED() with #ifdef drivers/mmc/exynos_dw_mmc.c | 87 +++++++++++++++++++++++++++++++++---- 1 file changed, 79 insertions(+), 8 deletions(-) diff --git a/drivers/mmc/exynos_dw_mmc.c b/drivers/mmc/exynos_dw_mmc.c index 2ed8429d0a40..de39a8d7f3c1 100644 --- a/drivers/mmc/exynos_dw_mmc.c +++ b/drivers/mmc/exynos_dw_mmc.c @@ -4,6 +4,7 @@ * Jaehoon Chung */ +#include #include #include #include @@ -16,6 +17,7 @@ #include #include #include +#include #include #define DWMMC_MAX_CH_NUM 4 @@ -39,6 +41,7 @@ struct dwmci_exynos_priv_data { #ifdef CONFIG_DM_MMC struct dwmci_host host; #endif + struct clk clk; u32 sdr_timing; }; @@ -52,6 +55,61 @@ static struct dwmci_exynos_priv_data *exynos_dwmmc_get_priv( #endif } +/** + * exynos_dwmmc_get_sclk - Get source clock (SDCLKIN) rate + * @host: MMC controller object + * @rate: Will contain clock rate, Hz + * + * Return: 0 on success or negative value on error + */ +static int exynos_dwmmc_get_sclk(struct dwmci_host *host, unsigned long *rate) +{ +#ifdef CONFIG_CPU_V7A + *rate = get_mmc_clk(host->dev_index); +#else + struct dwmci_exynos_priv_data *priv = exynos_dwmmc_get_priv(host); + + *rate = clk_get_rate(&priv->clk); +#endif + + if (IS_ERR_VALUE(*rate)) + return *rate; + + return 0; +} + +/** + * exynos_dwmmc_set_sclk - Set source clock (SDCLKIN) rate + * @host: MMC controller object + * @rate: Desired clock rate, Hz + * + * Return: 0 on success or negative value on error + */ +static int exynos_dwmmc_set_sclk(struct dwmci_host *host, unsigned long rate) +{ + int err; + +#ifdef CONFIG_CPU_V7A + unsigned long sclk; + unsigned int div; + + err = exynos_dwmmc_get_sclk(host, &sclk); + if (err) + return err; + + div = DIV_ROUND_UP(sclk, rate); + set_mmc_clk(host->dev_index, div); +#else + struct dwmci_exynos_priv_data *priv = exynos_dwmmc_get_priv(host); + + err = clk_set_rate(&priv->clk, rate); + if (err < 0) + return err; +#endif + + return 0; +} + /* * Function used as callback function to initialise the * CLKSEL register for every mmc channel. @@ -69,6 +127,7 @@ unsigned int exynos_dwmci_get_clk(struct dwmci_host *host, uint freq) { unsigned long sclk; int8_t clk_div; + int err; /* * Since SDCLKIN is divided inside controller by the DIVRATIO @@ -78,7 +137,13 @@ unsigned int exynos_dwmci_get_clk(struct dwmci_host *host, uint freq) */ clk_div = ((dwmci_readl(host, DWMCI_CLKSEL) >> DWMCI_DIVRATIO_BIT) & DWMCI_DIVRATIO_MASK) + 1; - sclk = get_mmc_clk(host->dev_index); + + err = exynos_dwmmc_get_sclk(host, &sclk); + if (err) { + printf("DWMMC%d: failed to get clock rate (%d)\n", + host->dev_index, err); + return 0; + } /* * Assume to know divider value. @@ -108,19 +173,19 @@ static void exynos_dwmci_board_init(struct dwmci_host *host) static int exynos_dwmci_core_init(struct dwmci_host *host) { - unsigned int div; - unsigned long freq, sclk; + unsigned long freq; + int err; if (host->bus_hz) freq = host->bus_hz; else freq = DWMMC_MAX_FREQ; - /* request mmc clock vlaue of 52MHz. */ - sclk = get_mmc_clk(host->dev_index); - div = DIV_ROUND_UP(sclk, freq); - /* set the clock divisor for mmc */ - set_mmc_clk(host->dev_index, div); + err = exynos_dwmmc_set_sclk(host, freq); + if (err) { + printf("DWMMC%d: failed to set clock rate on probe (%d); " + "continue anyway\n", host->dev_index, err); + } host->name = "EXYNOS DWMMC"; #ifdef CONFIG_EXYNOS5420 @@ -231,6 +296,12 @@ static int exynos_dwmmc_probe(struct udevice *dev) struct dwmci_host *host = &priv->host; int err; +#ifndef CONFIG_CPU_V7A + err = clk_get_by_index(dev, 1, &priv->clk); /* ciu */ + if (err) + return err; +#endif + err = exynos_dwmci_get_config(dev, gd->fdt_blob, dev_of_offset(dev), host, priv); if (err) From patchwork Mon Jun 10 01:12:08 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sam Protsenko X-Patchwork-Id: 802953 Delivered-To: patch@linaro.org Received: by 2002:adf:f147:0:b0:35b:5a80:51b4 with SMTP id y7csp1734943wro; Sun, 9 Jun 2024 18:16:23 -0700 (PDT) X-Forwarded-Encrypted: i=2; AJvYcCVBG0ZS6qtM4IQEUpOmmgd3gKZDqFOJAKAUH4tvUbnvHqL5cy56Uj3n+mbcoppVyrpc2gBFDFmLCoK2x5ZruImh X-Google-Smtp-Source: AGHT+IHRrEHukOThQedi/kydkOxxpnKz7yUpK7fzt1T+bGXQ7RrvyTSsldVhvdb66wnWDhxHGuT3 X-Received: by 2002:a17:906:f5a8:b0:a6f:21cd:9a91 with SMTP id a640c23a62f3a-a6f21cda3f4mr54515666b.69.1717982183744; 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Make use of .of_to_plat driver callback instead, and convert exynos_dwmci_get_config() to match its signature. No functional change. Signed-off-by: Sam Protsenko --- drivers/mmc/exynos_dw_mmc.c | 15 +++++++-------- 1 file changed, 7 insertions(+), 8 deletions(-) diff --git a/drivers/mmc/exynos_dw_mmc.c b/drivers/mmc/exynos_dw_mmc.c index de39a8d7f3c1..95c64b9eda54 100644 --- a/drivers/mmc/exynos_dw_mmc.c +++ b/drivers/mmc/exynos_dw_mmc.c @@ -224,10 +224,13 @@ static int do_dwmci_init(struct dwmci_host *host) return exynos_dwmci_core_init(host); } -static int exynos_dwmci_get_config(struct udevice *dev, const void *blob, - int node, struct dwmci_host *host, - struct dwmci_exynos_priv_data *priv) +#ifdef CONFIG_DM_MMC +static int exynos_dwmmc_of_to_plat(struct udevice *dev) { + const void *blob = gd->fdt_blob; + struct dwmci_exynos_priv_data *priv = dev_get_priv(dev); + struct dwmci_host *host = &priv->host; + int node = dev_of_offset(dev); int err = 0; u32 timing[3]; @@ -287,7 +290,6 @@ static int exynos_dwmci_get_config(struct udevice *dev, const void *blob, return 0; } -#ifdef CONFIG_DM_MMC static int exynos_dwmmc_probe(struct udevice *dev) { struct exynos_mmc_plat *plat = dev_get_plat(dev); @@ -302,10 +304,6 @@ static int exynos_dwmmc_probe(struct udevice *dev) return err; #endif - err = exynos_dwmci_get_config(dev, gd->fdt_blob, dev_of_offset(dev), - host, priv); - if (err) - return err; err = do_dwmci_init(host); if (err) return err; @@ -336,6 +334,7 @@ U_BOOT_DRIVER(exynos_dwmmc_drv) = { .name = "exynos_dwmmc", .id = UCLASS_MMC, .of_match = exynos_dwmmc_ids, + .of_to_plat = exynos_dwmmc_of_to_plat, .bind = exynos_dwmmc_bind, .ops = &dm_dwmci_ops, .probe = exynos_dwmmc_probe, From patchwork Mon Jun 10 01:12:09 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sam Protsenko X-Patchwork-Id: 802954 Delivered-To: patch@linaro.org Received: by 2002:adf:f147:0:b0:35b:5a80:51b4 with SMTP id y7csp1734988wro; Sun, 9 Jun 2024 18:16:33 -0700 (PDT) X-Forwarded-Encrypted: i=2; AJvYcCVfIdqAB6ypDHbQgVwmlZoUpZ+6BY1Kjx8RCItiGLHdw4PTaZHDyruuf2lr6gIrj+cKXj9YKAdfOsp41uocLkiI X-Google-Smtp-Source: AGHT+IHI517L3dEUynmwOxYqohYWZMbOeC3CYu//OUeEtctax69iPWWM/O3eOpF44HmmdY9pkm+S X-Received: by 2002:a50:8d1a:0:b0:579:eb77:6d83 with SMTP id 4fb4d7f45d1cf-57c4e3f6decmr5799583a12.13.1717982193016; Sun, 09 Jun 2024 18:16:33 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1717982193; cv=none; d=google.com; s=arc-20160816; b=ljLwDM6GuGYE+LyqBw0aVU9e6HhYeluTkhY5h9KqcjIoGi3QuU8wnZL5MI7tpxeJEX FFMHelpyWDXOpEKkDuIMNCPsdUKpvgI6nM5h+WSXLy4iathTvTiLC3UHPJX4EVooLZh4 x8UmcgNEtXFnivajfAyzmTSWDkP4VgqMLOXUN9NO9Udw5Rk+w5UTN1Zk8g/z+fC5/smC EGben+iXiJiDmCHRH9rDuqEQfKoWqzDfkEZxzbb4yDSoWM3/dUI5PtNyCmQ11amp0szF tO+0RajA5q/Qln4zqnr97dfQP2OfP39Aq12GUeQf8Veaafa0DmcoQBQZmFCYGhf/cFCs dUeQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:cc:to :from:dkim-signature; bh=QdG9IFJkxoV/UQBfpzafL1e9Z4kE65JOukEssVS2O7g=; fh=6WwEOHHwPJ1rUr5eOITEEI9CzxMy6UlY4Dj6jMtNEwU=; b=f6NvUCXinCSLLjzyfYLhXgz+u2i9+T/8ZeVXXzZvITXukgKOiEZP5gmDyXAtKdOLKz Zgjn15p9o4aRc/X3ypjrmLs++RElWqfkDDbMrHzjeeuxhbCNaCInDe7vuOpvYSsYYGXw xF3Upz9GTvTzvLoMO9il9059uWXwZ2dFQm8J06ieLdrBFK9D6XBgFVnRqKVV6gV/3FSu a0GlHf3AVPrpO8Zee9jqeGtDTmOOY9RlhxQAmmZ0QGSlss2J4L+7NS4drewZgZv1OQ06 2NbikEAwP/oE3ZK0iQMyyVvRw+lAa6er8m89Y2jI5IY7lqhqU4KOrCFTf6lpJ9cFQcJC uiwA==; dara=google.com ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b="YHK9vz/o"; spf=pass (google.com: domain of u-boot-bounces@lists.denx.de designates 2a01:238:438b:c500:173d:9f52:ddab:ee01 as permitted sender) smtp.mailfrom=u-boot-bounces@lists.denx.de; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from phobos.denx.de (phobos.denx.de. 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Sun, 09 Jun 2024 18:12:43 -0700 (PDT) From: Sam Protsenko To: Tom Rini , Minkyu Kang , Peng Fan , Jaehoon Chung , Simon Glass Cc: Quentin Schulz , Philipp Tomsich , Kever Yang , Eugeniy Paltsev , Peter Robinson , Jonas Karlman , Yang Xiwen , Ferass El Hafidi , Sean Anderson , u-boot@lists.denx.de, uboot-snps-arc@synopsys.com Subject: [PATCH v2 23/40] mmc: exynos_dw_mmc: Convert to use livetree API Date: Sun, 9 Jun 2024 20:12:09 -0500 Message-Id: <20240610011226.4050-24-semen.protsenko@linaro.org> X-Mailer: git-send-email 2.39.2 In-Reply-To: <20240610011226.4050-1-semen.protsenko@linaro.org> References: <20240610011226.4050-1-semen.protsenko@linaro.org> MIME-Version: 1.0 X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.39 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.103.8 at phobos.denx.de X-Virus-Status: Clean Update the driver to use livetree API instead of FDT one. No functional change. Signed-off-by: Sam Protsenko --- Changes in v2: - Moved exynos_dwmmc_of_to_plat() under #ifdef CONFIG_DM_MMC stanza drivers/mmc/exynos_dw_mmc.c | 17 ++++++++--------- 1 file changed, 8 insertions(+), 9 deletions(-) diff --git a/drivers/mmc/exynos_dw_mmc.c b/drivers/mmc/exynos_dw_mmc.c index 95c64b9eda54..eb2d2d204def 100644 --- a/drivers/mmc/exynos_dw_mmc.c +++ b/drivers/mmc/exynos_dw_mmc.c @@ -7,9 +7,7 @@ #include #include #include -#include #include -#include #include #include #include @@ -227,18 +225,19 @@ static int do_dwmci_init(struct dwmci_host *host) #ifdef CONFIG_DM_MMC static int exynos_dwmmc_of_to_plat(struct udevice *dev) { - const void *blob = gd->fdt_blob; struct dwmci_exynos_priv_data *priv = dev_get_priv(dev); struct dwmci_host *host = &priv->host; - int node = dev_of_offset(dev); int err = 0; u32 timing[3]; #ifdef CONFIG_CPU_V7A + const void *blob = gd->fdt_blob; + int node = dev_of_offset(dev); + /* Extract device id for each mmc channel */ host->dev_id = pinmux_decode_periph_id(blob, node); - host->dev_index = fdtdec_get_int(blob, node, "index", host->dev_id); + host->dev_index = dev_read_u32_default(dev, "index", host->dev_id); if (host->dev_index == host->dev_id) host->dev_index = host->dev_id - PERIPH_ID_SDMMC0; @@ -254,7 +253,7 @@ static int exynos_dwmmc_of_to_plat(struct udevice *dev) #endif /* Get the bus width from the device node (Default is 4bit buswidth) */ - host->buswidth = fdtdec_get_int(blob, node, "samsung,bus-width", 4); + host->buswidth = dev_read_u32_default(dev, "samsung,bus-width", 4); /* Set the base address from the device node */ host->ioaddr = dev_read_addr_ptr(dev); @@ -264,7 +263,7 @@ static int exynos_dwmmc_of_to_plat(struct udevice *dev) } /* Extract the timing info from the node */ - err = fdtdec_get_int_array(blob, node, "samsung,timing", timing, 3); + err = dev_read_u32_array(dev, "samsung,timing", timing, 3); if (err) { printf("DWMMC%d: Can't get sdr-timings for devider\n", host->dev_index); @@ -284,8 +283,8 @@ static int exynos_dwmmc_of_to_plat(struct udevice *dev) } host->fifo_depth = dev_read_u32_default(dev, "fifo-depth", 0); - host->bus_hz = fdtdec_get_int(blob, node, "bus_hz", 0); - host->div = fdtdec_get_int(blob, node, "div", 0); + host->bus_hz = dev_read_u32_default(dev, "bus_hz", 0); + host->div = dev_read_u32_default(dev, "div", 0); return 0; } From patchwork Mon Jun 10 01:12:10 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sam Protsenko X-Patchwork-Id: 802955 Delivered-To: patch@linaro.org Received: by 2002:adf:f147:0:b0:35b:5a80:51b4 with SMTP id y7csp1735031wro; Sun, 9 Jun 2024 18:16:43 -0700 (PDT) X-Forwarded-Encrypted: i=2; AJvYcCXq7dc/T8OT/MOKncXss0yEmIK7N5lDMoqdUk6+bJaYCSbAuSybxyyLPtSVh/vaVwMd8bbu+JO9nPru3Fv1Fljw X-Google-Smtp-Source: AGHT+IH6jUK8K8EH10h1t7DtmyoxQvmtO/dVcPnf0NbGrywTQAS9N9Kwups8bMFMEfo7rDMrJccO X-Received: by 2002:a50:a458:0:b0:57c:7e8e:ad85 with SMTP id 4fb4d7f45d1cf-57c7e8eae8dmr1192965a12.29.1717982203034; Sun, 09 Jun 2024 18:16:43 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1717982203; cv=none; d=google.com; s=arc-20160816; b=oxWMj3O97XmX6OZXVaIYbn5wOfdiShx0ZGcxaMEo6eD2h5l/ZCh6lytWEp03LoCDL8 WgBYG1HwEqmG6M+6ZIiHV4NLFHjg/JaoSHWWfGSHt6t3DVJGeEA0M/sbGrIws2qsoxD5 E4pWzShvDBziam7FydEuhEvKEdQFRZu0oQeOjftnb0zx9fzCWwQJBZ5UH4Nfnuq+bmTx BsJiDrwEP0Y8kaA+UXYw753bDrEMnp2JPeXpIRBDdjPYdolD2RiR7qIwbyjho0NKXJqG 1/ZcMetSIAVo4md1LjGsfteWB968SHPwV0ZtXPtsJux8MnxiTcL3tD5W3CoY9bWpWBEN fFCw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:cc:to :from:dkim-signature; bh=TWuiRkwYfnSkNX7yMTQMOdsupA1/S3nuefRl1iclhSw=; fh=S3xUgAkWJ2IxOWlJ3em1fXxe9er16nmIVlxaSj4BzUo=; b=AsUyl3YiAFiNZh8t8wU+OQULUGsvbpr8ex2A5YEjrBRiKnw9ZakJoQdk+ktOxV4hmv 561isZSnVEJdnUUO8zbjYf66hmSneRagVQRkj+dyWiT/pB8oTJxnW4y8gqusPCgztglZ dgAAhdFYBjEI7QaA6Fsh0fZVJFHTtozW/Nb5cEor44FMuNHI5YilaI1qHGwnEXN2NbLq Q66LZfAzlytoTJbNgZApCjBUiHLPGsjL5TszX/j9FVzwhbqEmRVoXyHdz6cPOORFEsKx 0+iaa5gRfEKnwReWL410iqouJ2IfkNw99DyolPBOxOutMYOCr8widklnuyFKDLx8NbyT 35FA==; dara=google.com ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b="e/F6COw2"; spf=pass (google.com: domain of u-boot-bounces@lists.denx.de designates 2a01:238:438b:c500:173d:9f52:ddab:ee01 as permitted sender) smtp.mailfrom=u-boot-bounces@lists.denx.de; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from phobos.denx.de (phobos.denx.de. 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Sun, 09 Jun 2024 18:12:44 -0700 (PDT) From: Sam Protsenko To: Tom Rini , Minkyu Kang , Peng Fan , Jaehoon Chung , Simon Glass Cc: Quentin Schulz , Philipp Tomsich , Kever Yang , Eugeniy Paltsev , Peter Robinson , Jonas Karlman , Yang Xiwen , Ferass El Hafidi , Sean Anderson , u-boot@lists.denx.de, uboot-snps-arc@synopsys.com Subject: [PATCH v2 24/40] mmc: exynos_dw_mmc: Read upstream SDR timing properties Date: Sun, 9 Jun 2024 20:12:10 -0500 Message-Id: <20240610011226.4050-25-semen.protsenko@linaro.org> X-Mailer: git-send-email 2.39.2 In-Reply-To: <20240610011226.4050-1-semen.protsenko@linaro.org> References: <20240610011226.4050-1-semen.protsenko@linaro.org> MIME-Version: 1.0 X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.39 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.103.8 at phobos.denx.de X-Virus-Status: Clean The obsolete "samsung,timing" dts property is now split into "samsung,dw-mshc-ciu-div" (for holding the internal DW MMC divider value) and "samsung,dw-mshc-sdr-timing" (for actual timing values) in upstream Linux kernel. Rework the driver to make use of new properties instead of the old one. All affected dts files were already updated accordingly. No functional change. Signed-off-by: Sam Protsenko --- drivers/mmc/exynos_dw_mmc.c | 14 +++++++------- 1 file changed, 7 insertions(+), 7 deletions(-) diff --git a/drivers/mmc/exynos_dw_mmc.c b/drivers/mmc/exynos_dw_mmc.c index eb2d2d204def..a6e4d76fb25a 100644 --- a/drivers/mmc/exynos_dw_mmc.c +++ b/drivers/mmc/exynos_dw_mmc.c @@ -228,7 +228,7 @@ static int exynos_dwmmc_of_to_plat(struct udevice *dev) struct dwmci_exynos_priv_data *priv = dev_get_priv(dev); struct dwmci_host *host = &priv->host; int err = 0; - u32 timing[3]; + u32 div, timing[2]; #ifdef CONFIG_CPU_V7A const void *blob = gd->fdt_blob; @@ -263,16 +263,16 @@ static int exynos_dwmmc_of_to_plat(struct udevice *dev) } /* Extract the timing info from the node */ - err = dev_read_u32_array(dev, "samsung,timing", timing, 3); + div = dev_read_u32_default(dev, "samsung,dw-mshc-ciu-div", 0); + err = dev_read_u32_array(dev, "samsung,dw-mshc-sdr-timing", timing, 2); if (err) { - printf("DWMMC%d: Can't get sdr-timings for devider\n", - host->dev_index); + printf("DWMMC%d: Can't get sdr-timings\n", host->dev_index); return -EINVAL; } - priv->sdr_timing = (DWMCI_SET_SAMPLE_CLK(timing[0]) | - DWMCI_SET_DRV_CLK(timing[1]) | - DWMCI_SET_DIV_RATIO(timing[2])); + priv->sdr_timing = DWMCI_SET_SAMPLE_CLK(timing[0]) | + DWMCI_SET_DRV_CLK(timing[1]) | + DWMCI_SET_DIV_RATIO(div); /* sdr_timing didn't assigned anything, use the default value */ if (!priv->sdr_timing) { From patchwork Mon Jun 10 01:12:11 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sam Protsenko X-Patchwork-Id: 802956 Delivered-To: patch@linaro.org Received: by 2002:adf:f147:0:b0:35b:5a80:51b4 with SMTP id y7csp1735063wro; Sun, 9 Jun 2024 18:16:52 -0700 (PDT) X-Forwarded-Encrypted: i=2; AJvYcCV8u0cpphaMeyYa/856qSpzy8qQ+RFX6aKg6Z3YoVaTO/Y34Xi+EsGZk293Hhw14SAFF6jojughATcqJxj08Ygo X-Google-Smtp-Source: AGHT+IGR398eIITgG2kWMgtN+RK4zfBPVLo5eejGcfrXYeubrV6FqqPbgU3HErU2RGtGGs9E2bXB X-Received: by 2002:a2e:7009:0:b0:2ea:ea1c:3872 with SMTP id 38308e7fff4ca-2eaea1c4315mr41788371fa.37.1717982212723; Sun, 09 Jun 2024 18:16:52 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1717982212; cv=none; d=google.com; s=arc-20160816; b=UxzYK6Jo/XJ29MliolmAbH7+ZfGiOuMwFPuZkChQ7Y8o6le1JVrWvKJqIQwpxFnsar BqcqdP9Oy1YXfXS3ttI2bUUrd7D6N7SDGN22BhzenPMBl5Xje7Ywagj+psmB24XbCKPo /PGkwD9X1Fk/64K1lkho9Mu+Rx7+AXrU9/cYi1BLku7SEC12pgZx6OX6n/saGoCv57qP qIuCi3ObbDtuflXon/Z+Eaz9SRkJ0YhQ3atuxfx9KaYXDaltmbXEbSyUTI5xIBe+EgVX iIpZ5EAfqPDKAzEHsp5/Sp6EiZM0DZIhY2jQesGGKFUr9fi8MESt6qCSb0mnx91tJur0 W4sQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:cc:to :from:dkim-signature; bh=ev16xAcSMFowWept2qugSzFkmqI5xwf3UD/q8/LjRVg=; fh=VHd4M/FsZTWRf0qpThupCRH2z1q7X7gQnjNAP3G/gJI=; b=itxpAeRb4QZdrzgRKluM2y2E/s6ah2lnpmHOUHaNEOY8dmvonDHBhZUtAfkmDAqmUv v+Rl58wW2krKbV/cFrjCxcuu+MPCTZTMDFzratYmsq53UTcGhrtaMUXXT1mT7hiOpZqP O/2T69U72M9DIyCzIgQOUM7ypKc78/OsyrSzG6A+O/daOp35BOxYTChPlrqR1yT/dVep rzw6jr0X39QwSe39mKhvyiEXvg+e3XwTP6BCgqXHsatY7BmnH4ms88vqQfK/co4nBANF 8nDEitwbznLwjdg8U6SHikGJqxxC499ik8Nd/a2gXEI83qWRDnmdTk3cQw06mhFVzyAx oKLg==; dara=google.com ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b="aV/zZIWF"; spf=pass (google.com: domain of u-boot-bounces@lists.denx.de designates 85.214.62.61 as permitted sender) smtp.mailfrom=u-boot-bounces@lists.denx.de; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from phobos.denx.de (phobos.denx.de. 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Provide a way to specify its offset value for each compatible instead of hard-coding its value in read/write calls. No functional change. Signed-off-by: Sam Protsenko --- drivers/mmc/exynos_dw_mmc.c | 30 ++++++++++++++++++++++++++---- 1 file changed, 26 insertions(+), 4 deletions(-) diff --git a/drivers/mmc/exynos_dw_mmc.c b/drivers/mmc/exynos_dw_mmc.c index a6e4d76fb25a..901cfc635418 100644 --- a/drivers/mmc/exynos_dw_mmc.c +++ b/drivers/mmc/exynos_dw_mmc.c @@ -34,6 +34,11 @@ struct exynos_mmc_plat { }; #endif +/* Chip specific data */ +struct exynos_dwmmc_variant { + u32 clksel; /* CLKSEL register offset */ +}; + /* Exynos implmentation specific drver private data */ struct dwmci_exynos_priv_data { #ifdef CONFIG_DM_MMC @@ -41,6 +46,7 @@ struct dwmci_exynos_priv_data { #endif struct clk clk; u32 sdr_timing; + const struct exynos_dwmmc_variant *chip; }; static struct dwmci_exynos_priv_data *exynos_dwmmc_get_priv( @@ -116,13 +122,14 @@ static int exynos_dwmci_clksel(struct dwmci_host *host) { struct dwmci_exynos_priv_data *priv = exynos_dwmmc_get_priv(host); - dwmci_writel(host, DWMCI_CLKSEL, priv->sdr_timing); + dwmci_writel(host, priv->chip->clksel, priv->sdr_timing); return 0; } unsigned int exynos_dwmci_get_clk(struct dwmci_host *host, uint freq) { + struct dwmci_exynos_priv_data *priv = exynos_dwmmc_get_priv(host); unsigned long sclk; int8_t clk_div; int err; @@ -133,7 +140,7 @@ unsigned int exynos_dwmci_get_clk(struct dwmci_host *host, uint freq) * clock value to calculate the CLKDIV value. * as per user manual:cclk_in = SDCLKIN / (DIVRATIO + 1) */ - clk_div = ((dwmci_readl(host, DWMCI_CLKSEL) >> DWMCI_DIVRATIO_BIT) + clk_div = ((dwmci_readl(host, priv->chip->clksel) >> DWMCI_DIVRATIO_BIT) & DWMCI_DIVRATIO_MASK) + 1; err = exynos_dwmmc_get_sclk(host, &sclk); @@ -230,6 +237,8 @@ static int exynos_dwmmc_of_to_plat(struct udevice *dev) int err = 0; u32 div, timing[2]; + priv->chip = (struct exynos_dwmmc_variant *)dev_get_driver_data(dev); + #ifdef CONFIG_CPU_V7A const void *blob = gd->fdt_blob; int node = dev_of_offset(dev); @@ -323,9 +332,22 @@ static int exynos_dwmmc_bind(struct udevice *dev) return dwmci_bind(dev, &plat->mmc, &plat->cfg); } +static const struct exynos_dwmmc_variant exynos4_drv_data = { + .clksel = DWMCI_CLKSEL, +}; + +static const struct exynos_dwmmc_variant exynos5_drv_data = { + .clksel = DWMCI_CLKSEL, +}; + static const struct udevice_id exynos_dwmmc_ids[] = { - { .compatible = "samsung,exynos4412-dw-mshc" }, - { .compatible = "samsung,exynos-dwmmc" }, + { + .compatible = "samsung,exynos4412-dw-mshc", + .data = (ulong)&exynos4_drv_data, + }, { + .compatible = "samsung,exynos-dwmmc", + .data = (ulong)&exynos5_drv_data, + }, { } }; From patchwork Mon Jun 10 01:12:12 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sam Protsenko X-Patchwork-Id: 802957 Delivered-To: patch@linaro.org Received: by 2002:adf:f147:0:b0:35b:5a80:51b4 with SMTP id y7csp1735106wro; Sun, 9 Jun 2024 18:17:03 -0700 (PDT) X-Forwarded-Encrypted: i=2; AJvYcCUZO7LVEG4h6ndOAHDHkEIRq0nFIsJcRA6cDSz+RocBokCLJ2xixEIb3e5uYRt8xswcxIhNHxWQ3FaiwyEbBkC3 X-Google-Smtp-Source: AGHT+IEesffJLSNimuGRgqgy4Zz7Aygl2CJy0aFIfZfEjeKUYbL1gyMTmyitwMRPNDOTXJegkU6K X-Received: by 2002:a2e:a78d:0:b0:2ea:eb0d:512 with SMTP id 38308e7fff4ca-2ebebd545ffmr1692841fa.30.1717982222821; Sun, 09 Jun 2024 18:17:02 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1717982222; cv=none; d=google.com; s=arc-20160816; b=Gy7YU9WFsWw7og9fjdqdK3sqk9Xs+kRxNdV/v9u7KdhnD0fv9OUv8BRTV7bu6d1ZpP mr/36Adf2fAy1LZouqD/R3jkIgrhm3UYrN5FtZ9UYdIcq6T3ADLolrG8ggb5exvZQxxB UaJLR38iG1nbHDw2in/NSRolCsLF4+gO9b+8KJG0p6USIa5IW1A36d+cjmFYMm8vKDgZ vMqp+2iUwWyAdA+wj3Yv4sydbpcNj3TsjdYamVYXhWL70VZxqv7IZ5ZfhV/aO/V/rUhg ISKumdhVPMBoCqO8b5SIqMlMYTDzaP9YPVMwFllYA9dhA4BrvdLTaNwp1BEk9MBkh2LQ Z1CA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:cc:to :from:dkim-signature; bh=MofZ8uRp4MGIF+shM0f3Ad8dOPdSi82Tdfncbe2tGpA=; fh=Q6wGpDMYFPimueTSSJAqh0WMc3f8UsbUGAcif74Ke5s=; b=jtwnx9KZESRno2wv5A1d1MqPGo3DTlX8KGPKdnggScci9cl1hzFKbqgdk7qQsCvhUi Y36U+IIq4Wo9ZC0Su9y3AvLlx8FdCaRqbksHfBqznpqrVmRHIztyh8JNK3me0wj5e3oX de7kwKBvHyU73EJLT066rwWbRlrvHm9zf2Jmm89crMZDTTJsJTYzAhk0m4kJ8PecNq7T rqqwu1JGMqfxJRMvwSfFRqJwTIJnIAfIpoUoB77rESKW0X4fBk96WjdAqjs7xbNIJzUN kP2bBIcGP3KXyG2gH6x3yQMf7pr01RiHEjJUL161iKDqXYNePgHGsaRcl8xUVQxBa8KF A4gg==; dara=google.com ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=LAVavca8; spf=pass (google.com: domain of u-boot-bounces@lists.denx.de designates 85.214.62.61 as permitted sender) smtp.mailfrom=u-boot-bounces@lists.denx.de; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from phobos.denx.de (phobos.denx.de. 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Instead of reading it from non-standard "div" dts property, store its value in the driver internally, in static chip data associated with corresponding compatible. This makes it possible to avoid using host->div for storing it, so the latter can be removed safely. Also create a helper function called exynos_dwmmc_get_ciu_div() for getting the current div value: in case the fixed div is provided in the chip data it will be used, otherwise the current div value is being read from CLKSEL register. The insights for this change were taken from dw_mmc-exynos.c driver in Linux kernel. No functional change. Signed-off-by: Sam Protsenko --- drivers/mmc/ca_dw_mmc.c | 2 +- drivers/mmc/exynos_dw_mmc.c | 43 +++++++++++++++++++++++++------------ include/dwmmc.h | 2 -- 3 files changed, 30 insertions(+), 17 deletions(-) diff --git a/drivers/mmc/ca_dw_mmc.c b/drivers/mmc/ca_dw_mmc.c index a17ed8c11cbe..342e09d02306 100644 --- a/drivers/mmc/ca_dw_mmc.c +++ b/drivers/mmc/ca_dw_mmc.c @@ -87,7 +87,7 @@ unsigned int ca_dwmci_get_mmc_clock(struct dwmci_host *host, uint freq) clk_div = 1; } - return SD_SCLK_MAX / clk_div / (host->div + 1); + return SD_SCLK_MAX / clk_div; } static int ca_dwmmc_of_to_plat(struct udevice *dev) diff --git a/drivers/mmc/exynos_dw_mmc.c b/drivers/mmc/exynos_dw_mmc.c index 901cfc635418..098468f56e87 100644 --- a/drivers/mmc/exynos_dw_mmc.c +++ b/drivers/mmc/exynos_dw_mmc.c @@ -24,6 +24,8 @@ #define DWMMC_MMC0_SDR_TIMING_VAL 0x03030001 #define DWMMC_MMC2_SDR_TIMING_VAL 0x03020001 +#define EXYNOS4412_FIXED_CIU_CLK_DIV 4 + #ifdef CONFIG_DM_MMC #include DECLARE_GLOBAL_DATA_PTR; @@ -37,6 +39,7 @@ struct exynos_mmc_plat { /* Chip specific data */ struct exynos_dwmmc_variant { u32 clksel; /* CLKSEL register offset */ + u8 div; /* (optional) fixed clock divider value: 0..7 */ }; /* Exynos implmentation specific drver private data */ @@ -127,12 +130,18 @@ static int exynos_dwmci_clksel(struct dwmci_host *host) return 0; } -unsigned int exynos_dwmci_get_clk(struct dwmci_host *host, uint freq) +/** + * exynos_dwmmc_get_ciu_div - Get internal clock divider value + * @host: MMC controller object + * + * Returns: Divider value, in range of 1..8 + */ +static u8 exynos_dwmmc_get_ciu_div(struct dwmci_host *host) { struct dwmci_exynos_priv_data *priv = exynos_dwmmc_get_priv(host); - unsigned long sclk; - int8_t clk_div; - int err; + + if (priv->chip->div) + return priv->chip->div + 1; /* * Since SDCLKIN is divided inside controller by the DIVRATIO @@ -140,9 +149,17 @@ unsigned int exynos_dwmci_get_clk(struct dwmci_host *host, uint freq) * clock value to calculate the CLKDIV value. * as per user manual:cclk_in = SDCLKIN / (DIVRATIO + 1) */ - clk_div = ((dwmci_readl(host, priv->chip->clksel) >> DWMCI_DIVRATIO_BIT) - & DWMCI_DIVRATIO_MASK) + 1; + return ((dwmci_readl(host, priv->chip->clksel) >> DWMCI_DIVRATIO_BIT) + & DWMCI_DIVRATIO_MASK) + 1; +} +unsigned int exynos_dwmci_get_clk(struct dwmci_host *host, uint freq) +{ + unsigned long sclk; + u8 clk_div; + int err; + + clk_div = exynos_dwmmc_get_ciu_div(host); err = exynos_dwmmc_get_sclk(host, &sclk); if (err) { printf("DWMMC%d: failed to get clock rate (%d)\n", @@ -150,11 +167,7 @@ unsigned int exynos_dwmci_get_clk(struct dwmci_host *host, uint freq) return 0; } - /* - * Assume to know divider value. - * When clock unit is broken, need to set "host->div" - */ - return sclk / clk_div / (host->div + 1); + return sclk / clk_div; } static void exynos_dwmci_board_init(struct dwmci_host *host) @@ -271,8 +284,10 @@ static int exynos_dwmmc_of_to_plat(struct udevice *dev) return -EINVAL; } - /* Extract the timing info from the node */ - div = dev_read_u32_default(dev, "samsung,dw-mshc-ciu-div", 0); + if (priv->chip->div) + div = priv->chip->div; + else + div = dev_read_u32_default(dev, "samsung,dw-mshc-ciu-div", 0); err = dev_read_u32_array(dev, "samsung,dw-mshc-sdr-timing", timing, 2); if (err) { printf("DWMMC%d: Can't get sdr-timings\n", host->dev_index); @@ -293,7 +308,6 @@ static int exynos_dwmmc_of_to_plat(struct udevice *dev) host->fifo_depth = dev_read_u32_default(dev, "fifo-depth", 0); host->bus_hz = dev_read_u32_default(dev, "bus_hz", 0); - host->div = dev_read_u32_default(dev, "div", 0); return 0; } @@ -334,6 +348,7 @@ static int exynos_dwmmc_bind(struct udevice *dev) static const struct exynos_dwmmc_variant exynos4_drv_data = { .clksel = DWMCI_CLKSEL, + .div = EXYNOS4412_FIXED_CIU_CLK_DIV - 1, }; static const struct exynos_dwmmc_variant exynos5_drv_data = { diff --git a/include/dwmmc.h b/include/dwmmc.h index a99b2f3bf0cc..8c2500da9efe 100644 --- a/include/dwmmc.h +++ b/include/dwmmc.h @@ -184,7 +184,6 @@ struct dwmci_idmac_regs { * @caps: Capabilities - see MMC_MODE_... * @clock: Current clock frequency (after internal divider), Hz * @bus_hz: Bus speed in Hz, if @get_mmc_clk() is NULL - * @div: Arbitrary clock divider value for use by controller * @dev_index: Arbitrary device index for use by controller * @dev_id: Arbitrary device ID for use by controller * @buswidth: Bus width in bits (8 or 4) @@ -205,7 +204,6 @@ struct dwmci_host { unsigned int caps; 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It's safe to do so, as "bus-width" property was already added to corresponding nodes in all affected Exynos device tree files. No functional change. Signed-off-by: Sam Protsenko --- drivers/mmc/exynos_dw_mmc.c | 2 +- drivers/mmc/s5p_sdhci.c | 2 +- 2 files changed, 2 insertions(+), 2 deletions(-) diff --git a/drivers/mmc/exynos_dw_mmc.c b/drivers/mmc/exynos_dw_mmc.c index 098468f56e87..01e6bbb123f1 100644 --- a/drivers/mmc/exynos_dw_mmc.c +++ b/drivers/mmc/exynos_dw_mmc.c @@ -275,7 +275,7 @@ static int exynos_dwmmc_of_to_plat(struct udevice *dev) #endif /* Get the bus width from the device node (Default is 4bit buswidth) */ - host->buswidth = dev_read_u32_default(dev, "samsung,bus-width", 4); + host->buswidth = dev_read_u32_default(dev, "bus-width", 4); /* Set the base address from the device node */ host->ioaddr = dev_read_addr_ptr(dev); diff --git a/drivers/mmc/s5p_sdhci.c b/drivers/mmc/s5p_sdhci.c index 3b74feae68c7..0b49a9c5f2a9 100644 --- a/drivers/mmc/s5p_sdhci.c +++ b/drivers/mmc/s5p_sdhci.c @@ -167,7 +167,7 @@ static int sdhci_get_config(const void *blob, int node, struct sdhci_host *host) host->index = dev_id - PERIPH_ID_SDMMC0; /* Get bus width */ - bus_width = fdtdec_get_int(blob, node, "samsung,bus-width", 0); + bus_width = fdtdec_get_int(blob, node, "bus-width", 0); if (bus_width <= 0) { debug("MMC: Can't get bus-width\n"); return -EINVAL; From patchwork Mon Jun 10 01:12:14 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sam Protsenko X-Patchwork-Id: 802959 Delivered-To: patch@linaro.org Received: by 2002:adf:f147:0:b0:35b:5a80:51b4 with SMTP id y7csp1735209wro; Sun, 9 Jun 2024 18:17:22 -0700 (PDT) X-Forwarded-Encrypted: i=2; AJvYcCXjFAZwkWOcBaXLUSAUQBxROl59Z/dVWPBowk9Vc0rhSC1Jn7G7kNTBbwqSr9+EOQomLZArBjloIbsbu/L3UUG0 X-Google-Smtp-Source: AGHT+IECb2m4oqo+UiZ1m9TD7SYTPd076oyF+PjMgzgsFD3xBxYgaeipLTskn4bK7ZwWynw32+8G X-Received: by 2002:a50:d4d5:0:b0:57c:7123:f91c with SMTP id 4fb4d7f45d1cf-57c7123fae1mr2843791a12.31.1717982242380; Sun, 09 Jun 2024 18:17:22 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1717982242; cv=none; d=google.com; s=arc-20160816; b=ehqV7Rgw3yq/U+pqm92iliityt6iojzTZqBnHil8tyj/l52IPvv/b3+LtuH62cboyl 6c1vTbE/P77I3rsg4naufaEl3BarM0WuyBGt61FRuSLUFTwHmO1/y2ry9r//HaffA5W+ laqk8thJmfW/DcGfBKzavNDiiOGadahj9bQHkz1ll5qbZtXmEjd0SUie2OzurtJ166aF ykPfzswhDdgF26OMKI5jR+KLXKI/SK465P5V/Dlg9xkvvc5J9kTTDA1ND/PsGEDThqHM gpa5RNPnDtiss0YBdiToNvRVE9i3d3OIPKIkVPcCGkr/BKiYtMONubxp3yRC1BqM5eST idcQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:cc:to :from:dkim-signature; bh=4DfZcccyAMkc/tLeZTfCqhTQ6IpdwbmKD97DahjONA8=; fh=AlHTqGYuwafvgdYWRZ/qfus13mgsu4ntLKeS6TGTF7Y=; b=GMe3QHwTLoVnRb2Y41bp0UfY1ik8QPZmiJs96AhtljglqftXIJ3FMTpgo1bu/rtzQj gS/OLMN6v9dIHafPkxiInqKXX7zsBHEwBbI9qcl44rSrAfbWEB3eVwRvg23/9v6m8x1P R7kJgeRRjYLV4NVYpLXklBWXzFnk6DNV/XPdca99biy2CfQVyRHKGrxrN6buMhv7oP/w rZKNJGIAz0DnRoteK3T/eILjS9EpXIUyFDh4AJ3QUqRWN6CZI8GBaBc5s0mDuUVRwHvC nVOFZeTjO5N3189SaxUgGoSqLyHSus8O21VoRN4xnPlNY/JHBkm6AT8YBv5DZGYXmss9 DDqQ==; dara=google.com ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=uhq4sEgd; spf=pass (google.com: domain of u-boot-bounces@lists.denx.de designates 2a01:238:438b:c500:173d:9f52:ddab:ee01 as permitted sender) smtp.mailfrom=u-boot-bounces@lists.denx.de; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from phobos.denx.de (phobos.denx.de. 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Sun, 09 Jun 2024 18:12:46 -0700 (PDT) From: Sam Protsenko To: Tom Rini , Minkyu Kang , Peng Fan , Jaehoon Chung , Simon Glass Cc: Quentin Schulz , Philipp Tomsich , Kever Yang , Eugeniy Paltsev , Peter Robinson , Jonas Karlman , Yang Xiwen , Ferass El Hafidi , Sean Anderson , u-boot@lists.denx.de, uboot-snps-arc@synopsys.com Subject: [PATCH v2 28/40] mmc: exynos_dw_mmc: Read common clock-frequency property Date: Sun, 9 Jun 2024 20:12:14 -0500 Message-Id: <20240610011226.4050-29-semen.protsenko@linaro.org> X-Mailer: git-send-email 2.39.2 In-Reply-To: <20240610011226.4050-1-semen.protsenko@linaro.org> References: <20240610011226.4050-1-semen.protsenko@linaro.org> MIME-Version: 1.0 X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.39 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.103.8 at phobos.denx.de X-Virus-Status: Clean Instead of using non-standard "bus_hz" dts property, read common "clock-frequency" property used in upstream Linux kernel. It's safe to do so, as "clock-frequency" property was already added to corresponding nodes in all affected Exynos device tree files. No functional change. Signed-off-by: Sam Protsenko --- drivers/mmc/exynos_dw_mmc.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/mmc/exynos_dw_mmc.c b/drivers/mmc/exynos_dw_mmc.c index 01e6bbb123f1..5ecee403c416 100644 --- a/drivers/mmc/exynos_dw_mmc.c +++ b/drivers/mmc/exynos_dw_mmc.c @@ -307,7 +307,7 @@ static int exynos_dwmmc_of_to_plat(struct udevice *dev) } host->fifo_depth = dev_read_u32_default(dev, "fifo-depth", 0); - host->bus_hz = dev_read_u32_default(dev, "bus_hz", 0); + host->bus_hz = dev_read_u32_default(dev, "clock-frequency", 0); return 0; } From patchwork Mon Jun 10 01:12:15 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sam Protsenko X-Patchwork-Id: 802960 Delivered-To: patch@linaro.org Received: by 2002:adf:f147:0:b0:35b:5a80:51b4 with SMTP id y7csp1735239wro; Sun, 9 Jun 2024 18:17:31 -0700 (PDT) X-Forwarded-Encrypted: i=2; AJvYcCUdOA89KWFU6dEKl9YWreD6R8fpIo409fb5A5p+nkpRoShb3aRtCh0KLnSja2+Dk8N9P1pqeMKJPWGGd7XKqFvC X-Google-Smtp-Source: AGHT+IGn6qzrT/OjLGFsuFhf9iNySWX6fz+n5Wnmfw+VfyW/fYOwIxQlAq45ja2XKss5pYpnGT/E X-Received: by 2002:a17:906:4090:b0:a6e:c5c0:ba42 with SMTP id a640c23a62f3a-a6ec5c0bb34mr477189266b.30.1717982251494; Sun, 09 Jun 2024 18:17:31 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1717982251; cv=none; d=google.com; s=arc-20160816; b=ladoaJqmmNFiWwkF+FbMlgvnAfKSm9BEzNvUI8EdUIvDbK5td71l+F94YmzRs8DLsq zeFfmT1rWzKlkjxVk+ExJh/OwGV3XIjRCqIo3msbQu4qAYpQbSrP7izr9OcGmLTjId39 JnKdJTAFGUzZKuysGdKHRIkK+NW+9x0+zwd6IA7jkUriZaRKA0rl+oo1c4TfXsqgQQ4F yoX+eXNOpVs8d4v74cxwhM50irm3kBA5DIoTMYfsjLbLzCibT5AYiZHmcGx9M+zlbxe3 Qn1vPN1ExSF+rggaLtqjjWoU+oyY5qQs8NilxZBg8zObjxmrRdKapYvMX3MJf/KxrJYf QQmA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:cc:to :from:dkim-signature; bh=wD3p8epdQ9qwZEXccRxToczcETxHdDyW+jAApzc0NXQ=; fh=Wvz3Gji4wQIfrE+0/0ayeuFm/mj6rLZidOWi3lTpI5s=; b=k6etQW9a/LyEex0J3EHws4SKjWv8lW8w7RMr+AOEt6Yo8HTZkHZ7Mk/MmgylW9l7QM C889c0yGwPGMT2YCwx6FPYObYpbFqqYuAPq4vyyTcJ3MEeikZIu1GO9U0FRoMBywDwXC dXPDvi0wcq8uQL8U0i4NxxHeBoZzdRVa+LBnlLzZ8hj09o0ShAOef8OyMGCUo0kd2X/Y OHl96loc4QXCWfR+hbuutG8bgZqQ5bLYCIMAuXDHObxqNshdzhIY/jNg9IpZ01FpNMFt AM9SZdRHTetGeAmbl0lEDtbUa1xr+oSXJpP9etXFiMmwpbh2peRVwyh+MSZbuK7YnMta g1Og==; dara=google.com ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=xOje9SfQ; spf=pass (google.com: domain of u-boot-bounces@lists.denx.de designates 85.214.62.61 as permitted sender) smtp.mailfrom=u-boot-bounces@lists.denx.de; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from phobos.denx.de (phobos.denx.de. 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To avoid cluttering the scope of struct dwmci_host, move quirks field into Exynos driver's chip data, where it can be statically defined. No functional change. Signed-off-by: Sam Protsenko --- Changes in v2: - Replaced CONFIG_IS_ENABLED() with #ifdef drivers/mmc/exynos_dw_mmc.c | 13 ++++++++----- include/dwmmc.h | 5 ----- 2 files changed, 8 insertions(+), 10 deletions(-) diff --git a/drivers/mmc/exynos_dw_mmc.c b/drivers/mmc/exynos_dw_mmc.c index 5ecee403c416..69ba19e9edca 100644 --- a/drivers/mmc/exynos_dw_mmc.c +++ b/drivers/mmc/exynos_dw_mmc.c @@ -26,6 +26,9 @@ #define EXYNOS4412_FIXED_CIU_CLK_DIV 4 +/* Quirks */ +#define DWMCI_QUIRK_DISABLE_SMU BIT(0) + #ifdef CONFIG_DM_MMC #include DECLARE_GLOBAL_DATA_PTR; @@ -40,6 +43,7 @@ struct exynos_mmc_plat { struct exynos_dwmmc_variant { u32 clksel; /* CLKSEL register offset */ u8 div; /* (optional) fixed clock divider value: 0..7 */ + u32 quirks; /* quirk flags - see DWMCI_QUIRK_... */ }; /* Exynos implmentation specific drver private data */ @@ -174,7 +178,7 @@ static void exynos_dwmci_board_init(struct dwmci_host *host) { struct dwmci_exynos_priv_data *priv = exynos_dwmmc_get_priv(host); - if (host->quirks & DWMCI_QUIRK_DISABLE_SMU) { + if (priv->chip->quirks & DWMCI_QUIRK_DISABLE_SMU) { dwmci_writel(host, EMMCP_MPSBEGIN0, 0); dwmci_writel(host, EMMCP_SEND0, 0); dwmci_writel(host, EMMCP_CTRL0, @@ -206,11 +210,7 @@ static int exynos_dwmci_core_init(struct dwmci_host *host) } host->name = "EXYNOS DWMMC"; -#ifdef CONFIG_EXYNOS5420 - host->quirks = DWMCI_QUIRK_DISABLE_SMU; -#endif host->board_init = exynos_dwmci_board_init; - host->caps = MMC_MODE_DDR_52MHz; host->clksel = exynos_dwmci_clksel; host->get_mmc_clk = exynos_dwmci_get_clk; @@ -353,6 +353,9 @@ static const struct exynos_dwmmc_variant exynos4_drv_data = { static const struct exynos_dwmmc_variant exynos5_drv_data = { .clksel = DWMCI_CLKSEL, +#ifdef CONFIG_EXYNOS5420 + .quirks = DWMCI_QUIRK_DISABLE_SMU, +#endif }; static const struct udevice_id exynos_dwmmc_ids[] = { diff --git a/include/dwmmc.h b/include/dwmmc.h index 8c2500da9efe..6edb9e1a59c5 100644 --- a/include/dwmmc.h +++ b/include/dwmmc.h @@ -149,9 +149,6 @@ #define DWMCI_IDINTEN_TI BIT(0) #define DWMCI_IDINTEN_MASK (DWMCI_IDINTEN_TI | DWMCI_IDINTEN_RI) -/* Quirks */ -#define DWMCI_QUIRK_DISABLE_SMU BIT(0) - /** * struct dwmci_idmac_regs - Offsets of IDMAC registers * @@ -180,7 +177,6 @@ struct dwmci_idmac_regs { * * @name: Device name * @ioaddr: Base I/O address of controller - * @quirks: Quick flags - see DWMCI_QUIRK_... * @caps: Capabilities - see MMC_MODE_... * @clock: Current clock frequency (after internal divider), Hz * @bus_hz: Bus speed in Hz, if @get_mmc_clk() is NULL @@ -200,7 +196,6 @@ struct dwmci_idmac_regs { struct dwmci_host { const char *name; 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Read that value from dts and use it. If it's not available, use SDR timing values instead. This change is following upstream Linux kernel implementation. Signed-off-by: Sam Protsenko --- drivers/mmc/exynos_dw_mmc.c | 20 +++++++++++++++++++- 1 file changed, 19 insertions(+), 1 deletion(-) diff --git a/drivers/mmc/exynos_dw_mmc.c b/drivers/mmc/exynos_dw_mmc.c index 69ba19e9edca..ef03eac5657b 100644 --- a/drivers/mmc/exynos_dw_mmc.c +++ b/drivers/mmc/exynos_dw_mmc.c @@ -53,6 +53,7 @@ struct dwmci_exynos_priv_data { #endif struct clk clk; u32 sdr_timing; + u32 ddr_timing; const struct exynos_dwmmc_variant *chip; }; @@ -128,8 +129,14 @@ static int exynos_dwmmc_set_sclk(struct dwmci_host *host, unsigned long rate) static int exynos_dwmci_clksel(struct dwmci_host *host) { struct dwmci_exynos_priv_data *priv = exynos_dwmmc_get_priv(host); + u32 timing; - dwmci_writel(host, priv->chip->clksel, priv->sdr_timing); + if (host->mmc->selected_mode == MMC_DDR_52) + timing = priv->ddr_timing; + else + timing = priv->sdr_timing; + + dwmci_writel(host, priv->chip->clksel, timing); return 0; } @@ -306,6 +313,17 @@ static int exynos_dwmmc_of_to_plat(struct udevice *dev) priv->sdr_timing = DWMMC_MMC2_SDR_TIMING_VAL; } + err = dev_read_u32_array(dev, "samsung,dw-mshc-ddr-timing", timing, 2); + if (err) { + debug("DWMMC%d: Can't get ddr-timings, using sdr-timings\n", + host->dev_index); + priv->ddr_timing = priv->sdr_timing; + } else { + priv->ddr_timing = DWMCI_SET_SAMPLE_CLK(timing[0]) | + DWMCI_SET_DRV_CLK(timing[1]) | + DWMCI_SET_DIV_RATIO(div); + } + host->fifo_depth = dev_read_u32_default(dev, "fifo-depth", 0); host->bus_hz = dev_read_u32_default(dev, "clock-frequency", 0); From patchwork Mon Jun 10 01:12:17 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sam Protsenko X-Patchwork-Id: 802962 Delivered-To: patch@linaro.org Received: by 2002:adf:f147:0:b0:35b:5a80:51b4 with SMTP id y7csp1735324wro; Sun, 9 Jun 2024 18:17:51 -0700 (PDT) X-Forwarded-Encrypted: i=2; AJvYcCVX5EWRSU//VDVUn3X1rcrzy23b6M8Evl1j9qxHs0qvIy6PmejugPiIoMpD4idLw2jrfHrd8JfvD0aJB1oJiDxe X-Google-Smtp-Source: AGHT+IEsoeWwkXIB910Dh+aCrTYt/V+HyaINDUaAvUo1T2E8D8gxV5dYcFuuykYoQGKQrw7Da/1U X-Received: by 2002:a17:906:4356:b0:a6f:23e5:c112 with SMTP id a640c23a62f3a-a6f23e5c1b9mr31736766b.43.1717982271388; Sun, 09 Jun 2024 18:17:51 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1717982271; cv=none; d=google.com; s=arc-20160816; b=L9U+BcCP6Ro/0KDTew0ZG1B5M5J2mnmLI4wvM9ZH/YSR79dWKOKrMn2/k8V3ZpcPbF KG1kLnOuHPqg50ORiMP4ZY4UyK9UdElrqmFZ88fzHppPwBDDd4HKNigcrXszQlGK2eea gYzF5SKXnMuTGwY5pwvt2gRXVEYoUDHrrCE3sPoZG7AgMnr21VS0pyRvZ/+u7Ff2K99u lgrHk9xt3Jy4Ecp3OY3K7E8yIUFlMtSfZyz/Q+CA9yJ9mgayvy19dqXI74tXaheE9rS/ PJqPBz2+J9gbzuGsdvan6G19LzE2mM8DO8Fl647GGCneMu1ho/b/6R5Az0XIwOsw48NI cXDQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:cc:to :from:dkim-signature; bh=vkBYLDMNy9wxXgWOrWauPEIUoZP7Gr0vIfWYR8w1fHA=; fh=LegX0a01BsGwNWQ56fVrgyC/S4fjKVJg2TniGeWlXyo=; b=DAzE9hAtED5qvJ07XUoFtZY+65MVwPwdSqdsqj+XOn+8LVzytvV2q7ibU3k6BRuv+v 0EmnNp4Xon6OlaswlM32XzMVp8AIc62Ae43t9JLkkQeEq7hEP7NjX8a38S4JBAf833gF CGaz4ns5IeHP/OnmBcjAGguoSPM2WvlEOmjRceESqLCNgxd2JORD+zO7wy+CpwoW23Mp osh15CReNlXwCGA71PCTyOoG24YDAd59POA37VMnmldl1BFaSmWaoQoJ9W9SWq4tl3wU E4O87RpIHoe6/8WnetTTOsCOMS4NenH4cmm8i8D3It6jz8rt21npJT0HnCbdR0Dfn9tJ /89w==; dara=google.com ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=PsnLx8db; spf=pass (google.com: domain of u-boot-bounces@lists.denx.de designates 85.214.62.61 as permitted sender) smtp.mailfrom=u-boot-bounces@lists.denx.de; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from phobos.denx.de (phobos.denx.de. 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But dw_mmc core is actually trying to change CIU clock rate dynamically, on init and in set_ios() callback, which it's requesting via host->get_mmc_clk() callback (the name is misleading: although it's called "get_mmc_clk()", it can actually request both get and set operations). Implement setting the requested rate for CIU clock in Exynos driver to achieve the correct dw_mmc core driver operation at all times. DDR mode requires the clock to be twice as fast (when 8 bit bus is used), so handle this too, to make DDR function properly. This change makes the eMMC throughput on E850-96 board twice as fast. That's because "clock-frequency" is set to 800 MHz in E850-96 device tree, but for DDR52 mode it should be 416 MHz (and TRM states it should be 400 MHz for DDR50/8bit mode). The dw_mmc core is requesting 52 MHz bus_hz for DDR52 mode, and DDR+8bit mode means it should be x2 fast, so: f_ciu = 2 * ciu_div * f_bus = 2 * 4 * 52e6 = 416 MHz, where f_ciu - freq of clock fed to DW MMC block from CMU (SDCLKIN), Hz f_bus - freq of clock fed to the card (CCLKIN), Hz ciu_div - value of internal divider (in DW MMC block). Another way to work that around would be overriding the "clock-frequency" property in corresponding dts. But setting the clock frequency dynamically as it's done here looks much neater. This implementation follows what's done in Linux kernel dw_mmc-exynos driver in .set_ios() callback for MMC_TIMING_MMC_DDR52 case. Signed-off-by: Sam Protsenko --- drivers/mmc/exynos_dw_mmc.c | 10 ++++++++++ 1 file changed, 10 insertions(+) diff --git a/drivers/mmc/exynos_dw_mmc.c b/drivers/mmc/exynos_dw_mmc.c index ef03eac5657b..5be0cb009e4e 100644 --- a/drivers/mmc/exynos_dw_mmc.c +++ b/drivers/mmc/exynos_dw_mmc.c @@ -170,7 +170,17 @@ unsigned int exynos_dwmci_get_clk(struct dwmci_host *host, uint freq) u8 clk_div; int err; + /* Should be double rate for DDR mode */ + if (host->mmc->selected_mode == MMC_DDR_52 && host->mmc->bus_width == 8) + freq *= 2; + clk_div = exynos_dwmmc_get_ciu_div(host); + err = exynos_dwmmc_set_sclk(host, freq * clk_div); + if (err) { + printf("DWMMC%d: failed to set clock rate (%d); " + "continue anyway\n", host->dev_index, err); + } + err = exynos_dwmmc_get_sclk(host, &sclk); if (err) { printf("DWMMC%d: failed to get clock rate (%d)\n", From patchwork Mon Jun 10 01:12:18 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sam Protsenko X-Patchwork-Id: 802963 Delivered-To: patch@linaro.org Received: by 2002:adf:f147:0:b0:35b:5a80:51b4 with SMTP id y7csp1735359wro; Sun, 9 Jun 2024 18:18:00 -0700 (PDT) X-Forwarded-Encrypted: i=2; AJvYcCVgB4eeC4JOl6RPDxtp2iR8EPn0mcOdUFJvLdu0c4xh/kb9A4OpzJnIQ/R+8pPcTgRdmhR/TqFcUQ4raD6oOOee X-Google-Smtp-Source: AGHT+IEauTN+DMXBfbzntaH2JuN8eSiulM2RRC2jdYEm/VCwzJ9BxuMWC061ofGTt6G+o6sA216y X-Received: by 2002:a50:d591:0:b0:57c:68c5:4d6 with SMTP id 4fb4d7f45d1cf-57c68c5050fmr3343763a12.3.1717982280119; Sun, 09 Jun 2024 18:18:00 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1717982280; cv=none; d=google.com; s=arc-20160816; b=wFjLK4ixQsV7+6m7Mx4na0pvJkxkXAVH/Nkq37PQm3DN1Fo5crJRRwts7Ol/kCp1Q6 Eq1GpzWRJh2pofkUB5xZBAEUThR6CBGqldhuO9VwfYaS4Q9b3TJOb/+E7aK50eysnADl jdRMykyFDIX60MGUvnCTdbVUMCpGL1f24hl8ALxpYJSFXU9tY9iQDclMMxGkEKXLemjV aRJ5xqNWXaWLX+pceFNq31+LT9NwAuCbTDrkJlcJH3liM4vZPnLAQatAEe2vQ2g3xzyW LF3tOjCOwG5jGD0PoDkpPAWGKcTVYACStuLgit3+85Zilla9y+Ad49d4gx7o77Aj2urh VCgg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:cc:to :from:dkim-signature; bh=qSYVbYC4gQd29WxG1Wj2imLXR1RK9xSMuEmszO8QnpQ=; fh=6FCB5GFX0htte30a/EtdpoEUyC4axSO28/n2s0zsY4I=; b=a5EppN/DWpzzx2Px766rCRK9+IpqPIvhEuaUvYhhMQz7fJFcs3dLX/vK56TkNP3eeU YTOj+tNSPxmS/PfTOuyygCU5KDUv27SeVkn7zSozwKONHc7XagRub97qbUJC4zouMLuc nJs4mWelMLstZtR/nYOzQheQhC2lOowLU7qQx2MhOGAVMb92OpadUlwWlZgWbvNJfgaS E2AHbrWn340ky/ItOaN5z5R+aaxiSNejtgdb8uYmkQm/JrFjoyOUQ9hdpOxpRW+oPBx0 CQJ25KszKAQZ3ruSsZB9X3rdgZnCCM/pYGWCK69+U+WhV/Dr5wDYrE2PFa5wMbYYm813 y8Yw==; dara=google.com ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=K6exQkYr; spf=pass (google.com: domain of u-boot-bounces@lists.denx.de designates 2a01:238:438b:c500:173d:9f52:ddab:ee01 as permitted sender) smtp.mailfrom=u-boot-bounces@lists.denx.de; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from phobos.denx.de (phobos.denx.de. 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Sun, 09 Jun 2024 18:12:49 -0700 (PDT) From: Sam Protsenko To: Tom Rini , Minkyu Kang , Peng Fan , Jaehoon Chung , Simon Glass Cc: Quentin Schulz , Philipp Tomsich , Kever Yang , Eugeniy Paltsev , Peter Robinson , Jonas Karlman , Yang Xiwen , Ferass El Hafidi , Sean Anderson , u-boot@lists.denx.de, uboot-snps-arc@synopsys.com Subject: [PATCH v2 32/40] mmc: exynos_dw_mmc: Add support for ARM64 Exynos chips Date: Sun, 9 Jun 2024 20:12:18 -0500 Message-Id: <20240610011226.4050-33-semen.protsenko@linaro.org> X-Mailer: git-send-email 2.39.2 In-Reply-To: <20240610011226.4050-1-semen.protsenko@linaro.org> References: <20240610011226.4050-1-semen.protsenko@linaro.org> MIME-Version: 1.0 X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.39 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.103.8 at phobos.denx.de X-Virus-Status: Clean Add the compatible entry and corresponding chip data for Exynos7 compatible chips, which covers modern ARM64 based Exynos chips. They have some differences w.r.t. old ARM32 Exynos chips: - CLKSEL register offset is different - 64-bit IDMAC descriptor and 64-bit IDMAC registers are used (implemented in dw_mmc core driver) In terms of the driver implementation, the CIU clock is obtained via CCF framework (as opposed to ad-hoc clock driver implementation for ARM32 chips). Signed-off-by: Sam Protsenko --- arch/arm/mach-exynos/include/mach/dwmmc.h | 1 + drivers/mmc/exynos_dw_mmc.c | 8 ++++++++ 2 files changed, 9 insertions(+) diff --git a/arch/arm/mach-exynos/include/mach/dwmmc.h b/arch/arm/mach-exynos/include/mach/dwmmc.h index 811e9a04c6e3..7cb71be0d9fd 100644 --- a/arch/arm/mach-exynos/include/mach/dwmmc.h +++ b/arch/arm/mach-exynos/include/mach/dwmmc.h @@ -8,6 +8,7 @@ #define __ASM_ARM_ARCH_DWMMC_H #define DWMCI_CLKSEL 0x09C +#define DWMCI_CLKSEL64 0x0a8 #define DWMCI_SET_SAMPLE_CLK(x) (x) #define DWMCI_SET_DRV_CLK(x) ((x) << 16) #define DWMCI_SET_DIV_RATIO(x) ((x) << 24) diff --git a/drivers/mmc/exynos_dw_mmc.c b/drivers/mmc/exynos_dw_mmc.c index 5be0cb009e4e..2c8364ab8d40 100644 --- a/drivers/mmc/exynos_dw_mmc.c +++ b/drivers/mmc/exynos_dw_mmc.c @@ -386,6 +386,11 @@ static const struct exynos_dwmmc_variant exynos5_drv_data = { #endif }; +static const struct exynos_dwmmc_variant exynos7_smu_drv_data = { + .clksel = DWMCI_CLKSEL64, + .quirks = DWMCI_QUIRK_DISABLE_SMU, +}; + static const struct udevice_id exynos_dwmmc_ids[] = { { .compatible = "samsung,exynos4412-dw-mshc", @@ -393,6 +398,9 @@ static const struct udevice_id exynos_dwmmc_ids[] = { }, { .compatible = "samsung,exynos-dwmmc", .data = (ulong)&exynos5_drv_data, + }, { + .compatible = "samsung,exynos7-dw-mshc-smu", + .data = (ulong)&exynos7_smu_drv_data, }, { } }; From patchwork Mon Jun 10 01:12:19 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sam Protsenko X-Patchwork-Id: 802964 Delivered-To: patch@linaro.org Received: by 2002:adf:f147:0:b0:35b:5a80:51b4 with SMTP id y7csp1735397wro; Sun, 9 Jun 2024 18:18:10 -0700 (PDT) X-Forwarded-Encrypted: i=2; AJvYcCUA0cdoiiGDUWoqgzbxdA/6Wp+ym74fv5cFo0RyYlOnZi+dLLSHE6R5RPFEYqm0ULndb3EgUzDIp1Yl1SJ7NLfO X-Google-Smtp-Source: AGHT+IHhFdB6HSex2kqLhhe6q889e/Rdj9bg/iQuhl5WsrbRmSzRSMHKgH4ieldhKQT6YShpQ65I X-Received: by 2002:a17:906:2e82:b0:a68:379d:d623 with SMTP id a640c23a62f3a-a6cd7a84203mr467329266b.36.1717982289870; Sun, 09 Jun 2024 18:18:09 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1717982289; cv=none; d=google.com; s=arc-20160816; b=dFrULvzMySiCIylu21oZjJCa+lMDkfmA2h+PgQ1T3hmyaL8EPOqlodwGH7ovs0tL0Z VGViCELeIxcSVGtoExPPwvQh+XxuLTE7wrpCH+ISVSBtlPG29Mm2QVlwB06qR6jZoB4X +K25M/aHOUs9W8zqxwE5ya4sCfFe05uxLS5aQpRgoSKwqXsR0r0BfP0AGPdaCdN6oRlU MyN6WIhshOwZWO91U09CaKo8/jdfV59qqojOUZqxtWOfY+XiCjCyj5UjYXUM4+HgBIMp VhXhL0d/+FaZ/Xl+/dxrhoxwLOXP1RTKfSQIPNk5mw5G9tZPWy+EOq6Bh8ou001ZiwJF q4Ow== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:cc:to :from:dkim-signature; bh=LzYITZL8crUF+H2su7EpoQ+00fKcpsKhtq/C+HCl19s=; fh=ivgzccsGTIyOptUAa1jPnANr3XBzgZ7nc1454IM5mYk=; b=0hOkZwOkpxxTXx6lbHLU1Af/i4F7he2/2hGtl1NZ/hPipP6ZKB+k5IkOzpmG9REsHB dTfHHkquETvWW/F7QjFxiMVe4gNeSkpJeWEaQEtFsDzhd++y6K0DemkaZnQnHjKy2Cln uDP6PCdscF2SqbUzrnJZZMyhQE8s+c7l8cfYxQkM17VK+yzFJUfvyVmjG/mlstkitQgH aEBSM57PjF2Gw01w/l4yW/f7epwo4l9cBZcbG7uJXiHST1ub2GC37pzZXhpJIpSSdLVl qOgacWgO+NQQvOpQlyp26dJzFJy7zagIvmg0TSLzUGN0NnD9bRbV8dgiEhhYBFSx8J9q G76w==; dara=google.com ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b="IzMkIkZ/"; spf=pass (google.com: domain of u-boot-bounces@lists.denx.de designates 2a01:238:438b:c500:173d:9f52:ddab:ee01 as permitted sender) smtp.mailfrom=u-boot-bounces@lists.denx.de; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from phobos.denx.de (phobos.denx.de. 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Sun, 09 Jun 2024 18:12:50 -0700 (PDT) From: Sam Protsenko To: Tom Rini , Minkyu Kang , Peng Fan , Jaehoon Chung , Simon Glass Cc: Quentin Schulz , Philipp Tomsich , Kever Yang , Eugeniy Paltsev , Peter Robinson , Jonas Karlman , Yang Xiwen , Ferass El Hafidi , Sean Anderson , u-boot@lists.denx.de, uboot-snps-arc@synopsys.com Subject: [PATCH v2 33/40] mmc: exynos_dw_mmc: Remove common.h Date: Sun, 9 Jun 2024 20:12:19 -0500 Message-Id: <20240610011226.4050-34-semen.protsenko@linaro.org> X-Mailer: git-send-email 2.39.2 In-Reply-To: <20240610011226.4050-1-semen.protsenko@linaro.org> References: <20240610011226.4050-1-semen.protsenko@linaro.org> MIME-Version: 1.0 X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.39 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.103.8 at phobos.denx.de X-Virus-Status: Clean common.h header is marked for removal treewide and shouldn't be used. Remove it from Exynos DW MMC driver. No functional change. Signed-off-by: Sam Protsenko --- drivers/mmc/exynos_dw_mmc.c | 1 - 1 file changed, 1 deletion(-) diff --git a/drivers/mmc/exynos_dw_mmc.c b/drivers/mmc/exynos_dw_mmc.c index 2c8364ab8d40..29241edf7915 100644 --- a/drivers/mmc/exynos_dw_mmc.c +++ b/drivers/mmc/exynos_dw_mmc.c @@ -5,7 +5,6 @@ */ #include -#include #include #include #include From patchwork Mon Jun 10 01:12:20 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sam Protsenko X-Patchwork-Id: 802965 Delivered-To: patch@linaro.org Received: by 2002:adf:f147:0:b0:35b:5a80:51b4 with SMTP id y7csp1735442wro; Sun, 9 Jun 2024 18:18:20 -0700 (PDT) X-Forwarded-Encrypted: i=2; AJvYcCWm7cf+2b9jGe5kTltYmViVe1Gv7AS0W8+1nLk9RT35YtVXxG5CXOmODW1IaWJKWVqFYPMFTAxyF/rjWUVHlKef X-Google-Smtp-Source: AGHT+IEv4j8FKKi78WMZshIy7fuKIzR+RjSHiiN8cz5Rah6MYfXHMbgV47iQK3m57TI6fUODX0wH X-Received: by 2002:a17:906:6a0a:b0:a6f:1d19:c0b1 with SMTP id a640c23a62f3a-a6f1d19c496mr132301866b.18.1717982300061; Sun, 09 Jun 2024 18:18:20 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1717982300; cv=none; d=google.com; s=arc-20160816; b=D48Nm8szrG5GCa215ZU/jsFCq0YF+So7RzBIj5MAD8SpUJvHou77yGS1kThZD1AjO9 JFYfnS3daICaAaE/ZZ9yofLK7PxfzuPjkhPhNv7DBec9VKWg/8lwKsn5MqhMzI+mugdZ ZMLDLLuf38AYpCg9vL6YO0YL6H8sZu7g2HJszNmO5MxhK5czTXZT2Quo1um8VIi9de3W Ogb3nPOEmXq9fQXj+eoixhZI97jyjnjAX/UIW9+8eNmLQ4oO1cs+klzRi2OUDYG5Tg1e lOrThq75K6SDdz55pCUJSJZea0KLKlWofAw+QXpEy2sthfozQ6A8UsQsyuY0JvoPpR7W Aq8A== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:cc:to :from:dkim-signature; bh=2YlLT6dmvIZXH7j0HvrdXolO7Eyi/HU090a4rLJVlIU=; fh=LKFfG3gGVT3Fqi6D0NZ2EGCJTvSHrPO9SKgSDgRAKEA=; b=DWuRMAJaNzoZlmaVe+xsvK4lTVEvvDv88FHR9gxKN5MojraLMUNrdS4rN5Ou1FuB4M sj17xFYZmnszziv80W+gl/29t+hy+4yVMwc+/vJnCZ0mZ1LZBdQASUwuc1dl2gXPqXC5 3OVtlA3byIyDwfYusM7heA11XCOAMNpwiEF4j4VMvdC3ab/udQhz47jG94j+5MaDEV7i 9RddYldcfXWpPQpjcrZHEie3wMqB4L4pNK0swj53y93YbtHzsAEhszmOTrBWvnED5Son 5DDu7hm+XN2subBZktYgd4gw4YejNYl1KTpQ0KCG/NGcFC2JNLikY3xe77+0tnnH+aP6 Njdg==; dara=google.com ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=kLPA4Wsv; spf=pass (google.com: domain of u-boot-bounces@lists.denx.de designates 2a01:238:438b:c500:173d:9f52:ddab:ee01 as permitted sender) smtp.mailfrom=u-boot-bounces@lists.denx.de; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from phobos.denx.de (phobos.denx.de. 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Sun, 09 Jun 2024 18:12:51 -0700 (PDT) From: Sam Protsenko To: Tom Rini , Minkyu Kang , Peng Fan , Jaehoon Chung , Simon Glass Cc: Quentin Schulz , Philipp Tomsich , Kever Yang , Eugeniy Paltsev , Peter Robinson , Jonas Karlman , Yang Xiwen , Ferass El Hafidi , Sean Anderson , u-boot@lists.denx.de, uboot-snps-arc@synopsys.com Subject: [PATCH v2 34/40] mmc: exynos_dw_mmc: Pull all init code into probe function Date: Sun, 9 Jun 2024 20:12:20 -0500 Message-Id: <20240610011226.4050-35-semen.protsenko@linaro.org> X-Mailer: git-send-email 2.39.2 In-Reply-To: <20240610011226.4050-1-semen.protsenko@linaro.org> References: <20240610011226.4050-1-semen.protsenko@linaro.org> MIME-Version: 1.0 X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.39 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.103.8 at phobos.denx.de X-Virus-Status: Clean There is no logical sense to split the initialization code between multiple functions. Pull both do_dwmci_init() and exynos_dwmci_core_init() into exynos_dwmmc_probe() to make the code more simple and obvious. No functional change. Signed-off-by: Sam Protsenko --- Changes in v2: - Replaced CONFIG_IS_ENABLED() with #ifdef drivers/mmc/exynos_dw_mmc.c | 86 +++++++++++++++---------------------- 1 file changed, 35 insertions(+), 51 deletions(-) diff --git a/drivers/mmc/exynos_dw_mmc.c b/drivers/mmc/exynos_dw_mmc.c index 29241edf7915..41fb32c579ef 100644 --- a/drivers/mmc/exynos_dw_mmc.c +++ b/drivers/mmc/exynos_dw_mmc.c @@ -209,55 +209,6 @@ static void exynos_dwmci_board_init(struct dwmci_host *host) exynos_dwmci_clksel(host); } -static int exynos_dwmci_core_init(struct dwmci_host *host) -{ - unsigned long freq; - int err; - - if (host->bus_hz) - freq = host->bus_hz; - else - freq = DWMMC_MAX_FREQ; - - err = exynos_dwmmc_set_sclk(host, freq); - if (err) { - printf("DWMMC%d: failed to set clock rate on probe (%d); " - "continue anyway\n", host->dev_index, err); - } - - host->name = "EXYNOS DWMMC"; - host->board_init = exynos_dwmci_board_init; - host->caps = MMC_MODE_DDR_52MHz; - host->clksel = exynos_dwmci_clksel; - host->get_mmc_clk = exynos_dwmci_get_clk; - -#ifndef CONFIG_DM_MMC - /* Add the mmc channel to be registered with mmc core */ - if (add_dwmci(host, DWMMC_MAX_FREQ, DWMMC_MIN_FREQ)) { - printf("DWMMC%d registration failed\n", host->dev_index); - return -1; - } -#endif - - return 0; -} - -static int do_dwmci_init(struct dwmci_host *host) -{ -#ifdef CONFIG_CPU_V7A - int flag, err; - - flag = host->buswidth == 8 ? PINMUX_FLAG_8BIT_MODE : PINMUX_FLAG_NONE; - err = exynos_pinmux_config(host->dev_id, flag); - if (err) { - printf("DWMMC%d not configure\n", host->dev_index); - return err; - } -#endif - - return exynos_dwmci_core_init(host); -} - #ifdef CONFIG_DM_MMC static int exynos_dwmmc_of_to_plat(struct udevice *dev) { @@ -345,6 +296,7 @@ static int exynos_dwmmc_probe(struct udevice *dev) struct mmc_uclass_priv *upriv = dev_get_uclass_priv(dev); struct dwmci_exynos_priv_data *priv = dev_get_priv(dev); struct dwmci_host *host = &priv->host; + unsigned long freq; int err; #ifndef CONFIG_CPU_V7A @@ -353,9 +305,41 @@ static int exynos_dwmmc_probe(struct udevice *dev) return err; #endif - err = do_dwmci_init(host); - if (err) +#ifdef CONFIG_CPU_V7A + int flag; + + flag = host->buswidth == 8 ? PINMUX_FLAG_8BIT_MODE : PINMUX_FLAG_NONE; + err = exynos_pinmux_config(host->dev_id, flag); + if (err) { + printf("DWMMC%d not configure\n", host->dev_index); return err; + } +#endif + + if (host->bus_hz) + freq = host->bus_hz; + else + freq = DWMMC_MAX_FREQ; + + err = exynos_dwmmc_set_sclk(host, freq); + if (err) { + printf("DWMMC%d: failed to set clock rate on probe (%d); " + "continue anyway\n", host->dev_index, err); + } + + host->name = "EXYNOS DWMMC"; + host->board_init = exynos_dwmci_board_init; + host->caps = MMC_MODE_DDR_52MHz; + host->clksel = exynos_dwmci_clksel; + host->get_mmc_clk = exynos_dwmci_get_clk; + +#ifndef CONFIG_DM_MMC + /* Add the mmc channel to be registered with mmc core */ + if (add_dwmci(host, DWMMC_MAX_FREQ, DWMMC_MIN_FREQ)) { + printf("DWMMC%d registration failed\n", host->dev_index); + return -1; + } +#endif dwmci_setup_cfg(&plat->cfg, host, DWMMC_MAX_FREQ, DWMMC_MIN_FREQ); host->mmc = &plat->mmc; From patchwork Mon Jun 10 01:12:21 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sam Protsenko X-Patchwork-Id: 802966 Delivered-To: patch@linaro.org Received: by 2002:adf:f147:0:b0:35b:5a80:51b4 with SMTP id y7csp1735477wro; Sun, 9 Jun 2024 18:18:30 -0700 (PDT) X-Forwarded-Encrypted: i=2; AJvYcCUETr9ir+b0dmI5lAvtxhB0lzcBAZhU5xoRj5X8VCerMr5K5c+lxhHF3Zynjh43IQWKYrEaU77JeTNdY+gvfq63 X-Google-Smtp-Source: AGHT+IFDVYlpnUvMfjhls/6ICuodvgeDLxOtgUXJMxed2+lv8QtrcUqzCIzmibtwkVj6aRLklBS1 X-Received: by 2002:a50:ccc8:0:b0:57c:7413:a6e0 with SMTP id 4fb4d7f45d1cf-57c7413a7f4mr1981933a12.2.1717982309958; Sun, 09 Jun 2024 18:18:29 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1717982309; cv=none; d=google.com; s=arc-20160816; b=aGp5kWy3Od2GejH4ke5p0F771U07RDbamWwLKFFYr/wHHBrLW2YoHVPIm2r5r/jGQY +vyy9C3vRs/ceX4zymQuCPqc8VzHr0zyfuhYF1wgwbL5/lPnLKBb0yj5eKS1UDIppmI1 BgVEwPJp+G8IhdjVacVZlO7+XCWL11fKz1lqW3bw+cJzz8b81ajAzmzhAEwtWINNEBFI OWaJ4NHDIoODuxMIC7WsqCHDa6y3D5v9xYWGFaHCw5xly46RlAzlQZh8FutfZ9duokkJ GET7PoqsZOClEZaf86dE687v9r6ilGynaltfT8R+nOTXT9h2MuyD/KIdbkf/3RmHwbvJ pmNw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:cc:to :from:dkim-signature; bh=I61V32c8HMJSoXG/mwzY2zs9W+T36XeIqY6DmpufeGw=; fh=wMMH+/TT9zXjv52LLidicK+n0NZXKF8nIdCsIDqpChU=; b=WFlltiQmk5/OcaHFVK9dYLetaxdcL8YBLXCb1OLXsOawFCp60wVge2a0fi335gzUXN uIgZJMAllqVq/BQ2wnryUQ+3wsHpv/idZ2y3fTURuVNDo7g3xZzWLIcgGPcFidiiMYvl qQBAE2GUxT/bOhPPtmrXIxdhzenNkJFxHP4LXCEAdnlcfORMpOykAgrEQ6SgN5T+ltu3 ELcx7ggp2fg6BoDKKjHGmXUZI6gZgENaqNJs131Ho88TuKRGNFajVhpd6eTclW4jkagV cBnRBGvplrl4ScK3oEFYRE29akTXfWA/2vZVd5mcNyy1ypSTcIwEOZhm2uAzbSYMb55d Mt+w==; dara=google.com ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=LIXHxZY+; spf=pass (google.com: domain of u-boot-bounces@lists.denx.de designates 85.214.62.61 as permitted sender) smtp.mailfrom=u-boot-bounces@lists.denx.de; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from phobos.denx.de (phobos.denx.de. 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Fix it by calling dwmci_setup_cfg() only in DM cases, when add_dwmci() wasn't called. Also, this assignment: host->mmc = &plat->mmc; is wrong in non-DM case when add_dwmci() was called, as it's creating mmc object internally. Fix that by pulling that assignment into DM case, when add_dwmci() isn't called. While at it, add also this missing assignment: host->mmc->dev = dev; Fixes: 3537ee879e04 ("mmc: exynos_dw_mmc: support the Driver mode for Exynos") Signed-off-by: Sam Protsenko --- Changes in v2: - Replaced CONFIG_IS_ENABLED() with #ifdef drivers/mmc/exynos_dw_mmc.c | 16 +++++++++------- 1 file changed, 9 insertions(+), 7 deletions(-) diff --git a/drivers/mmc/exynos_dw_mmc.c b/drivers/mmc/exynos_dw_mmc.c index 41fb32c579ef..43111b749a6b 100644 --- a/drivers/mmc/exynos_dw_mmc.c +++ b/drivers/mmc/exynos_dw_mmc.c @@ -333,19 +333,21 @@ static int exynos_dwmmc_probe(struct udevice *dev) host->clksel = exynos_dwmci_clksel; host->get_mmc_clk = exynos_dwmci_get_clk; -#ifndef CONFIG_DM_MMC - /* Add the mmc channel to be registered with mmc core */ - if (add_dwmci(host, DWMMC_MAX_FREQ, DWMMC_MIN_FREQ)) { +#ifdef CONFIG_BLK + dwmci_setup_cfg(&plat->cfg, host, DWMMC_MAX_FREQ, DWMMC_MIN_FREQ); + host->mmc = &plat->mmc; +#else + err = add_dwmci(host, DWMMC_MAX_FREQ, DWMMC_MIN_FREQ); + if (err) { printf("DWMMC%d registration failed\n", host->dev_index); - return -1; + return err; } #endif - dwmci_setup_cfg(&plat->cfg, host, DWMMC_MAX_FREQ, DWMMC_MIN_FREQ); - host->mmc = &plat->mmc; host->mmc->priv = &priv->host; - host->priv = dev; upriv->mmc = host->mmc; + host->mmc->dev = dev; + host->priv = dev; return dwmci_probe(dev); } From patchwork Mon Jun 10 01:12:22 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sam Protsenko X-Patchwork-Id: 802968 Delivered-To: patch@linaro.org Received: by 2002:adf:f147:0:b0:35b:5a80:51b4 with SMTP id y7csp1735547wro; Sun, 9 Jun 2024 18:18:49 -0700 (PDT) X-Forwarded-Encrypted: i=2; AJvYcCUAO610Dvz6INZLY9+eklYfpDxI+U69T0qhxVeu9hZJmeY4gSWof82c6sbOxOPTJQJuH7S8fpFnbARcjtHVU8qg X-Google-Smtp-Source: AGHT+IHCpTHcVs+/AsizWTwnJpmw63XEhn18FOAepldsESH2f9kU+MF2dFt858XH927hWvahCKqN X-Received: by 2002:a50:a6c3:0:b0:57c:5764:15f1 with SMTP id 4fb4d7f45d1cf-57c576416c0mr4331355a12.29.1717982328912; Sun, 09 Jun 2024 18:18:48 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1717982328; cv=none; d=google.com; s=arc-20160816; b=gPA559DEdztCnUxxsjuXhqzxh3rvL9UxKjDHCmaXs0zT3RF5Z/qNfluXZdcw2FqNqA ZMhGzCwuyZzcYTd5HJLpgpJOB+srthAXWDogN35yYqHXTAgPEQYmgVsisdMNbAmQGG9Q xb1tTZJHwetxDRmHokTzOC83td9h+TUx31YkbBxwkCXBLywzTB9fOU4LwLFBEL/ZZEPA 6MpK+2q/bPCp/0S4Q57V4ns4gds50OpINKzMqT0o8YdzcYfLgJBaQXaWSRO8MyzJUrGG Hn6aiMVWrjeDPBg+b1AU8d82LZ/wyindSxeLHnyXjwzC57aW/RkkQbmvxz24zP92TnEX rxCA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:cc:to :from:dkim-signature; bh=9fokpperR8k7BYwCKOrniKExo5qDtjR+37lQoDEVle0=; fh=+tSbOH6sGEmKQ3tu7mY1hyZYa9jZJYXFiocggBRxNt4=; b=ASuxAPUw1rzSWzuRz2Z6rWrIId7I5JoSGfPKGSTk6cStb3XX3l5QRZF7KuXJ91KoEF g3afyzd6AKOALMnMQevu6N2wie0/BrY2zkY+C03iS6dJUcmHY8V2WiA26kT1AvLuRQeb 5KP1P7CgD1unijJAx3oiZRHz7HJgRVSM1xtyK9SA2hzAnF79QgdUXOaDdE/NmkFXYmfq SKHOidxrGNDoCp8QK0Z0IL6ME82EpQPxlfCzEOu/WY/uNG9mAJKQhIWgS1nrRW90MquM WGrBkng57baeZ0tmADTDxEivjZM2GVBGdphE7u6jgKBDT4Z4Lz4aKlkHyIEvRzJC+r5i dRYQ==; dara=google.com ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=xs42g4Ks; spf=pass (google.com: domain of u-boot-bounces@lists.denx.de designates 85.214.62.61 as permitted sender) smtp.mailfrom=u-boot-bounces@lists.denx.de; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from phobos.denx.de (phobos.denx.de. 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This changes boot device name (and "mmc info" output) from "EXYNOS DWMMC" to something like "mmc@12100000". Signed-off-by: Sam Protsenko --- drivers/mmc/exynos_dw_mmc.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/mmc/exynos_dw_mmc.c b/drivers/mmc/exynos_dw_mmc.c index 43111b749a6b..a9e240fd91d6 100644 --- a/drivers/mmc/exynos_dw_mmc.c +++ b/drivers/mmc/exynos_dw_mmc.c @@ -327,7 +327,7 @@ static int exynos_dwmmc_probe(struct udevice *dev) "continue anyway\n", host->dev_index, err); } - host->name = "EXYNOS DWMMC"; + host->name = dev->name; host->board_init = exynos_dwmci_board_init; host->caps = MMC_MODE_DDR_52MHz; host->clksel = exynos_dwmci_clksel; From patchwork Mon Jun 10 01:12:23 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sam Protsenko X-Patchwork-Id: 802967 Delivered-To: patch@linaro.org Received: by 2002:adf:f147:0:b0:35b:5a80:51b4 with SMTP id y7csp1735506wro; Sun, 9 Jun 2024 18:18:39 -0700 (PDT) X-Forwarded-Encrypted: i=2; AJvYcCV+fTjXf2wk9ACsJaO6dbdKzajRTehmGitiUq1A6UpAKWDT7E5ko9TCyePYmeN8dhmetqScxZBg7FDdrLKL/1JK X-Google-Smtp-Source: AGHT+IFyS2h0EhGg3blbEKE/MWACixND9+JcW5yI4s4//gq5GFYFTwbBaYklXwxWCjkVyXsAGeze X-Received: by 2002:a2e:a9a8:0:b0:2d8:b2e:7bf3 with SMTP id 38308e7fff4ca-2eadcb761a5mr65517471fa.0.1717982319643; Sun, 09 Jun 2024 18:18:39 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1717982319; cv=none; d=google.com; s=arc-20160816; b=bHjMKLP20m0CsCOBUg157+aMXDbRBZ+X8SuyNxIqeIw1+Ui1MzIr+qw1pd8S2CxzY+ GVieiHGBVf+om1+xOk4vVcP4lIjtvCpi/82ZFGEC4Re+q0n78e7VASpdQdcwRhCUrlDn IoBY3yVBf5a0jKblOTeYG1bjaYytmcET1e/aNHpdBd2VvvK3QrBr/nCtfNUpFOWLyCew 5Ex9siGjbbAFIjCrzpT6M2raMZpSTBUykPhquFZ90/JYcMMFZBP5rZWzAaJ8EKfkxDFn Ghk2Wr7m0CjcZLolC1+C1tvdBqYP5toyzQxeQzjtsn1asftA/LzLM8zUUYzHyC0jdkYD 5lgg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:cc:to :from:dkim-signature; bh=MN7F2uuiONybFzuaLB9fZnd0Psq7QLyOdjeklqJqr6w=; fh=C8ZPudeYjEPb8KA3ikwsqia77jnQxonQt07d1IetVac=; b=O9e9Lny5lDvwFNCHyJLxjMj/83Fu5wHz4/H/hHOM+qgL6ao0EX1QwScrFS6x+S1PUH mxQCS0IIFGE2eMotzECAtzneRJvg8HS34Fcv2hfa8jfi9AJMHUh/feDZ+sFKTxRzoYiz zi5KJGyTFEQ38di8nyBRDRGvTSj1DRlwkTx9pU9wKhgpOqlHIyqM4HWPpWWfq1PY3vWi DnZT1VsI1EZHBf+Hhd52yv7GKwzOFEEdeAkE8wSeajL4cYHCpd29okjGNHaIvJEBsVLL vID2JvdiXd1gsQACuMOe2eQL9iqMNmorIqTWVKrditr6VAZnINebiFs69Rl4/5Xx9A6R sXsA==; dara=google.com ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=fv0Ez2z4; spf=pass (google.com: domain of u-boot-bounces@lists.denx.de designates 85.214.62.61 as permitted sender) smtp.mailfrom=u-boot-bounces@lists.denx.de; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from phobos.denx.de (phobos.denx.de. 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No functional change. Signed-off-by: Sam Protsenko --- arch/arm/mach-exynos/include/mach/dwmmc.h | 36 +++++++++++++---------- drivers/mmc/exynos_dw_mmc.c | 26 ++++++---------- 2 files changed, 29 insertions(+), 33 deletions(-) diff --git a/arch/arm/mach-exynos/include/mach/dwmmc.h b/arch/arm/mach-exynos/include/mach/dwmmc.h index 7cb71be0d9fd..75d84988b7d6 100644 --- a/arch/arm/mach-exynos/include/mach/dwmmc.h +++ b/arch/arm/mach-exynos/include/mach/dwmmc.h @@ -7,24 +7,28 @@ #ifndef __ASM_ARM_ARCH_DWMMC_H #define __ASM_ARM_ARCH_DWMMC_H -#define DWMCI_CLKSEL 0x09C -#define DWMCI_CLKSEL64 0x0a8 -#define DWMCI_SET_SAMPLE_CLK(x) (x) -#define DWMCI_SET_DRV_CLK(x) ((x) << 16) -#define DWMCI_SET_DIV_RATIO(x) ((x) << 24) +#include -#define EMMCP_MPSBEGIN0 0x1200 -#define EMMCP_SEND0 0x1204 -#define EMMCP_CTRL0 0x120C +#define DWMCI_CLKSEL 0x09c +#define DWMCI_CLKSEL64 0x0a8 +#define DWMCI_SET_SAMPLE_CLK(x) (x) +#define DWMCI_SET_DRV_CLK(x) ((x) << 16) +#define DWMCI_SET_DIV_RATIO(x) ((x) << 24) -#define MPSCTRL_SECURE_READ_BIT (0x1<<7) -#define MPSCTRL_SECURE_WRITE_BIT (0x1<<6) -#define MPSCTRL_NON_SECURE_READ_BIT (0x1<<5) -#define MPSCTRL_NON_SECURE_WRITE_BIT (0x1<<4) -#define MPSCTRL_USE_FUSE_KEY (0x1<<3) -#define MPSCTRL_ECB_MODE (0x1<<2) -#define MPSCTRL_ENCRYPTION (0x1<<1) -#define MPSCTRL_VALID (0x1<<0) +/* Protector Register */ +#define DWMCI_EMMCP_BASE 0x1000 +#define EMMCP_MPSBEGIN0 (DWMCI_EMMCP_BASE + 0x0200) +#define EMMCP_SEND0 (DWMCI_EMMCP_BASE + 0x0204) +#define EMMCP_CTRL0 (DWMCI_EMMCP_BASE + 0x020c) + +#define MPSCTRL_SECURE_READ_BIT BIT(7) +#define MPSCTRL_SECURE_WRITE_BIT BIT(6) +#define MPSCTRL_NON_SECURE_READ_BIT BIT(5) +#define MPSCTRL_NON_SECURE_WRITE_BIT BIT(4) +#define MPSCTRL_USE_FUSE_KEY BIT(3) +#define MPSCTRL_ECB_MODE BIT(2) +#define MPSCTRL_ENCRYPTION BIT(1) +#define MPSCTRL_VALID BIT(0) /* CLKSEL Register */ #define DWMCI_DIVRATIO_BIT 24 diff --git a/drivers/mmc/exynos_dw_mmc.c b/drivers/mmc/exynos_dw_mmc.c index a9e240fd91d6..c8bf89d6d355 100644 --- a/drivers/mmc/exynos_dw_mmc.c +++ b/drivers/mmc/exynos_dw_mmc.c @@ -45,7 +45,7 @@ struct exynos_dwmmc_variant { u32 quirks; /* quirk flags - see DWMCI_QUIRK_... */ }; -/* Exynos implmentation specific drver private data */ +/* Exynos implementation specific driver private data */ struct dwmci_exynos_priv_data { #ifdef CONFIG_DM_MMC struct dwmci_host host; @@ -121,10 +121,7 @@ static int exynos_dwmmc_set_sclk(struct dwmci_host *host, unsigned long rate) return 0; } -/* - * Function used as callback function to initialise the - * CLKSEL register for every mmc channel. - */ +/* Configure CLKSEL register with chosen timing values */ static int exynos_dwmci_clksel(struct dwmci_host *host) { struct dwmci_exynos_priv_data *priv = exynos_dwmmc_get_priv(host); @@ -163,7 +160,7 @@ static u8 exynos_dwmmc_get_ciu_div(struct dwmci_host *host) & DWMCI_DIVRATIO_MASK) + 1; } -unsigned int exynos_dwmci_get_clk(struct dwmci_host *host, uint freq) +static unsigned int exynos_dwmci_get_clk(struct dwmci_host *host, uint freq) { unsigned long sclk; u8 clk_div; @@ -204,7 +201,6 @@ static void exynos_dwmci_board_init(struct dwmci_host *host) MPSCTRL_NON_SECURE_WRITE_BIT | MPSCTRL_VALID); } - /* Set to timing value at initial time */ if (priv->sdr_timing) exynos_dwmci_clksel(host); } @@ -214,8 +210,8 @@ static int exynos_dwmmc_of_to_plat(struct udevice *dev) { struct dwmci_exynos_priv_data *priv = dev_get_priv(dev); struct dwmci_host *host = &priv->host; - int err = 0; u32 div, timing[2]; + int err; priv->chip = (struct exynos_dwmmc_variant *)dev_get_driver_data(dev); @@ -223,9 +219,8 @@ static int exynos_dwmmc_of_to_plat(struct udevice *dev) const void *blob = gd->fdt_blob; int node = dev_of_offset(dev); - /* Extract device id for each mmc channel */ + /* Obtain device ID for current MMC channel */ host->dev_id = pinmux_decode_periph_id(blob, node); - host->dev_index = dev_read_u32_default(dev, "index", host->dev_id); if (host->dev_index == host->dev_id) host->dev_index = host->dev_id - PERIPH_ID_SDMMC0; @@ -241,10 +236,6 @@ static int exynos_dwmmc_of_to_plat(struct udevice *dev) host->dev_index = 2; /* SD card */ #endif - /* Get the bus width from the device node (Default is 4bit buswidth) */ - host->buswidth = dev_read_u32_default(dev, "bus-width", 4); - - /* Set the base address from the device node */ host->ioaddr = dev_read_addr_ptr(dev); if (!host->ioaddr) { printf("DWMMC%d: Can't get base address\n", host->dev_index); @@ -255,17 +246,17 @@ static int exynos_dwmmc_of_to_plat(struct udevice *dev) div = priv->chip->div; else div = dev_read_u32_default(dev, "samsung,dw-mshc-ciu-div", 0); + err = dev_read_u32_array(dev, "samsung,dw-mshc-sdr-timing", timing, 2); if (err) { printf("DWMMC%d: Can't get sdr-timings\n", host->dev_index); return -EINVAL; } - priv->sdr_timing = DWMCI_SET_SAMPLE_CLK(timing[0]) | DWMCI_SET_DRV_CLK(timing[1]) | DWMCI_SET_DIV_RATIO(div); - /* sdr_timing didn't assigned anything, use the default value */ + /* sdr_timing wasn't set, use the default value */ if (!priv->sdr_timing) { if (host->dev_index == 0) priv->sdr_timing = DWMMC_MMC0_SDR_TIMING_VAL; @@ -284,6 +275,7 @@ static int exynos_dwmmc_of_to_plat(struct udevice *dev) DWMCI_SET_DIV_RATIO(div); } + host->buswidth = dev_read_u32_default(dev, "bus-width", 4); host->fifo_depth = dev_read_u32_default(dev, "fifo-depth", 0); host->bus_hz = dev_read_u32_default(dev, "clock-frequency", 0); @@ -396,8 +388,8 @@ U_BOOT_DRIVER(exynos_dwmmc_drv) = { .of_match = exynos_dwmmc_ids, .of_to_plat = exynos_dwmmc_of_to_plat, .bind = exynos_dwmmc_bind, - .ops = &dm_dwmci_ops, .probe = exynos_dwmmc_probe, + .ops = &dm_dwmci_ops, .priv_auto = sizeof(struct dwmci_exynos_priv_data), .plat_auto = sizeof(struct exynos_mmc_plat), }; From patchwork Mon Jun 10 01:12:24 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sam Protsenko X-Patchwork-Id: 802969 Delivered-To: patch@linaro.org Received: by 2002:adf:f147:0:b0:35b:5a80:51b4 with SMTP id y7csp1735586wro; Sun, 9 Jun 2024 18:18:58 -0700 (PDT) X-Forwarded-Encrypted: i=2; AJvYcCX2u1wz71R5UqJbCDsYG9BmjAhGPYgmYrgFAILqfr7H6aw38TG06nKDMzzSt5+bDmc/hbLgfnqAVtKagyp7+31E X-Google-Smtp-Source: AGHT+IHbLa6pjKIdVbpZCSxjllGgR6PGpbzW5J1qB9Li+EgW7FCtaTHdeVA+FVz+Z5jkwf+VH+pp X-Received: by 2002:a50:c31b:0:b0:57c:74ea:8d24 with SMTP id 4fb4d7f45d1cf-57c74ea8f6amr1726868a12.18.1717982338603; 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DW MMC driver was updated accordingly. Safely remove outdated MMC properties. Details on removed properties are as follows: * samsung,removable: replaced by non-removable * samsung,bus-width: replaced by bus-width * samsung,timing: - replaced by samsung,dw-mshc-ciu-div and samsung,dw-mshc-sdr-timing in dw_mmc nodes - removed from sdhci nodes (it's neither described in bindings, nor it's used in s5p_sdhci.c driver) * fifoth_val: replaced by fifo-depth * bus_hz: replaced by clock-frequency * div: the fixed CIU clock divider value was moved to the chip data in exynos_dw_mmc.c driver No functional change. Signed-off-by: Sam Protsenko --- arch/arm/dts/exynos4210-origen.dts | 2 -- arch/arm/dts/exynos4210-trats.dts | 4 ---- arch/arm/dts/exynos4210-universal_c210.dts | 4 ---- arch/arm/dts/exynos4412-odroid.dts | 8 -------- arch/arm/dts/exynos4412-trats2.dts | 12 ------------ arch/arm/dts/exynos5250-arndale.dts | 4 ---- arch/arm/dts/exynos5250-smdk5250.dts | 6 ------ arch/arm/dts/exynos5250-snow.dts | 6 ------ arch/arm/dts/exynos5250-spring.dts | 3 --- arch/arm/dts/exynos5420-smdk5420.dts | 6 ------ arch/arm/dts/exynos5422-odroidxu3.dts | 2 -- arch/arm/dts/exynos54xx.dtsi | 6 ------ 12 files changed, 63 deletions(-) diff --git a/arch/arm/dts/exynos4210-origen.dts b/arch/arm/dts/exynos4210-origen.dts index a4915de2c49c..40289c8c4aaf 100644 --- a/arch/arm/dts/exynos4210-origen.dts +++ b/arch/arm/dts/exynos4210-origen.dts @@ -25,9 +25,7 @@ }; &sdhci2 { - samsung,bus-width = <4>; bus-width = <4>; - samsung,timing = <1 2 3>; cd-gpios = <&gpk2 2 0>; status = "okay"; }; diff --git a/arch/arm/dts/exynos4210-trats.dts b/arch/arm/dts/exynos4210-trats.dts index 4fbdf4730994..88e9c0ed2bb0 100644 --- a/arch/arm/dts/exynos4210-trats.dts +++ b/arch/arm/dts/exynos4210-trats.dts @@ -240,17 +240,13 @@ }; &sdhci0 { - samsung,bus-width = <8>; bus-width = <8>; - samsung,timing = <1 3 3>; pwr-gpios = <&gpk0 2 0>; status = "okay"; }; &sdhci2 { - samsung,bus-width = <4>; bus-width = <4>; - samsung,timing = <1 2 3>; cd-gpios = <&gpx3 4 0>; status = "okay"; }; diff --git a/arch/arm/dts/exynos4210-universal_c210.dts b/arch/arm/dts/exynos4210-universal_c210.dts index 1b3ac1fee15f..c87b92be609d 100644 --- a/arch/arm/dts/exynos4210-universal_c210.dts +++ b/arch/arm/dts/exynos4210-universal_c210.dts @@ -235,17 +235,13 @@ }; &sdhci0 { - samsung,bus-width = <8>; bus-width = <8>; - samsung,timing = <1 3 3>; pwr-gpios = <&gpk0 2 0>; status = "okay"; }; &sdhci2 { - samsung,bus-width = <4>; bus-width = <4>; - samsung,timing = <1 2 3>; cd-gpios = <&gpx3 4 0>; status = "okay"; }; diff --git a/arch/arm/dts/exynos4412-odroid.dts b/arch/arm/dts/exynos4412-odroid.dts index 24e96ed05868..6822c6aaaa8a 100644 --- a/arch/arm/dts/exynos4412-odroid.dts +++ b/arch/arm/dts/exynos4412-odroid.dts @@ -234,26 +234,18 @@ }; &sdhci2 { - samsung,bus-width = <4>; - samsung,timing = <1 2 3>; cd-inverted; cd-gpios = <&gpk2 2 0>; status = "okay"; }; &mshc_0 { - samsung,bus-width = <8>; bus-width = <8>; - samsung,timing = <2 1 0>; samsung,dw-mshc-ciu-div = <0>; samsung,dw-mshc-sdr-timing = <2 1>; - samsung,removable = <0>; non-removable; - fifoth_val = <0x203f0040>; fifo-depth = <0x80>; clock-frequency = <400000000>; - bus_hz = <400000000>; - div = <0x3>; index = <4>; status = "okay"; }; diff --git a/arch/arm/dts/exynos4412-trats2.dts b/arch/arm/dts/exynos4412-trats2.dts index 30758ffa1ef9..2b71d328cd0e 100644 --- a/arch/arm/dts/exynos4412-trats2.dts +++ b/arch/arm/dts/exynos4412-trats2.dts @@ -108,9 +108,7 @@ }; sdhci@12510000 { - samsung,bus-width = <8>; bus-width = <8>; - samsung,timing = <1 3 3>; pwr-gpios = <&gpk0 4 0>; status = "disabled"; }; @@ -432,33 +430,23 @@ }; &sdhci0 { - samsung,bus-width = <8>; bus-width = <8>; - samsung,timing = <1 3 3>; pwr-gpios = <&gpk0 4 0>; status = "disabled"; }; &sdhci2 { - samsung,bus-width = <4>; bus-width = <4>; - samsung,timing = <1 2 3>; cd-gpios = <&gpk2 2 0>; status = "okay"; }; &mshc_0 { - samsung,bus-width = <8>; bus-width = <8>; - samsung,timing = <2 1 0>; samsung,dw-mshc-ciu-div = <0>; samsung,dw-mshc-sdr-timing = <2 1>; - samsung,removable = <0>; non-removable; - fifoth_val = <0x203f0040>; clock-frequency = <400000000>; - bus_hz = <400000000>; - div = <0x3>; index = <4>; fifo-depth = <0x80>; status = "okay"; diff --git a/arch/arm/dts/exynos5250-arndale.dts b/arch/arm/dts/exynos5250-arndale.dts index 7f84589c97a2..4c894f1712fa 100644 --- a/arch/arm/dts/exynos5250-arndale.dts +++ b/arch/arm/dts/exynos5250-arndale.dts @@ -27,9 +27,7 @@ }; mmc@12200000 { - samsung,bus-width = <8>; bus-width = <8>; - samsung,timing = <1 3 3>; samsung,dw-mshc-ciu-div = <3>; samsung,dw-mshc-sdr-timing = <1 3>; }; @@ -39,9 +37,7 @@ }; mmc@12220000 { - samsung,bus-width = <4>; bus-width = <4>; - samsung,timing = <1 2 3>; samsung,dw-mshc-ciu-div = <3>; samsung,dw-mshc-sdr-timing = <1 2>; }; diff --git a/arch/arm/dts/exynos5250-smdk5250.dts b/arch/arm/dts/exynos5250-smdk5250.dts index 882db2d1f608..f9f54cb63871 100644 --- a/arch/arm/dts/exynos5250-smdk5250.dts +++ b/arch/arm/dts/exynos5250-smdk5250.dts @@ -145,12 +145,9 @@ }; mmc@12200000 { - samsung,bus-width = <8>; bus-width = <8>; - samsung,timing = <1 3 3>; samsung,dw-mshc-ciu-div = <3>; samsung,dw-mshc-sdr-timing = <1 3>; - samsung,removable = <0>; non-removable; }; @@ -159,12 +156,9 @@ }; mmc@12220000 { - samsung,bus-width = <4>; bus-width = <4>; - samsung,timing = <1 2 3>; samsung,dw-mshc-ciu-div = <3>; samsung,dw-mshc-sdr-timing = <1 2>; - samsung,removable = <1>; }; mmc@12230000 { diff --git a/arch/arm/dts/exynos5250-snow.dts b/arch/arm/dts/exynos5250-snow.dts index bcf04d5c07c0..ab7b5212ba7c 100644 --- a/arch/arm/dts/exynos5250-snow.dts +++ b/arch/arm/dts/exynos5250-snow.dts @@ -301,12 +301,9 @@ }; mmc@12200000 { - samsung,bus-width = <8>; bus-width = <8>; - samsung,timing = <1 3 3>; samsung,dw-mshc-ciu-div = <3>; samsung,dw-mshc-sdr-timing = <1 3>; - samsung,removable = <0>; non-removable; }; @@ -315,12 +312,9 @@ }; mmc@12220000 { - samsung,bus-width = <4>; bus-width = <4>; - samsung,timing = <1 2 3>; samsung,dw-mshc-ciu-div = <3>; samsung,dw-mshc-sdr-timing = <1 2>; - samsung,removable = <1>; }; mmc@12230000 { diff --git a/arch/arm/dts/exynos5250-spring.dts b/arch/arm/dts/exynos5250-spring.dts index 7270a546a795..9c478837ba44 100644 --- a/arch/arm/dts/exynos5250-spring.dts +++ b/arch/arm/dts/exynos5250-spring.dts @@ -103,12 +103,9 @@ }; mmc@12200000 { - samsung,bus-width = <8>; bus-width = <8>; - samsung,timing = <1 3 3>; samsung,dw-mshc-ciu-div = <3>; samsung,dw-mshc-sdr-timing = <1 3>; - samsung,removable = <0>; non-removable; }; diff --git a/arch/arm/dts/exynos5420-smdk5420.dts b/arch/arm/dts/exynos5420-smdk5420.dts index 1f27baafebaf..6ba1306e862a 100644 --- a/arch/arm/dts/exynos5420-smdk5420.dts +++ b/arch/arm/dts/exynos5420-smdk5420.dts @@ -106,12 +106,9 @@ }; mmc@12200000 { - samsung,bus-width = <8>; bus-width = <8>; - samsung,timing = <1 3 3>; samsung,dw-mshc-ciu-div = <3>; samsung,dw-mshc-sdr-timing = <1 3>; - samsung,removable = <0>; non-removable; samsung,pre-init; }; @@ -121,12 +118,9 @@ }; mmc@12220000 { - samsung,bus-width = <4>; bus-width = <4>; - samsung,timing = <1 2 3>; samsung,dw-mshc-ciu-div = <3>; samsung,dw-mshc-sdr-timing = <1 2>; - samsung,removable = <1>; }; mmc@12230000 { diff --git a/arch/arm/dts/exynos5422-odroidxu3.dts b/arch/arm/dts/exynos5422-odroidxu3.dts index 767b3e415d58..ef25cf774470 100644 --- a/arch/arm/dts/exynos5422-odroidxu3.dts +++ b/arch/arm/dts/exynos5422-odroidxu3.dts @@ -280,12 +280,10 @@ }; mmc@12200000 { - fifoth_val = <0x201f0020>; fifo-depth = <0x40>; }; mmc@12220000 { - fifoth_val = <0x201f0020>; fifo-depth = <0x40>; }; diff --git a/arch/arm/dts/exynos54xx.dtsi b/arch/arm/dts/exynos54xx.dtsi index fd74166c7e48..5915ed697791 100644 --- a/arch/arm/dts/exynos54xx.dtsi +++ b/arch/arm/dts/exynos54xx.dtsi @@ -119,12 +119,9 @@ }; mmc@12200000 { - samsung,bus-width = <8>; bus-width = <8>; - samsung,timing = <1 3 3>; samsung,dw-mshc-ciu-div = <3>; samsung,dw-mshc-sdr-timing = <1 3>; - samsung,removable = <0>; non-removable; samsung,pre-init; }; @@ -134,12 +131,9 @@ }; mmc@12220000 { - samsung,bus-width = <4>; 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Sun, 09 Jun 2024 18:12:54 -0700 (PDT) From: Sam Protsenko To: Tom Rini , Minkyu Kang , Peng Fan , Jaehoon Chung , Simon Glass Cc: Quentin Schulz , Philipp Tomsich , Kever Yang , Eugeniy Paltsev , Peter Robinson , Jonas Karlman , Yang Xiwen , Ferass El Hafidi , Sean Anderson , u-boot@lists.denx.de, uboot-snps-arc@synopsys.com Subject: [PATCH v2 39/40] configs: e850-96: Enable MMC Date: Sun, 9 Jun 2024 20:12:25 -0500 Message-Id: <20240610011226.4050-40-semen.protsenko@linaro.org> X-Mailer: git-send-email 2.39.2 In-Reply-To: <20240610011226.4050-1-semen.protsenko@linaro.org> References: <20240610011226.4050-1-semen.protsenko@linaro.org> MIME-Version: 1.0 X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.39 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.103.8 at phobos.denx.de X-Virus-Status: Clean Enable MMC subsystem and DW MMC driver support to make eMMC functional. Also enable a couple of related commands so the user can make use of eMMC from U-Boot shell. Signed-off-by: Sam Protsenko --- configs/e850-96_defconfig | 10 +++++++++- 1 file changed, 9 insertions(+), 1 deletion(-) diff --git a/configs/e850-96_defconfig b/configs/e850-96_defconfig index 38b9968c1671..29ad31d5f8ed 100644 --- a/configs/e850-96_defconfig +++ b/configs/e850-96_defconfig @@ -9,11 +9,19 @@ CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0xf8c00000 CONFIG_DEFAULT_DEVICE_TREE="exynos/exynos850-e850-96" CONFIG_SYS_LOAD_ADDR=0x80000000 +CONFIG_ANDROID_BOOT_IMAGE=y # CONFIG_AUTOBOOT is not set # CONFIG_DISPLAY_CPUINFO is not set +CONFIG_HUSH_PARSER=y +CONFIG_CMD_ABOOTIMG=y +CONFIG_CMD_CLK=y +CONFIG_CMD_GPT=y +CONFIG_CMD_MMC=y +CONFIG_CMD_PART=y +CONFIG_CMD_TIME=y # CONFIG_NET is not set CONFIG_CLK_EXYNOS850=y -# CONFIG_MMC is not set +CONFIG_MMC_DW=y CONFIG_SOC_SAMSUNG=y CONFIG_EXYNOS_PMU=y CONFIG_EXYNOS_USI=y From patchwork Mon Jun 10 01:12:26 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sam Protsenko X-Patchwork-Id: 802970 Delivered-To: patch@linaro.org Received: by 2002:adf:f147:0:b0:35b:5a80:51b4 with SMTP id y7csp1735628wro; Sun, 9 Jun 2024 18:19:09 -0700 (PDT) X-Forwarded-Encrypted: i=2; AJvYcCXBMqbLPZl0y8VE8I5+kl7odKRfqJucJ5O/aK6eNwzCXUzZ6ZS2mBt5pJthKSbn6sEQIdln7toNlCRsmzp2hJwU X-Google-Smtp-Source: AGHT+IF6F1JoQRxb8ZoR0pZe9enmZesrYV/T7savhxcAYy3D/pBr7Ff9NnONJ10L/4grhxPTtsQ5 X-Received: by 2002:a17:906:1c87:b0:a6f:1106:5dc7 with SMTP id a640c23a62f3a-a6f11065e29mr212216066b.5.1717982349167; Sun, 09 Jun 2024 18:19:09 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1717982349; cv=none; d=google.com; s=arc-20160816; b=ed2/NQHV1bgGJRcF+5xpoFK7JFZFHobDM2Ben6zKOcaRDdFfNB9a/67eJSj7Xm/eHS sau9ZjQXiMwBjOh+tU5f1Zm10WiW3HhcjhMWKzSnd7g6vIQB2RRMpfX4sbVVWlU8XjRD cDzRT8nQoJ6waIVPb/mfkXG8kvCAuMngUg6vrfsiLKk4jRPuS6iCRL7lI01mOaRPtFv3 ilvHbuOqMTHXFRh+KnrA3qwepSgZRq8XyRkUmZjfGAdJn18a391O3Xf6/Jnrii9czi/Y Lt5hBLPpa1rJs9z5fUT5WEHIgpMRNuZwjpiEyVoEDuO2jqyJf8wJEmCOUhOE6O0HTejJ 9v9w== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:cc:to :from:dkim-signature; bh=2jMeGLO1IlJDYqTIdTf9GhLx78Z2YsLiJBjEhU1B4nI=; fh=ok6WddvRnLf4mRAAiyOBazBBoVSeQ/YYmTvh98k4c/0=; b=osQQ+zpNHGFmW99K99JVeDsGP7FQ7g5fAUkIG1qOZeAA9Dl2Cx6d+2N5FIbsYsfqdy IVA/AHxrRs7ciDVRLrOGvTY4rmys8UuaPcRgkMjDf5pnuXFRmVUlDoJJCn4BNmzvEeX8 SLTHORO2+g4dkW20HirTVQqJBgQkv7vOMwOPXizOlz4LGQkPXndd8gJiyOs68cR1ZfIe 4kMUH5HTCXCHc5NX+2Aw775Ts1wmG2DF/fYzDNQDZj9PjvCixMjwB/OM2/qk41KLnNbM sYXbWWnVnyWyQSneq1IlSCq9NKf0+nKzyHak8SqUHY0tGcGTmejlLpFn/4T0ipBszR6n T4KA==; dara=google.com ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=UV4g+SIe; spf=pass (google.com: domain of u-boot-bounces@lists.denx.de designates 85.214.62.61 as permitted sender) smtp.mailfrom=u-boot-bounces@lists.denx.de; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from phobos.denx.de (phobos.denx.de. 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Mention that in the board documentation. Signed-off-by: Sam Protsenko --- doc/board/samsung/e850-96.rst | 5 +++-- 1 file changed, 3 insertions(+), 2 deletions(-) diff --git a/doc/board/samsung/e850-96.rst b/doc/board/samsung/e850-96.rst index 0cb95473e536..0a7b6fc0c9dd 100644 --- a/doc/board/samsung/e850-96.rst +++ b/doc/board/samsung/e850-96.rst @@ -47,12 +47,13 @@ Build Procedure --------------- .. warning:: - At the moment both eMMC and USB features are not enabled in U-Boot. Flashing + At the moment USB is not enabled in U-Boot for this board. Although eMMC is + enabled, you won't be able to flash images over USB (fastboot). So flashing U-Boot binary **WILL** effectively brick your board. The ``dltool`` [8]_ can be used then to perform USB boot and flash LittleKernel bootloader binary [7]_ to unbrick and revive the board. Flashing U-Boot binary might be helpful for developers or anybody who want to check current state of U-Boot enablement on - E850-96 (which is mostly serial console and related blocks). + E850-96 (which is mostly serial console, eMMC and related blocks). Build U-Boot binary from source code (using AArch64 baremetal GCC toolchain):