From patchwork Thu Jun 15 03:03:59 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Guodong Xu X-Patchwork-Id: 105611 Delivered-To: patch@linaro.org Received: by 10.140.91.77 with SMTP id y71csp595284qgd; Wed, 14 Jun 2017 20:05:29 -0700 (PDT) X-Received: by 10.84.129.13 with SMTP id 13mr2193007plb.228.1497495929661; Wed, 14 Jun 2017 20:05:29 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1497495929; cv=none; d=google.com; s=arc-20160816; b=XJ44bCieBCUmdg5zUPhlpFxoL3pawwC08hH44TCMavE8ckc+tDVkHcdmbsP8sHf2+f T4Hv4Z14DHiZ9JxLmKLImBseaFlosc6TYjbaQXRp9WldGd95b/6JoOi0SI4bsVnzsWsL jg07P54rlPCPznsRGasutXMt0q70LFL7CKr2QvgaVcr+Db0fuDd2ufTEtxcyMQAEkufe P+L6oWfv4nDC2rXWcQgmTcZcYkdCFs1sfo/nifMPZ6xtjSNx4ftkwcEc193WhJjt+N5F EOkmTaJ2olv03tWudXI1wXFdvyaXhLVYEpHqpeTtk8xycvZ5HxUuzJo6c7ehf3eDwZHc 7qYQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:references:in-reply-to:message-id:date :subject:cc:to:from:dkim-signature:arc-authentication-results; bh=gNRFOpFQ0zqTHfoAkDMI6LWgLqoqoNh20QJqR2kDsC8=; b=DrK3ji4Tymx4PahTcEggRj/eOikdXgMN1+cUfvJm2T7tiy9n20py+hv26rskZQ2lXw dLT6TGD8uKXK2lJoiZKK9D1EdyvKrByEFDSnTf7ufY66xo8B7qH36NvSHTtYBp5TUwRg JVWTV8hVtMbyGunfgNd72t40OXnxJi/MjmAWwNMP3ofnB4UzoVkCzAoiuBtLhKgscSxD QEwL5jWWHbxQcC+Sr7yINA9t1kug2qfyn7lIlOC7TymMOcLIVxYiUJm0pTw7WBVyMNLy toKqhpYZzPkbZvGdZ4Z1IP3YhVuyOemy0PXX3D9oBTaZ96oWJZq0SGYLlkApK34caae1 eu/Q== ARC-Authentication-Results: i=1; mx.google.com; dkim=neutral (body hash did not verify) header.i=@linaro.org header.b=OstVc4yz; spf=pass (google.com: best guess record for domain of devicetree-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id z8si1303997pgs.455.2017.06.14.20.05.29; Wed, 14 Jun 2017 20:05:29 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of devicetree-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=neutral (body hash did not verify) header.i=@linaro.org header.b=OstVc4yz; spf=pass (google.com: best guess record for domain of devicetree-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752416AbdFODFU (ORCPT + 7 others); Wed, 14 Jun 2017 23:05:20 -0400 Received: from mail-pg0-f50.google.com ([74.125.83.50]:34763 "EHLO mail-pg0-f50.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752387AbdFODFS (ORCPT ); Wed, 14 Jun 2017 23:05:18 -0400 Received: by mail-pg0-f50.google.com with SMTP id v18so1259052pgb.1 for ; Wed, 14 Jun 2017 20:05:18 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=EBq2IasBSZxuDZmwkSIqzBM8qNIsBWTgHCK9Vwmd6Rc=; b=OstVc4yz6Hv0gex/F2HU1X5oOGZy0ggfQcc/heXDf1IXt+U4HQYPyaKsDf3iNfr3cD DE48cBey9qYBCeW6CZjchCdqK0+2dIQRqEnY8JWWEW5+ZQyIv78tPkxZgvEIUKKAw/w1 R8Ha7m50cnP+07NNpK93ViNrLDUC9JSS2kUks= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=EBq2IasBSZxuDZmwkSIqzBM8qNIsBWTgHCK9Vwmd6Rc=; b=UC7xjbrKCPCq+EY1ftdAzQwzdSntmPJOx5sl7nyGTSdn1dyU65jGEOFBNRTBbmVy0p plqo22Xfzkr+S1CgfU23NiBKA5D66JmISS8fl7tKmUGPED9//sJagAm/kVv6psujM5Cx 7INxqUhqIVfkTVWQwPp/YgZ9oetLnhw7AbobvSsvP6o2agwOO9mD8rcIh7xkfJAyb0SI rEBB63IWYKPfJac2qoLjStnbe1uAYWkXtiLXy7hIsFOJ6tkxOnEF3H3Osk/uWzMJmvs6 ExdkdHTIoFPFDQsCDchtVn17pKdO121vMGgYOyFD+jEV+oIu8MVXiJ/EIh7NR3ty0PwP KzTg== X-Gm-Message-State: AKS2vOxYXazXuG1nBgiO+bsQFHXzdq/n+6IhEnUIAN4SBsuqDwyCy8ee yzZ8482NBynf9VXW X-Received: by 10.101.88.130 with SMTP id d2mr3197121pgu.58.1497495917724; Wed, 14 Jun 2017 20:05:17 -0700 (PDT) Received: from localhost.localdomain ([45.56.159.17]) by smtp.gmail.com with ESMTPSA id y65sm2156656pgd.33.2017.06.14.20.05.09 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Wed, 14 Jun 2017 20:05:17 -0700 (PDT) From: Guodong Xu To: lee.jones@linaro.org, robh+dt@kernel.org, mark.rutland@arm.com, xuwei5@hisilicon.com, catalin.marinas@arm.com, will.deacon@arm.com, lgirdwood@gmail.com, broonie@kernel.org, khilman@baylibre.com, arnd@arndb.de, gregory.clement@free-electrons.com, horms+renesas@verge.net.au, olof@lixom.net, thomas.petazzoni@free-electrons.com, yamada.masahiro@socionext.com, riku.voipio@linaro.org, treding@nvidia.com, krzk@kernel.org, eric@anholt.net, damm+renesas@opensource.se, ard.biesheuvel@linaro.org, linus.walleij@linaro.org, geert+renesas@glider.be Cc: devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, hw.wangxiaoyin@hisilicon.com, Guodong Xu , Chen Feng Subject: [PATCH v4 02/20] arm64: dts: hisilicon: update compatible string for hikey960 Date: Thu, 15 Jun 2017 11:03:59 +0800 Message-Id: <20170615030417.14059-3-guodong.xu@linaro.org> X-Mailer: git-send-email 2.10.2 In-Reply-To: <20170615030417.14059-1-guodong.xu@linaro.org> References: <20170615030417.14059-1-guodong.xu@linaro.org> Sender: devicetree-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Update compatible string for hikey960. HiKey960 is a develpment board built with SoC Hi3660. Signed-off-by: Guodong Xu Signed-off-by: Chen Feng Acked-by: Rob Herring --- arch/arm64/boot/dts/hisilicon/hi3660-hikey960.dts | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) -- 2.10.2 -- To unsubscribe from this list: send the line "unsubscribe devicetree" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html diff --git a/arch/arm64/boot/dts/hisilicon/hi3660-hikey960.dts b/arch/arm64/boot/dts/hisilicon/hi3660-hikey960.dts index 186251f..64875a5 100644 --- a/arch/arm64/boot/dts/hisilicon/hi3660-hikey960.dts +++ b/arch/arm64/boot/dts/hisilicon/hi3660-hikey960.dts @@ -12,7 +12,7 @@ / { model = "HiKey960"; - compatible = "hisilicon,hi3660"; + compatible = "hisilicon,hi3660-hikey960", "hisilicon,hi3660"; aliases { serial5 = &uart5; /* console UART */ From patchwork Thu Jun 15 03:04:03 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Guodong Xu X-Patchwork-Id: 105615 Delivered-To: patch@linaro.org Received: by 10.140.91.77 with SMTP id y71csp595409qgd; Wed, 14 Jun 2017 20:05:55 -0700 (PDT) X-Received: by 10.98.101.6 with SMTP id z6mr3010238pfb.221.1497495954961; Wed, 14 Jun 2017 20:05:54 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1497495954; cv=none; d=google.com; s=arc-20160816; b=kkCdw3RpVGvQS0l7bcsggi9/sUuO9JKk14XA1BY3dGFxXGZIcxhNTDQbeyupkWcvfJ wh4c1jfrdIhOGmHa3/tV4PYYMK8KRZZrFwrIQv7S5qlQDy8ZJYCWq4K/DOyKfEz08Gn0 Dx0gaeHKyDbd70MTHSlYeomd6SRLT23OZvnLNSkFfoeZg//56fEXJf2yKxLYRQtt/tK0 E1EcFNlhco3V/sap/hvf7wSnyiDluaGBT/0HwidsTa+RB0nfN4yV5oMHNZFzbwm0f/Ot kqw8B48NCwTMW4VJZuT7cW1Bj+H1i+ElJ5RKPEp/ZNDkd8W2Tz5RdVHP5RgLrkh3XBqc VLJQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:references:in-reply-to:message-id:date :subject:cc:to:from:dkim-signature:arc-authentication-results; bh=skX2zrABKz64V5W4JC5ykRxBO2i2zq+EzWynoROy5Jc=; b=dkqi3VFVA74H7V7ndCi2q2gUcl6kGPIWaQ3CaUD1Afxmk8DjeNgVu0o56/0+R8Dfmy fRLqyh1Zyu0UU0njXwGUUL+hLaHiXYyu9fsgYIE0t7nDjLfI+FZhREV+07f8p0gqTNiA lfKh4wsYn/4pI1JbasFYOWMTDe3sXRyYb06rZxgO61hIf8ET6BVsnAVFRD6sZu4i3KgH Mmc442mBiQpVTrKDlfqxVIYi2NWUsSPs8tFZ6cGtHz3cyNBz2vjNm9Mkh1vR0sRH9VNi WpWvPNjBn3HvsmwvjB1VMa/ob7ae0OS4WeX6T5cr1ndrqkkUmU0kTGjkQm90XeptXNlR RHgQ== ARC-Authentication-Results: i=1; mx.google.com; dkim=neutral (body hash did not verify) header.i=@linaro.org header.b=IUdLrtOh; spf=pass (google.com: best guess record for domain of devicetree-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id e6si1293791plk.0.2017.06.14.20.05.54; Wed, 14 Jun 2017 20:05:54 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of devicetree-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=neutral (body hash did not verify) header.i=@linaro.org header.b=IUdLrtOh; spf=pass (google.com: best guess record for domain of devicetree-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752105AbdFODFx (ORCPT + 7 others); Wed, 14 Jun 2017 23:05:53 -0400 Received: from mail-pg0-f50.google.com ([74.125.83.50]:35026 "EHLO mail-pg0-f50.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752096AbdFODFv (ORCPT ); Wed, 14 Jun 2017 23:05:51 -0400 Received: by mail-pg0-f50.google.com with SMTP id k71so1251759pgd.2 for ; Wed, 14 Jun 2017 20:05:51 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=SKle1N3Cdi0bgyCL3EILNiJD5thnQRze5cZRg4jGxMc=; b=IUdLrtOhUI32BApmF/+tuCXidvO8CD+Ta0sGXkfUM415RlwdT1UchyoSMng63G8rgR FXQUuzT8hp12xC5wccadlJf8qv4oGZqLs+0Q2m2/q3L5eY8w1UgR9tT/LNqGrLg86AJu Nru2/c2ANb6AL1hML11agnXiI9oZVTlp1WK8M= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=SKle1N3Cdi0bgyCL3EILNiJD5thnQRze5cZRg4jGxMc=; b=gm+N9cDrFNDwJwVEu5JQoxNGJe9Y6Miz0TMea8hsSIAJG+NOZJt88HEnjFzqje1Y4U aHjbWapaKr13NcOd9tnCrTYUMVLeI3Hyfl58lpaAvIiqzI8Y+OZ7eBvf3XWT18kGTBA1 hnqUJDtfYr8u1maaqXs2xdP/bbZZzTVIM+Hr/sec+GXXfd1l1RZYHxbMBCyP4Tvjv9Rh YL2I5baWsAt3X/aIiFkZ7mrqmObthypFl6HC5q3XgxPP5Hcztx7hlGomC1k4NC4KdT6d KR1tolcQ9+KywNiNpcE46hOVEvykQdlNDgilyNOmzYTp/GNcxA1ackD1G+UMW1Id+WtS xS4A== X-Gm-Message-State: AKS2vOynR981SuhKhV6FjJvuIxQV6ZA4HhO9qTsAz67XQq7Mf+rCA8Lc GTDJ86SZASlznERJ X-Received: by 10.99.185.5 with SMTP id z5mr3082779pge.231.1497495950535; Wed, 14 Jun 2017 20:05:50 -0700 (PDT) Received: from localhost.localdomain ([45.56.159.17]) by smtp.gmail.com with ESMTPSA id y65sm2156656pgd.33.2017.06.14.20.05.42 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Wed, 14 Jun 2017 20:05:50 -0700 (PDT) From: Guodong Xu To: lee.jones@linaro.org, robh+dt@kernel.org, mark.rutland@arm.com, xuwei5@hisilicon.com, catalin.marinas@arm.com, will.deacon@arm.com, lgirdwood@gmail.com, broonie@kernel.org, khilman@baylibre.com, arnd@arndb.de, gregory.clement@free-electrons.com, horms+renesas@verge.net.au, olof@lixom.net, thomas.petazzoni@free-electrons.com, yamada.masahiro@socionext.com, riku.voipio@linaro.org, treding@nvidia.com, krzk@kernel.org, eric@anholt.net, damm+renesas@opensource.se, ard.biesheuvel@linaro.org, linus.walleij@linaro.org, geert+renesas@glider.be Cc: devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, hw.wangxiaoyin@hisilicon.com Subject: [PATCH v4 06/20] arm64: dts: hi3660: add gpio dtsi file for Hisilicon Hi3660 SOC Date: Thu, 15 Jun 2017 11:04:03 +0800 Message-Id: <20170615030417.14059-7-guodong.xu@linaro.org> X-Mailer: git-send-email 2.10.2 In-Reply-To: <20170615030417.14059-1-guodong.xu@linaro.org> References: <20170615030417.14059-1-guodong.xu@linaro.org> Sender: devicetree-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org From: Wang Xiaoyin This patch adds pl061 device nodes for Hi3660 SoC. Signed-off-by: Wang Xiaoyin --- arch/arm64/boot/dts/hisilicon/hi3660.dtsi | 380 ++++++++++++++++++++++++++++++ 1 file changed, 380 insertions(+) -- 2.10.2 -- To unsubscribe from this list: send the line "unsubscribe devicetree" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html diff --git a/arch/arm64/boot/dts/hisilicon/hi3660.dtsi b/arch/arm64/boot/dts/hisilicon/hi3660.dtsi index 9abe84e..b03be4d 100644 --- a/arch/arm64/boot/dts/hisilicon/hi3660.dtsi +++ b/arch/arm64/boot/dts/hisilicon/hi3660.dtsi @@ -251,5 +251,385 @@ clock-names = "uartclk", "apb_pclk"; status = "disabled"; }; + + gpio0: gpio@e8a0b000 { + compatible = "arm,pl061", "arm,primecell"; + reg = <0 0xe8a0b000 0 0x1000>; + interrupts = ; + gpio-controller; + #gpio-cells = <2>; + gpio-ranges = <&pmx0 1 0 7>; + interrupt-controller; + #interrupt-cells = <2>; + clocks = <&crg_ctrl HI3660_PCLK_GPIO0>; + clock-names = "apb_pclk"; + }; + + gpio1: gpio@e8a0c000 { + compatible = "arm,pl061", "arm,primecell"; + reg = <0 0xe8a0c000 0 0x1000>; + interrupts = ; + gpio-controller; + #gpio-cells = <2>; + gpio-ranges = <&pmx0 1 7 7>; + interrupt-controller; + #interrupt-cells = <2>; + clocks = <&crg_ctrl HI3660_PCLK_GPIO1>; + clock-names = "apb_pclk"; + }; + + gpio2: gpio@e8a0d000 { + compatible = "arm,pl061", "arm,primecell"; + reg = <0 0xe8a0d000 0 0x1000>; + interrupts = ; + gpio-controller; + #gpio-cells = <2>; + gpio-ranges = <&pmx0 0 14 8>; + interrupt-controller; + #interrupt-cells = <2>; + clocks = <&crg_ctrl HI3660_PCLK_GPIO2>; + clock-names = "apb_pclk"; + }; + + gpio3: gpio@e8a0e000 { + compatible = "arm,pl061", "arm,primecell"; + reg = <0 0xe8a0e000 0 0x1000>; + interrupts = ; + gpio-controller; + #gpio-cells = <2>; + gpio-ranges = <&pmx0 0 22 8>; + interrupt-controller; + #interrupt-cells = <2>; + clocks = <&crg_ctrl HI3660_PCLK_GPIO3>; + clock-names = "apb_pclk"; + }; + + gpio4: gpio@e8a0f000 { + compatible = "arm,pl061", "arm,primecell"; + reg = <0 0xe8a0f000 0 0x1000>; + interrupts = ; + gpio-controller; + #gpio-cells = <2>; + gpio-ranges = <&pmx0 0 30 8>; + interrupt-controller; + #interrupt-cells = <2>; + clocks = <&crg_ctrl HI3660_PCLK_GPIO4>; + clock-names = "apb_pclk"; + }; + + gpio5: gpio@e8a10000 { + compatible = "arm,pl061", "arm,primecell"; + reg = <0 0xe8a10000 0 0x1000>; + interrupts = ; + gpio-controller; + #gpio-cells = <2>; + gpio-ranges = <&pmx0 0 38 8>; + interrupt-controller; + #interrupt-cells = <2>; + clocks = <&crg_ctrl HI3660_PCLK_GPIO5>; + clock-names = "apb_pclk"; + }; + + gpio6: gpio@e8a11000 { + compatible = "arm,pl061", "arm,primecell"; + reg = <0 0xe8a11000 0 0x1000>; + interrupts = ; + gpio-controller; + #gpio-cells = <2>; + gpio-ranges = <&pmx0 0 46 8>; + interrupt-controller; + #interrupt-cells = <2>; + clocks = <&crg_ctrl HI3660_PCLK_GPIO6>; + clock-names = "apb_pclk"; + }; + + gpio7: gpio@e8a12000 { + compatible = "arm,pl061", "arm,primecell"; + reg = <0 0xe8a12000 0 0x1000>; + interrupts = ; + gpio-controller; + #gpio-cells = <2>; + gpio-ranges = <&pmx0 0 54 8>; + interrupt-controller; + #interrupt-cells = <2>; + clocks = <&crg_ctrl HI3660_PCLK_GPIO7>; + clock-names = "apb_pclk"; + }; + + gpio8: gpio@e8a13000 { + compatible = "arm,pl061", "arm,primecell"; + reg = <0 0xe8a13000 0 0x1000>; + interrupts = ; + gpio-controller; + #gpio-cells = <2>; + gpio-ranges = <&pmx0 0 62 8>; + interrupt-controller; + #interrupt-cells = <2>; + clocks = <&crg_ctrl HI3660_PCLK_GPIO8>; + clock-names = "apb_pclk"; + }; + + gpio9: gpio@e8a14000 { + compatible = "arm,pl061", "arm,primecell"; + reg = <0 0xe8a14000 0 0x1000>; + interrupts = ; + gpio-controller; + #gpio-cells = <2>; + gpio-ranges = <&pmx0 0 70 8>; + interrupt-controller; + #interrupt-cells = <2>; + clocks = <&crg_ctrl HI3660_PCLK_GPIO9>; + clock-names = "apb_pclk"; + }; + + gpio10: gpio@e8a15000 { + compatible = "arm,pl061", "arm,primecell"; + reg = <0 0xe8a15000 0 0x1000>; + interrupts = ; + gpio-controller; + #gpio-cells = <2>; + gpio-ranges = <&pmx0 0 78 8>; + interrupt-controller; + #interrupt-cells = <2>; + clocks = <&crg_ctrl HI3660_PCLK_GPIO10>; + clock-names = "apb_pclk"; + }; + + gpio11: gpio@e8a16000 { + compatible = "arm,pl061", "arm,primecell"; + reg = <0 0xe8a16000 0 0x1000>; + interrupts = ; + gpio-controller; + #gpio-cells = <2>; + gpio-ranges = <&pmx0 0 86 8>; + interrupt-controller; + #interrupt-cells = <2>; + clocks = <&crg_ctrl HI3660_PCLK_GPIO11>; + clock-names = "apb_pclk"; + }; + + gpio12: gpio@e8a17000 { + compatible = "arm,pl061", "arm,primecell"; + reg = <0 0xe8a17000 0 0x1000>; + interrupts = ; + gpio-controller; + #gpio-cells = <2>; + gpio-ranges = <&pmx0 0 94 3 &pmx0 7 101 1>; + interrupt-controller; + #interrupt-cells = <2>; + clocks = <&crg_ctrl HI3660_PCLK_GPIO12>; + clock-names = "apb_pclk"; + }; + + gpio13: gpio@e8a18000 { + compatible = "arm,pl061", "arm,primecell"; + reg = <0 0xe8a18000 0 0x1000>; + interrupts = ; + gpio-controller; + #gpio-cells = <2>; + gpio-ranges = <&pmx0 0 102 8>; + interrupt-controller; + #interrupt-cells = <2>; + clocks = <&crg_ctrl HI3660_PCLK_GPIO13>; + clock-names = "apb_pclk"; + }; + + gpio14: gpio@e8a19000 { + compatible = "arm,pl061", "arm,primecell"; + reg = <0 0xe8a19000 0 0x1000>; + interrupts = ; + gpio-controller; + #gpio-cells = <2>; + gpio-ranges = <&pmx0 0 110 8>; + interrupt-controller; + #interrupt-cells = <2>; + clocks = <&crg_ctrl HI3660_PCLK_GPIO14>; + clock-names = "apb_pclk"; + }; + + gpio15: gpio@e8a1a000 { + compatible = "arm,pl061", "arm,primecell"; + reg = <0 0xe8a1a000 0 0x1000>; + interrupts = ; + gpio-controller; + #gpio-cells = <2>; + gpio-ranges = <&pmx0 0 118 6>; + interrupt-controller; + #interrupt-cells = <2>; + clocks = <&crg_ctrl HI3660_PCLK_GPIO15>; + clock-names = "apb_pclk"; + }; + + gpio16: gpio@e8a1b000 { + compatible = "arm,pl061", "arm,primecell"; + reg = <0 0xe8a1b000 0 0x1000>; + interrupts = ; + gpio-controller; + #gpio-cells = <2>; + interrupt-controller; + #interrupt-cells = <2>; + clocks = <&crg_ctrl HI3660_PCLK_GPIO16>; + clock-names = "apb_pclk"; + }; + + gpio17: gpio@e8a1c000 { + compatible = "arm,pl061", "arm,primecell"; + reg = <0 0xe8a1c000 0 0x1000>; + interrupts = ; + gpio-controller; + #gpio-cells = <2>; + interrupt-controller; + #interrupt-cells = <2>; + clocks = <&crg_ctrl HI3660_PCLK_GPIO17>; + clock-names = "apb_pclk"; + }; + + gpio18: gpio@ff3b4000 { + compatible = "arm,pl061", "arm,primecell"; + reg = <0 0xff3b4000 0 0x1000>; + interrupts = ; + gpio-controller; + #gpio-cells = <2>; + gpio-ranges = <&pmx2 0 0 8>; + interrupt-controller; + #interrupt-cells = <2>; + clocks = <&crg_ctrl HI3660_PCLK_GPIO18>; + clock-names = "apb_pclk"; + }; + + gpio19: gpio@ff3b5000 { + compatible = "arm,pl061", "arm,primecell"; + reg = <0 0xff3b5000 0 0x1000>; + interrupts = ; + gpio-controller; + #gpio-cells = <2>; + gpio-ranges = <&pmx2 0 8 4>; + interrupt-controller; + #interrupt-cells = <2>; + clocks = <&crg_ctrl HI3660_PCLK_GPIO19>; + clock-names = "apb_pclk"; + }; + + gpio20: gpio@e8a1f000 { + compatible = "arm,pl061", "arm,primecell"; + reg = <0 0xe8a1f000 0 0x1000>; + interrupts = ; + gpio-controller; + #gpio-cells = <2>; + gpio-ranges = <&pmx1 0 0 6>; + interrupt-controller; + #interrupt-cells = <2>; + clocks = <&crg_ctrl HI3660_PCLK_GPIO20>; + clock-names = "apb_pclk"; + }; + + gpio21: gpio@e8a20000 { + compatible = "arm,pl061", "arm,primecell"; + reg = <0 0xe8a20000 0 0x1000>; + interrupts = ; + gpio-controller; + #gpio-cells = <2>; + interrupt-controller; + #interrupt-cells = <2>; + gpio-ranges = <&pmx3 0 0 6>; + clocks = <&crg_ctrl HI3660_PCLK_GPIO21>; + clock-names = "apb_pclk"; + }; + + gpio22: gpio@fff0b000 { + compatible = "arm,pl061", "arm,primecell"; + reg = <0 0xfff0b000 0 0x1000>; + interrupts = ; + gpio-controller; + #gpio-cells = <2>; + /* GPIO176 */ + gpio-ranges = <&pmx4 2 0 6>; + interrupt-controller; + #interrupt-cells = <2>; + clocks = <&sctrl HI3660_PCLK_AO_GPIO0>; + clock-names = "apb_pclk"; + }; + + gpio23: gpio@fff0c000 { + compatible = "arm,pl061", "arm,primecell"; + reg = <0 0xfff0c000 0 0x1000>; + interrupts = ; + gpio-controller; + #gpio-cells = <2>; + /* GPIO184 */ + gpio-ranges = <&pmx4 0 6 7>; + interrupt-controller; + #interrupt-cells = <2>; + clocks = <&sctrl HI3660_PCLK_AO_GPIO1>; + clock-names = "apb_pclk"; + }; + + gpio24: gpio@fff0d000 { + compatible = "arm,pl061", "arm,primecell"; + reg = <0 0xfff0d000 0 0x1000>; + interrupts = ; + gpio-controller; + #gpio-cells = <2>; + /* GPIO192 */ + gpio-ranges = <&pmx4 0 13 8>; + interrupt-controller; + #interrupt-cells = <2>; + clocks = <&sctrl HI3660_PCLK_AO_GPIO2>; + clock-names = "apb_pclk"; + }; + + gpio25: gpio@fff0e000 { + compatible = "arm,pl061", "arm,primecell"; + reg = <0 0xfff0e000 0 0x1000>; + interrupts = ; + gpio-controller; + #gpio-cells = <2>; + /* GPIO200 */ + gpio-ranges = <&pmx4 0 21 4 &pmx4 5 25 3>; + interrupt-controller; + #interrupt-cells = <2>; + clocks = <&sctrl HI3660_PCLK_AO_GPIO3>; + clock-names = "apb_pclk"; + }; + + gpio26: gpio@fff0f000 { + compatible = "arm,pl061", "arm,primecell"; + reg = <0 0xfff0f000 0 0x1000>; + interrupts = ; + gpio-controller; + #gpio-cells = <2>; + /* GPIO208 */ + gpio-ranges = <&pmx4 0 28 8>; + interrupt-controller; + #interrupt-cells = <2>; + clocks = <&sctrl HI3660_PCLK_AO_GPIO4>; + clock-names = "apb_pclk"; + }; + + gpio27: gpio@fff10000 { + compatible = "arm,pl061", "arm,primecell"; + reg = <0 0xfff10000 0 0x1000>; + interrupts = ; + gpio-controller; + #gpio-cells = <2>; + /* GPIO216 */ + gpio-ranges = <&pmx4 0 36 6>; + interrupt-controller; + #interrupt-cells = <2>; + clocks = <&sctrl HI3660_PCLK_AO_GPIO5>; + clock-names = "apb_pclk"; + }; + + gpio28: gpio@fff1d000 { + compatible = "arm,pl061", "arm,primecell"; + reg = <0 0xfff1d000 0 0x1000>; + interrupts = ; + gpio-controller; + #gpio-cells = <2>; + interrupt-controller; + #interrupt-cells = <2>; + clocks = <&sctrl HI3660_PCLK_AO_GPIO6>; + clock-names = "apb_pclk"; + }; }; }; From patchwork Thu Jun 15 03:04:05 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Guodong Xu X-Patchwork-Id: 105618 Delivered-To: patch@linaro.org Received: by 10.140.91.77 with SMTP id y71csp595534qgd; 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[209.132.180.67]) by mx.google.com with ESMTP id l3si1276519pld.259.2017.06.14.20.06.20; Wed, 14 Jun 2017 20:06:20 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of devicetree-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=neutral (body hash did not verify) header.i=@linaro.org header.b=DAYyTsQI; spf=pass (google.com: best guess record for domain of devicetree-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752635AbdFODGS (ORCPT + 7 others); Wed, 14 Jun 2017 23:06:18 -0400 Received: from mail-pg0-f54.google.com ([74.125.83.54]:33294 "EHLO mail-pg0-f54.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752630AbdFODGR (ORCPT ); Wed, 14 Jun 2017 23:06:17 -0400 Received: by mail-pg0-f54.google.com with SMTP id f185so1283560pgc.0 for ; Wed, 14 Jun 2017 20:06:12 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=uo7TyT7lu+o4yjlLl8QucSHBneeHcWu3OF5nZMeQ5dU=; b=DAYyTsQIESSYpllTLncZUhaLmK/I3IAE4yQ+B1DOxiuToQV0FxVvTArPyX30L9R+kn 7A9dJFgNJt9dn4ZkmBjM+sK1d3eujtGvRl6ncdkbypk2S4IBbZOiISyfK+VS6E2Xqh6c +w+N8bS1VrfxGZ9o6P6XMzXzhbV7vZFVppPA4= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=uo7TyT7lu+o4yjlLl8QucSHBneeHcWu3OF5nZMeQ5dU=; b=GLdw4roxukAMoqZWs7DHZHnzwyoavV0GkjLH3ULlXZwRbJXrL4KPubLCSuJLhY17oN WaPogRpByVVlK89mk+M+gBKBteJcUnyG6RP1Dkk0bTtLqSueHstjC9ybUMs2VoU8ev7c BqzUdG0yemo5bCkpv6UGSDtTlFxWsWPfYMozrWB2/ZiDRgoF2cNJLyx0PivZtvzLRF+K 1Yl56NIHjLypZUlM/f6QjDDuoE/BnZRu8Lxh6ID6SKzH3+rAHZfU9yO32z6SzHy62ELq zwR4K/wE+ZJAf5PZrHCwpO32MR2CLugdxGc2m/L5uTfhYwJrhuanZKULU4ED/HjBQmwc tjIw== X-Gm-Message-State: AKS2vOxug62hynFIWE73QC3FQE+8Q4/kOJuH68WtMo2hEDLzQ2G3jhHw 6j1clNadrzCau4mW X-Received: by 10.99.2.142 with SMTP id 136mr3052208pgc.264.1497495966790; Wed, 14 Jun 2017 20:06:06 -0700 (PDT) Received: from localhost.localdomain ([45.56.159.17]) by smtp.gmail.com with ESMTPSA id y65sm2156656pgd.33.2017.06.14.20.05.59 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Wed, 14 Jun 2017 20:06:06 -0700 (PDT) From: Guodong Xu To: lee.jones@linaro.org, robh+dt@kernel.org, mark.rutland@arm.com, xuwei5@hisilicon.com, catalin.marinas@arm.com, will.deacon@arm.com, lgirdwood@gmail.com, broonie@kernel.org, khilman@baylibre.com, arnd@arndb.de, gregory.clement@free-electrons.com, horms+renesas@verge.net.au, olof@lixom.net, thomas.petazzoni@free-electrons.com, yamada.masahiro@socionext.com, riku.voipio@linaro.org, treding@nvidia.com, krzk@kernel.org, eric@anholt.net, damm+renesas@opensource.se, ard.biesheuvel@linaro.org, linus.walleij@linaro.org, geert+renesas@glider.be Cc: devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, hw.wangxiaoyin@hisilicon.com, Guodong Xu Subject: [PATCH v4 08/20] arm64: dts: hikey960: add WL1837 Bluetooth device node Date: Thu, 15 Jun 2017 11:04:05 +0800 Message-Id: <20170615030417.14059-9-guodong.xu@linaro.org> X-Mailer: git-send-email 2.10.2 In-Reply-To: <20170615030417.14059-1-guodong.xu@linaro.org> References: <20170615030417.14059-1-guodong.xu@linaro.org> Sender: devicetree-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org This adds the serial slave device for the WL1837 Bluetooth interface. Signed-off-by: Guodong Xu --- arch/arm64/boot/dts/hisilicon/hi3660-hikey960.dts | 11 +++++++++++ 1 file changed, 11 insertions(+) -- 2.10.2 -- To unsubscribe from this list: send the line "unsubscribe devicetree" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html diff --git a/arch/arm64/boot/dts/hisilicon/hi3660-hikey960.dts b/arch/arm64/boot/dts/hisilicon/hi3660-hikey960.dts index 0a3f2e0..c25fff9 100644 --- a/arch/arm64/boot/dts/hisilicon/hi3660-hikey960.dts +++ b/arch/arm64/boot/dts/hisilicon/hi3660-hikey960.dts @@ -9,6 +9,7 @@ #include "hi3660.dtsi" #include "hikey960-pinctrl.dtsi" +#include / { model = "HiKey960"; @@ -63,6 +64,16 @@ status = "okay"; }; +&uart4 { + status = "okay"; + + bluetooth { + compatible = "ti,wl1837-st"; + enable-gpios = <&gpio15 6 GPIO_ACTIVE_HIGH>; + max-speed = <921600>; + }; +}; + &uart6 { /* On Low speed expansion */ label = "LS-UART1"; From patchwork Thu Jun 15 03:04:06 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Guodong Xu X-Patchwork-Id: 105617 Delivered-To: patch@linaro.org Received: by 10.140.91.77 with SMTP id y71csp595530qgd; Wed, 14 Jun 2017 20:06:19 -0700 (PDT) X-Received: by 10.84.216.70 with SMTP id f6mr1353782plj.79.1497495979813; Wed, 14 Jun 2017 20:06:19 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1497495979; cv=none; d=google.com; s=arc-20160816; b=tAX1dWshKoDMf2vaGXPFqp3KxLhfyHUkSYX4hsTzZpjqRq3CdW5BAikX3Gc8OfZs4X ecFRH8+dV78MRTNNW/5UlwpyD7fRUILi/Lc6kffD17MA8F3S/SNKIaNIX8f9oPrFq5QZ /cUl4vUFPQ8QvJenugm/sQWvz5txUYMXo0ESvTyioFmcsUVwnH8jQf8F7p6kL5VPY/Un wSPs+yHtVc9cJldDkD3Sa/0CShmDIWE+YCIva0wa3C4QsdiTzP4UhlITZ7tKhMkfjCKv YuaSP0+XpJCmMxlc89bA/qhA71r6+qQ12g7PM919K4uyzmixWGsvi5XO5PLBZi8jTHCa d2AA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:references:in-reply-to:message-id:date :subject:cc:to:from:dkim-signature:arc-authentication-results; bh=eFJ8p9zgBA5udW0ZyKxcKWWRWaeX9++BDtKjMUWdOZk=; b=PhWLPNnlZw5tFLC+T6FicRaRIlGLR66Uj6139NWhyfR/zeJTSDukjWb8xs+/MEkalk +vHSKZ0BRTrJhcxhpQL/uYNKRKZ6gArbFZaXpbnHsKe34U+oekQPx7d3DmSCeBXQ4ffv G1cPv/zjBwwWJStlHhQDBScuaB6GWV7+cfLqpDk72NfaWa9NlrnmyZsGyR5ik9IlQOJ2 IpiU3ipgXeTAD4z6JK8Kgb0/hm0gVD4umzptienyp6TwBinLcOmEQkZmShy6sxa1LffV f6TziKmizmeWBlnE6pMaB4bZQcb58rY9WdM2IzyMX87dl6E2vqGZY7WFwkKWbre9dfpm 44Nw== ARC-Authentication-Results: i=1; mx.google.com; dkim=neutral (body hash did not verify) header.i=@linaro.org header.b=gdroexNw; spf=pass (google.com: best guess record for domain of devicetree-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id l3si1276519pld.259.2017.06.14.20.06.19; Wed, 14 Jun 2017 20:06:19 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of devicetree-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=neutral (body hash did not verify) header.i=@linaro.org header.b=gdroexNw; spf=pass (google.com: best guess record for domain of devicetree-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752627AbdFODGR (ORCPT + 7 others); Wed, 14 Jun 2017 23:06:17 -0400 Received: from mail-pf0-f176.google.com ([209.85.192.176]:34098 "EHLO mail-pf0-f176.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752094AbdFODGP (ORCPT ); Wed, 14 Jun 2017 23:06:15 -0400 Received: by mail-pf0-f176.google.com with SMTP id s66so1402758pfs.1 for ; Wed, 14 Jun 2017 20:06:15 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=4jQ3O/BMN/V4rkRyXEsB59sUYtfxxLmhwukoxiNK9cI=; b=gdroexNwTrvYWzGWEqgWOoHQGd6wx3+3Sue3xFYODK8vVK5dga9zs6oBHnxWBD/IvR LXKuMSWJD925jTxszcWBzJO3M1MS/DKgoTALd/cLPyLsBCWcieZ2BBlCkY206J5zXBJq pU1Ad8nkY1HwthZOWhYlYnYTmxJTO8g2xT1Rk= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=4jQ3O/BMN/V4rkRyXEsB59sUYtfxxLmhwukoxiNK9cI=; b=g3cD0yLKRqQdFZs5/Lp+vGLBYL5hwA+uWXCq+j/AdzY+lVcF7+NIyE7oqu9OxnQVVe TDh3OUHeA8s1MttQsMXBZewC1+dYkoTnIAHCgPYwFUIxA7e9wD3KG3Nzo+mnxIyNhDuh J1YAI9/Kvz84XWYfbHawIh5zigF65O5zU0zWG8lUVihyO1gnwWHUjM2hmYkObwcunJW7 no8nxaTqZToQOaA7+Xze/cO6SNUiEEdF45QCP6imzXVCMAJQQ95eHhQUPLhHfboyzJf0 xJRhIxEE2wzLNq3+st8KwoJabQR2S062JDEDy7mWkE4PUgNkgxbps3nlhucfLFqJORp6 LE5w== X-Gm-Message-State: AKS2vOyxfQrR+8hz+9Jzs23fHFfGwY81Lf1j86J5av4iTzMeNlQB+c5F 7oodaL46fs6iFEhj X-Received: by 10.99.170.79 with SMTP id x15mr3174562pgo.248.1497495975130; Wed, 14 Jun 2017 20:06:15 -0700 (PDT) Received: from localhost.localdomain ([45.56.159.17]) by smtp.gmail.com with ESMTPSA id y65sm2156656pgd.33.2017.06.14.20.06.07 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Wed, 14 Jun 2017 20:06:14 -0700 (PDT) From: Guodong Xu To: lee.jones@linaro.org, robh+dt@kernel.org, mark.rutland@arm.com, xuwei5@hisilicon.com, catalin.marinas@arm.com, will.deacon@arm.com, lgirdwood@gmail.com, broonie@kernel.org, khilman@baylibre.com, arnd@arndb.de, gregory.clement@free-electrons.com, horms+renesas@verge.net.au, olof@lixom.net, thomas.petazzoni@free-electrons.com, yamada.masahiro@socionext.com, riku.voipio@linaro.org, treding@nvidia.com, krzk@kernel.org, eric@anholt.net, damm+renesas@opensource.se, ard.biesheuvel@linaro.org, linus.walleij@linaro.org, geert+renesas@glider.be Cc: devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, hw.wangxiaoyin@hisilicon.com, Chen Feng Subject: [PATCH v4 09/20] arm64: dts: hi3660: Add pl031 rtc node Date: Thu, 15 Jun 2017 11:04:06 +0800 Message-Id: <20170615030417.14059-10-guodong.xu@linaro.org> X-Mailer: git-send-email 2.10.2 In-Reply-To: <20170615030417.14059-1-guodong.xu@linaro.org> References: <20170615030417.14059-1-guodong.xu@linaro.org> Sender: devicetree-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org From: Chen Feng Add dts node to enable pl031 rtc. Signed-off-by: Chen Feng Acked-by: Rob Herring --- arch/arm64/boot/dts/hisilicon/hi3660.dtsi | 8 ++++++++ 1 file changed, 8 insertions(+) -- 2.10.2 -- To unsubscribe from this list: send the line "unsubscribe devicetree" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html diff --git a/arch/arm64/boot/dts/hisilicon/hi3660.dtsi b/arch/arm64/boot/dts/hisilicon/hi3660.dtsi index 7a90c92..3b2a3a7 100644 --- a/arch/arm64/boot/dts/hisilicon/hi3660.dtsi +++ b/arch/arm64/boot/dts/hisilicon/hi3660.dtsi @@ -326,6 +326,14 @@ status = "disabled"; }; + rtc0: rtc@fff04000 { + compatible = "arm,pl031", "arm,primecell"; + reg = <0x0 0Xfff04000 0x0 0x1000>; + interrupts = ; + clocks = <&crg_ctrl HI3660_PCLK>; + clock-names = "apb_pclk"; + }; + gpio0: gpio@e8a0b000 { compatible = "arm,pl061", "arm,primecell"; reg = <0 0xe8a0b000 0 0x1000>; From patchwork Thu Jun 15 03:04:11 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Guodong Xu X-Patchwork-Id: 105623 Delivered-To: patch@linaro.org Received: by 10.140.91.77 with SMTP id y71csp595776qgd; Wed, 14 Jun 2017 20:07:02 -0700 (PDT) X-Received: by 10.98.79.149 with SMTP id f21mr2964618pfj.222.1497496021906; Wed, 14 Jun 2017 20:07:01 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1497496021; cv=none; d=google.com; s=arc-20160816; b=LAWdoFnDC2x1h03NGmPVsR76DPUAfQczCSLnbHxLSv7fmssmm1OfVy+UT7R21kTHbO v1gsqBc4RNeK9yzMMwdpqa7NI2DjDusoWPlansTz8OnKLxC4y3TvMZu7ZWTFI9JWIkYN 3QAHQr1hZ/iFYwjHxL3NH84h1a3c6Zx7vWjMECq2I01Y28iGXaboz6+pcfeJz1FvSP80 HExDqlzNFcU9SiUq9cfiePcc1OsT0Ju31H5wGWGbjXHyvWe3ZtUkdzAnNtzoVb78G8i1 pV4k3RxjBMgX8UsXaYLpQap2By70QL7w9AyBTLpInqf7tB3nOoymP0jm9K0Gocx8V4wg /Vcw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:references:in-reply-to:message-id:date :subject:cc:to:from:dkim-signature:arc-authentication-results; bh=DsbpofoAuJkQmrb+/06rCTI3cVTprMNfbceZBcqjONg=; b=nTyBdNTqRmFgFxCMQPiaNtipxyG+ut0AMdlLT9N3m+Mq5AR3EbKwfaXBbFIvaOhfUX GaNhnJWDoRSoBPLdWyMrcbpZZLYqVpDP1PqPXZ7q1XEiRQc6Qu465tag+39TuOf/dZOU iC3KPkSfU9IeV8DjOXT2sw+DPffDYdighwC6VDdlhw3mnwhgVRG+O+zAjb/aY8vufFBn 2DiL1f93YJUBZq1Ya+6Go+/yqznzgbaEs9oR3qRH1XVt+1wQDy86YbpUXMFFoSKZ01Mu KHAuau+wjL/2OKn4mG0SA77wG6TFn8kl/zBZZpQ1/XUazrIn7j97gvkSCv9g7O+1DRBb PkoQ== ARC-Authentication-Results: i=1; mx.google.com; dkim=neutral (body hash did not verify) header.i=@linaro.org header.b=HNvNwvSK; spf=pass (google.com: best guess record for domain of devicetree-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id n34si1305188pld.268.2017.06.14.20.07.01; Wed, 14 Jun 2017 20:07:01 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of devicetree-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=neutral (body hash did not verify) header.i=@linaro.org header.b=HNvNwvSK; spf=pass (google.com: best guess record for domain of devicetree-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752352AbdFODG6 (ORCPT + 7 others); Wed, 14 Jun 2017 23:06:58 -0400 Received: from mail-pf0-f182.google.com ([209.85.192.182]:34248 "EHLO mail-pf0-f182.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752140AbdFODG4 (ORCPT ); Wed, 14 Jun 2017 23:06:56 -0400 Received: by mail-pf0-f182.google.com with SMTP id s66so1410201pfs.1 for ; Wed, 14 Jun 2017 20:06:56 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=l8HEG60ACS51qmx+5dpnRvo8Cd2RySFdr2XUItZtdDs=; b=HNvNwvSKYLHcfREvSLsqfOue4Xem235gEccuytGbg8MaIdOBXmx4n8WpaE5oUnPz0Z YqGU6H5TFzcGksR6jbZIP+R+QSmfQKDxhYHhhh9QEWsUIpu7rlQm3wGz2hCyQU7ukasM yMMZKiq/Y9hxcq0PmI+4G6YwufIIBIzWJ0LCo= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=l8HEG60ACS51qmx+5dpnRvo8Cd2RySFdr2XUItZtdDs=; b=rW3yhRrqtFSsGjsJKHO9ApAaXlGognFBLK6oC9vBbcLsqz70lyv69ThGE8a3CX2H6X lJWo0cBfcOaglE7vwrKTwKT2hZzbCYRCeXFSDeuJDZlEAEQeY+5wjEaHcpPEBLyfw8yF asg/s1Z5UiJI55cqzXmluEyV4VGj60oolkQJ0bDDNB89IkmRNkkQ6VU+NkeoqYnQ0Rw9 Hxw7h9j6S7LGTE8UE512NVMSd4Anjge3WWge3Qvg2zxa3yIW6GBM+x7gpzZYtOtZdMwC I2/VJcT/BeTFj/apVRjoUQjfvkcW5CUfGtlXhysgLq0BcHNPDTeqpDUUbwOLBo9RoMFq DnTQ== X-Gm-Message-State: AKS2vOwfRvE6nUVVxVQ7+h2Bltc8HZz/mxnbgcaXjp1qw7g1oXBCivkz XfpmYEZs/2cQuN3Y X-Received: by 10.84.142.131 with SMTP id 3mr2465505plx.211.1497496015763; Wed, 14 Jun 2017 20:06:55 -0700 (PDT) Received: from localhost.localdomain ([45.56.159.17]) by smtp.gmail.com with ESMTPSA id y65sm2156656pgd.33.2017.06.14.20.06.47 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Wed, 14 Jun 2017 20:06:55 -0700 (PDT) From: Guodong Xu To: lee.jones@linaro.org, robh+dt@kernel.org, mark.rutland@arm.com, xuwei5@hisilicon.com, catalin.marinas@arm.com, will.deacon@arm.com, lgirdwood@gmail.com, broonie@kernel.org, khilman@baylibre.com, arnd@arndb.de, gregory.clement@free-electrons.com, horms+renesas@verge.net.au, olof@lixom.net, thomas.petazzoni@free-electrons.com, yamada.masahiro@socionext.com, riku.voipio@linaro.org, treding@nvidia.com, krzk@kernel.org, eric@anholt.net, damm+renesas@opensource.se, ard.biesheuvel@linaro.org, linus.walleij@linaro.org, geert+renesas@glider.be Cc: devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, hw.wangxiaoyin@hisilicon.com, Xiaowei Song Subject: [PATCH v4 14/20] dt-bindings: PCI: hisi: Add document for PCIe of Kirin SoCs Date: Thu, 15 Jun 2017 11:04:11 +0800 Message-Id: <20170615030417.14059-15-guodong.xu@linaro.org> X-Mailer: git-send-email 2.10.2 In-Reply-To: <20170615030417.14059-1-guodong.xu@linaro.org> References: <20170615030417.14059-1-guodong.xu@linaro.org> Sender: devicetree-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org From: Xiaowei Song This patch adds document for PCIe of Kirin SoC series. Signed-off-by: Xiaowei Song Acked-by: Rob Herring --- .../devicetree/bindings/pci/kirin-pcie.txt | 50 ++++++++++++++++++++++ 1 file changed, 50 insertions(+) create mode 100644 Documentation/devicetree/bindings/pci/kirin-pcie.txt -- 2.10.2 -- To unsubscribe from this list: send the line "unsubscribe devicetree" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html diff --git a/Documentation/devicetree/bindings/pci/kirin-pcie.txt b/Documentation/devicetree/bindings/pci/kirin-pcie.txt new file mode 100644 index 0000000..68ffa0f --- /dev/null +++ b/Documentation/devicetree/bindings/pci/kirin-pcie.txt @@ -0,0 +1,50 @@ +HiSilicon Kirin SoCs PCIe host DT description + +Kirin PCIe host controller is based on Designware PCI core. +It shares common functions with PCIe Designware core driver +and inherits common properties defined in +Documentation/devicetree/bindings/pci/designware-pci.txt. + +Additional properties are described here: + +Required properties +- compatible: + "hisilicon,kirin960-pcie" for PCIe of Kirin960 SoC +- reg: Should contain rc_dbi, apb, phy, config registers location and length. +- reg-names: Must include the following entries: + "dbi": controller configuration registers; + "apb": apb Ctrl register defined by Kirin; + "phy": apb PHY register defined by Kirin; + "config": PCIe configuration space registers. +- reset-gpios: The gpio to generate PCIe perst assert and deassert signal. + +Optional properties: + +Example based on kirin960: + + pcie@f4000000 { + compatible = "hisilicon,kirin-pcie"; + reg = <0x0 0xf4000000 0x0 0x1000>, <0x0 0xff3fe000 0x0 0x1000>, + <0x0 0xf3f20000 0x0 0x40000>, <0x0 0xF4000000 0 0x2000>; + reg-names = "dbi","apb","phy", "config"; + bus-range = <0x0 0x1>; + #address-cells = <3>; + #size-cells = <2>; + device_type = "pci"; + ranges = <0x02000000 0x0 0x00000000 0x0 0xf5000000 0x0 0x2000000>; + num-lanes = <1>; + #interrupt-cells = <1>; + interrupt-map-mask = <0xf800 0 0 7>; + interrupt-map = <0x0 0 0 1 &gic 0 0 0 282 4>, + <0x0 0 0 2 &gic 0 0 0 283 4>, + <0x0 0 0 3 &gic 0 0 0 284 4>, + <0x0 0 0 4 &gic 0 0 0 285 4>; + clocks = <&crg_ctrl HI3660_PCIEPHY_REF>, + <&crg_ctrl HI3660_CLK_GATE_PCIEAUX>, + <&crg_ctrl HI3660_PCLK_GATE_PCIE_PHY>, + <&crg_ctrl HI3660_PCLK_GATE_PCIE_SYS>, + <&crg_ctrl HI3660_ACLK_GATE_PCIE>; + clock-names = "pcie_phy_ref", "pcie_aux", + "pcie_apb_phy", "pcie_apb_sys", "pcie_aclk"; + reset-gpios = <&gpio11 1 0 >; + }; From patchwork Thu Jun 15 03:04:15 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Guodong Xu X-Patchwork-Id: 105627 Delivered-To: patch@linaro.org Received: by 10.140.91.77 with SMTP id y71csp596036qgd; Wed, 14 Jun 2017 20:07:49 -0700 (PDT) X-Received: by 10.84.254.73 with SMTP id a9mr3632744pln.64.1497496069143; Wed, 14 Jun 2017 20:07:49 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1497496069; cv=none; d=google.com; s=arc-20160816; b=DJQhgoAu/B/mssPsBhdTt3SfEpmu8CWThT3YvPOFGhf/PAoqnFN06Z0+RF+MXVikcy OKaWuARAvR9h/g1U8+xXtiE99mxk/Tt1utPPbb0m02YyLSJp2oMcFjRzcdIdQaArGj4d oss6tp+nCpx2JgvKFvWg6ojcuKbGqQQacBY1m2E6BOaQSn9Q+DXuLM5yU76gMAPUgSKj PHS6fssP+sYeypVAeZ73SlVm0KggReeVzOlD4nID+npUPEmweZofGNQu3WebpJ5Ff3w1 Pyk/EBX2UP39MEDvcYyGM9xz6CkAIt+5gsqdRxvO42sHiEmj7qMtyftnmi99FohWcmQM ZMWw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:references:in-reply-to:message-id:date :subject:cc:to:from:dkim-signature:arc-authentication-results; bh=rrjPAgwGoj+ySd81Kr/3HrCsBW9d4Jv1wTvyL4qMzm0=; b=G+bH/4MJEWba7kVh4W058kFbE51ViSg9k1+Pr25SQA0HsGEp3MKqv9xqyj91cGCdVr JyhpEFzZRbwRVnEySMMNOvCCzkXX2/uIja+UdSzfxLjpNZqk+zjMVdHzDREbaNn5fVey z7RFGp/VqGdgTg+uC7HY0+BlMU+o4WbjAvwzEkyV0wzKMZy8qF0gIEbmaaGbzDG5cTOk LaJ6tgP9VZFkM+kDHrn1wvMgtOb4P60nvbaRDrMm7oMPm/n+TWr+E7GKpSUg+nhGVUDc Npl0ATkigPVmcdLYQAHxuCbBmxECIMBU3mIEMQBuwTlsjaB4AwPNHIxP/UbQcDlrUMxF Jkvg== ARC-Authentication-Results: i=1; mx.google.com; dkim=neutral (body hash did not verify) header.i=@linaro.org header.b=adFsJx/z; spf=pass (google.com: best guess record for domain of devicetree-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id y2si1366399pli.466.2017.06.14.20.07.48; Wed, 14 Jun 2017 20:07:49 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of devicetree-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=neutral (body hash did not verify) header.i=@linaro.org header.b=adFsJx/z; spf=pass (google.com: best guess record for domain of devicetree-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752528AbdFODHg (ORCPT + 7 others); Wed, 14 Jun 2017 23:07:36 -0400 Received: from mail-pf0-f176.google.com ([209.85.192.176]:34368 "EHLO mail-pf0-f176.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752072AbdFODHd (ORCPT ); Wed, 14 Jun 2017 23:07:33 -0400 Received: by mail-pf0-f176.google.com with SMTP id s66so1416227pfs.1 for ; Wed, 14 Jun 2017 20:07:33 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=pOYnsQ2+b18ER44AMdrCMT0yzTGMagCzI3sJ46oih9E=; b=adFsJx/zmOrXErUa0eQeH+L3ILLH7NibMf3QwWppLjfbivsxrVncS5AlBPJIvw7URl 6HdJ2tH2jLkuhakaGGQuczqBqzJuKIp06AXZpkCZ54ORZFDRfTcgrzCxBLjoHAbUdIM7 XdRHhFYIRDZ2hLU4/Sxw578d+YvTYC9awwMTc= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=pOYnsQ2+b18ER44AMdrCMT0yzTGMagCzI3sJ46oih9E=; b=DOAkYDe+5z31Gy4Vt+ZEGiq0tyDxv2Jk6Gnf4WmJWmYkwVjImJDRGhStvFaFtvtf4q Oa7momLUWwmH33Rdv4+vVAFgHcCzCpWyyJyw8XJi9oMDXVmK23eURov8uxIVF1sPKN3K uwBDn0ttDuR+ZznvOq5qAI430AUDpDGkh9LRiUtOzb+LPzuCb4Pu1Fm1IeZPt7xwF94u 29piMuk+QIl57wWiKw+vbveYbR13vaaPkwnkrbLLKg2QvrbINoPbdG9GHRQRhhdG6MZT r+viFom+mbAH6GeoUCTMAxKyJMJJNMiev1aBbnUk9aYqidYhtnXaQOTJPk2U52v89x2k Wjew== X-Gm-Message-State: AKS2vOx1EWBPjOCVT9N1YDuoIVVcdD9Cr9rPriJr3K7tsPDIS/+fHnS5 sEDr25lt1TmR/nza X-Received: by 10.84.137.165 with SMTP id 34mr3567880pln.167.1497496048167; Wed, 14 Jun 2017 20:07:28 -0700 (PDT) Received: from localhost.localdomain ([45.56.159.17]) by smtp.gmail.com with ESMTPSA id y65sm2156656pgd.33.2017.06.14.20.07.20 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Wed, 14 Jun 2017 20:07:27 -0700 (PDT) From: Guodong Xu To: lee.jones@linaro.org, robh+dt@kernel.org, mark.rutland@arm.com, xuwei5@hisilicon.com, catalin.marinas@arm.com, will.deacon@arm.com, lgirdwood@gmail.com, broonie@kernel.org, khilman@baylibre.com, arnd@arndb.de, gregory.clement@free-electrons.com, horms+renesas@verge.net.au, olof@lixom.net, thomas.petazzoni@free-electrons.com, yamada.masahiro@socionext.com, riku.voipio@linaro.org, treding@nvidia.com, krzk@kernel.org, eric@anholt.net, damm+renesas@opensource.se, ard.biesheuvel@linaro.org, linus.walleij@linaro.org, geert+renesas@glider.be Cc: devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, hw.wangxiaoyin@hisilicon.com, Guodong Xu , Li Wei Subject: [PATCH v4 18/20] dt-bindings: mmc: dw_mmc-k3: add document of hi3660 mmc Date: Thu, 15 Jun 2017 11:04:15 +0800 Message-Id: <20170615030417.14059-19-guodong.xu@linaro.org> X-Mailer: git-send-email 2.10.2 In-Reply-To: <20170615030417.14059-1-guodong.xu@linaro.org> References: <20170615030417.14059-1-guodong.xu@linaro.org> Sender: devicetree-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Add bindings for hi3660 mmc support Signed-off-by: Li Wei Signed-off-by: Guodong Xu --- Documentation/devicetree/bindings/mmc/k3-dw-mshc.txt | 1 + 1 file changed, 1 insertion(+) -- 2.10.2 -- To unsubscribe from this list: send the line "unsubscribe devicetree" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html diff --git a/Documentation/devicetree/bindings/mmc/k3-dw-mshc.txt b/Documentation/devicetree/bindings/mmc/k3-dw-mshc.txt index df37058..8af1afc 100644 --- a/Documentation/devicetree/bindings/mmc/k3-dw-mshc.txt +++ b/Documentation/devicetree/bindings/mmc/k3-dw-mshc.txt @@ -12,6 +12,7 @@ extensions to the Synopsys Designware Mobile Storage Host Controller. Required Properties: * compatible: should be one of the following. + - "hisilicon,hi3660-dw-mshc": for controllers with hi3660 specific extensions. - "hisilicon,hi4511-dw-mshc": for controllers with hi4511 specific extensions. - "hisilicon,hi6220-dw-mshc": for controllers with hi6220 specific extensions. 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Wed, 14 Jun 2017 20:07:36 -0700 (PDT) Received: from localhost.localdomain ([45.56.159.17]) by smtp.gmail.com with ESMTPSA id y65sm2156656pgd.33.2017.06.14.20.07.28 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Wed, 14 Jun 2017 20:07:35 -0700 (PDT) From: Guodong Xu To: lee.jones@linaro.org, robh+dt@kernel.org, mark.rutland@arm.com, xuwei5@hisilicon.com, catalin.marinas@arm.com, will.deacon@arm.com, lgirdwood@gmail.com, broonie@kernel.org, khilman@baylibre.com, arnd@arndb.de, gregory.clement@free-electrons.com, horms+renesas@verge.net.au, olof@lixom.net, thomas.petazzoni@free-electrons.com, yamada.masahiro@socionext.com, riku.voipio@linaro.org, treding@nvidia.com, krzk@kernel.org, eric@anholt.net, damm+renesas@opensource.se, ard.biesheuvel@linaro.org, linus.walleij@linaro.org, geert+renesas@glider.be Cc: devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, hw.wangxiaoyin@hisilicon.com, Li Wei , Chen Jun Subject: [PATCH v4 19/20] arm64: dts: hi3660: add sd/sdio device nodes Date: Thu, 15 Jun 2017 11:04:16 +0800 Message-Id: <20170615030417.14059-20-guodong.xu@linaro.org> X-Mailer: git-send-email 2.10.2 In-Reply-To: <20170615030417.14059-1-guodong.xu@linaro.org> References: <20170615030417.14059-1-guodong.xu@linaro.org> Sender: devicetree-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org From: Li Wei Add sd/sdio device nodes for hi3660 soc Signed-off-by: Li Wei Signed-off-by: Chen Jun --- arch/arm64/boot/dts/hisilicon/hi3660-hikey960.dts | 8 ++++ arch/arm64/boot/dts/hisilicon/hi3660.dtsi | 58 +++++++++++++++++++++++ 2 files changed, 66 insertions(+) -- 2.10.2 -- To unsubscribe from this list: send the line "unsubscribe devicetree" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html diff --git a/arch/arm64/boot/dts/hisilicon/hi3660-hikey960.dts b/arch/arm64/boot/dts/hisilicon/hi3660-hikey960.dts index e579333..cec0b60 100644 --- a/arch/arm64/boot/dts/hisilicon/hi3660-hikey960.dts +++ b/arch/arm64/boot/dts/hisilicon/hi3660-hikey960.dts @@ -18,6 +18,8 @@ compatible = "hisilicon,hi3660-hikey960", "hisilicon,hi3660"; aliases { + mshc1 = &dwmmc1; + mshc2 = &dwmmc2; serial0 = &uart0; serial1 = &uart1; serial2 = &uart2; @@ -200,3 +202,9 @@ label = "HS-SPI1"; status = "okay"; }; + +&dwmmc1 { + vmmc-supply = <&ldo16>; + vqmmc-supply = <&ldo9>; + status = "okay"; +}; diff --git a/arch/arm64/boot/dts/hisilicon/hi3660.dtsi b/arch/arm64/boot/dts/hisilicon/hi3660.dtsi index 529cf08..f7ff593 100644 --- a/arch/arm64/boot/dts/hisilicon/hi3660.dtsi +++ b/arch/arm64/boot/dts/hisilicon/hi3660.dtsi @@ -786,5 +786,63 @@ reset-gpios = <&gpio11 1 0 >; status = "ok"; }; + + /* SD */ + dwmmc1: dwmmc1@ff37f000 { + #address-cells = <1>; + #size-cells = <0>; + cd-inverted; + compatible = "hisilicon,hi3660-dw-mshc"; + num-slots = <1>; + bus-width = <0x4>; + disable-wp; + cap-sd-highspeed; + supports-highspeed; + card-detect-delay = <200>; + reg = <0x0 0xff37f000 0x0 0x1000>; + interrupts = ; + clocks = <&crg_ctrl HI3660_CLK_GATE_SD>, + <&crg_ctrl HI3660_HCLK_GATE_SD>; + clock-names = "ciu", "biu"; + clock-frequency = <3200000>; + resets = <&crg_rst 0x94 18>; + cd-gpios = <&gpio25 3 0>; + hisilicon,peripheral-syscon = <&sctrl>; + pinctrl-names = "default"; + pinctrl-0 = <&sd_pmx_func + &sd_clk_cfg_func + &sd_cfg_func>; + sd-uhs-sdr12; + sd-uhs-sdr25; + sd-uhs-sdr50; + sd-uhs-sdr104; + status = "disabled"; + + slot@0 { + reg = <0x0>; + bus-width = <4>; + disable-wp; + }; + }; + + /* SDIO */ + dwmmc2: dwmmc2@ff3ff000 { + compatible = "hisilicon,hi3660-dw-mshc"; + reg = <0x0 0xff3ff000 0x0 0x1000>; + interrupts = ; + num-slots = <1>; + clocks = <&crg_ctrl HI3660_CLK_GATE_SDIO0>, + <&crg_ctrl HI3660_HCLK_GATE_SDIO0>; + clock-names = "ciu", "biu"; + resets = <&crg_rst 0x94 20>; + card-detect-delay = <200>; + supports-highspeed; + keep-power-in-suspend; + pinctrl-names = "default"; + pinctrl-0 = <&sdio_pmx_func + &sdio_clk_cfg_func + &sdio_cfg_func>; + status = "disabled"; + }; }; };