From patchwork Mon Oct 28 09:32:48 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Roger Quadros X-Patchwork-Id: 177890 Delivered-To: patch@linaro.org Received: by 2002:ac9:3c86:0:0:0:0:0 with SMTP id w6csp2822674ocf; Mon, 28 Oct 2019 02:33:11 -0700 (PDT) X-Google-Smtp-Source: APXvYqx1rLF8KpGPCkg+PRLFnRNBC1WBJz1q1zT9Z3VkjlO2QoQR12szNAOZaboNYkPKuIJ79w4N X-Received: by 2002:a50:9254:: with SMTP id j20mr19191265eda.0.1572255190931; Mon, 28 Oct 2019 02:33:10 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1572255190; cv=none; d=google.com; s=arc-20160816; b=KSJZ6cFA7pFjqmqK9NRAzzP576tFj/KRVRZwlEdFBQ4cpbOzJ/HTjqIpqShX6jJG7o 8p1oHNTyjDZTRgReObiQ9hvdMHezLZBtCTwYNgLn4MTBzkFHXTc/9vzaajNAofQ5fXh6 6gTP9TwTh0ITGbbMlduJDF0s70JTo3Eq+7HZVFAj4PTw4ncOiA9X5WZyJ810SUTw2XPN 6EiFb3COdEv3V2PnBJVGGcTwg4p1cZyqR1fcQCDoHjQxIFjJM8Eh16ubQlcNLIwAM0aC 1BNr/JytjbEJxj3f3jpPAzji2lTjq0a67qNPg6zf6Zu4JHX4tdHsVta02AlyRZrj7hTr wfOA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:dkim-signature; bh=rxOusbRtzaWzRY2Rmf9rDM18cyDMtpOkDzV61r0xEIQ=; b=NTSKtM9wbtR2QXSAsuGiwRRG06H5Y6ocyVG7SMTZw2Tbdxx7DIvEn3IgafdjG7QpDQ UbQaWwCd2YtyM+GmeChvzirAuNGx2qz3KwdAtiFi9NMhRHFGYBcMtQukZXN87pXTtL17 yOb5DrgaTEpbA3QpzIjPe7JK7qCJGM+WXqdImtzxTdfVbE1iFsO+FdEPTRClsx9Fal/Y tdK7LW6fOwb8B7c/FBda+pzLk64lWsVkpiQBApiwHZ0DAvkUf0llIleAM2bnWg8LZ9+n RpC7O0WSt9kYFwmgHZrvgM18Ly/N/lxdPDhirCLWLijsVFGnDoOzNoPk+wAGvavnhtoB +SVA== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@ti.com header.s=ti-com-17Q1 header.b="ZG/to7uC"; spf=pass (google.com: best guess record for domain of devicetree-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=NONE dis=NONE) header.from=ti.com Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id 18si2470592ejv.363.2019.10.28.02.33.10; Mon, 28 Oct 2019 02:33:10 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of devicetree-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@ti.com header.s=ti-com-17Q1 header.b="ZG/to7uC"; spf=pass (google.com: best guess record for domain of devicetree-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=NONE dis=NONE) header.from=ti.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1731462AbfJ1JdK (ORCPT + 8 others); Mon, 28 Oct 2019 05:33:10 -0400 Received: from lelv0142.ext.ti.com ([198.47.23.249]:49290 "EHLO lelv0142.ext.ti.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1730512AbfJ1JdK (ORCPT ); Mon, 28 Oct 2019 05:33:10 -0400 Received: from lelv0266.itg.ti.com ([10.180.67.225]) by lelv0142.ext.ti.com (8.15.2/8.15.2) with ESMTP id x9S9WxKL109675; Mon, 28 Oct 2019 04:32:59 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ti.com; s=ti-com-17Q1; t=1572255179; bh=rxOusbRtzaWzRY2Rmf9rDM18cyDMtpOkDzV61r0xEIQ=; h=From:To:CC:Subject:Date:In-Reply-To:References; b=ZG/to7uCMakJ7BiMfKlt4bUZAsM43Zy2mN00eNFiPTZ+pPj6X7Wj1pv869yOnaKTK 5D/mZQnwKyv0oqlUsDYW/xgCjZ8a5AKvbtapJlgdk2tobQ069a1psDGyWJI/BSIvHw b45RPcoxT7IkWqehC+yS0qD9anpSOY5z0KanqDJ8= Received: from DFLE115.ent.ti.com (dfle115.ent.ti.com [10.64.6.36]) by lelv0266.itg.ti.com (8.15.2/8.15.2) with ESMTPS id x9S9Wxh3066026 (version=TLSv1.2 cipher=AES256-GCM-SHA384 bits=256 verify=FAIL); Mon, 28 Oct 2019 04:32:59 -0500 Received: from DFLE103.ent.ti.com (10.64.6.24) by DFLE115.ent.ti.com (10.64.6.36) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.1713.5; Mon, 28 Oct 2019 04:32:47 -0500 Received: from lelv0327.itg.ti.com (10.180.67.183) by DFLE103.ent.ti.com (10.64.6.24) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.1713.5 via Frontend Transport; Mon, 28 Oct 2019 04:32:59 -0500 Received: from lta0400828a.ti.com (ileax41-snat.itg.ti.com [10.172.224.153]) by lelv0327.itg.ti.com (8.15.2/8.15.2) with ESMTP id x9S9WrLT072531; Mon, 28 Oct 2019 04:32:56 -0500 From: Roger Quadros To: , CC: , , , , , , , , Roger Quadros , Rob Herring Subject: [PATCH v4 1/2] dt-bindings: usb: Add binding for the TI wrapper for Cadence USB3 controller Date: Mon, 28 Oct 2019 11:32:48 +0200 Message-ID: <20191028093249.22822-2-rogerq@ti.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20191028093249.22822-1-rogerq@ti.com> References: <20191028093249.22822-1-rogerq@ti.com> MIME-Version: 1.0 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 Sender: devicetree-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org TI platforms have a wrapper module around the Cadence USB3 controller. Add binding information for that. Signed-off-by: Roger Quadros Cc: Rob Herring Reviewed-by: Rob Herring --- .../devicetree/bindings/usb/ti,j721e-usb.yaml | 86 +++++++++++++++++++ 1 file changed, 86 insertions(+) create mode 100644 Documentation/devicetree/bindings/usb/ti,j721e-usb.yaml -- Texas Instruments Finland Oy, Porkkalankatu 22, 00180 Helsinki. Y-tunnus/Business ID: 0615521-4. Kotipaikka/Domicile: Helsinki diff --git a/Documentation/devicetree/bindings/usb/ti,j721e-usb.yaml b/Documentation/devicetree/bindings/usb/ti,j721e-usb.yaml new file mode 100644 index 000000000000..5f5264b2e9ad --- /dev/null +++ b/Documentation/devicetree/bindings/usb/ti,j721e-usb.yaml @@ -0,0 +1,86 @@ +# SPDX-License-Identifier: GPL-2.0 +%YAML 1.2 +--- +$id: "http://devicetree.org/schemas/usb/ti,j721e-usb.yaml#" +$schema: "http://devicetree.org/meta-schemas/core.yaml#" + +title: Bindings for the TI wrapper module for the Cadence USBSS-DRD controller + +maintainers: + - Roger Quadros + +properties: + compatible: + items: + - const: ti,j721e-usb + + reg: + description: module registers + + power-domains: + description: + PM domain provider node and an args specifier containing + the USB device id value. See, + Documentation/devicetree/bindings/soc/ti/sci-pm-domain.txt + + clocks: + description: Clock phandles to usb2_refclk and lpm_clk + minItems: 2 + maxItems: 2 + + clock-names: + items: + - const: ref + - const: lpm + + ti,usb2-only: + description: + If present, it restricts the controller to USB2.0 mode of + operation. Must be present if USB3 PHY is not available + for USB. + type: boolean + + ti,vbus-divider: + description: + Should be present if USB VBUS line is connected to the + VBUS pin of the SoC via a 1/3 voltage divider. + type: boolean + +required: + - compatible + - reg + - power-domains + - clocks + - clock-names + +examples: + - | + #include + #include + cdns_usb@4104000 { + compatible = "ti,j721e-usb"; + reg = <0x00 0x4104000 0x00 0x100>; + power-domains = <&k3_pds 288 TI_SCI_PD_EXCLUSIVE>; + clocks = <&k3_clks 288 15>, <&k3_clks 288 3>; + clock-names = "ref", "lpm"; + assigned-clocks = <&k3_clks 288 15>; /* USB2_REFCLK */ + assigned-clock-parents = <&k3_clks 288 16>; /* HFOSC0 */ + #address-cells = <2>; + #size-cells = <2>; + + usb@6000000 { + compatible = "cdns,usb3"; + reg = <0x00 0x6000000 0x00 0x10000>, + <0x00 0x6010000 0x00 0x10000>, + <0x00 0x6020000 0x00 0x10000>; + reg-names = "otg", "xhci", "dev"; + interrupts = , /* irq.0 */ + , /* irq.6 */ + ; /* otgirq.0 */ + interrupt-names = "host", + "peripheral", + "otg"; + maximum-speed = "super-speed"; + dr_mode = "otg"; + }; + };