From patchwork Mon Oct 28 09:37:29 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Roger Quadros X-Patchwork-Id: 177894 Delivered-To: patch@linaro.org Received: by 2002:ac9:3c86:0:0:0:0:0 with SMTP id w6csp2827104ocf; Mon, 28 Oct 2019 02:37:48 -0700 (PDT) X-Google-Smtp-Source: APXvYqyt94jT635aL9RM+U9TyhBQmohTPVs9wpbSiieZvN8/a7RteWvniJFtZR1xkMASPGqy7/F7 X-Received: by 2002:a50:ee95:: with SMTP id f21mr17462408edr.18.1572255468793; Mon, 28 Oct 2019 02:37:48 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1572255468; cv=none; d=google.com; s=arc-20160816; b=j0X2484W1lCVYLIVmg6mlyOsvz3vslPH5TAX/I3QH14Jt8eI0WIbt8oP9QWjWIpbus UXRM7Vx2m4zi5rDQ8J3Jv8WSiTqbaPWlzW3utOHGiys0APiRMPpsMaNR5pfRgzD7Tl4F OExwVJpMOm3dzyabziuIlfCbUSqdIqUqec/p3e4KAa2LTB7lgoxV6jcGMV3v9LeAWKQi KffxC6GA3LvUQ0n59GSpDQXuChjyTbo7QM36jcXRD4lY0KoyUbdt21DPdF38iqa74BZR 1ophMnrZ5ZSAZXhJwzp6KGhzrMRlZRa/nUXp493NR9tVB0FSU6P1h5RQqHQuyjFbRBVS DIoQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:dkim-signature; bh=3wwLSChl77jpkXMK71yrcydRlb1ZTHR8pcWLuLcJ2nc=; b=dIZsyg1D28JUVJ+z+ya2KK/akWJgzd4FzjhFoVwGEyytlqx4qJGleG60UIZwp8J6t9 hSCk+vFxtBHJhllC170b59jKV9pPVOIDG2pj846HvukZB7HoW7DHTZNa8DMAOFQu4jBa kbz8R+SO2no1Yjlbc8/pVAVPWjNR+d+Quu4gtWnURqX0695656yqBfKxaFvKoVJO2HgI ogarWWId362FJJaF50IacV0rMsll5k6Oqvf6C5aexx1l4y6GQ6AyuUM6HWOrYDWqQn44 dCu1RU99SG8UeaHckiVdG+S1wtlR0ll4mjbfnerUtxZQKetwggx2q4sR5ekrAz2Co2Vw enEw== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@ti.com header.s=ti-com-17Q1 header.b=spStOvHW; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=NONE dis=NONE) header.from=ti.com Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id q19si6308480ejn.299.2019.10.28.02.37.48; Mon, 28 Oct 2019 02:37:48 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@ti.com header.s=ti-com-17Q1 header.b=spStOvHW; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=NONE dis=NONE) header.from=ti.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S2387956AbfJ1Jho (ORCPT + 26 others); Mon, 28 Oct 2019 05:37:44 -0400 Received: from lelv0142.ext.ti.com ([198.47.23.249]:50046 "EHLO lelv0142.ext.ti.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1733224AbfJ1Jhm (ORCPT ); Mon, 28 Oct 2019 05:37:42 -0400 Received: from fllv0035.itg.ti.com ([10.64.41.0]) by lelv0142.ext.ti.com (8.15.2/8.15.2) with ESMTP id x9S9baxP111328; Mon, 28 Oct 2019 04:37:36 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ti.com; s=ti-com-17Q1; t=1572255456; bh=3wwLSChl77jpkXMK71yrcydRlb1ZTHR8pcWLuLcJ2nc=; h=From:To:CC:Subject:Date:In-Reply-To:References; b=spStOvHWxc0inLl4sxnsTCXc3X3jb1ZkAvaCknJx+16Zc60ryotk5LdXHQ98QJkyv 7hNJp+GTt3l/CYhQshPusU9w2g2XeR9zHGrbzgC4C+zWBxRz6WxlavPIHUvM7YtCTW xrzjSL1gxf0VkBZqdMz9cuvXndsL3/9Fh9eTXhKc= Received: from DLEE113.ent.ti.com (dlee113.ent.ti.com [157.170.170.24]) by fllv0035.itg.ti.com (8.15.2/8.15.2) with ESMTP id x9S9baca062672; Mon, 28 Oct 2019 04:37:36 -0500 Received: from DLEE114.ent.ti.com (157.170.170.25) by DLEE113.ent.ti.com (157.170.170.24) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.1713.5; Mon, 28 Oct 2019 04:37:24 -0500 Received: from lelv0326.itg.ti.com (10.180.67.84) by DLEE114.ent.ti.com (157.170.170.25) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.1713.5 via Frontend Transport; Mon, 28 Oct 2019 04:37:24 -0500 Received: from lta0400828a.ti.com (ileax41-snat.itg.ti.com [10.172.224.153]) by lelv0326.itg.ti.com (8.15.2/8.15.2) with ESMTP id x9S9bW4h027237; Mon, 28 Oct 2019 04:37:34 -0500 From: Roger Quadros To: , CC: , , Roger Quadros , Sekhar Nori Subject: [PATCH 1/2] arm64: dts: ti: k3-j721e-main: add USB controller nodes Date: Mon, 28 Oct 2019 11:37:29 +0200 Message-ID: <20191028093730.23094-2-rogerq@ti.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20191028093730.23094-1-rogerq@ti.com> References: <20191028093730.23094-1-rogerq@ti.com> MIME-Version: 1.0 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org J721e has 2 USB super-speed controllers add them. The USB2 PHY doesn't need any configuration. USB3 PHY needs to be implemented using the Cadence Sierra PHY. This support will be added later. Signed-off-by: Roger Quadros Signed-off-by: Sekhar Nori --- arch/arm64/boot/dts/ti/k3-j721e-main.dtsi | 60 +++++++++++++++++++++++ arch/arm64/boot/dts/ti/k3-j721e.dtsi | 2 + 2 files changed, 62 insertions(+) -- Texas Instruments Finland Oy, Porkkalankatu 22, 00180 Helsinki. Y-tunnus/Business ID: 0615521-4. Kotipaikka/Domicile: Helsinki diff --git a/arch/arm64/boot/dts/ti/k3-j721e-main.dtsi b/arch/arm64/boot/dts/ti/k3-j721e-main.dtsi index 5dd2a69402e6..1e4c2b78d66d 100644 --- a/arch/arm64/boot/dts/ti/k3-j721e-main.dtsi +++ b/arch/arm64/boot/dts/ti/k3-j721e-main.dtsi @@ -536,4 +536,64 @@ dma-coherent; no-1-8-v; }; + + usbss0: cdns_usb@4104000 { + compatible = "ti,j721e-usb"; + reg = <0x00 0x4104000 0x00 0x100>; + dma-coherent; + power-domains = <&k3_pds 288 TI_SCI_PD_EXCLUSIVE>; + clocks = <&k3_clks 288 15>, <&k3_clks 288 3>; + clock-names = "ref", "lpm"; + assigned-clocks = <&k3_clks 288 15>; /* USB2_REFCLK */ + assigned-clock-parents = <&k3_clks 288 16>; /* HFOSC0 */ + #address-cells = <2>; + #size-cells = <2>; + ranges; + + usb0: usb@6000000 { + compatible = "cdns,usb3"; + reg = <0x00 0x6000000 0x00 0x10000>, + <0x00 0x6010000 0x00 0x10000>, + <0x00 0x6020000 0x00 0x10000>; + reg-names = "otg", "xhci", "dev"; + interrupts = , /* irq.0 */ + , /* irq.6 */ + ; /* otgirq.0 */ + interrupt-names = "host", + "peripheral", + "otg"; + maximum-speed = "super-speed"; + dr_mode = "otg"; + }; + }; + + usbss1: cdns_usb@4114000 { + compatible = "ti,j721e-usb"; + reg = <0x00 0x4114000 0x00 0x100>; + dma-coherent; + power-domains = <&k3_pds 289 TI_SCI_PD_EXCLUSIVE>; + clocks = <&k3_clks 289 15>, <&k3_clks 289 3>; + clock-names = "ref", "lpm"; + assigned-clocks = <&k3_clks 289 15>; /* USB2_REFCLK */ + assigned-clock-parents = <&k3_clks 289 16>; /* HFOSC0 */ + #address-cells = <2>; + #size-cells = <2>; + ranges; + + usb1: usb@6400000 { + compatible = "cdns,usb3"; + reg = <0x00 0x6400000 0x00 0x10000>, + <0x00 0x6410000 0x00 0x10000>, + <0x00 0x6420000 0x00 0x10000>; + reg-names = "otg", "xhci", "dev"; + interrupts = , /* irq.0 */ + , /* irq.6 */ + ; /* otgirq.0 */ + interrupt-names = "host", + "peripheral", + "otg"; + maximum-speed = "super-speed"; + dr_mode = "otg"; + }; + }; }; diff --git a/arch/arm64/boot/dts/ti/k3-j721e.dtsi b/arch/arm64/boot/dts/ti/k3-j721e.dtsi index 43ea1ba97922..ee5470edb435 100644 --- a/arch/arm64/boot/dts/ti/k3-j721e.dtsi +++ b/arch/arm64/boot/dts/ti/k3-j721e.dtsi @@ -127,6 +127,8 @@ <0x00 0x00600000 0x00 0x00600000 0x00 0x00031100>, /* GPIO */ <0x00 0x00900000 0x00 0x00900000 0x00 0x00012000>, /* serdes */ <0x00 0x00A40000 0x00 0x00A40000 0x00 0x00000800>, /* timesync router */ + <0x00 0x06000000 0x00 0x06000000 0x00 0x00400000>, /* USBSS0 */ + <0x00 0x06400000 0x00 0x06400000 0x00 0x00400000>, /* USBSS1 */ <0x00 0x01000000 0x00 0x01000000 0x00 0x0af02400>, /* Most peripherals */ <0x00 0x30800000 0x00 0x30800000 0x00 0x0bc00000>, /* MAIN NAVSS */ <0x00 0x0d000000 0x00 0x0d000000 0x00 0x01000000>, /* PCIe Core*/ From patchwork Mon Oct 28 09:37:30 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Roger Quadros X-Patchwork-Id: 177895 Delivered-To: patch@linaro.org Received: by 2002:ac9:3c86:0:0:0:0:0 with SMTP id w6csp2827114ocf; Mon, 28 Oct 2019 02:37:49 -0700 (PDT) X-Google-Smtp-Source: APXvYqxzmp5f/XAoq1pfMi7hGZ5H3rSmVtEug/uvqaEOe+ob4ojYLUV9Ua4i4Xy4XnvRJ6A3Dicf X-Received: by 2002:a17:906:a459:: with SMTP id cb25mr15468008ejb.63.1572255469293; Mon, 28 Oct 2019 02:37:49 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1572255469; cv=none; d=google.com; s=arc-20160816; b=BhrbIHqb7zD/XZvMXid8nabsr3WTrMN9RhV5ycFm81UWT/N01CPobihCBP4cUxJFyg cHL6Gi4edoXw8cdA2/YR6jMzEuvfHFRh4WDngzjJUAh3AU5AVuFVrwgzBM9QXGte0Bee uQHA7FKASUyLqIvrYWEzxVRmrNSRspdIJIiLTcYfSkWXNRgq4AoGFtCRUatHJ7ytDxSF /+dWRC0eEiW6c7tErHBJNLPf2KSD4gWgdJgUVR65A8MGG1b0BPpo4coRHjK/qwCi6XHB 4gsM5l2I+1QnpfowR4/NNtgnl2Z9FuIozs9nca3zhlH+Yn3Rl7IbY2UjbJ1N1/MbeetN LlKA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:dkim-signature; bh=s0Ju9MGTwhkdP/osJmJnHaang4k/pcUHy4/CGtiLVgY=; b=sVdRbp8bEcmX0k7EahpeGm7wmPh0x11/YLq5TCiuguuBuyC8vsmMUSI7wsWXsJLMpE SGYBwIGyejFguvp0KiaqkyZP1e80WWZphY9Lvjl+wfn4zIFazGGnDS9niyPl6UGzitGw TYTWFeoIGmUW3sP0Br/E+zTtRiWvZIYk/jRs4dZiVwbZ61H3G5qaIRvhmsLyfsOnWsD9 CNz1+GNI5RxVX45/GC8CIQkC7Q58mvIJTcGPMyiLbnmSCBNapGET+RS9ZPjiC33NjuOM W8Pr2FO+wklcpf/cXA6qJnI75Dpg0tfmM2oqBL2f/RbpQUUD4tWK/CtdkoIxCzPQwJCc WXtg== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@ti.com header.s=ti-com-17Q1 header.b=VD0ECpbc; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=NONE dis=NONE) header.from=ti.com Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id q19si6308480ejn.299.2019.10.28.02.37.49; Mon, 28 Oct 2019 02:37:49 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@ti.com header.s=ti-com-17Q1 header.b=VD0ECpbc; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=NONE dis=NONE) header.from=ti.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S2387999AbfJ1Jhr (ORCPT + 26 others); Mon, 28 Oct 2019 05:37:47 -0400 Received: from fllv0015.ext.ti.com ([198.47.19.141]:41490 "EHLO fllv0015.ext.ti.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1733224AbfJ1Jhq (ORCPT ); Mon, 28 Oct 2019 05:37:46 -0400 Received: from fllv0034.itg.ti.com ([10.64.40.246]) by fllv0015.ext.ti.com (8.15.2/8.15.2) with ESMTP id x9S9bhGQ098567; Mon, 28 Oct 2019 04:37:43 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ti.com; s=ti-com-17Q1; t=1572255463; bh=s0Ju9MGTwhkdP/osJmJnHaang4k/pcUHy4/CGtiLVgY=; h=From:To:CC:Subject:Date:In-Reply-To:References; b=VD0ECpbch/kmp674QDI9sBS6i/jrIfZJ7bVnhMhnXF6GLkXtggfzZQTmUi/yQetgc E1HNl8mTeE2yzzpfF4AYtbiSKCptMi+C1buIprjtYKyH/vo/n0DhGcpwfgBwY2v8P1 MJVeq6AlTT38ktByE+FmqR4xbCGTM8DKVUqJFpIo= Received: from DLEE106.ent.ti.com (dlee106.ent.ti.com [157.170.170.36]) by fllv0034.itg.ti.com (8.15.2/8.15.2) with ESMTPS id x9S9bhme005966 (version=TLSv1.2 cipher=AES256-GCM-SHA384 bits=256 verify=FAIL); Mon, 28 Oct 2019 04:37:43 -0500 Received: from DLEE102.ent.ti.com (157.170.170.32) by DLEE106.ent.ti.com (157.170.170.36) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.1713.5; Mon, 28 Oct 2019 04:37:38 -0500 Received: from lelv0326.itg.ti.com (10.180.67.84) by DLEE102.ent.ti.com (157.170.170.32) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.1713.5 via Frontend Transport; Mon, 28 Oct 2019 04:37:26 -0500 Received: from lta0400828a.ti.com (ileax41-snat.itg.ti.com [10.172.224.153]) by lelv0326.itg.ti.com (8.15.2/8.15.2) with ESMTP id x9S9bW4i027237; Mon, 28 Oct 2019 04:37:36 -0500 From: Roger Quadros To: , CC: , , Roger Quadros , Sekhar Nori Subject: [PATCH 2/2] arm64: dts: ti: k3-j721e-common-proc-board: Add USB ports Date: Mon, 28 Oct 2019 11:37:30 +0200 Message-ID: <20191028093730.23094-3-rogerq@ti.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20191028093730.23094-1-rogerq@ti.com> References: <20191028093730.23094-1-rogerq@ti.com> MIME-Version: 1.0 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Add USB0 as otg port and USB1 as host port. Although USB0 can be used at super-speed, limit the speed to high-speed for now till SERDES PHY support is added. Signed-off-by: Roger Quadros Signed-off-by: Sekhar Nori --- .../dts/ti/k3-j721e-common-proc-board.dts | 35 +++++++++++++++++++ 1 file changed, 35 insertions(+) -- Texas Instruments Finland Oy, Porkkalankatu 22, 00180 Helsinki. Y-tunnus/Business ID: 0615521-4. Kotipaikka/Domicile: Helsinki diff --git a/arch/arm64/boot/dts/ti/k3-j721e-common-proc-board.dts b/arch/arm64/boot/dts/ti/k3-j721e-common-proc-board.dts index 57df79a815f0..2a3cd6174504 100644 --- a/arch/arm64/boot/dts/ti/k3-j721e-common-proc-board.dts +++ b/arch/arm64/boot/dts/ti/k3-j721e-common-proc-board.dts @@ -55,6 +55,18 @@ J721E_IOPAD(0x25c, PIN_INPUT, 0) /* (R28) MMC1_SDWP */ >; }; + + main_usbss0_pins_default: main_usbss0_pins_default { + pinctrl-single,pins = < + J721E_IOPAD(0x290, PIN_OUTPUT, 0) /* (U6) USB0_DRVVBUS */ + >; + }; + + main_usbss1_pins_default: main_usbss1_pins_default { + pinctrl-single,pins = < + J721E_IOPAD(0x214, PIN_OUTPUT, 4) /* (V4) MCAN1_TX.USB1_DRVVBUS */ + >; + }; }; &wkup_pmx0 { @@ -244,3 +256,26 @@ /* Unused */ status = "disabled"; }; + +&usbss0 { + pinctrl-names = "default"; + pinctrl-0 = <&main_usbss0_pins_default>; + ti,usb2-only; + ti,vbus-divider; +}; + +&usb0 { + dr_mode = "otg"; + maximum-speed = "high-speed"; +}; + +&usbss1 { + pinctrl-names = "default"; + pinctrl-0 = <&main_usbss1_pins_default>; + ti,usb2-only; +}; + +&usb1 { + dr_mode = "host"; + maximum-speed = "high-speed"; +};