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[88.138.106.230]) by smtp.gmail.com with ESMTPSA id 143sm14842876wmb.33.2019.10.28.07.59.38 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 28 Oct 2019 07:59:39 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Subject: [PULL v2 01/12] tci: Add implementation for INDEX_op_ld16u_i64 Date: Mon, 28 Oct 2019 15:59:26 +0100 Message-Id: <20191028145937.10914-2-richard.henderson@linaro.org> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20191028145937.10914-1-richard.henderson@linaro.org> References: <20191028145937.10914-1-richard.henderson@linaro.org> X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2a00:1450:4864:20::32e X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: peter.maydell@linaro.org, Stefan Weil Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" From: Stefan Weil This fixes "make check-tcg" on a Debian x86_64 host. Signed-off-by: Stefan Weil Tested-by: Thomas Huth Message-Id: <20190410194838.10123-1-sw@weilnetz.de> Signed-off-by: Richard Henderson --- tcg/tci.c | 15 +++++++++++++++ 1 file changed, 15 insertions(+) -- 2.17.1 diff --git a/tcg/tci.c b/tcg/tci.c index 33edca1903..a6208653e8 100644 --- a/tcg/tci.c +++ b/tcg/tci.c @@ -127,6 +127,12 @@ static void tci_write_reg8(tcg_target_ulong *regs, TCGReg index, uint8_t value) tci_write_reg(regs, index, value); } +static void +tci_write_reg16(tcg_target_ulong *regs, TCGReg index, uint16_t value) +{ + tci_write_reg(regs, index, value); +} + static void tci_write_reg32(tcg_target_ulong *regs, TCGReg index, uint32_t value) { @@ -585,6 +591,8 @@ uintptr_t tcg_qemu_tb_exec(CPUArchState *env, uint8_t *tb_ptr) tci_write_reg8(regs, t0, *(uint8_t *)(t1 + t2)); break; case INDEX_op_ld8s_i32: + TODO(); + break; case INDEX_op_ld16u_i32: TODO(); break; @@ -854,7 +862,14 @@ uintptr_t tcg_qemu_tb_exec(CPUArchState *env, uint8_t *tb_ptr) tci_write_reg8(regs, t0, *(uint8_t *)(t1 + t2)); break; case INDEX_op_ld8s_i64: + TODO(); + break; case INDEX_op_ld16u_i64: + t0 = *tb_ptr++; + t1 = tci_read_r(regs, &tb_ptr); + t2 = tci_read_s32(&tb_ptr); + tci_write_reg16(regs, t0, *(uint16_t *)(t1 + t2)); + break; case INDEX_op_ld16s_i64: TODO(); break; From patchwork Mon Oct 28 14:59:27 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Richard Henderson X-Patchwork-Id: 177934 Delivered-To: patch@linaro.org Received: by 2002:a92:409a:0:0:0:0:0 with SMTP id d26csp3511223ill; Mon, 28 Oct 2019 08:05:43 -0700 (PDT) X-Google-Smtp-Source: APXvYqxVVcmD+q3Dg1iRDPcCFt8KixAhTtBYfuPHqXbhczdWUibDrlmXJFKXynuB5Faow7COo/z1 X-Received: by 2002:a37:a54c:: with SMTP id o73mr17006912qke.164.1572275143143; Mon, 28 Oct 2019 08:05:43 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1572275143; cv=none; d=google.com; s=arc-20160816; b=V9hA/3mQUvz/T4OtOu1oP/iIvZoMTSOxonFWHWHa9uBeZyUCalesFu78GZLRnJP78g Gj+AAW/j4nSl2yRXG0WWE0Xp9XetUbZK0V7XA2cQCmE5o44sO1DBz3YxtR6Fd+80HVz6 FbSdEhSXlPfqKcgjowI7IlHxTe25Kq+9itQVFHunEujVbmtqbFgdiqWe/LOSIkXWVk9r Gio9pM6Tan9n/L+uhrGzSbkrj6dap+bSEdVEA7sC+n3RaPT1GCkIOM1Sg990la9T0fQu 4/JV5CAJ4rZDt+kEXv3OghjWpeTj8Agy5KIe8/AtqIdJ/6U1cb0ghoulls/81z8akZBC G/ew== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:cc:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:to:from :dkim-signature; bh=5E3h/dy52NEcLnrR3FCotEmib1HNDwVjiquxqJLNR8c=; b=s8SQosyZYA59Y1CzSGeUNghBbZcig0noqNSZrhe0HhO3KXTTNTFUN03+hK9hAXBFj3 aD4qtPdxrVhuPhzRbil5ZouC/M4zCaLQ+G0p15Sxr3k2tHOQOyYGm99kN8ZRW2aUpmgR Oo35eunq/DssxrvzIERrJmTPrupvKeuj08aC4SM+4p5QWojt2eHPReNZcH50fYXHAePh qokOtlon1o+2VWUQRSPyM/8I1Afq1K0a9xjybp6s7cDRNnSs30pIPhpyvgojfIlvCyVC rxTu7+WLt763qf77KlQiLiDEcwu4/HfQjJBIfLDei+fVLwppL4/CWYpLkxs+EKgROGiF bKmA== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=V0j6vHdz; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. 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[88.138.106.230]) by smtp.gmail.com with ESMTPSA id 143sm14842876wmb.33.2019.10.28.07.59.39 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 28 Oct 2019 07:59:39 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Subject: [PULL v2 02/12] cputlb: ensure _cmmu helper functions follow the naming standard Date: Mon, 28 Oct 2019 15:59:27 +0100 Message-Id: <20191028145937.10914-3-richard.henderson@linaro.org> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20191028145937.10914-1-richard.henderson@linaro.org> References: <20191028145937.10914-1-richard.henderson@linaro.org> MIME-Version: 1.0 X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2a00:1450:4864:20::32a X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: peter.maydell@linaro.org, =?utf-8?q?Alex_Benn=C3=A9e?= Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" From: Alex Bennée We document this in docs/devel/load-stores.rst so lets follow it. The 32 bit and 64 bit access functions have historically not included the sign so we leave those as is. We also introduce some signed helpers which are used for loading immediate values in the translator. Fixes: 282dffc8 Reviewed-by: Richard Henderson Signed-off-by: Alex Bennée Message-Id: <20191021150910.23216-1-alex.bennee@linaro.org> Signed-off-by: Richard Henderson --- include/exec/cpu_ldst_template.h | 4 ++-- tcg/tcg.h | 20 ++++++++++++++------ accel/tcg/cputlb.c | 24 +++++++++++++++++++++--- target/cris/translate_v10.inc.c | 3 +-- 4 files changed, 38 insertions(+), 13 deletions(-) -- 2.17.1 diff --git a/include/exec/cpu_ldst_template.h b/include/exec/cpu_ldst_template.h index af7e0b49f2..3d24ed9bd0 100644 --- a/include/exec/cpu_ldst_template.h +++ b/include/exec/cpu_ldst_template.h @@ -65,8 +65,8 @@ #ifdef SOFTMMU_CODE_ACCESS #define ADDR_READ addr_code #define MMUSUFFIX _cmmu -#define URETSUFFIX SUFFIX -#define SRETSUFFIX SUFFIX +#define URETSUFFIX USUFFIX +#define SRETSUFFIX glue(s, SUFFIX) #else #define ADDR_READ addr_read #define MMUSUFFIX _mmu diff --git a/tcg/tcg.h b/tcg/tcg.h index a37181c899..2792f65d04 100644 --- a/tcg/tcg.h +++ b/tcg/tcg.h @@ -1269,16 +1269,22 @@ void helper_be_stl_mmu(CPUArchState *env, target_ulong addr, uint32_t val, void helper_be_stq_mmu(CPUArchState *env, target_ulong addr, uint64_t val, TCGMemOpIdx oi, uintptr_t retaddr); -uint8_t helper_ret_ldb_cmmu(CPUArchState *env, target_ulong addr, +uint8_t helper_ret_ldub_cmmu(CPUArchState *env, target_ulong addr, TCGMemOpIdx oi, uintptr_t retaddr); -uint16_t helper_le_ldw_cmmu(CPUArchState *env, target_ulong addr, +int8_t helper_ret_ldsb_cmmu(CPUArchState *env, target_ulong addr, TCGMemOpIdx oi, uintptr_t retaddr); +uint16_t helper_le_lduw_cmmu(CPUArchState *env, target_ulong addr, + TCGMemOpIdx oi, uintptr_t retaddr); +int16_t helper_le_ldsw_cmmu(CPUArchState *env, target_ulong addr, + TCGMemOpIdx oi, uintptr_t retaddr); uint32_t helper_le_ldl_cmmu(CPUArchState *env, target_ulong addr, TCGMemOpIdx oi, uintptr_t retaddr); uint64_t helper_le_ldq_cmmu(CPUArchState *env, target_ulong addr, TCGMemOpIdx oi, uintptr_t retaddr); -uint16_t helper_be_ldw_cmmu(CPUArchState *env, target_ulong addr, - TCGMemOpIdx oi, uintptr_t retaddr); +uint16_t helper_be_lduw_cmmu(CPUArchState *env, target_ulong addr, + TCGMemOpIdx oi, uintptr_t retaddr); +int16_t helper_be_ldsw_cmmu(CPUArchState *env, target_ulong addr, + TCGMemOpIdx oi, uintptr_t retaddr); uint32_t helper_be_ldl_cmmu(CPUArchState *env, target_ulong addr, TCGMemOpIdx oi, uintptr_t retaddr); uint64_t helper_be_ldq_cmmu(CPUArchState *env, target_ulong addr, @@ -1295,7 +1301,8 @@ uint64_t helper_be_ldq_cmmu(CPUArchState *env, target_ulong addr, # define helper_ret_stw_mmu helper_be_stw_mmu # define helper_ret_stl_mmu helper_be_stl_mmu # define helper_ret_stq_mmu helper_be_stq_mmu -# define helper_ret_ldw_cmmu helper_be_ldw_cmmu +# define helper_ret_lduw_cmmu helper_be_lduw_cmmu +# define helper_ret_ldsw_cmmu helper_be_ldsw_cmmu # define helper_ret_ldl_cmmu helper_be_ldl_cmmu # define helper_ret_ldq_cmmu helper_be_ldq_cmmu #else @@ -1308,7 +1315,8 @@ uint64_t helper_be_ldq_cmmu(CPUArchState *env, target_ulong addr, # define helper_ret_stw_mmu helper_le_stw_mmu # define helper_ret_stl_mmu helper_le_stl_mmu # define helper_ret_stq_mmu helper_le_stq_mmu -# define helper_ret_ldw_cmmu helper_le_ldw_cmmu +# define helper_ret_lduw_cmmu helper_le_lduw_cmmu +# define helper_ret_ldsw_cmmu helper_le_ldsw_cmmu # define helper_ret_ldl_cmmu helper_le_ldl_cmmu # define helper_ret_ldq_cmmu helper_le_ldq_cmmu #endif diff --git a/accel/tcg/cputlb.c b/accel/tcg/cputlb.c index defc8d5929..6f4194df96 100644 --- a/accel/tcg/cputlb.c +++ b/accel/tcg/cputlb.c @@ -1862,12 +1862,18 @@ static uint64_t full_ldub_cmmu(CPUArchState *env, target_ulong addr, return load_helper(env, addr, oi, retaddr, MO_8, true, full_ldub_cmmu); } -uint8_t helper_ret_ldb_cmmu(CPUArchState *env, target_ulong addr, +uint8_t helper_ret_ldub_cmmu(CPUArchState *env, target_ulong addr, TCGMemOpIdx oi, uintptr_t retaddr) { return full_ldub_cmmu(env, addr, oi, retaddr); } +int8_t helper_ret_ldsb_cmmu(CPUArchState *env, target_ulong addr, + TCGMemOpIdx oi, uintptr_t retaddr) +{ + return (int8_t) full_ldub_cmmu(env, addr, oi, retaddr); +} + static uint64_t full_le_lduw_cmmu(CPUArchState *env, target_ulong addr, TCGMemOpIdx oi, uintptr_t retaddr) { @@ -1875,12 +1881,18 @@ static uint64_t full_le_lduw_cmmu(CPUArchState *env, target_ulong addr, full_le_lduw_cmmu); } -uint16_t helper_le_ldw_cmmu(CPUArchState *env, target_ulong addr, +uint16_t helper_le_lduw_cmmu(CPUArchState *env, target_ulong addr, TCGMemOpIdx oi, uintptr_t retaddr) { return full_le_lduw_cmmu(env, addr, oi, retaddr); } +int16_t helper_le_ldsw_cmmu(CPUArchState *env, target_ulong addr, + TCGMemOpIdx oi, uintptr_t retaddr) +{ + return (int16_t) full_le_lduw_cmmu(env, addr, oi, retaddr); +} + static uint64_t full_be_lduw_cmmu(CPUArchState *env, target_ulong addr, TCGMemOpIdx oi, uintptr_t retaddr) { @@ -1888,12 +1900,18 @@ static uint64_t full_be_lduw_cmmu(CPUArchState *env, target_ulong addr, full_be_lduw_cmmu); } -uint16_t helper_be_ldw_cmmu(CPUArchState *env, target_ulong addr, +uint16_t helper_be_lduw_cmmu(CPUArchState *env, target_ulong addr, TCGMemOpIdx oi, uintptr_t retaddr) { return full_be_lduw_cmmu(env, addr, oi, retaddr); } +int16_t helper_be_ldsw_cmmu(CPUArchState *env, target_ulong addr, + TCGMemOpIdx oi, uintptr_t retaddr) +{ + return (int16_t) full_be_lduw_cmmu(env, addr, oi, retaddr); +} + static uint64_t full_le_ldul_cmmu(CPUArchState *env, target_ulong addr, TCGMemOpIdx oi, uintptr_t retaddr) { diff --git a/target/cris/translate_v10.inc.c b/target/cris/translate_v10.inc.c index a87b8bb281..ae34a0d1a3 100644 --- a/target/cris/translate_v10.inc.c +++ b/target/cris/translate_v10.inc.c @@ -1202,8 +1202,7 @@ static unsigned int dec10_ind(CPUCRISState *env, DisasContext *dc) case CRISV10_IND_BCC_M: cris_cc_mask(dc, 0); - imm = cpu_ldsw_code(env, dc->pc + 2); - simm = (int16_t)imm; + simm = cpu_ldsw_code(env, dc->pc + 2); simm += 4; LOG_DIS("bcc_m: b%s %x\n", cc_name(dc->cond), dc->pc + simm); From patchwork Mon Oct 28 14:59:28 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Richard Henderson X-Patchwork-Id: 177936 Delivered-To: patch@linaro.org Received: by 2002:a92:409a:0:0:0:0:0 with SMTP id d26csp3514816ill; Mon, 28 Oct 2019 08:08:16 -0700 (PDT) X-Google-Smtp-Source: APXvYqxikWm0/fbNEo/bgaBy+wSEiiX7nhvSmdTXFQheie5fzksajYMQktORqGVCMI9Oq85pET1q X-Received: by 2002:ac8:405d:: with SMTP id j29mr6300622qtl.332.1572275296333; Mon, 28 Oct 2019 08:08:16 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1572275296; cv=none; d=google.com; s=arc-20160816; b=YIpz8rFsCGcYFo8ut/XKlGktPT4WLLJT0z174vndbaI5zVysMIoFEkbjyIHPZdS6G1 Ram1LdIJqz/Irh/W9dInhbEXvhAlT52Jk2QfIhnMeJzivJJXyhEDHB9t5y6J1WdZXn7I IDGz1eT4xN5vYo1aKuQnILwk3DIWQKmTGdbLbGmtZOZ13+yo0OjfIUyKaZcwO2nBXaFb lBHO6kM3ixa1bAYefdLhaZ/7xzPvyrTHp8oklYGUQjitSF9XA4yyO4MMeFa3sRplj0qf JSuGnjd5mFuJh2ezrS/SXBohd1x2hLJQZMWeqkPSYjWbbcG5Y6LfCmklklo+Ha5XHNTK i5nA== ARC-Message-Signature: i=1; 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[88.138.106.230]) by smtp.gmail.com with ESMTPSA id 143sm14842876wmb.33.2019.10.28.07.59.40 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 28 Oct 2019 07:59:40 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Subject: [PULL v2 03/12] cpu: use ROUND_UP() to define xxx_PAGE_ALIGN Date: Mon, 28 Oct 2019 15:59:28 +0100 Message-Id: <20191028145937.10914-4-richard.henderson@linaro.org> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20191028145937.10914-1-richard.henderson@linaro.org> References: <20191028145937.10914-1-richard.henderson@linaro.org> MIME-Version: 1.0 X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2a00:1450:4864:20::32e X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: peter.maydell@linaro.org, Wei Yang Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" From: Wei Yang Use ROUND_UP() to define, which is a little bit easy to read. Reviewed-by: Alex Bennée Reviewed-by: Michael S. Tsirkin Reviewed-by: David Gibson Reviewed-by: Juan Quintela Signed-off-by: Wei Yang Message-Id: <20191013021145.16011-2-richardw.yang@linux.intel.com> Signed-off-by: Richard Henderson --- include/exec/cpu-all.h | 7 +++---- 1 file changed, 3 insertions(+), 4 deletions(-) -- 2.17.1 diff --git a/include/exec/cpu-all.h b/include/exec/cpu-all.h index ad9ab85eb3..255bb186ac 100644 --- a/include/exec/cpu-all.h +++ b/include/exec/cpu-all.h @@ -220,7 +220,7 @@ extern int target_page_bits; #define TARGET_PAGE_SIZE (1 << TARGET_PAGE_BITS) #define TARGET_PAGE_MASK ~(TARGET_PAGE_SIZE - 1) -#define TARGET_PAGE_ALIGN(addr) (((addr) + TARGET_PAGE_SIZE - 1) & TARGET_PAGE_MASK) +#define TARGET_PAGE_ALIGN(addr) ROUND_UP((addr), TARGET_PAGE_SIZE) /* Using intptr_t ensures that qemu_*_page_mask is sign-extended even * when intptr_t is 32-bit and we are aligning a long long. @@ -228,9 +228,8 @@ extern int target_page_bits; extern uintptr_t qemu_host_page_size; extern intptr_t qemu_host_page_mask; -#define HOST_PAGE_ALIGN(addr) (((addr) + qemu_host_page_size - 1) & qemu_host_page_mask) -#define REAL_HOST_PAGE_ALIGN(addr) (((addr) + qemu_real_host_page_size - 1) & \ - qemu_real_host_page_mask) +#define HOST_PAGE_ALIGN(addr) ROUND_UP((addr), qemu_host_page_size) +#define REAL_HOST_PAGE_ALIGN(addr) ROUND_UP((addr), qemu_real_host_page_size) /* same as PROT_xxx */ #define PAGE_READ 0x0001 From patchwork Mon Oct 28 14:59:29 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Richard Henderson X-Patchwork-Id: 177935 Delivered-To: patch@linaro.org Received: by 2002:a92:409a:0:0:0:0:0 with SMTP id d26csp3511222ill; Mon, 28 Oct 2019 08:05:43 -0700 (PDT) X-Google-Smtp-Source: APXvYqzUhZY6cXkV8hqq9H783TTdHvWOsZwaiYb7gRaG3v9w+Jd7/8orZOu5v/THJUdcdX4pwdHd X-Received: by 2002:ac8:405d:: with SMTP id j29mr6287252qtl.332.1572275140902; Mon, 28 Oct 2019 08:05:40 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1572275140; cv=none; d=google.com; s=arc-20160816; b=sIbZke6MExc6AxuTIJilSllZDoll4QjOzzEjYOKeg6GVa/eOQpvcpis8L28pW6Uoc6 97t0myznHWjM0UZC0EAVhBkeQnZcb9qA56WpvJBVybt/5vQaR7MdbHD6VgJ3ypEjT4st gVYOH6Wilp6ANXpjh8gdPqKQjsQn7sHsX7WeJUFWoV8y3xPXZOZTugojzK3XcqmrP57S mtm9ajuBQHdX3VJULj9iKSDuvRFJpCrlxErkevBJebmsRtFlHE4/Ia1ERfkqzUthEq7/ 3hW4978EgCGlo2SPvdpb94nWGed3vebNNmM/GJG5cMEZCWFAF7jkyMYWXj/9dEc9hIoM CFMQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:cc:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:to:from :dkim-signature; bh=MG1IpXQvrz4SptVhLZ2ZL/egepQYBWYRd+NyOkeOFrk=; b=q/W7QABPbcxvOifUMiBpymHRa3QKEOsrJUMKD9f+9Az2N2uexbeTLd+EQoXy1IKPQ4 q9z/M3ndJXOhImuNYk88Czeyx9ZIgJHFVuNzflgHFUa04UWG3i2amArbsFvajd2VpaBX lPzzZl56Tx64UXVwoEL67VK1s2+dyWEc1tCCJAZl0PTDsIpjze2FAiPAZIEJ3THaEOfX gOIrTottF9v1W3IcqaonJleKdhjaHuih1MyhwFMHnVa4U72V9L1T78tGOa4bddScwtTA McXAbnrYkx3edY+lb0g2izYeAGhsKDAE15AnkhTNFectxr5Z8CPXULPcx707tIhJcERJ 4LDw== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=InAaFjoJ; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. 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[88.138.106.230]) by smtp.gmail.com with ESMTPSA id 143sm14842876wmb.33.2019.10.28.07.59.41 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 28 Oct 2019 07:59:42 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Subject: [PULL v2 04/12] exec: Split out variable page size support to exec-vary.c Date: Mon, 28 Oct 2019 15:59:29 +0100 Message-Id: <20191028145937.10914-5-richard.henderson@linaro.org> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20191028145937.10914-1-richard.henderson@linaro.org> References: <20191028145937.10914-1-richard.henderson@linaro.org> MIME-Version: 1.0 X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2a00:1450:4864:20::341 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: peter.maydell@linaro.org Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" The next patch will play a trick with "const" that will confuse the compiler about the uses of target_page_bits within exec.c. Moving everything to a new file prevents this confusion. No functional change so far. Reviewed-by: Alex Bennée Reviewed-by: Philippe Mathieu-Daudé Reviewed-by: Paolo Bonzini Signed-off-by: Richard Henderson --- Makefile.target | 2 +- include/qemu-common.h | 6 +++++ exec-vary.c | 57 +++++++++++++++++++++++++++++++++++++++++++ exec.c | 34 -------------------------- 4 files changed, 64 insertions(+), 35 deletions(-) create mode 100644 exec-vary.c -- 2.17.1 diff --git a/Makefile.target b/Makefile.target index 5e916230c4..ca3d14efe1 100644 --- a/Makefile.target +++ b/Makefile.target @@ -107,7 +107,7 @@ obj-y += trace/ ######################################################### # cpu emulator library -obj-y += exec.o +obj-y += exec.o exec-vary.o obj-y += accel/ obj-$(CONFIG_TCG) += tcg/tcg.o tcg/tcg-op.o tcg/tcg-op-vec.o tcg/tcg-op-gvec.o obj-$(CONFIG_TCG) += tcg/tcg-common.o tcg/optimize.o diff --git a/include/qemu-common.h b/include/qemu-common.h index 8d84db90b0..082da59e85 100644 --- a/include/qemu-common.h +++ b/include/qemu-common.h @@ -74,6 +74,12 @@ void cpu_exec_step_atomic(CPUState *cpu); */ bool set_preferred_target_page_bits(int bits); +/** + * finalize_target_page_bits: + * Commit the final value set by set_preferred_target_page_bits. + */ +void finalize_target_page_bits(void); + /** * Sends a (part of) iovec down a socket, yielding when the socket is full, or * Receives data into a (part of) iovec from a socket, diff --git a/exec-vary.c b/exec-vary.c new file mode 100644 index 0000000000..48c0ab306c --- /dev/null +++ b/exec-vary.c @@ -0,0 +1,57 @@ +/* + * Variable page size handling + * + * Copyright (c) 2003 Fabrice Bellard + * + * This library is free software; you can redistribute it and/or + * modify it under the terms of the GNU Lesser General Public + * License as published by the Free Software Foundation; either + * version 2 of the License, or (at your option) any later version. + * + * This library is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + * Lesser General Public License for more details. + * + * You should have received a copy of the GNU Lesser General Public + * License along with this library; if not, see . + */ + +#include "qemu/osdep.h" +#include "qemu-common.h" +#include "exec/exec-all.h" + +#ifdef TARGET_PAGE_BITS_VARY +int target_page_bits; +bool target_page_bits_decided; +#endif + +bool set_preferred_target_page_bits(int bits) +{ + /* + * The target page size is the lowest common denominator for all + * the CPUs in the system, so we can only make it smaller, never + * larger. And we can't make it smaller once we've committed to + * a particular size. + */ +#ifdef TARGET_PAGE_BITS_VARY + assert(bits >= TARGET_PAGE_BITS_MIN); + if (target_page_bits == 0 || target_page_bits > bits) { + if (target_page_bits_decided) { + return false; + } + target_page_bits = bits; + } +#endif + return true; +} + +void finalize_target_page_bits(void) +{ +#ifdef TARGET_PAGE_BITS_VARY + if (target_page_bits == 0) { + target_page_bits = TARGET_PAGE_BITS_MIN; + } + target_page_bits_decided = true; +#endif +} diff --git a/exec.c b/exec.c index fb0943cfed..5bf181d23e 100644 --- a/exec.c +++ b/exec.c @@ -91,11 +91,6 @@ AddressSpace address_space_memory; static MemoryRegion io_mem_unassigned; #endif -#ifdef TARGET_PAGE_BITS_VARY -int target_page_bits; -bool target_page_bits_decided; -#endif - CPUTailQ cpus = QTAILQ_HEAD_INITIALIZER(cpus); /* current CPU in the current thread. It is only valid inside @@ -109,37 +104,8 @@ int use_icount; uintptr_t qemu_host_page_size; intptr_t qemu_host_page_mask; -bool set_preferred_target_page_bits(int bits) -{ - /* The target page size is the lowest common denominator for all - * the CPUs in the system, so we can only make it smaller, never - * larger. And we can't make it smaller once we've committed to - * a particular size. - */ -#ifdef TARGET_PAGE_BITS_VARY - assert(bits >= TARGET_PAGE_BITS_MIN); - if (target_page_bits == 0 || target_page_bits > bits) { - if (target_page_bits_decided) { - return false; - } - target_page_bits = bits; - } -#endif - return true; -} - #if !defined(CONFIG_USER_ONLY) -static void finalize_target_page_bits(void) -{ -#ifdef TARGET_PAGE_BITS_VARY - if (target_page_bits == 0) { - target_page_bits = TARGET_PAGE_BITS_MIN; - } - target_page_bits_decided = true; -#endif -} - typedef struct PhysPageEntry PhysPageEntry; struct PhysPageEntry { From patchwork Mon Oct 28 14:59:30 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Richard Henderson X-Patchwork-Id: 177937 Delivered-To: patch@linaro.org Received: by 2002:a92:409a:0:0:0:0:0 with SMTP id d26csp3514852ill; Mon, 28 Oct 2019 08:08:17 -0700 (PDT) X-Google-Smtp-Source: APXvYqxplU3xQX6DDoYhSvNSdW0Ls1hBreBWMZbWgSHiX5WUcNXvKEO9LBJkFCJjRJmqCAvdT9qC X-Received: by 2002:aed:3be9:: with SMTP id s38mr17500577qte.175.1572275297698; Mon, 28 Oct 2019 08:08:17 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1572275297; cv=none; d=google.com; s=arc-20160816; b=gXCCSzG4IYCR9AuBfrFEC2Kt5nApmH0aJfluUOpnF21he+Egw+qOCAfDzYB4nFEyoU OTbSaMjU/bFuZtNrtMi3/1mQiDRbAf2wjAAuH6BnIoB5l5Xaz88XO3OHyFMIKhBXG4Jb MMwXEhTEOX9QDKUbJvmH9ErAM7ymVSy/lsXwHDjpQuNvlA6C6d/E3uRJGk5QZPAS+b99 ALdddmNIoaoleZgl+J6iU+X8m8hhhwTmYbo3u0ZOezbpXIjjxQVUrhDnbhm/QuSZbc6G 79wgJ2TYHWWa63S0zRKMHgOuSrQ7T5/vm7GO7vOm1FTAw89jptCK0IlMAZNeXGsAMtmn zj2A== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:cc:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:to:from :dkim-signature; bh=ZwXbM1gR9MpWZvFXDuXSv541qXotelrmjZ6gTXEMEYw=; b=SB16YPSLodrSMfNGzTKzi/CLLQOThwkyrdeyaegBKNJBqj8QYqg16znPJcsF2aaZun VTD3sWORjb/oZbnHMSpWpBKCjBajO1OmrSxhUS1XZjdDRUh4PTzX/HAr69Vd4RIVVpMA sOWKaiBPPzjnHcg/vg0NhhlglUXBs6TG6/JGAs7IHHmXUjENEspKTo+C6+/W/PcSAaTd IQa7j+Snf5zdjCxtyHDrskCyi7zY37k7W0M8hvuBb2Vf9cJGFngLVpKcCVBDwEduRUgK cj33buyMzvENfKNwOjvoWPTsxN5CW8vJKSDeFUU+kwmIVinqTQRYrkefAvy3bXwWcjjA Op6w== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b="M/awpGGd"; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. 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[88.138.106.230]) by smtp.gmail.com with ESMTPSA id 143sm14842876wmb.33.2019.10.28.07.59.42 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 28 Oct 2019 07:59:42 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Subject: [PULL v2 05/12] configure: Detect compiler support for __attribute__((alias)) Date: Mon, 28 Oct 2019 15:59:30 +0100 Message-Id: <20191028145937.10914-6-richard.henderson@linaro.org> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20191028145937.10914-1-richard.henderson@linaro.org> References: <20191028145937.10914-1-richard.henderson@linaro.org> MIME-Version: 1.0 X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2a00:1450:4864:20::32d X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: peter.maydell@linaro.org Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" Such support is present almost everywhere, except for Xcode 9. It is added in Xcode 10, but travis uses xcode9 by default, so we should support it for a while yet. Reviewed-by: Alex Bennée Signed-off-by: Richard Henderson --- configure | 19 +++++++++++++++++++ 1 file changed, 19 insertions(+) -- 2.17.1 diff --git a/configure b/configure index 145fcabbb3..3a9862fe5e 100755 --- a/configure +++ b/configure @@ -5518,6 +5518,21 @@ if compile_prog "" "" ; then vector16=yes fi +######################################## +# See if __attribute__((alias)) is supported. +# This false for Xcode 9, but has been remedied for Xcode 10. +# Unfortunately, travis uses Xcode 9 by default. + +attralias=no +cat > $TMPC << EOF +int x = 1; +extern const int y __attribute__((alias("x"))); +int main(void) { return 0; } +EOF +if compile_prog "" "" ; then + attralias=yes +fi + ######################################## # check if getauxval is available. @@ -7083,6 +7098,10 @@ if test "$vector16" = "yes" ; then echo "CONFIG_VECTOR16=y" >> $config_host_mak fi +if test "$attralias" = "yes" ; then + echo "CONFIG_ATTRIBUTE_ALIAS=y" >> $config_host_mak +fi + if test "$getauxval" = "yes" ; then echo "CONFIG_GETAUXVAL=y" >> $config_host_mak fi From patchwork Mon Oct 28 14:59:31 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Richard Henderson X-Patchwork-Id: 177940 Delivered-To: patch@linaro.org Received: by 2002:ac9:3c86:0:0:0:0:0 with SMTP id w6csp3183745ocf; Mon, 28 Oct 2019 08:11:27 -0700 (PDT) X-Google-Smtp-Source: APXvYqwnKX6a9LcKQrlcAVQPa/35EusEp2XeObG0UqSXvBtpFLOC7xIXYwzGNtW+FGCDZxq26FGj X-Received: by 2002:a0c:c70a:: with SMTP id w10mr17802380qvi.218.1572275487187; Mon, 28 Oct 2019 08:11:27 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1572275487; cv=none; d=google.com; s=arc-20160816; b=mfqELIenJY9Y4kr1GBQPMQHaj/DsjNX1Na3xKo5LTb9UFhdFTqkuPZvZY+x+d0WMpQ Myl8AFNyVEeyO0cNUdV/cPUF6s+jgDmbnAyhFW8OJ/P6y1FdHW7cyCE2++2tnBdsLQP1 dwYLMzOLYTtWPGvCTBZ300J/dy7uvupE1kHNzm6pOJ4o4UBU6s0t5BFCZncUFQweSBx5 Z6D0RJhX6dbMpimi21WJa3oLeFdqDUtxr3WGCYa0JsgjqmfRj/pasXV2nwiArQlBe+GE 6LFJRQ4wzo0SaGbWxhBQGtGIFxuEle8LA+lPit0fG4caRrrSSQuO7nvkUXozlhx353CV AEqQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:cc:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:to:from :dkim-signature; bh=xrU7w4s7KSKnwqBpSI+WZTUaBsgqmQLo3umhoYb3GT8=; b=xYyunhtulxuemOYDOC57K3AGFS3pQvJKpa14ExTCcAh3/lWul/q3VpMThyve0tgSrx DATXJ+AzqOGyHDenFN4p+7Wyrwj6eBBoFXxL4sMvOupa4PLmkUB45CkVN7wR64Kw2EGP hnbGsK59+rs2HqVBBT77/Y6oANhG3z86kplsBriYh+TbxxKgzm4BYWy8QDnXgMYkKGBh Rk+4UlH7/5VQBZzdS9LUWptere4QUU+hQkaj0kvh7sMbuysP1g2JijryV/xOzpjQbYxn 8tTWUiNKfaGr0ob0xiKyKOK3Gfcih8AzHhAF4Znw8qYpH66nMXg9ffbgUtH/mfnKL/1/ 9vuA== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=WJCCJ2oT; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. [209.51.188.17]) by mx.google.com with ESMTPS id e3si8923155qkd.253.2019.10.28.08.11.27 for (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Mon, 28 Oct 2019 08:11:27 -0700 (PDT) Received-SPF: pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=WJCCJ2oT; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from localhost ([::1]:44958 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1iP6g2-0004km-0w for patch@linaro.org; Mon, 28 Oct 2019 11:11:26 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:44601) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1iP6Uo-0007XA-QB for qemu-devel@nongnu.org; Mon, 28 Oct 2019 10:59:52 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1iP6Um-00044l-Td for qemu-devel@nongnu.org; Mon, 28 Oct 2019 10:59:50 -0400 Received: from mail-wr1-x42d.google.com ([2a00:1450:4864:20::42d]:46253) by eggs.gnu.org with esmtps (TLS1.0:RSA_AES_128_CBC_SHA1:16) (Exim 4.71) (envelope-from ) id 1iP6Uj-00043h-T9 for qemu-devel@nongnu.org; Mon, 28 Oct 2019 10:59:47 -0400 Received: by mail-wr1-x42d.google.com with SMTP id n15so10199980wrw.13 for ; Mon, 28 Oct 2019 07:59:45 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=xrU7w4s7KSKnwqBpSI+WZTUaBsgqmQLo3umhoYb3GT8=; b=WJCCJ2oTpp+tWKf6mXQ/dvcaQaxrUpqCWL4VFs3Jb22hfO9D9a5isRA4YPGMDZNLN9 fAL8fDy9gFonH/bW+UAvXJCeHfLOsO1va9R6wVno/Hh2dJqKj6/WpdKCXKG0D+13h+3S kJbc7o/l1E42XwNEIIrhTigTjjTBkA/g9irNBgU8R2S+cPjzOhFpGdsBOnmw6sNGDovK Wj0c/ZdPoRDwo1LnFxHLEGCQwU1QYxSO2zJb2f+pb8MZVwkrwDBpPL9A6D8aWyfc34p1 v1ONbRJCD3VAsXmlwLdXW79cPCm0NdTEr8p3ctxddNxCJGaxngpvL1uXZ1yVJLx5TZFz JRcg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=xrU7w4s7KSKnwqBpSI+WZTUaBsgqmQLo3umhoYb3GT8=; b=AZYFCDOMI9tKBlQOUfcbnF3lZWhIPwDY0IGVngnYC6d7d0wePJ62b3VJr2odku2/vF FuwGZJJtyRuwpz2l//wIP6eRjVghUjpFq7Z3KZlbQfxXqIwJJSBe2j4ecjaHFRVwqWMo 24P/vXPwIEIMsZUmjHj5UI5ycysOwPLi/hU2s7zYjYWmtfwn5mkGjRafO1CWWzdiVEVR Usd74WANziOxEZNqNSVUzAPOGkMk2MxkXP0dwWdQNe9F0homZBqMmMT79YLve6iSvPoF uFwLo+z9LtXIoY7y6gkAwFaPAypx9a/ip17QqBs4bxq+zImwD+D4bRknkCTm2028v921 jIjA== X-Gm-Message-State: APjAAAXUVp3mPxSap6sACs90oIwdMgWkvzuxYudEbl/JSfkJRy+VXUJO j3NbK9ZhO25LW/r5OIiFkHRmw0WS1vn0aA== X-Received: by 2002:a5d:4f91:: with SMTP id d17mr15714161wru.184.1572274784547; Mon, 28 Oct 2019 07:59:44 -0700 (PDT) Received: from localhost.localdomain (230.106.138.88.rev.sfr.net. [88.138.106.230]) by smtp.gmail.com with ESMTPSA id 143sm14842876wmb.33.2019.10.28.07.59.43 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 28 Oct 2019 07:59:43 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Subject: [PULL v2 06/12] exec: Use const alias for TARGET_PAGE_BITS_VARY Date: Mon, 28 Oct 2019 15:59:31 +0100 Message-Id: <20191028145937.10914-7-richard.henderson@linaro.org> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20191028145937.10914-1-richard.henderson@linaro.org> References: <20191028145937.10914-1-richard.henderson@linaro.org> MIME-Version: 1.0 X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2a00:1450:4864:20::42d X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: peter.maydell@linaro.org Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" Using a variable that is declared "const" for this tells the compiler that it may read the value once and assume that it does not change across function calls. For target_page_size, this means we have only one assert per function, and one read of the variable. This reduces the size of qemu-system-aarch64 by 8k. Reviewed-by: Alex Bennée Reviewed-by: Paolo Bonzini Signed-off-by: Richard Henderson --- include/exec/cpu-all.h | 14 ++++++--- exec-vary.c | 66 +++++++++++++++++++++++++++++++++++++----- 2 files changed, 68 insertions(+), 12 deletions(-) -- 2.17.1 diff --git a/include/exec/cpu-all.h b/include/exec/cpu-all.h index 255bb186ac..0b449b98ba 100644 --- a/include/exec/cpu-all.h +++ b/include/exec/cpu-all.h @@ -210,10 +210,16 @@ static inline void stl_phys_notdirty(AddressSpace *as, hwaddr addr, uint32_t val /* page related stuff */ #ifdef TARGET_PAGE_BITS_VARY -extern bool target_page_bits_decided; -extern int target_page_bits; -#define TARGET_PAGE_BITS ({ assert(target_page_bits_decided); \ - target_page_bits; }) +typedef struct { + bool decided; + int bits; +} TargetPageBits; +#if defined(CONFIG_ATTRIBUTE_ALIAS) || !defined(IN_EXEC_VARY) +extern const TargetPageBits target_page; +#else +extern TargetPageBits target_page; +#endif +#define TARGET_PAGE_BITS ({ assert(target_page.decided); target_page.bits; }) #else #define TARGET_PAGE_BITS_MIN TARGET_PAGE_BITS #endif diff --git a/exec-vary.c b/exec-vary.c index 48c0ab306c..8725fd0285 100644 --- a/exec-vary.c +++ b/exec-vary.c @@ -19,11 +19,55 @@ #include "qemu/osdep.h" #include "qemu-common.h" + +#define IN_EXEC_VARY 1 + #include "exec/exec-all.h" #ifdef TARGET_PAGE_BITS_VARY -int target_page_bits; -bool target_page_bits_decided; +# ifdef CONFIG_ATTRIBUTE_ALIAS +/* + * We want to declare the "target_page" variable as const, which tells + * the compiler that it can cache any value that it reads across calls. + * This avoids multiple assertions and multiple reads within any one user. + * + * This works because we finish initializing the data before we ever read + * from the "target_page" symbol. + * + * This also requires that we have a non-constant symbol by which we can + * perform the actual initialization, and which forces the data to be + * allocated within writable memory. Thus "init_target_page", and we use + * that symbol exclusively in the two functions that initialize this value. + * + * The "target_page" symbol is created as an alias of "init_target_page". + */ +static TargetPageBits init_target_page; + +/* + * Note that this is *not* a redundant decl, this is the definition of + * the "target_page" symbol. The syntax for this definition requires + * the use of the extern keyword. This seems to be a GCC bug in + * either the syntax for the alias attribute or in -Wredundant-decls. + * + * See https://gcc.gnu.org/bugzilla/show_bug.cgi?id=91765 + */ +# pragma GCC diagnostic push +# pragma GCC diagnostic ignored "-Wredundant-decls" + +extern const TargetPageBits target_page + __attribute__((alias("init_target_page"))); + +# pragma GCC diagnostic pop +# else +/* + * When aliases are not supported then we force two different declarations, + * by way of suppressing the header declaration with IN_EXEC_VARY. + * We assume that on such an old compiler, LTO cannot be used, and so the + * compiler cannot not detect the mismatched declarations, and all is well. + */ +TargetPageBits target_page; +# define init_target_page target_page +# endif #endif bool set_preferred_target_page_bits(int bits) @@ -36,11 +80,11 @@ bool set_preferred_target_page_bits(int bits) */ #ifdef TARGET_PAGE_BITS_VARY assert(bits >= TARGET_PAGE_BITS_MIN); - if (target_page_bits == 0 || target_page_bits > bits) { - if (target_page_bits_decided) { + if (init_target_page.bits == 0 || init_target_page.bits > bits) { + if (init_target_page.decided) { return false; } - target_page_bits = bits; + init_target_page.bits = bits; } #endif return true; @@ -49,9 +93,15 @@ bool set_preferred_target_page_bits(int bits) void finalize_target_page_bits(void) { #ifdef TARGET_PAGE_BITS_VARY - if (target_page_bits == 0) { - target_page_bits = TARGET_PAGE_BITS_MIN; + if (init_target_page.bits == 0) { + init_target_page.bits = TARGET_PAGE_BITS_MIN; } - target_page_bits_decided = true; + init_target_page.decided = true; + + /* + * For the benefit of an -flto build, prevent the compiler from + * hoisting a read from target_page before we finish initializing. + */ + barrier(); #endif } From patchwork Mon Oct 28 14:59:32 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Richard Henderson X-Patchwork-Id: 177938 Delivered-To: patch@linaro.org Received: by 2002:ac9:3c86:0:0:0:0:0 with SMTP id w6csp3183114ocf; Mon, 28 Oct 2019 08:10:57 -0700 (PDT) X-Google-Smtp-Source: APXvYqxNJj29kE1Pq60GLkq2VIroZY5dFaDALEbtVE1eecyKOx6G46W4uMrhHOrAt6SPRtNHHILr X-Received: by 2002:ac8:5214:: with SMTP id r20mr18181041qtn.140.1572275457327; Mon, 28 Oct 2019 08:10:57 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1572275457; cv=none; d=google.com; s=arc-20160816; b=KWoAvZRDaDtEG8GuAWHGE9ojeEVHCA0urOvtu8Y+hfAzHLZ2az3xRykh7Bad2OoI2a 6nQH64632KgiRWg70im+dfZwViNEgHiwT5qA73crejQp/Zbwt+y6fwoPKaxRaARvo2eE c40r13YIr/jx08KudjsdI7bWQjUWr26T7iPHY5bqOhUbPQkEaVoJN5TL1S3QRJe4+w+I cwGn/dXnj8XV6MuhvOsJeweub9NV4PSh4aFeb+mH9BNGoYGbvC5lrc3zonWlQcvuS4cK MZ8IexZV1vnqYa3juJPL/+uMTLWLLzSb+saL4No0N4mFZ9pwCGFutdc4LdSg5ei4ZqHx XVUA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:cc:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:to:from :dkim-signature; bh=f6wua0jwz8W5xKyTZRCAqxHy+Li/vZosjNJ04IUp3Ds=; b=b1tsBHz8Y/K289OLVaA9lVdBCAkjkf4W6f2Fjn8bkIMEYjWEJiuof/+ndkQpzZ/pfy p4ZdYlgwJmaQBxfDJ1qgs5YSxDHYKRMbotTxcbKwhe2l4hJM3TWJzz10ywJB4Ffwj1TQ XdBDTPATeSHYKCwVV1Vs9YK0hjuqGBZKa5pXwE5xGgmFg3hjZiHr66bgi2x+4+xSqxCq vNNhBZlcZHmnCNiltmhQlnalRjPx1nLHNRC1OCm623yq4NhyixHflTfkrJN60e8urGjX K9H8hiq1WOabM9HpjLgEuW2TleTinABaTCIPfrwIEJlNjoac5DoOva5I7hsT1IPAXo82 FIBQ== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=x32Z0Oap; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. 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[88.138.106.230]) by smtp.gmail.com with ESMTPSA id 143sm14842876wmb.33.2019.10.28.07.59.44 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 28 Oct 2019 07:59:44 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Subject: [PULL v2 07/12] exec: Restrict TARGET_PAGE_BITS_VARY assert to CONFIG_DEBUG_TCG Date: Mon, 28 Oct 2019 15:59:32 +0100 Message-Id: <20191028145937.10914-8-richard.henderson@linaro.org> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20191028145937.10914-1-richard.henderson@linaro.org> References: <20191028145937.10914-1-richard.henderson@linaro.org> MIME-Version: 1.0 X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2a00:1450:4864:20::42a X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: peter.maydell@linaro.org Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" This reduces the size of a release build by about 10k. Noticably, within the tlb miss helpers. Reviewed-by: Alex Bennée Reviewed-by: Philippe Mathieu-Daudé Reviewed-by: Paolo Bonzini Signed-off-by: Richard Henderson --- include/exec/cpu-all.h | 4 ++++ 1 file changed, 4 insertions(+) -- 2.17.1 diff --git a/include/exec/cpu-all.h b/include/exec/cpu-all.h index 0b449b98ba..525059970c 100644 --- a/include/exec/cpu-all.h +++ b/include/exec/cpu-all.h @@ -219,8 +219,12 @@ extern const TargetPageBits target_page; #else extern TargetPageBits target_page; #endif +#ifdef CONFIG_DEBUG_TCG #define TARGET_PAGE_BITS ({ assert(target_page.decided); target_page.bits; }) #else +#define TARGET_PAGE_BITS target_page.bits +#endif +#else #define TARGET_PAGE_BITS_MIN TARGET_PAGE_BITS #endif From patchwork Mon Oct 28 14:59:33 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Richard Henderson X-Patchwork-Id: 177944 Delivered-To: patch@linaro.org Received: by 2002:ac9:3c86:0:0:0:0:0 with SMTP id w6csp3187931ocf; Mon, 28 Oct 2019 08:14:45 -0700 (PDT) X-Google-Smtp-Source: APXvYqxJzFQyqZ4WUbjZ5LbA9fIC4x+Lylvq2XNZ0UFr15+Fc2bXUjxgEyMzBU8XYp+NHcvs/Jwx X-Received: by 2002:ac8:23d3:: with SMTP id r19mr3207245qtr.297.1572275685123; Mon, 28 Oct 2019 08:14:45 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1572275685; cv=none; d=google.com; s=arc-20160816; b=K48O0C5f1AWu62i9qTMvrKpduBAcMK6/B3iXU1v3YqkUv7j549ZjNq4NiumGQUJxbN TnXtGGP3Z2XBcZ3ftpp4Jjl8q0KC2kY6yM+r36dz1b+iONsHpoogcyh4hb/x0Gnuh3bk lJbKgWhiUF3GIvvJpa9X/OMC6ZuefXBH0poB0DydoeFv1ejDZN9z75JLvZVCCkhuQwf4 rpXSP4LnViA8x92XhdZ7y9zTHtscjuBJCNr6z6u/zuX/iXPq1g/VAmcUBcrT0itXq2YT NZ5lL7qd+XhooIeecfYUhh3/UgzzZjcShSRiu6tQ8A1r8uq+kS27bJZMGBsjlF9rNt/V EMDw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:cc:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:to:from :dkim-signature; bh=0fs1ku4GpjAYa04lupxk+gKk8sjfZMUU6XuR/WsE7FA=; b=oOUwQ6odaOHc7xXXnzVpKF2LfKbljqAqERC2XjtmcERhPomPk4K4+fr8jrmXcKwRaI UWAnwtJten7DWsgwiVmnDNq4qbWx6EXyLyuIGfL0r+KL+EuoK90wBMcfWTKlcETVT0Hb jUlpLUwdxDojBpxdmhNcng6pQUNytWaGb61ZEiCB6pyd17RxiLDh/c/xONXrKyFIBtpy fCAeS9PqMteaDh1T7ELZzy9bUzjeLRXBUCRi0myWBJ2TkTHO3BgP3kJiWh3U2HO0Ybd3 eUBB7OSsimkZ7LH4WrgqRyqrPai5cBPU1h4J9izCORxrZnLQWxShIs931zT2ewbczg1L bc7Q== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=Na24R2mV; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. [209.51.188.17]) by mx.google.com with ESMTPS id z24si9561691qkg.244.2019.10.28.08.14.45 for (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Mon, 28 Oct 2019 08:14:45 -0700 (PDT) Received-SPF: pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=Na24R2mV; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from localhost ([::1]:46070 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1iP6jE-0000My-4h for patch@linaro.org; Mon, 28 Oct 2019 11:14:44 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:44618) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1iP6Uq-0007YW-PZ for qemu-devel@nongnu.org; Mon, 28 Oct 2019 10:59:54 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1iP6Uo-00045D-2P for qemu-devel@nongnu.org; Mon, 28 Oct 2019 10:59:52 -0400 Received: from mail-wr1-x42b.google.com ([2a00:1450:4864:20::42b]:45515) by eggs.gnu.org with esmtps (TLS1.0:RSA_AES_128_CBC_SHA1:16) (Exim 4.71) (envelope-from ) id 1iP6Un-00044P-1h for qemu-devel@nongnu.org; Mon, 28 Oct 2019 10:59:50 -0400 Received: by mail-wr1-x42b.google.com with SMTP id q13so10207874wrs.12 for ; Mon, 28 Oct 2019 07:59:48 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=0fs1ku4GpjAYa04lupxk+gKk8sjfZMUU6XuR/WsE7FA=; b=Na24R2mVEeeLhwHOwkNVLqmDId9gPgkjejP+02yQ7DOa7LHmPXDSoCfUXcN/SVvif9 hL2OFf3rI3A3oc62FbI3RQy/qFVkh5zuFBAO/BkxbpQREvOwRTYxeXgOgxQyza876P1S +WeaKlZGM3lseU5V6QPOhsYVf13cE1hv0+ougMeWHXyvpVoX4qSFkBDPD/KQ3H/VrBP8 twcDNWq3ub2FiEXHqiXVrQmMpPcfXFwaKHoTV/q8gsowkmFGeRLccJ/jkZCvXU1ZWvfz mJIbxOlBKitIBx5Pt+fmBH2u9qUpaD39h4O5cElq71E9FaWsQfbWhTFiLGfxPGDfVFYt fs0g== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=0fs1ku4GpjAYa04lupxk+gKk8sjfZMUU6XuR/WsE7FA=; b=ixfM/4JjEPC0IuXoOBKT9zZFKCEc99SGVJhYzKaaEPoXnrqc9gSfg+Kp8uQjPrCcFI 0NYYWDeOx376aLofKsnXFuR2PEoP4pW24BYTbI1HzdaMnD4gyr9PTwUufIvkZGf9XnWa Pa+Eal3xDU2AR/MDyapJ8hZJJH2NRrQm9Sl08CIIql5X0/pOsiG7WSP1i1phqR/F2upR 5bmjPEjBBO1aZFpVTwddUliOXURfMbTfKchNbFr0uUSz4hNNYaDLX1Xw4SeotZf9zps6 dXdD47YlA1zO2Q0r+sVKlkwOhg4QvOGOjpfJzbyyRIpbxqFs5MIqb0WfCHIK7iA6ZcRD 73cw== X-Gm-Message-State: APjAAAXlx4Ia44ZiiWm3zxUcHCSzAXLvpswi2+cov3qeJalPHbhD53WD bW8W2twg8FPhIf2x8BsT2ydvJLjaVob2/g== X-Received: by 2002:adf:e5cf:: with SMTP id a15mr16289868wrn.143.1572274786801; Mon, 28 Oct 2019 07:59:46 -0700 (PDT) Received: from localhost.localdomain (230.106.138.88.rev.sfr.net. [88.138.106.230]) by smtp.gmail.com with ESMTPSA id 143sm14842876wmb.33.2019.10.28.07.59.45 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 28 Oct 2019 07:59:46 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Subject: [PULL v2 08/12] exec: Promote TARGET_PAGE_MASK to target_long Date: Mon, 28 Oct 2019 15:59:33 +0100 Message-Id: <20191028145937.10914-9-richard.henderson@linaro.org> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20191028145937.10914-1-richard.henderson@linaro.org> References: <20191028145937.10914-1-richard.henderson@linaro.org> MIME-Version: 1.0 X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2a00:1450:4864:20::42b X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: peter.maydell@linaro.org Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" There are some uint64_t uses that expect TARGET_PAGE_MASK to extend for a 32-bit, so this must continue to be a signed type. Define based on TARGET_PAGE_BITS not TARGET_PAGE_SIZE; this will make a following patch more clear. This should not have a functional effect so far. Reviewed-by: Alex Bennée Reviewed-by: Paolo Bonzini Signed-off-by: Richard Henderson --- include/exec/cpu-all.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) -- 2.17.1 diff --git a/include/exec/cpu-all.h b/include/exec/cpu-all.h index 525059970c..0543359d0f 100644 --- a/include/exec/cpu-all.h +++ b/include/exec/cpu-all.h @@ -229,7 +229,7 @@ extern TargetPageBits target_page; #endif #define TARGET_PAGE_SIZE (1 << TARGET_PAGE_BITS) -#define TARGET_PAGE_MASK ~(TARGET_PAGE_SIZE - 1) +#define TARGET_PAGE_MASK ((target_long)-1 << TARGET_PAGE_BITS) #define TARGET_PAGE_ALIGN(addr) ROUND_UP((addr), TARGET_PAGE_SIZE) /* Using intptr_t ensures that qemu_*_page_mask is sign-extended even From patchwork Mon Oct 28 14:59:34 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Richard Henderson X-Patchwork-Id: 177939 Delivered-To: patch@linaro.org Received: by 2002:ac9:3c86:0:0:0:0:0 with SMTP id w6csp3183115ocf; Mon, 28 Oct 2019 08:10:57 -0700 (PDT) X-Google-Smtp-Source: APXvYqwJLj/mbs1ngi5HCwoLn2wTptUhgkhiXhrpqAHMuCXmF1a7k9eh0EK4dgBXhzTP39ku58kg X-Received: by 2002:ac8:46cc:: with SMTP id h12mr10440126qto.18.1572275457313; Mon, 28 Oct 2019 08:10:57 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1572275457; cv=none; d=google.com; s=arc-20160816; b=fMlHXinyyqpdpdINO+ujqjxNW0lyNmA7RrYo1WttV25Vna2fBRDXdGRPTfpboeBBSe aA6DK7NBPZ0JCsho/+nLq3+SwZ+GIzTpDuPIH/qZcGLSsf/Y2/DGtAHWAY3ldT7gMAP7 D+REPWEOUTcXUCYXQ0HsfUWIsUiCZtgbJSBRolTwplKqwzx7y9idbf1F4+T6rnFgXk45 6MY6KnoKRfHiiGgbNYhZjbCRbJ0/WKh6t2zqMVGfF9EWKbxOnXUN8tF3D0LEqpB7Fc/B kJv3YpJPWT1H2HfAaiAZ9tJG8feH2ZLXmFPClh3Z0/dIDYimhkDG/bWKyA6Vn6lkVPrM EsbA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:cc:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:to:from :dkim-signature; bh=XDtNc199mjlu+7JCj1BafjGA6Am4dbfp5/ruylFlTXI=; b=dqc4qjDKu+yAqJyMzYTwjjjWc7jvv3111hAl52NlhvUnnsNco1msKXofFFq6vHJb6F VfQ2BkipSeJRnzLLbQ1tbQRNvGzwGoSXyEKGmN7ca1j0IIdsGHD/8kSVDGsfsUlBPRYz 0mdy8t7ba6wajEqeHGSKbLYXf6psDk7UAvqS8JT8yYhI78iVygdVlvx9X4z3t7mbZHn9 ajX8RNKTyd4nL8hcbqFahfse3lUUoYbuWeLsjEn2g3Qa5yhTr++SrDJBFqdhZ3TmmMkT 9NQXlKqJtjU26vBjN3J8VOSUxAIoxKZUgbHmhYMv1bASOnW9gLWLNqm37vQq82vZql8Z s/Ig== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=bEpyhl+Z; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. 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[88.138.106.230]) by smtp.gmail.com with ESMTPSA id 143sm14842876wmb.33.2019.10.28.07.59.47 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 28 Oct 2019 07:59:47 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Subject: [PULL v2 09/12] exec: Cache TARGET_PAGE_MASK for TARGET_PAGE_BITS_VARY Date: Mon, 28 Oct 2019 15:59:34 +0100 Message-Id: <20191028145937.10914-10-richard.henderson@linaro.org> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20191028145937.10914-1-richard.henderson@linaro.org> References: <20191028145937.10914-1-richard.henderson@linaro.org> MIME-Version: 1.0 X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2a00:1450:4864:20::431 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: peter.maydell@linaro.org Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" This eliminates a set of runtime shifts. It turns out that we require TARGET_PAGE_MASK more often than TARGET_PAGE_SIZE, so redefine TARGET_PAGE_SIZE based on TARGET_PAGE_MASK instead of the other way around. Reviewed-by: Alex Bennée Reviewed-by: David Hildenbrand Reviewed-by: Paolo Bonzini Signed-off-by: Richard Henderson --- include/exec/cpu-all.h | 8 ++++++-- exec-vary.c | 1 + 2 files changed, 7 insertions(+), 2 deletions(-) -- 2.17.1 diff --git a/include/exec/cpu-all.h b/include/exec/cpu-all.h index 0543359d0f..e96781a455 100644 --- a/include/exec/cpu-all.h +++ b/include/exec/cpu-all.h @@ -213,6 +213,7 @@ static inline void stl_phys_notdirty(AddressSpace *as, hwaddr addr, uint32_t val typedef struct { bool decided; int bits; + target_long mask; } TargetPageBits; #if defined(CONFIG_ATTRIBUTE_ALIAS) || !defined(IN_EXEC_VARY) extern const TargetPageBits target_page; @@ -221,15 +222,18 @@ extern TargetPageBits target_page; #endif #ifdef CONFIG_DEBUG_TCG #define TARGET_PAGE_BITS ({ assert(target_page.decided); target_page.bits; }) +#define TARGET_PAGE_MASK ({ assert(target_page.decided); target_page.mask; }) #else #define TARGET_PAGE_BITS target_page.bits +#define TARGET_PAGE_MASK target_page.mask #endif +#define TARGET_PAGE_SIZE (-(int)TARGET_PAGE_MASK) #else #define TARGET_PAGE_BITS_MIN TARGET_PAGE_BITS +#define TARGET_PAGE_SIZE (1 << TARGET_PAGE_BITS) +#define TARGET_PAGE_MASK ((target_long)-1 << TARGET_PAGE_BITS) #endif -#define TARGET_PAGE_SIZE (1 << TARGET_PAGE_BITS) -#define TARGET_PAGE_MASK ((target_long)-1 << TARGET_PAGE_BITS) #define TARGET_PAGE_ALIGN(addr) ROUND_UP((addr), TARGET_PAGE_SIZE) /* Using intptr_t ensures that qemu_*_page_mask is sign-extended even diff --git a/exec-vary.c b/exec-vary.c index 8725fd0285..ff905f2a8f 100644 --- a/exec-vary.c +++ b/exec-vary.c @@ -96,6 +96,7 @@ void finalize_target_page_bits(void) if (init_target_page.bits == 0) { init_target_page.bits = TARGET_PAGE_BITS_MIN; } + init_target_page.mask = (target_long)-1 << init_target_page.bits; init_target_page.decided = true; /* From patchwork Mon Oct 28 14:59:35 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Richard Henderson X-Patchwork-Id: 177943 Delivered-To: patch@linaro.org Received: by 2002:ac9:3c86:0:0:0:0:0 with SMTP id w6csp3187610ocf; Mon, 28 Oct 2019 08:14:28 -0700 (PDT) X-Google-Smtp-Source: APXvYqxg5I1JRfoQ8Yk9n+TXMd0kBsGeSi/ecHAAwTfBXgDfb6pO4ppDqi5PqCopd2apOkPYqfe4 X-Received: by 2002:ac8:768c:: with SMTP id g12mr7376722qtr.125.1572275668319; Mon, 28 Oct 2019 08:14:28 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1572275668; cv=none; d=google.com; s=arc-20160816; b=eYmaNdE/K6ADAxVYCjtNMV9q2qx0B54UUxGOYxF1ZJPRtl1gQaPcN8xrZ751NaWk9V CDOcnxTmfqQA2qvEufN/S8MNGmKymCstbeDQRfXABu0+PYsYbOcVyhZMUfyANYPUjxYR /QFaQXh8NVSpMjKMkZqG/S6Tc4QJdq8v/c8bM8RVIvEMX8Pk9bPel9aCsSwpjojgwrDU 1VISFcDGUxY7z6anBaEHVj2cJhTDBWrjNblPY9ekqzbqssL5obDnFqW072e8LMUdKMp5 83M4p7C4LIwFNytDs3M6UE0TziCkAgSUlIoi+vy/dVK0GzoVJG4ep70YCovPNkeuojz0 tESw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:cc:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:references:in-reply-to :message-id:date:subject:to:from:dkim-signature; bh=YCOFi2fDpbUezaVnqe2fyjA9hZ1F82Ek3+HEANsqQro=; b=mbQgNbcqtgHp3M91xYWY4ySEVM23vU7zd6pctpeJP8bn3YOcCbMOPXIhQRkEgEID6b TgO3YOYcnoWLXjAOq+42bwBLk4kpvF0SdO1MCHlws0pdZ8V5aUJ17URxiWb55A5/AoyS 2Nm1N4CCarn4EkGfMTJvkWhbhDS8D9Dz6SwStNm8zGyW8hb/PKVocFLIPuijs+8AT88g gYQmXl+2n1ymaHXfMgW88PZA/TBpR7lheQtg2xSczRhWIlZGRVucZxQ1ct/VE2Z+PQLI lwkR0PB2tijnh5srZMLISDDwzdlmZtuObOjkb2wWbuQktL+QKh/GZegPw2mEQAShO3MY udug== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=j5DjlpNd; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. 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[88.138.106.230]) by smtp.gmail.com with ESMTPSA id 143sm14842876wmb.33.2019.10.28.07.59.48 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 28 Oct 2019 07:59:48 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Subject: [PULL v2 10/12] cputlb: Fix tlb_vaddr_to_host Date: Mon, 28 Oct 2019 15:59:35 +0100 Message-Id: <20191028145937.10914-11-richard.henderson@linaro.org> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20191028145937.10914-1-richard.henderson@linaro.org> References: <20191028145937.10914-1-richard.henderson@linaro.org> X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2a00:1450:4864:20::42a X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: peter.maydell@linaro.org Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" Using uintptr_t instead of target_ulong meant that, for 64-bit guest and 32-bit host, we truncated the guest address comparator and so may not hit the tlb when we should. Fixes: 4811e9095c0 Reviewed-by: David Hildenbrand Signed-off-by: Richard Henderson --- accel/tcg/cputlb.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) -- 2.17.1 diff --git a/accel/tcg/cputlb.c b/accel/tcg/cputlb.c index 6f4194df96..5eebddcca8 100644 --- a/accel/tcg/cputlb.c +++ b/accel/tcg/cputlb.c @@ -1189,7 +1189,7 @@ void *tlb_vaddr_to_host(CPUArchState *env, abi_ptr addr, MMUAccessType access_type, int mmu_idx) { CPUTLBEntry *entry = tlb_entry(env, mmu_idx, addr); - uintptr_t tlb_addr, page; + target_ulong tlb_addr, page; size_t elt_ofs; switch (access_type) { From patchwork Mon Oct 28 14:59:36 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Richard Henderson X-Patchwork-Id: 177941 Delivered-To: patch@linaro.org Received: by 2002:ac9:3c86:0:0:0:0:0 with SMTP id w6csp3183782ocf; Mon, 28 Oct 2019 08:11:28 -0700 (PDT) X-Google-Smtp-Source: APXvYqz21igeeb6Ag3RxoscLWiXAINSM0cOwdhJDgoE8VXgoQm25+RVHXoGPwugA+3a8dV861SK0 X-Received: by 2002:aed:34c2:: with SMTP id x60mr7101495qtd.381.1572275488237; Mon, 28 Oct 2019 08:11:28 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1572275488; cv=none; d=google.com; s=arc-20160816; b=LsoFIh1zLJDCUyXRPf2KtXPalMuv5+jFKCpLjvWSjsWEswpcey9+m4iA1IChvTW6MJ 5VUsT1n6kH3ZGb6afWyeDb/+NGoxTdiIidfhWWlVQRr3IqrH5kHdFveCJGppceS8nSA6 iNV9irVOIfd6efcsoNs0eHjvLx0aDP6Qu0tYOxuXypmTK8/prJ4unH0z+GCCnSsFgm8r jwvuUVdRLcgV8t5lcHNQOjv9gNMJO2Z5oVCQ+ZKmUuLmPtL7Sme7MGuAEcrXEkLr0eog m+IJfJYtwpoBqIPw/bIxhb0l+0VmVcXqwwTO2z4Eq7qrv4EAluh5HhrDJ6GdSbxzTBr0 w7pQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:cc:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:references:in-reply-to :message-id:date:subject:to:from:dkim-signature; bh=jWCHT8imM+uT8t8z8pCnUo/8+221GMTt3GzK0VnZBfQ=; b=M4lCJNPnddLMloq2miXH7bo0HuSBKM/MMKJHH9NuM/fH7PlK9pHH7PYyCPYRUWnO40 YxHEh31/MokzQakOAoEeIWiqA45Ssme5MbFE88CISS9TEEojZozgd28OPTHcF1luV5fi 5SzAMDFKMuhe7dwuWiTB2QSgdQWkQWZ8PIWvl6oTg0JD0IELMocExO8bigvLtFT3xI00 TY3ZviBOmloVvCzysAgSzqtGfaoZftNrf8XPzAPgc4vNU4W5upc0UcNcw+y4esg+X3un J5i1ULJ0ZLxi1vQ88kU4P2C2mYzro/oZzcx1pAuwAe2pusZA15PhZews4KtDA3Rm/Qu9 JE2w== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=d26sLpzv; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. 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[88.138.106.230]) by smtp.gmail.com with ESMTPSA id 143sm14842876wmb.33.2019.10.28.07.59.49 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 28 Oct 2019 07:59:49 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Subject: [PULL v2 11/12] translate-all: fix uninitialized tb->orig_tb Date: Mon, 28 Oct 2019 15:59:36 +0100 Message-Id: <20191028145937.10914-12-richard.henderson@linaro.org> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20191028145937.10914-1-richard.henderson@linaro.org> References: <20191028145937.10914-1-richard.henderson@linaro.org> X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2a00:1450:4864:20::431 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: peter.maydell@linaro.org, Clement Deschamps Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" From: Clement Deschamps This fixes a segmentation fault in icount mode when executing from an IO region. TB is marked as CF_NOCACHE but tb->orig_tb is not initialized (equals previous value in code_gen_buffer). The issue happens in cpu_io_recompile() when it tries to invalidate orig_tb. Reviewed-by: Richard Henderson Signed-off-by: Clement Deschamps Message-Id: <20191022140016.918371-1-clement.deschamps@greensocs.com> Signed-off-by: Richard Henderson --- accel/tcg/translate-all.c | 1 + 1 file changed, 1 insertion(+) -- 2.17.1 diff --git a/accel/tcg/translate-all.c b/accel/tcg/translate-all.c index 66d4bc4341..f9b7ba159d 100644 --- a/accel/tcg/translate-all.c +++ b/accel/tcg/translate-all.c @@ -1722,6 +1722,7 @@ TranslationBlock *tb_gen_code(CPUState *cpu, tb->cs_base = cs_base; tb->flags = flags; tb->cflags = cflags; + tb->orig_tb = NULL; tb->trace_vcpu_dstate = *cpu->trace_dstate; tcg_ctx->tb_cflags = cflags; tb_overflow: From patchwork Mon Oct 28 14:59:37 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Richard Henderson X-Patchwork-Id: 177931 Delivered-To: patch@linaro.org Received: by 2002:a92:409a:0:0:0:0:0 with SMTP id d26csp3503850ill; Mon, 28 Oct 2019 08:00:46 -0700 (PDT) X-Google-Smtp-Source: APXvYqxPOGyUDQdLrBrL5WDs34f5f4BIUoXw+2VHGef+J1lJU943kpv9EwEfII7nEydKB+mWGljd X-Received: by 2002:a05:620a:3cb:: with SMTP id r11mr15923753qkm.217.1572274846407; Mon, 28 Oct 2019 08:00:46 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1572274846; cv=none; d=google.com; s=arc-20160816; b=0AxR129oGuf5By3YCcLQDQnzOTwp3400wx18RvRhZ7eJtwLe/RTyfgwkvdyvBc6kTe NvfmRjcNL5OupQmAY/nNAzIQkjJaq1uCrCNfUeoTycBhvJc4c9YYWZ10XjVH53ZroUJz zEr89I2YCXUqVdBJDUjKa2CuC0przwFktIgKrDikK3lG0Y5ygVR4JN72EdASVup8HfPZ fOTOoNujIskKPsk4p5lJv++grYtoCOGXiTg0Wx1wJWQQnaVTysxyL41h4yu8mPO8QcC4 esWpxPLmKzD1Pt/xuWwMgwhS2WgZm0eORIfWUzN+E7NwW9YZW+/67yvd3pDSlrxkuyeX 7Bew== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:cc:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:to:from :dkim-signature; bh=Q9PA/XGaFb/7jgxWdyktquMDL4GhIzWDsxOacBvv2es=; b=kQuR2epSTGDqMg3V6xm5JJs1Dqstq03zQp02/SBq17xsF2XRJriOMXCNaC1VRzwQIp 8MHFUZTofKbBCkAYpnyCAradNiWGsDCdXGzNjbTflZS5k1iA8H9i2S0q/6jPNZf+vPv0 GXv21iRfiXp1kV2WuiEBxPXpRm31l6VcGDOJvlapzXP8IF10xvmyIKncR3Xj/ZXCXOwq xV5gQ7d5HCDUMfIMgTAhRyGDU2zlERqCMq6Iv7sfRdIAYgsMXgav7P6oeZeT3JIA5heM ZRYO5Eb0pQrQGfrSJCy0jmjlu7rYO4qPrSUpDqHLjqD0hdFE+jAobNBBkyyHHTxgxSZK HFvg== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=QJsBxjAe; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. 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[88.138.106.230]) by smtp.gmail.com with ESMTPSA id 143sm14842876wmb.33.2019.10.28.07.59.50 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 28 Oct 2019 07:59:51 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Subject: [PULL v2 12/12] translate-all: Remove tb_alloc Date: Mon, 28 Oct 2019 15:59:37 +0100 Message-Id: <20191028145937.10914-13-richard.henderson@linaro.org> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20191028145937.10914-1-richard.henderson@linaro.org> References: <20191028145937.10914-1-richard.henderson@linaro.org> MIME-Version: 1.0 X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2a00:1450:4864:20::344 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: peter.maydell@linaro.org Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" Since 2ac01d6dafab, this function does only two things: assert a lock is held, and call tcg_tb_alloc. It is used exactly once, and its user has already done the assert. Reviewed-by: Philippe Mathieu-Daudé Reviewed-by: Clement Deschamps Signed-off-by: Richard Henderson --- accel/tcg/translate-all.c | 20 ++------------------ 1 file changed, 2 insertions(+), 18 deletions(-) -- 2.17.1 diff --git a/accel/tcg/translate-all.c b/accel/tcg/translate-all.c index f9b7ba159d..ae063b53f9 100644 --- a/accel/tcg/translate-all.c +++ b/accel/tcg/translate-all.c @@ -1156,23 +1156,6 @@ void tcg_exec_init(unsigned long tb_size) #endif } -/* - * Allocate a new translation block. Flush the translation buffer if - * too many translation blocks or too much generated code. - */ -static TranslationBlock *tb_alloc(target_ulong pc) -{ - TranslationBlock *tb; - - assert_memory_lock(); - - tb = tcg_tb_alloc(tcg_ctx); - if (unlikely(tb == NULL)) { - return NULL; - } - return tb; -} - /* call with @p->lock held */ static inline void invalidate_page_bitmap(PageDesc *p) { @@ -1681,6 +1664,7 @@ TranslationBlock *tb_gen_code(CPUState *cpu, TCGProfile *prof = &tcg_ctx->prof; int64_t ti; #endif + assert_memory_lock(); phys_pc = get_page_addr_code(env, pc); @@ -1706,7 +1690,7 @@ TranslationBlock *tb_gen_code(CPUState *cpu, } buffer_overflow: - tb = tb_alloc(pc); + tb = tcg_tb_alloc(tcg_ctx); if (unlikely(!tb)) { /* flush must be done */ tb_flush(cpu);