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[209.132.180.67]) by mx.google.com with ESMTP id h53si8528811edh.200.2019.10.28.11.37.32; Mon, 28 Oct 2019 11:37:33 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-leds-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@ti.com header.s=ti-com-17Q1 header.b=E7nOPk+r; spf=pass (google.com: best guess record for domain of linux-leds-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-leds-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=NONE dis=NONE) header.from=ti.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726990AbfJ1Sh3 (ORCPT + 1 other); Mon, 28 Oct 2019 14:37:29 -0400 Received: from fllv0016.ext.ti.com ([198.47.19.142]:38388 "EHLO fllv0016.ext.ti.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1725971AbfJ1Sh2 (ORCPT ); Mon, 28 Oct 2019 14:37:28 -0400 Received: from lelv0265.itg.ti.com ([10.180.67.224]) by fllv0016.ext.ti.com (8.15.2/8.15.2) with ESMTP id x9SIbPTi016680; Mon, 28 Oct 2019 13:37:25 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ti.com; s=ti-com-17Q1; t=1572287845; bh=zV3cVdmjhCBXzQdA/5xCOaiT1n6XKbwdMaP1jdy4goo=; h=From:To:CC:Subject:Date:In-Reply-To:References; b=E7nOPk+r+18g2l/78d7CIAg77iJobItcOb1zsbebl2XiWmkWGypLfVtPwXD53dEGx GFFfuvWxDaXeZJVk+1wDzJUyB0HzD8O5h7Tg0+WO1JIJ+Vb+BzKZuL/3HnjTrQNvyc dm8QaS1cJjTjY41GOqMrqNYBtPvA2W8iBGWtoDHM= Received: from DFLE114.ent.ti.com (dfle114.ent.ti.com [10.64.6.35]) by lelv0265.itg.ti.com (8.15.2/8.15.2) with ESMTPS id x9SIbP77076836 (version=TLSv1.2 cipher=AES256-GCM-SHA384 bits=256 verify=FAIL); Mon, 28 Oct 2019 13:37:25 -0500 Received: from DFLE113.ent.ti.com (10.64.6.34) by DFLE114.ent.ti.com (10.64.6.35) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.1713.5; Mon, 28 Oct 2019 13:37:13 -0500 Received: from lelv0327.itg.ti.com (10.180.67.183) by DFLE113.ent.ti.com (10.64.6.34) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.1713.5 via Frontend Transport; Mon, 28 Oct 2019 13:37:13 -0500 Received: from localhost (ileax41-snat.itg.ti.com [10.172.224.153]) by lelv0327.itg.ti.com (8.15.2/8.15.2) with ESMTP id x9SIbOAI104626; Mon, 28 Oct 2019 13:37:25 -0500 From: Dan Murphy To: , CC: , , Dan Murphy Subject: [PATCH v15 02/19] dt-bindings: leds: Add multicolor ID to the color ID list Date: Mon, 28 Oct 2019 13:36:12 -0500 Message-ID: <20191028183629.11779-3-dmurphy@ti.com> X-Mailer: git-send-email 2.22.0.214.g8dca754b1e In-Reply-To: <20191028183629.11779-1-dmurphy@ti.com> References: <20191028183629.11779-1-dmurphy@ti.com> MIME-Version: 1.0 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 Sender: linux-leds-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-leds@vger.kernel.org Add a new color ID that is declared as MULTICOLOR as with the multicolor framework declaring a definitive color is not accurate as the node can contain multiple colors. Signed-off-by: Dan Murphy --- include/dt-bindings/leds/common.h | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) -- 2.22.0.214.g8dca754b1e diff --git a/include/dt-bindings/leds/common.h b/include/dt-bindings/leds/common.h index 9e1256a7c1bf..7006d15f71e8 100644 --- a/include/dt-bindings/leds/common.h +++ b/include/dt-bindings/leds/common.h @@ -29,7 +29,8 @@ #define LED_COLOR_ID_VIOLET 5 #define LED_COLOR_ID_YELLOW 6 #define LED_COLOR_ID_IR 7 -#define LED_COLOR_ID_MAX 8 +#define LED_COLOR_ID_MULTI 8 +#define LED_COLOR_ID_MAX 9 /* Standard LED functions */ #define LED_FUNCTION_ACTIVITY "activity" From patchwork Mon Oct 28 18:36:15 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Dan Murphy X-Patchwork-Id: 177953 Delivered-To: patch@linaro.org Received: by 2002:ac9:3c86:0:0:0:0:0 with SMTP id w6csp3417287ocf; Mon, 28 Oct 2019 11:37:47 -0700 (PDT) X-Google-Smtp-Source: APXvYqyec19G+ZKRmhqFRuR5MochW1H5Or6EXXDxH14j5R2j8FGUur31SAPIc0uQnXqzgsdNPGip X-Received: by 2002:a50:b901:: with SMTP id m1mr21123228ede.203.1572287866915; Mon, 28 Oct 2019 11:37:46 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1572287866; cv=none; d=google.com; s=arc-20160816; b=HuxXZWHXxdBPhS1yaolj9dQIZeDR8gVpf7Z7gKeqGNUIa8+sMrEABZ99a3gHX/b0ch IGho63iKx1q1RHEmvfF84sZXpMqdFGG8dBoKrWlBE/FbMjD5vQAYJj+25DyERLR0XEJV G8ZF8SCiGP0jBlO+vI4CJoCt7JbOVFue2D87pkhDwfwwkzXTQ/wRHo9mZu58Sh9JDVmz NHoXtYsrkuiPEhcbuLcCBTC25SGEQou+C+63dBGMwvB0vN1m9uKefRjlHKfO/0fwaktd o5o1dQENknBbiLocn2A2shLVntAt5GOJQDoAxX4Endm8WwfTJ5iVt1SoJbPnCu9zG4Yl hr0Q== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=rypLEJLbiDfP2WcD4ls+CXhyO//n5TYBDjfB1YBfbjc=; b=Be65JMNxXz5H8/dY/q4vcTL/sgYQSGf2a3gij5Pmls/pL7pANZi3Zl8sr6PanJcup5 pi/PWUXYYogb+XWbzBRvWJ852179UQJHQGHxZlu+rWmq8vtl1SRUk9AdBldotMXxPrOe mk6kyKpmnu0vf3UfxmexPf9wCcYZGJwORKoW1EN+bu3JqTLUVQGtAzdT+l/0NXutdeav 98WIKMQ1ZlpdFOb8nRzxYmpm2i8NheRHBxAZddH7YcXbCJAnSYUUv0Kgu5alIyRRyzvU FO+luD9++KKLM02TLdevSjYUyfruYbNtqdtYr9wZ5dO0bC8apakvITaHLfWrk8kN3i+i v+DA== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@ti.com header.s=ti-com-17Q1 header.b=pPgKAv6v; spf=pass (google.com: best guess record for domain of linux-leds-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-leds-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=NONE dis=NONE) header.from=ti.com Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id x26si7410458eda.404.2019.10.28.11.37.46; Mon, 28 Oct 2019 11:37:46 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-leds-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@ti.com header.s=ti-com-17Q1 header.b=pPgKAv6v; spf=pass (google.com: best guess record for domain of linux-leds-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-leds-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=NONE dis=NONE) header.from=ti.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727176AbfJ1Sho (ORCPT + 1 other); Mon, 28 Oct 2019 14:37:44 -0400 Received: from lelv0143.ext.ti.com ([198.47.23.248]:43206 "EHLO lelv0143.ext.ti.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1725971AbfJ1Sho (ORCPT ); Mon, 28 Oct 2019 14:37:44 -0400 Received: from lelv0265.itg.ti.com ([10.180.67.224]) by lelv0143.ext.ti.com (8.15.2/8.15.2) with ESMTP id x9SIbf0r065636; Mon, 28 Oct 2019 13:37:41 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ti.com; s=ti-com-17Q1; t=1572287861; bh=rypLEJLbiDfP2WcD4ls+CXhyO//n5TYBDjfB1YBfbjc=; h=From:To:CC:Subject:Date:In-Reply-To:References; b=pPgKAv6vIs9Hcgx3j26PetVwb6oEZQCqRMG1T0bQGpZoUw9y9dEQ0s324zYW3biXm k6HAPo5h8IVRWOfoDv6WwzXiM+MI+6MHTrbhcWS9ah9zTB1DdDTyxaPWK8N+gVhKK7 d5fOKZnQZVZHRNH633bi7RKAiQPyFThS4nAtgwig= Received: from DFLE109.ent.ti.com (dfle109.ent.ti.com [10.64.6.30]) by lelv0265.itg.ti.com (8.15.2/8.15.2) with ESMTPS id x9SIbfsK077371 (version=TLSv1.2 cipher=AES256-GCM-SHA384 bits=256 verify=FAIL); Mon, 28 Oct 2019 13:37:41 -0500 Received: from DFLE110.ent.ti.com (10.64.6.31) by DFLE109.ent.ti.com (10.64.6.30) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.1713.5; Mon, 28 Oct 2019 13:37:28 -0500 Received: from lelv0326.itg.ti.com (10.180.67.84) by DFLE110.ent.ti.com (10.64.6.31) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.1713.5 via Frontend Transport; Mon, 28 Oct 2019 13:37:28 -0500 Received: from localhost (ileax41-snat.itg.ti.com [10.172.224.153]) by lelv0326.itg.ti.com (8.15.2/8.15.2) with ESMTP id x9SIbetE055564; Mon, 28 Oct 2019 13:37:40 -0500 From: Dan Murphy To: , CC: , , Dan Murphy Subject: [PATCH v15 05/19] dt: bindings: lp50xx: Introduce the lp50xx family of RGB drivers Date: Mon, 28 Oct 2019 13:36:15 -0500 Message-ID: <20191028183629.11779-6-dmurphy@ti.com> X-Mailer: git-send-email 2.22.0.214.g8dca754b1e In-Reply-To: <20191028183629.11779-1-dmurphy@ti.com> References: <20191028183629.11779-1-dmurphy@ti.com> MIME-Version: 1.0 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 Sender: linux-leds-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-leds@vger.kernel.org Introduce the bindings for the Texas Instruments LP5036, LP5030, LP5024, LP5018, LP5012 and LP5009 RGB LED device driver. The LP5036/30/24/18/12/9 can control RGB LEDs individually or as part of a control bank group. These devices have the ability to adjust the mixing control for the RGB LEDs to obtain different colors independent of the overall brightness of the LED grouping. Datasheet: http://www.ti.com/lit/ds/symlink/lp5012.pdf http://www.ti.com/lit/ds/symlink/lp5024.pdf http://www.ti.com/lit/ds/symlink/lp5036.pdf Signed-off-by: Dan Murphy --- .../devicetree/bindings/leds/leds-lp50xx.txt | 148 ++++++++++++++++++ 1 file changed, 148 insertions(+) create mode 100644 Documentation/devicetree/bindings/leds/leds-lp50xx.txt -- 2.22.0.214.g8dca754b1e diff --git a/Documentation/devicetree/bindings/leds/leds-lp50xx.txt b/Documentation/devicetree/bindings/leds/leds-lp50xx.txt new file mode 100644 index 000000000000..291d418642e0 --- /dev/null +++ b/Documentation/devicetree/bindings/leds/leds-lp50xx.txt @@ -0,0 +1,148 @@ +* Texas Instruments - LP5009/12/18/24/30/36 RGB LED driver + +The LP50XX is multi-channel, I2C RGB LED Drivers that can group RGB LEDs into +a LED group or control them individually. + +The difference in these RGB LED drivers is the number of supported RGB modules. + +Required parent properties: + - compatible: + "ti,lp5009" + "ti,lp5012" + "ti,lp5018" + "ti,lp5024" + "ti,lp5030" + "ti,lp5036" + - reg : I2C slave address + lp5009/12 - 0x14, 0x15, 0x16, 0x17 + lp5018/24 - 0x28, 0x29, 0x2a, 0x2b + lp5030/36 - 0x30, 0x31, 0x32, 0x33 + - #address-cells : 1 + - #size-cells : 0 + +Optional parent properties: + - enable-gpios : gpio pin to enable/disable the device. + - vled-supply : LED supply + +Required child properties: + - #address-cells : 1 + - #size-cells : 0 + - reg : This is the LED module number. + - color : Must be LED_COLOR_ID_MULTI + - function : see Documentation/devicetree/bindings/leds/common.txt + +Required child properties only if LED modules will be banked: + - ti,led-bank : This property denotes the LED module numbers that will + be controlled as a single RGB cluster. Each LED module + number will be controlled by a single LED class instance. + There can only be one instance of the ti,led-bank + property for each device node. + +Required grandchildren properties: + - reg : A single entry denoting the LED output that controls + the monochrome LED. + - color : see Documentation/devicetree/bindings/leds/common.txt + - led-sources : see Documentation/devicetree/bindings/leds/common.txt + +The LED outputs associated with the LED modules are defined in Table 1 of the +corresponding data sheets. + +LP5009 - 3 Total RGB cluster LED outputs 0-2 +LP5012 - 4 Total RGB cluster LED outputs 0-3 +LP5018 - 6 Total RGB cluster LED outputs 0-5 +LP5024 - 8 Total RGB cluster LED outputs 0-7 +LP5030 - 10 Total RGB cluster LED outputs 0-9 +LP5036 - 12 Total RGB cluster LED outputs 0-11 + +Optional child properties: + - label : see Documentation/devicetree/bindings/leds/common.txt + - linux,default-trigger : + see Documentation/devicetree/bindings/leds/common.txt + +Examples: +led-controller@29 { + #address-cells = <1>; + #size-cells = <0>; + compatible = "ti,lp5024"; + reg = <0x29>; + enable-gpios = <&gpio1 28 GPIO_ACTIVE_HIGH>; + vled-supply = <&vmmcsd_fixed>; + + multi-led@1 { + #address-cells = <1>; + #size-cells = <0>; + reg = <1>; + color = ; + function = LED_FUNCTION_STATUS; + + led@3 { + reg = <3>; + color = ; + }; + + led@4 { + reg = <4>; + color = ; + }; + + led@5 { + reg = <5>; + color = ; + }; + }; + + multi-led@2 { + #address-cells = <1>; + #size-cells = <0>; + reg = <2>; + color = ; + function = LED_FUNCTION_STANDBY; + ti,led-bank = <2 3 5>; + + led@6 { + reg = <0x6>; + color = ; + led-sources = <6 9 15>; + }; + + led@7 { + reg = <0x7>; + color = ; + led-sources = <7 10 16>; + }; + + led@8 { + reg = <0x8>; + color = ; + led-sources = <8 11 17>; + }; + }; + + multi-led@4 { + #address-cells = <1>; + #size-cells = <0>; + reg = <4>; + color = ; + function = LED_FUNCTION_ACTIVITY; + + led@12 { + reg = <12>; + color = ; + }; + + led@13 { + reg = <13>; + color = ; + }; + + led@14 { + reg = <14>; + color = ; + }; + }; +}; + +For more product information please see the link below: +http://www.ti.com/lit/ds/symlink/lp5012.pdf +http://www.ti.com/lit/ds/symlink/lp5024.pdf +http://www.ti.com/lit/ds/symlink/lp5036.pdf From patchwork Mon Oct 28 18:36:16 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Dan Murphy X-Patchwork-Id: 177954 Delivered-To: patch@linaro.org Received: by 2002:ac9:3c86:0:0:0:0:0 with SMTP id w6csp3417373ocf; Mon, 28 Oct 2019 11:37:51 -0700 (PDT) X-Google-Smtp-Source: APXvYqwgT0LyQGIpMO9Zl/gmPDO6EKsLkN6ku93pDRQkveXGOry6sSP7sZR/iybtRbESwNLSni0g X-Received: by 2002:a17:906:9596:: with SMTP id r22mr18461108ejx.332.1572287871504; Mon, 28 Oct 2019 11:37:51 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1572287871; cv=none; d=google.com; s=arc-20160816; b=ZADnyeYELpXoinvx3HxWSmRmh/rdjC0ZK6SEaXuW6ZbEdTzPHshu3XAYW/2dX2YBGT zgJ1H3eHr1H49MMvdtmYp2r85Z/3RBFeFMgcTrY4cgRw7jqIoHgcYw02bvXBRF9TWDVc V4mrwIm6ToWHXcf44b5mSL63bct7efdq9jfr++NMgBKVLifkHZ3dXuykg5TaOTvZxgXx GmBcnwHoM9m3Yu7RWgxhuSk7W3bmUlh6tTZBQF55Btc4ZlWaofTXM3zQE+f+vtjuF8Js ZyiqAvsVyDrOjEvUYtOf9TPQTRdqeC25ng+IFDul8jZFmhRyCRAUwLReXBO4NvY5AHjF xrKA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=rs/LUDCdBIaEi1kgCNSm7ELwPchPaCb+/wOhm/agb8Y=; b=ehYX6S1cm/ZEzSV7KTXGxwgkDK13IEwa6yhkXcUS1uRi55VfFJUSK4/tLMH3HG328L 8VRi+qjsLUFXylFJHLii+2emVCac+QId8A12sQi5rs2ZHSVU70Tw3fyw7Db21C2Kdhwi WxfcUFfLA/MN/4FyGLAqqo1f61huflfSeIHvh8vYn0Hr+QH8ZsK31+jrNjL+2q+/WT8f oqp4TikLaHNkjyo/EWFDAlMJPhYU5Uq4kDgk8I1kGp9OWWt29G4mp9aP9gLyiRnn058T 98/Xh4QhIjj6SzlJm0jTFqTaFG8qIDkntf3cOQYxJitgYulGpxyRoSq3Zk8fbfTp3q91 1EXA== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@ti.com header.s=ti-com-17Q1 header.b=cQbckpst; spf=pass (google.com: best guess record for domain of linux-leds-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-leds-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=NONE dis=NONE) header.from=ti.com Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id x26si7410458eda.404.2019.10.28.11.37.51; Mon, 28 Oct 2019 11:37:51 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-leds-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@ti.com header.s=ti-com-17Q1 header.b=cQbckpst; spf=pass (google.com: best guess record for domain of linux-leds-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-leds-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=NONE dis=NONE) header.from=ti.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1725971AbfJ1Shu (ORCPT + 1 other); Mon, 28 Oct 2019 14:37:50 -0400 Received: from fllv0015.ext.ti.com ([198.47.19.141]:57298 "EHLO fllv0015.ext.ti.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1727230AbfJ1Shu (ORCPT ); Mon, 28 Oct 2019 14:37:50 -0400 Received: from lelv0266.itg.ti.com ([10.180.67.225]) by fllv0015.ext.ti.com (8.15.2/8.15.2) with ESMTP id x9SIbkRF034538; Mon, 28 Oct 2019 13:37:46 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ti.com; s=ti-com-17Q1; t=1572287866; bh=rs/LUDCdBIaEi1kgCNSm7ELwPchPaCb+/wOhm/agb8Y=; h=From:To:CC:Subject:Date:In-Reply-To:References; b=cQbckpstvHGky0lPXs7eSItTo5oufgR5vVQ1C7zXNXE8/nnlpcfJuAsF+m+0GLRe/ DXnkopsM4rx1LYNwZ6lJLK/FF8AB0lVXfqXJZWTqLHwsTpO/JYxMcpi6Rsr+VUddme Y4l5i1weqmYe28NZrrov+jpAxYcj6zGYMRQMgVT4= Received: from DLEE108.ent.ti.com (dlee108.ent.ti.com [157.170.170.38]) by lelv0266.itg.ti.com (8.15.2/8.15.2) with ESMTPS id x9SIbk84077666 (version=TLSv1.2 cipher=AES256-GCM-SHA384 bits=256 verify=FAIL); Mon, 28 Oct 2019 13:37:46 -0500 Received: from DLEE106.ent.ti.com (157.170.170.36) by DLEE108.ent.ti.com (157.170.170.38) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.1713.5; Mon, 28 Oct 2019 13:37:34 -0500 Received: from fllv0039.itg.ti.com (10.64.41.19) by DLEE106.ent.ti.com (157.170.170.36) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.1713.5 via Frontend Transport; Mon, 28 Oct 2019 13:37:46 -0500 Received: from localhost (ileax41-snat.itg.ti.com [10.172.224.153]) by fllv0039.itg.ti.com (8.15.2/8.15.2) with ESMTP id x9SIbjvn122411; Mon, 28 Oct 2019 13:37:45 -0500 From: Dan Murphy To: , CC: , , Dan Murphy Subject: [PATCH v15 06/19] leds: lp50xx: Add the LP50XX family of the RGB LED driver Date: Mon, 28 Oct 2019 13:36:16 -0500 Message-ID: <20191028183629.11779-7-dmurphy@ti.com> X-Mailer: git-send-email 2.22.0.214.g8dca754b1e In-Reply-To: <20191028183629.11779-1-dmurphy@ti.com> References: <20191028183629.11779-1-dmurphy@ti.com> MIME-Version: 1.0 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 Sender: linux-leds-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-leds@vger.kernel.org Introduce the LP5036/30/24/18/12/9 RGB LED driver. The difference in these parts are the number of LED outputs where the: LP5036 can control 36 LEDs LP5030 can control 30 LEDs LP5024 can control 24 LEDs LP5018 can control 18 LEDs LP5012 can control 12 LEDs LP5009 can control 9 LEDs The device has the ability to group LED output into control banks so that multiple LED banks can be controlled with the same mixing and brightness. Inversely the LEDs can also be controlled independently. Signed-off-by: Dan Murphy --- drivers/leds/Kconfig | 11 + drivers/leds/Makefile | 1 + drivers/leds/leds-lp50xx.c | 799 +++++++++++++++++++++++++++++++++++++ 3 files changed, 811 insertions(+) create mode 100644 drivers/leds/leds-lp50xx.c -- 2.22.0.214.g8dca754b1e diff --git a/drivers/leds/Kconfig b/drivers/leds/Kconfig index a1ede89afc9e..fb614a6b9afa 100644 --- a/drivers/leds/Kconfig +++ b/drivers/leds/Kconfig @@ -363,6 +363,17 @@ config LEDS_LP3952 To compile this driver as a module, choose M here: the module will be called leds-lp3952. +config LEDS_LP50XX + tristate "LED Support for TI LP5036/30/24/18/12/9 LED driver chip" + depends on LEDS_CLASS && REGMAP_I2C + depends on LEDS_CLASS_MULTI_COLOR + help + If you say yes here you get support for the Texas Instruments + LP5036, LP5030, LP5024, LP5018, LP5012 and LP5009 LED driver. + + To compile this driver as a module, choose M here: the + module will be called leds-lp50xx. + config LEDS_LP55XX_COMMON tristate "Common Driver for TI/National LP5521/5523/55231/5562/8501" depends on LEDS_LP5521 || LEDS_LP5523 || LEDS_LP5562 || LEDS_LP8501 diff --git a/drivers/leds/Makefile b/drivers/leds/Makefile index 841038cfe35b..7a208a0f7b84 100644 --- a/drivers/leds/Makefile +++ b/drivers/leds/Makefile @@ -34,6 +34,7 @@ obj-$(CONFIG_LEDS_GPIO_REGISTER) += leds-gpio-register.o obj-$(CONFIG_LEDS_GPIO) += leds-gpio.o obj-$(CONFIG_LEDS_LP3944) += leds-lp3944.o obj-$(CONFIG_LEDS_LP3952) += leds-lp3952.o +obj-$(CONFIG_LEDS_LP50XX) += leds-lp50xx.o obj-$(CONFIG_LEDS_LP55XX_COMMON) += leds-lp55xx-common.o obj-$(CONFIG_LEDS_LP5521) += leds-lp5521.o obj-$(CONFIG_LEDS_LP5523) += leds-lp5523.o diff --git a/drivers/leds/leds-lp50xx.c b/drivers/leds/leds-lp50xx.c new file mode 100644 index 000000000000..76ca5cc1347c --- /dev/null +++ b/drivers/leds/leds-lp50xx.c @@ -0,0 +1,799 @@ +// SPDX-License-Identifier: GPL-2.0 +// TI LP50XX LED chip family driver +// Copyright (C) 2018 Texas Instruments Incorporated - http://www.ti.com/ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#include + +#define LP50XX_DEV_CFG0 0x00 +#define LP50XX_DEV_CFG1 0x01 +#define LP50XX_LED_CFG0 0x02 + +/* LP5009 and LP5012 registers */ +#define LP5012_BNK_BRT 0x03 +#define LP5012_BNKA_CLR 0x04 +#define LP5012_BNKB_CLR 0x05 +#define LP5012_BNKC_CLR 0x06 +#define LP5012_LED0_BRT 0x07 +#define LP5012_LED1_BRT 0x08 +#define LP5012_LED2_BRT 0x09 +#define LP5012_LED3_BRT 0x0a +#define LP5012_OUT0_CLR 0x0b +#define LP5012_OUT1_CLR 0x0c +#define LP5012_OUT2_CLR 0x0d +#define LP5012_OUT3_CLR 0x0e +#define LP5012_OUT4_CLR 0x0f +#define LP5012_OUT5_CLR 0x10 +#define LP5012_OUT6_CLR 0x11 +#define LP5012_OUT7_CLR 0x12 +#define LP5012_OUT8_CLR 0x13 +#define LP5012_OUT9_CLR 0x14 +#define LP5012_OUT10_CLR 0x15 +#define LP5012_OUT11_CLR 0x16 +#define LP5012_RESET 0x17 + +/* LP5018 and LP5024 registers */ +#define LP5024_BNK_BRT 0x03 +#define LP5024_BNKA_CLR 0x04 +#define LP5024_BNKB_CLR 0x05 +#define LP5024_BNKC_CLR 0x06 +#define LP5024_LED0_BRT 0x07 +#define LP5024_LED1_BRT 0x08 +#define LP5024_LED2_BRT 0x09 +#define LP5024_LED3_BRT 0x0a +#define LP5024_LED4_BRT 0x0b +#define LP5024_LED5_BRT 0x0c +#define LP5024_LED6_BRT 0x0d +#define LP5024_LED7_BRT 0x0e + +#define LP5024_OUT0_CLR 0x0f +#define LP5024_OUT1_CLR 0x10 +#define LP5024_OUT2_CLR 0x11 +#define LP5024_OUT3_CLR 0x12 +#define LP5024_OUT4_CLR 0x13 +#define LP5024_OUT5_CLR 0x14 +#define LP5024_OUT6_CLR 0x15 +#define LP5024_OUT7_CLR 0x16 +#define LP5024_OUT8_CLR 0x17 +#define LP5024_OUT9_CLR 0x18 +#define LP5024_OUT10_CLR 0x19 +#define LP5024_OUT11_CLR 0x1a +#define LP5024_OUT12_CLR 0x1b +#define LP5024_OUT13_CLR 0x1c +#define LP5024_OUT14_CLR 0x1d +#define LP5024_OUT15_CLR 0x1e +#define LP5024_OUT16_CLR 0x1f +#define LP5024_OUT17_CLR 0x20 +#define LP5024_OUT18_CLR 0x21 +#define LP5024_OUT19_CLR 0x22 +#define LP5024_OUT20_CLR 0x23 +#define LP5024_OUT21_CLR 0x24 +#define LP5024_OUT22_CLR 0x25 +#define LP5024_OUT23_CLR 0x26 +#define LP5024_RESET 0x27 + +/* LP5030 and LP5036 registers */ +#define LP5036_LED_CFG1 0x03 +#define LP5036_BNK_BRT 0x04 +#define LP5036_BNKA_CLR 0x05 +#define LP5036_BNKB_CLR 0x06 +#define LP5036_BNKC_CLR 0x07 +#define LP5036_LED0_BRT 0x08 +#define LP5036_LED1_BRT 0x09 +#define LP5036_LED2_BRT 0x0a +#define LP5036_LED3_BRT 0x0b +#define LP5036_LED4_BRT 0x0c +#define LP5036_LED5_BRT 0x0d +#define LP5036_LED6_BRT 0x0e +#define LP5036_LED7_BRT 0x0f +#define LP5036_LED8_BRT 0x10 +#define LP5036_LED9_BRT 0x11 +#define LP5036_LED10_BRT 0x12 +#define LP5036_LED11_BRT 0x13 + +#define LP5036_OUT0_CLR 0x14 +#define LP5036_OUT1_CLR 0x15 +#define LP5036_OUT2_CLR 0x16 +#define LP5036_OUT3_CLR 0x17 +#define LP5036_OUT4_CLR 0x18 +#define LP5036_OUT5_CLR 0x19 +#define LP5036_OUT6_CLR 0x1a +#define LP5036_OUT7_CLR 0x1b +#define LP5036_OUT8_CLR 0x1c +#define LP5036_OUT9_CLR 0x1d +#define LP5036_OUT10_CLR 0x1e +#define LP5036_OUT11_CLR 0x1f +#define LP5036_OUT12_CLR 0x20 +#define LP5036_OUT13_CLR 0x21 +#define LP5036_OUT14_CLR 0x22 +#define LP5036_OUT15_CLR 0x23 +#define LP5036_OUT16_CLR 0x24 +#define LP5036_OUT17_CLR 0x25 +#define LP5036_OUT18_CLR 0x26 +#define LP5036_OUT19_CLR 0x27 +#define LP5036_OUT20_CLR 0x28 +#define LP5036_OUT21_CLR 0x29 +#define LP5036_OUT22_CLR 0x2a +#define LP5036_OUT23_CLR 0x2b +#define LP5036_OUT24_CLR 0x2c +#define LP5036_OUT25_CLR 0x2d +#define LP5036_OUT26_CLR 0x2e +#define LP5036_OUT27_CLR 0x2f +#define LP5036_OUT28_CLR 0x30 +#define LP5036_OUT29_CLR 0x31 +#define LP5036_OUT30_CLR 0x32 +#define LP5036_OUT31_CLR 0x33 +#define LP5036_OUT32_CLR 0x34 +#define LP5036_OUT33_CLR 0x35 +#define LP5036_OUT34_CLR 0x36 +#define LP5036_OUT35_CLR 0x37 +#define LP5036_RESET 0x38 + +#define LP50XX_SW_RESET 0xff +#define LP50XX_CHIP_EN BIT(6) + +/* There are 3 LED outputs per bank */ +#define LP50XX_LEDS_PER_MODULE 3 + +#define LP5009_MAX_LED_MODULES 2 +#define LP5012_MAX_LED_MODULES 4 +#define LP5018_MAX_LED_MODULES 6 +#define LP5024_MAX_LED_MODULES 8 +#define LP5030_MAX_LED_MODULES 10 +#define LP5036_MAX_LED_MODULES 12 + +#define LP5009_MAX_LEDS (LP5009_MAX_LED_MODULES * LP50XX_LEDS_PER_MODULE) +#define LP5012_MAX_LEDS (LP5012_MAX_LED_MODULES * LP50XX_LEDS_PER_MODULE) +#define LP5018_MAX_LEDS (LP5018_MAX_LED_MODULES * LP50XX_LEDS_PER_MODULE) +#define LP5024_MAX_LEDS (LP5024_MAX_LED_MODULES * LP50XX_LEDS_PER_MODULE) +#define LP5030_MAX_LEDS (LP5030_MAX_LED_MODULES * LP50XX_LEDS_PER_MODULE) +#define LP5036_MAX_LEDS (LP5036_MAX_LED_MODULES * LP50XX_LEDS_PER_MODULE) + +static const struct reg_default lp5012_reg_defs[] = { + {LP50XX_DEV_CFG0, 0x0}, + {LP50XX_DEV_CFG1, 0x3c}, + {LP50XX_LED_CFG0, 0x0}, + {LP5012_BNK_BRT, 0xff}, + {LP5012_BNKA_CLR, 0x0f}, + {LP5012_BNKB_CLR, 0x0f}, + {LP5012_BNKC_CLR, 0x0f}, + {LP5012_LED0_BRT, 0x0f}, + {LP5012_LED1_BRT, 0xff}, + {LP5012_LED2_BRT, 0xff}, + {LP5012_LED3_BRT, 0xff}, + {LP5012_OUT0_CLR, 0x0f}, + {LP5012_OUT1_CLR, 0x00}, + {LP5012_OUT2_CLR, 0x00}, + {LP5012_OUT3_CLR, 0x00}, + {LP5012_OUT4_CLR, 0x00}, + {LP5012_OUT5_CLR, 0x00}, + {LP5012_OUT6_CLR, 0x00}, + {LP5012_OUT7_CLR, 0x00}, + {LP5012_OUT8_CLR, 0x00}, + {LP5012_OUT9_CLR, 0x00}, + {LP5012_OUT10_CLR, 0x00}, + {LP5012_OUT11_CLR, 0x00}, + {LP5012_RESET, 0x00} +}; + +static const struct reg_default lp5024_reg_defs[] = { + {LP50XX_DEV_CFG0, 0x0}, + {LP50XX_DEV_CFG1, 0x3c}, + {LP50XX_LED_CFG0, 0x0}, + {LP5024_BNK_BRT, 0xff}, + {LP5024_BNKA_CLR, 0x0f}, + {LP5024_BNKB_CLR, 0x0f}, + {LP5024_BNKC_CLR, 0x0f}, + {LP5024_LED0_BRT, 0x0f}, + {LP5024_LED1_BRT, 0xff}, + {LP5024_LED2_BRT, 0xff}, + {LP5024_LED3_BRT, 0xff}, + {LP5024_LED4_BRT, 0xff}, + {LP5024_LED5_BRT, 0xff}, + {LP5024_LED6_BRT, 0xff}, + {LP5024_LED7_BRT, 0xff}, + {LP5024_OUT0_CLR, 0x0f}, + {LP5024_OUT1_CLR, 0x00}, + {LP5024_OUT2_CLR, 0x00}, + {LP5024_OUT3_CLR, 0x00}, + {LP5024_OUT4_CLR, 0x00}, + {LP5024_OUT5_CLR, 0x00}, + {LP5024_OUT6_CLR, 0x00}, + {LP5024_OUT7_CLR, 0x00}, + {LP5024_OUT8_CLR, 0x00}, + {LP5024_OUT9_CLR, 0x00}, + {LP5024_OUT10_CLR, 0x00}, + {LP5024_OUT11_CLR, 0x00}, + {LP5024_OUT12_CLR, 0x00}, + {LP5024_OUT13_CLR, 0x00}, + {LP5024_OUT14_CLR, 0x00}, + {LP5024_OUT15_CLR, 0x00}, + {LP5024_OUT16_CLR, 0x00}, + {LP5024_OUT17_CLR, 0x00}, + {LP5024_OUT18_CLR, 0x00}, + {LP5024_OUT19_CLR, 0x00}, + {LP5024_OUT20_CLR, 0x00}, + {LP5024_OUT21_CLR, 0x00}, + {LP5024_OUT22_CLR, 0x00}, + {LP5024_OUT23_CLR, 0x00}, + {LP5024_RESET, 0x00} +}; + +static const struct reg_default lp5036_reg_defs[] = { + {LP50XX_DEV_CFG0, 0x0}, + {LP50XX_DEV_CFG1, 0x3c}, + {LP50XX_LED_CFG0, 0x0}, + {LP5036_LED_CFG1, 0x0}, + {LP5036_BNK_BRT, 0xff}, + {LP5036_BNKA_CLR, 0x0f}, + {LP5036_BNKB_CLR, 0x0f}, + {LP5036_BNKC_CLR, 0x0f}, + {LP5036_LED0_BRT, 0x0f}, + {LP5036_LED1_BRT, 0xff}, + {LP5036_LED2_BRT, 0xff}, + {LP5036_LED3_BRT, 0xff}, + {LP5036_LED4_BRT, 0xff}, + {LP5036_LED5_BRT, 0xff}, + {LP5036_LED6_BRT, 0xff}, + {LP5036_LED7_BRT, 0xff}, + {LP5036_OUT0_CLR, 0x0f}, + {LP5036_OUT1_CLR, 0x00}, + {LP5036_OUT2_CLR, 0x00}, + {LP5036_OUT3_CLR, 0x00}, + {LP5036_OUT4_CLR, 0x00}, + {LP5036_OUT5_CLR, 0x00}, + {LP5036_OUT6_CLR, 0x00}, + {LP5036_OUT7_CLR, 0x00}, + {LP5036_OUT8_CLR, 0x00}, + {LP5036_OUT9_CLR, 0x00}, + {LP5036_OUT10_CLR, 0x00}, + {LP5036_OUT11_CLR, 0x00}, + {LP5036_OUT12_CLR, 0x00}, + {LP5036_OUT13_CLR, 0x00}, + {LP5036_OUT14_CLR, 0x00}, + {LP5036_OUT15_CLR, 0x00}, + {LP5036_OUT16_CLR, 0x00}, + {LP5036_OUT17_CLR, 0x00}, + {LP5036_OUT18_CLR, 0x00}, + {LP5036_OUT19_CLR, 0x00}, + {LP5036_OUT20_CLR, 0x00}, + {LP5036_OUT21_CLR, 0x00}, + {LP5036_OUT22_CLR, 0x00}, + {LP5036_OUT23_CLR, 0x00}, + {LP5036_OUT24_CLR, 0x00}, + {LP5036_OUT25_CLR, 0x00}, + {LP5036_OUT26_CLR, 0x00}, + {LP5036_OUT27_CLR, 0x00}, + {LP5036_OUT28_CLR, 0x00}, + {LP5036_OUT29_CLR, 0x00}, + {LP5036_OUT30_CLR, 0x00}, + {LP5036_OUT31_CLR, 0x00}, + {LP5036_OUT32_CLR, 0x00}, + {LP5036_OUT33_CLR, 0x00}, + {LP5036_OUT34_CLR, 0x00}, + {LP5036_OUT35_CLR, 0x00}, + {LP5036_RESET, 0x00} +}; + +static const struct regmap_config lp5012_regmap_config = { + .reg_bits = 8, + .val_bits = 8, + + .max_register = LP5012_RESET, + .reg_defaults = lp5012_reg_defs, + .num_reg_defaults = ARRAY_SIZE(lp5012_reg_defs), + .cache_type = REGCACHE_RBTREE, +}; + +static const struct regmap_config lp5024_regmap_config = { + .reg_bits = 8, + .val_bits = 8, + + .max_register = LP5024_RESET, + .reg_defaults = lp5024_reg_defs, + .num_reg_defaults = ARRAY_SIZE(lp5024_reg_defs), + .cache_type = REGCACHE_RBTREE, +}; + +static const struct regmap_config lp5036_regmap_config = { + .reg_bits = 8, + .val_bits = 8, + + .max_register = LP5036_RESET, + .reg_defaults = lp5036_reg_defs, + .num_reg_defaults = ARRAY_SIZE(lp5036_reg_defs), + .cache_type = REGCACHE_RBTREE, +}; + +enum lp50xx_model { + LP5009, + LP5012, + LP5018, + LP5024, + LP5030, + LP5036, +}; + +/* + * struct lp50xx_chip_info - + * @num_leds: number of LED outputs available on the device + * @led_brightness0_reg: first brightness register of the device + * @mix_out0_reg: first color mix register of the device + * @bank_brt_reg: bank brightness register + * @bank_mix_reg: color mix register + * @reset_reg: device reset register + */ +struct lp50xx_chip_info { + const struct regmap_config lp50xx_regmap_config; + int model_id; + u8 max_modules; + u8 num_leds; + u8 led_brightness0_reg; + u8 mix_out0_reg; + u8 bank_brt_reg; + u8 bank_mix_reg; + u8 reset_reg; +}; + +static const struct lp50xx_chip_info lp50xx_chip_info_tbl[] = { + [LP5009] = { + .model_id = LP5009, + .max_modules = LP5009_MAX_LED_MODULES, + .num_leds = LP5009_MAX_LEDS, + .led_brightness0_reg = LP5012_LED0_BRT, + .mix_out0_reg = LP5012_OUT0_CLR, + .bank_brt_reg = LP5012_BNK_BRT, + .bank_mix_reg = LP5012_BNKA_CLR, + .reset_reg = LP5012_RESET, + .lp50xx_regmap_config = lp5012_regmap_config, + }, + [LP5012] = { + .model_id = LP5012, + .max_modules = LP5012_MAX_LED_MODULES, + .num_leds = LP5012_MAX_LEDS, + .led_brightness0_reg = LP5012_LED0_BRT, + .mix_out0_reg = LP5012_OUT0_CLR, + .bank_brt_reg = LP5012_BNK_BRT, + .bank_mix_reg = LP5012_BNKA_CLR, + .reset_reg = LP5012_RESET, + .lp50xx_regmap_config = lp5012_regmap_config, + }, + [LP5018] = { + .model_id = LP5018, + .max_modules = LP5018_MAX_LED_MODULES, + .num_leds = LP5018_MAX_LEDS, + .led_brightness0_reg = LP5024_LED0_BRT, + .mix_out0_reg = LP5024_OUT0_CLR, + .bank_brt_reg = LP5024_BNK_BRT, + .bank_mix_reg = LP5024_BNKA_CLR, + .reset_reg = LP5024_RESET, + .lp50xx_regmap_config = lp5024_regmap_config, + }, + [LP5024] = { + .model_id = LP5024, + .max_modules = LP5024_MAX_LED_MODULES, + .num_leds = LP5024_MAX_LEDS, + .led_brightness0_reg = LP5024_LED0_BRT, + .mix_out0_reg = LP5024_OUT0_CLR, + .bank_brt_reg = LP5024_BNK_BRT, + .bank_mix_reg = LP5024_BNKA_CLR, + .reset_reg = LP5024_RESET, + .lp50xx_regmap_config = lp5024_regmap_config, + }, + [LP5030] = { + .model_id = LP5030, + .max_modules = LP5030_MAX_LED_MODULES, + .num_leds = LP5030_MAX_LEDS, + .led_brightness0_reg = LP5036_LED0_BRT, + .mix_out0_reg = LP5036_OUT0_CLR, + .bank_brt_reg = LP5036_BNK_BRT, + .bank_mix_reg = LP5036_BNKA_CLR, + .reset_reg = LP5036_RESET, + .lp50xx_regmap_config = lp5036_regmap_config, + }, + [LP5036] = { + .model_id = LP5036, + .max_modules = LP5036_MAX_LED_MODULES, + .num_leds = LP5036_MAX_LEDS, + .led_brightness0_reg = LP5036_LED0_BRT, + .mix_out0_reg = LP5036_OUT0_CLR, + .bank_brt_reg = LP5036_BNK_BRT, + .bank_mix_reg = LP5036_BNKA_CLR, + .reset_reg = LP5036_RESET, + .lp50xx_regmap_config = lp5036_regmap_config, + }, +}; + +struct lp50xx_led { + struct led_classdev led_dev; + struct led_classdev_mc mc_cdev; + struct lp50xx *priv; + unsigned long bank_modules; + int led_intensity[LP50XX_LEDS_PER_MODULE]; + u8 ctrl_bank_enabled; + int led_number; +}; + +/** + * struct lp50xx - + * @enable_gpio: hardware enable gpio + * @regulator: LED supply regulator pointer + * @client: pointer to the I2C client + * @regmap: device register map + * @dev: pointer to the devices device struct + * @lock: lock for reading/writing the device + * @chip_info: chip specific information (ie num_leds) + * @num_of_banked_leds: holds the number of banked LEDs + * @leds: array of LED strings + */ +struct lp50xx { + struct gpio_desc *enable_gpio; + struct regulator *regulator; + struct i2c_client *client; + struct regmap *regmap; + struct device *dev; + struct mutex lock; + const struct lp50xx_chip_info *chip_info; + int num_of_banked_leds; + + /* This needs to be at the end of the struct */ + struct lp50xx_led leds[]; +}; + +static int lp50xx_brightness_set(struct led_classdev *cdev, + enum led_brightness brightness) +{ + struct lp50xx_led *led = container_of(cdev, struct lp50xx_led, led_dev); + const struct lp50xx_chip_info *led_chip = led->priv->chip_info; + struct led_mc_color_entry *color_data; + u8 led_offset, reg_val, reg_color_offset; + int ret = 0; + + mutex_lock(&led->priv->lock); + + if (led->ctrl_bank_enabled) + reg_val = led_chip->bank_brt_reg; + else + reg_val = led_chip->led_brightness0_reg + + led->led_number; + + ret = regmap_write(led->priv->regmap, reg_val, brightness); + if (ret) { + dev_err(&led->priv->client->dev, + "Cannot write brightness value %d\n", ret); + goto out; + } + + list_for_each_entry(color_data, &led->mc_cdev.color_list, list) { + if (color_data->led_color_id == LED_COLOR_ID_RED) { + reg_color_offset = 0; + } else if (color_data->led_color_id == LED_COLOR_ID_GREEN) { + reg_color_offset = 1; + } else if (color_data->led_color_id == LED_COLOR_ID_BLUE) { + reg_color_offset = 2; + } else { + dev_err(&led->priv->client->dev, + "LED color not found\n"); + ret = -EINVAL; + goto out; + } + + if (led->ctrl_bank_enabled) { + reg_val = led_chip->bank_mix_reg + reg_color_offset; + } else { + led_offset = (led->led_number * 3) + reg_color_offset; + reg_val = led_chip->mix_out0_reg + led_offset; + } + + ret = regmap_write(led->priv->regmap, reg_val, + color_data->intensity); + if (ret) { + dev_err(&led->priv->client->dev, + "Cannot write intensity value %d\n", ret); + goto out; + } + } +out: + mutex_unlock(&led->priv->lock); + return ret; +} + +static enum led_brightness lp50xx_brightness_get(struct led_classdev *cdev) +{ + struct lp50xx_led *led = container_of(cdev, struct lp50xx_led, led_dev); + const struct lp50xx_chip_info *led_chip = led->priv->chip_info; + unsigned int brt_val; + u8 reg_val; + int ret; + + mutex_lock(&led->priv->lock); + + if (led->ctrl_bank_enabled) + reg_val = led_chip->bank_brt_reg; + else + reg_val = led_chip->led_brightness0_reg + led->led_number; + + ret = regmap_read(led->priv->regmap, reg_val, &brt_val); + + mutex_unlock(&led->priv->lock); + + return brt_val; +} + +static int lp50xx_set_banks(struct lp50xx *priv, u32 led_banks[]) +{ + u8 led_config_lo, led_config_hi; + u32 bank_enable_mask = 0; + int ret; + int i; + + for (i = 0; i < priv->chip_info->num_leds; i++) + bank_enable_mask |= (1 << led_banks[i]); + + led_config_lo = (u8)(bank_enable_mask & 0xff); + led_config_hi = (u8)(bank_enable_mask >> 8) & 0xff; + + ret = regmap_write(priv->regmap, LP50XX_LED_CFG0, led_config_lo); + if (ret) + return ret; + + if (priv->chip_info->model_id >= LP5030) + ret = regmap_write(priv->regmap, LP5036_LED_CFG1, + led_config_hi); + + return ret; +} + +static int lp50xx_reset(struct lp50xx *priv) +{ + if (priv->enable_gpio) + return gpiod_direction_output(priv->enable_gpio, 1); + else + return regmap_write(priv->regmap, priv->chip_info->reset_reg, + LP50XX_SW_RESET); +} + +static int lp50xx_enable_disable(struct lp50xx *priv, u8 enable_disable) +{ + return regmap_write(priv->regmap, LP50XX_DEV_CFG0, enable_disable); +} + +static int lp50xx_probe_dt(struct lp50xx *priv) +{ + u32 led_banks[LP5036_MAX_LED_MODULES]; + struct fwnode_handle *child = NULL; + struct fwnode_handle *led_node = NULL; + struct led_init_data init_data; + struct lp50xx_led *led; + int num_colors; + u32 color_id; + int led_number; + size_t i = 0; + int ret = -EINVAL; + + priv->enable_gpio = devm_gpiod_get_optional(&priv->client->dev, + "enable", GPIOD_OUT_LOW); + if (IS_ERR(priv->enable_gpio)) { + ret = PTR_ERR(priv->enable_gpio); + dev_err(&priv->client->dev, "Failed to get enable gpio: %d\n", + ret); + return ret; + } + + priv->regulator = devm_regulator_get(&priv->client->dev, "vled"); + if (IS_ERR(priv->regulator)) + priv->regulator = NULL; + + device_for_each_child_node(&priv->client->dev, child) { + led = &priv->leds[i]; + if (fwnode_property_present(child, "ti,led-bank")) { + ret = fwnode_property_read_u32_array(child, + "ti,led-bank", + NULL, 0); + priv->num_of_banked_leds = ret; + if (priv->num_of_banked_leds > + priv->chip_info->max_modules) { + dev_err(&priv->client->dev, + "led-bank property is invalid\n"); + ret = -EINVAL; + fwnode_handle_put(child); + goto child_out; + } + + ret = fwnode_property_read_u32_array(child, + "ti,led-bank", + led_banks, + ret); + if (ret) { + dev_err(&priv->client->dev, + "led-bank property is missing\n"); + fwnode_handle_put(child); + goto child_out; + } + + ret = lp50xx_set_banks(priv, led_banks); + if (ret) { + dev_err(&priv->client->dev, + "Cannot setup banked LEDs\n"); + fwnode_handle_put(child); + goto child_out; + } + led->ctrl_bank_enabled = 1; + + } else { + ret = fwnode_property_read_u32(child, "reg", + &led_number); + if (ret) { + dev_err(&priv->client->dev, + "led reg property missing\n"); + fwnode_handle_put(child); + goto child_out; + } + + if (led_number > priv->chip_info->num_leds) { + dev_err(&priv->client->dev, + "led-sources property is invalid\n"); + ret = -EINVAL; + fwnode_handle_put(child); + goto child_out; + } + + led->led_number = led_number; + } + + init_data.fwnode = child; + fwnode_property_read_string(child, "linux,default-trigger", + &led->led_dev.default_trigger); + num_colors = 0; + + fwnode_for_each_child_node(child, led_node) { + ret = fwnode_property_read_u32(led_node, "color", + &color_id); + if (ret) + dev_err(&priv->client->dev, + "Cannot read color\n"); + + set_bit(color_id, &led->mc_cdev.available_colors); + num_colors++; + + } + + led->priv = priv; + led->mc_cdev.num_leds = num_colors; + led->mc_cdev.led_cdev = &led->led_dev; + led->led_dev.brightness_set_blocking = lp50xx_brightness_set; + led->led_dev.brightness_get = lp50xx_brightness_get; + ret = devm_led_classdev_multicolor_register_ext(&priv->client->dev, + &led->mc_cdev, + &init_data); + if (ret) { + dev_err(&priv->client->dev, "led register err: %d\n", + ret); + fwnode_handle_put(child); + goto child_out; + } + i++; + } + +child_out: + return ret; +} + +static int lp50xx_probe(struct i2c_client *client, + const struct i2c_device_id *id) +{ + struct lp50xx *led; + int count; + int ret; + + count = device_get_child_node_count(&client->dev); + if (!count) { + dev_err(&client->dev, "LEDs are not defined in device tree!"); + return -ENODEV; + } + + led = devm_kzalloc(&client->dev, struct_size(led, leds, count), + GFP_KERNEL); + if (!led) + return -ENOMEM; + + mutex_init(&led->lock); + led->client = client; + led->dev = &client->dev; + led->chip_info = &lp50xx_chip_info_tbl[id->driver_data]; + i2c_set_clientdata(client, led); + + led->regmap = devm_regmap_init_i2c(client, + &led->chip_info->lp50xx_regmap_config); + if (IS_ERR(led->regmap)) { + ret = PTR_ERR(led->regmap); + dev_err(&client->dev, "Failed to allocate register map: %d\n", + ret); + return ret; + } + + ret = lp50xx_reset(led); + if (ret) + return ret; + + ret = lp50xx_probe_dt(led); + if (ret) + return ret; + + return lp50xx_enable_disable(led, LP50XX_CHIP_EN); +} + +static int lp50xx_remove(struct i2c_client *client) +{ + struct lp50xx *led = i2c_get_clientdata(client); + int ret; + + ret = lp50xx_enable_disable(led, LP50XX_CHIP_EN); + if (ret) { + dev_err(&led->client->dev, "Failed to disable regulator\n"); + return ret; + } + + if (led->enable_gpio) + gpiod_direction_output(led->enable_gpio, 0); + + if (led->regulator) { + ret = regulator_disable(led->regulator); + if (ret) + dev_err(&led->client->dev, + "Failed to disable regulator\n"); + } + + mutex_destroy(&led->lock); + + return 0; +} + +static const struct i2c_device_id lp50xx_id[] = { + { "lp5009", LP5009 }, + { "lp5012", LP5012 }, + { "lp5018", LP5018 }, + { "lp5024", LP5024 }, + { "lp5030", LP5030 }, + { "lp5036", LP5036 }, + { } +}; +MODULE_DEVICE_TABLE(i2c, lp50xx_id); + +static const struct of_device_id of_lp50xx_leds_match[] = { + { .compatible = "ti,lp5009", .data = (void *)LP5009 }, + { .compatible = "ti,lp5012", .data = (void *)LP5012 }, + { .compatible = "ti,lp5018", .data = (void *)LP5018 }, + { .compatible = "ti,lp5024", .data = (void *)LP5024 }, + { .compatible = "ti,lp5030", .data = (void *)LP5030 }, + { .compatible = "ti,lp5036", .data = (void *)LP5036 }, + {}, +}; +MODULE_DEVICE_TABLE(of, of_lp50xx_leds_match); + +static struct i2c_driver lp50xx_driver = { + .driver = { + .name = "lp50xx", + .of_match_table = of_lp50xx_leds_match, + }, + .probe = lp50xx_probe, + .remove = lp50xx_remove, + .id_table = lp50xx_id, +}; +module_i2c_driver(lp50xx_driver); + +MODULE_DESCRIPTION("Texas Instruments LP50XX LED driver"); +MODULE_AUTHOR("Dan Murphy "); +MODULE_LICENSE("GPL v2"); From patchwork Mon Oct 28 18:36:17 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Dan Murphy X-Patchwork-Id: 177955 Delivered-To: patch@linaro.org Received: by 2002:ac9:3c86:0:0:0:0:0 with SMTP id w6csp3417466ocf; Mon, 28 Oct 2019 11:37:56 -0700 (PDT) X-Google-Smtp-Source: APXvYqxb1IqYex2o/Q7cDBOePUda32cy4ibaqhIuaPhdv+OTg9jEoEyAOHpQFYke/2lfjBaZfN42 X-Received: by 2002:a50:cc43:: with SMTP id n3mr21554587edi.287.1572287876302; Mon, 28 Oct 2019 11:37:56 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1572287876; cv=none; d=google.com; s=arc-20160816; b=tdlagqDqkyBAsIRhwwFirPwBYGk8MLRte7Raq5VMXt+92MM6poNHqXM++WrKl/ACbO nwFICcB/egIAn1ZUwQPtQB5Xc5C+z2uVBsUvRMflw1jaxe9yvq+t0YgCfBATEbBqJ4kw BbfYjzoY4bkQ7C239aGuGElVc7D6hE0OklvBN5nIOhtwI4Md0IPIQvkArQBeThjDWZNQ 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This acronym should be capital throughout the document. Signed-off-by: Dan Murphy --- Documentation/devicetree/bindings/leds/leds-lp55xx.txt | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) -- 2.22.0.214.g8dca754b1e diff --git a/Documentation/devicetree/bindings/leds/leds-lp55xx.txt b/Documentation/devicetree/bindings/leds/leds-lp55xx.txt index 1b66a413fb9d..bfe2805c5534 100644 --- a/Documentation/devicetree/bindings/leds/leds-lp55xx.txt +++ b/Documentation/devicetree/bindings/leds/leds-lp55xx.txt @@ -1,4 +1,4 @@ -Binding for TI/National Semiconductor LP55xx Led Drivers +Binding for TI/National Semiconductor LP55xx LED Drivers Required properties: - compatible: one of @@ -12,8 +12,8 @@ Required properties: - clock-mode: Input clock mode, (0: automode, 1: internal, 2: external) Each child has own specific current settings -- led-cur: Current setting at each led channel (mA x10, 0 if led is not connected) -- max-cur: Maximun current at each led channel. +- led-cur: Current setting at each LED channel (mA x10, 0 if LED is not connected) +- max-cur: Maximun current at each LED channel. Optional properties: - enable-gpio: GPIO attached to the chip's enable pin From patchwork Mon Oct 28 18:36:18 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Dan Murphy X-Patchwork-Id: 177957 Delivered-To: patch@linaro.org Received: by 2002:ac9:3c86:0:0:0:0:0 with SMTP id w6csp3418078ocf; Mon, 28 Oct 2019 11:38:29 -0700 (PDT) X-Google-Smtp-Source: APXvYqxGjqtmVaD25Coo5GM58/a9DASMJTJ55KvjHvxVipqat1ibPNONwgWzNBd/ujnSNr2hA9lo X-Received: by 2002:a17:907:20f2:: with SMTP id rh18mr17907367ejb.96.1572287909586; Mon, 28 Oct 2019 11:38:29 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1572287909; cv=none; d=google.com; s=arc-20160816; b=OT/VYA3XCLvCSiNoyLK6o+B8np4OfXtGrgB2mrcCi+lt3KCsko6Dvm7WEZzE9w4bCC dpI7Ak+8Kbxg5dndq6A2rTTt9K9w4UStnpl1ZkIIl8FPuTO61Ij5mfOJHSKyWrH3BUh2 DkgAOplvU6DViNPBDrLps3MK6RgJaScT+n387pOtlpWMe/PgyIHbW9dUIKKedDpftOAr bhOX3ASFs1Io0Zv4Q/WC0axCQ5eR+G6gX+XhZCwEQnOx5VoCiB/KMqaiufRNkYtWEzYU ffj+wggx9fHPOP07rHqX7gZz3LY+xF6eVMd9lAmS0fv05DvA4U0tQDOZbz1t5KRm8Bc8 UdSw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=ynnE2bcE7/pjTvuXLjgDaxUYtz5RYI+D7gB1BXxX9Io=; b=kq/nEb/fJeVAas16XD4LJy5Ho6OWSQjg1xAyax/UPyP9ERFTyRFI9i99967agiFdh2 5h82liC2bYDfau4o92wvK/wxA/xWVIYPlLM9fj5xBSNLKdk/63HsO8JR14EByQy0rPjQ hBVn65lXhapBvFuUBKWI+//lbLWQy5FxrpbGsO6sIIJxM8Iq4kwB3dO5ngFzrfU95zI+ 2pIPbaurWt/j8Fudonlx/Lf1pejdO+zk8/lCGV2TtihQyQ5PHr5nMBTRn7C55NVuyafb J6fHXxaLh4QAPRrRPAsyrFRM0kGoJWDcvBV01pzXqXR++gBkwVDxVAvwVMlpWMHPsrlF fKHA== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@ti.com header.s=ti-com-17Q1 header.b=PZpDh11Q; spf=pass (google.com: best guess record for domain of linux-leds-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-leds-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=NONE dis=NONE) header.from=ti.com Return-Path: Received: from vger.kernel.org (vger.kernel.org. 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Reviewed-by: Linus Walleij Signed-off-by: Dan Murphy CC: Tony Lindgren CC: "Benoît Cousson" CC: Linus Walleij CC: Shawn Guo CC: Sascha Hauer CC: Pengutronix Kernel Team CC: Fabio Estevam CC: NXP Linux Team --- .../devicetree/bindings/leds/leds-lp55xx.txt | 149 +++++++++++++++--- 1 file changed, 124 insertions(+), 25 deletions(-) -- 2.22.0.214.g8dca754b1e diff --git a/Documentation/devicetree/bindings/leds/leds-lp55xx.txt b/Documentation/devicetree/bindings/leds/leds-lp55xx.txt index bfe2805c5534..0ccc1efc2499 100644 --- a/Documentation/devicetree/bindings/leds/leds-lp55xx.txt +++ b/Documentation/devicetree/bindings/leds/leds-lp55xx.txt @@ -1,6 +1,8 @@ Binding for TI/National Semiconductor LP55xx LED Drivers Required properties: +- #address-cells: 1 +- #size-cells: 0 - compatible: one of national,lp5521 national,lp5523 @@ -14,6 +16,18 @@ Required properties: Each child has own specific current settings - led-cur: Current setting at each LED channel (mA x10, 0 if LED is not connected) - max-cur: Maximun current at each LED channel. +- reg: Output channel for the LED. This is zero based channel identifier and + the data sheet is a one based channel identifier. + reg value to output to LED output number + D1 = reg value is 0 + D2 = reg value is 1 + D3 = reg value is 2 + D4 = reg value is 3 + D5 = reg value is 4 + D6 = reg value is 5 + D7 = reg value is 6 + D8 = reg value is 7 + D9 = reg value is 8 Optional properties: - enable-gpio: GPIO attached to the chip's enable pin @@ -35,23 +49,28 @@ example 1) LP5521 on channel 0. lp5521@32 { + #address-cells = <1>; + #size-cells = <0>; compatible = "national,lp5521"; reg = <0x32>; label = "lp5521_pri"; clock-mode = /bits/ 8 <2>; - chan0 { + chan@0 { + reg = <0>; led-cur = /bits/ 8 <0x2f>; max-cur = /bits/ 8 <0x5f>; linux,default-trigger = "heartbeat"; }; - chan1 { + chan@1 { + reg = <1>; led-cur = /bits/ 8 <0x2f>; max-cur = /bits/ 8 <0x5f>; }; - chan2 { + chan@2 { + reg = <2>; led-cur = /bits/ 8 <0x2f>; max-cur = /bits/ 8 <0x5f>; }; @@ -70,59 +89,70 @@ ASEL1 ASEL0 Address VEN VEN 35h lp5523@32 { + #address-cells = <1>; + #size-cells = <0>; compatible = "national,lp5523"; reg = <0x32>; clock-mode = /bits/ 8 <1>; - chan0 { + chan@0 { + reg = <0>; chan-name = "d1"; led-cur = /bits/ 8 <0x14>; max-cur = /bits/ 8 <0x20>; }; - chan1 { + chan@1 { + reg = <1>; chan-name = "d2"; led-cur = /bits/ 8 <0x14>; max-cur = /bits/ 8 <0x20>; }; - chan2 { + chan@2 { + reg = <2>; chan-name = "d3"; led-cur = /bits/ 8 <0x14>; max-cur = /bits/ 8 <0x20>; }; - chan3 { + chan@3 { + reg = <3>; chan-name = "d4"; led-cur = /bits/ 8 <0x14>; max-cur = /bits/ 8 <0x20>; }; - chan4 { + chan@4 { + reg = <4>; chan-name = "d5"; led-cur = /bits/ 8 <0x14>; max-cur = /bits/ 8 <0x20>; }; - chan5 { + chan@5 { + reg = <5>; chan-name = "d6"; led-cur = /bits/ 8 <0x14>; max-cur = /bits/ 8 <0x20>; }; - chan6 { + chan@6 { + reg = <6>; chan-name = "d7"; led-cur = /bits/ 8 <0x14>; max-cur = /bits/ 8 <0x20>; }; - chan7 { + chan@7 { + reg = <7>; chan-name = "d8"; led-cur = /bits/ 8 <0x14>; max-cur = /bits/ 8 <0x20>; }; - chan8 { + chan@8 { + reg = <8>; chan-name = "d9"; led-cur = /bits/ 8 <0x14>; max-cur = /bits/ 8 <0x20>; @@ -133,29 +163,35 @@ example 3) LP5562 4 channels are defined. lp5562@30 { + #address-cells = <1>; + #size-cells = <0>; compatible = "ti,lp5562"; reg = <0x30>; clock-mode = /bits/8 <2>; - chan0 { + chan@0 { + reg = <0>; chan-name = "R"; led-cur = /bits/ 8 <0x20>; max-cur = /bits/ 8 <0x60>; }; - chan1 { + chan@1 { + reg = <1>; chan-name = "G"; led-cur = /bits/ 8 <0x20>; max-cur = /bits/ 8 <0x60>; }; - chan2 { + chan@2 { + reg = <2>; chan-name = "B"; led-cur = /bits/ 8 <0x20>; max-cur = /bits/ 8 <0x60>; }; - chan3 { + chan@3 { + reg = <3>; chan-name = "W"; led-cur = /bits/ 8 <0x20>; max-cur = /bits/ 8 <0x60>; @@ -167,62 +203,125 @@ example 4) LP8501 Others are same as LP5523. lp8501@32 { + #address-cells = <1>; + #size-cells = <0>; compatible = "ti,lp8501"; reg = <0x32>; clock-mode = /bits/ 8 <2>; pwr-sel = /bits/ 8 <3>; /* D1~9 connected to VOUT */ - chan0 { + chan@0 { + reg = <0>; chan-name = "d1"; led-cur = /bits/ 8 <0x14>; max-cur = /bits/ 8 <0x20>; }; - chan1 { + chan@1 { + reg = <1>; chan-name = "d2"; led-cur = /bits/ 8 <0x14>; max-cur = /bits/ 8 <0x20>; }; - chan2 { + chan@2 { + reg = <2>; chan-name = "d3"; led-cur = /bits/ 8 <0x14>; max-cur = /bits/ 8 <0x20>; }; - chan3 { + chan@3 { + reg = <3>; chan-name = "d4"; led-cur = /bits/ 8 <0x14>; max-cur = /bits/ 8 <0x20>; }; - chan4 { + chan@4 { + reg = <4>; chan-name = "d5"; led-cur = /bits/ 8 <0x14>; max-cur = /bits/ 8 <0x20>; }; - chan5 { + chan@5 { + reg = <5>; chan-name = "d6"; led-cur = /bits/ 8 <0x14>; max-cur = /bits/ 8 <0x20>; }; - chan6 { + chan@6 { + reg = <6>; chan-name = "d7"; led-cur = /bits/ 8 <0x14>; max-cur = /bits/ 8 <0x20>; }; - chan7 { + chan@7 { + reg = <7>; chan-name = "d8"; led-cur = /bits/ 8 <0x14>; max-cur = /bits/ 8 <0x20>; }; - chan8 { + chan@8 { + reg = <8>; chan-name = "d9"; led-cur = /bits/ 8 <0x14>; max-cur = /bits/ 8 <0x20>; }; }; + +Multicolor Framework Support +In addition to the nodes and properties defined above for device support the +properties below are needed for multicolor framework support as defined in +Documentation/devicetree/bindings/leds/leds-class-multicolor.txt + +Required child properties for multicolor framework + - color : Must be LED_COLOR_ID_MULTI + - function : see Documentation/devicetree/bindings/leds/common.txt + +Required grandchildren properties + - reg : This is the LED output of the device + - color : see Documentation/devicetree/bindings/leds/common.txt + +Multicolor LED example: +led-controller@32 { + #address-cells = <1>; + #size-cells = <0>; + compatible = "national,lp5523"; + reg = <0x32>; + clock-mode = /bits/ 8 <0>; /* LP55XX_CLOCK_AUTO */ + + multi-led@2 { + #address-cells = <1>; + #size-cells = <0>; + reg = <2>; + color = ; + function = LED_FUNCTION_STANDBY; + linux,default-trigger = "heartbeat"; + + led@0 { + led-cur = /bits/ 8 <50>; + max-cur = /bits/ 8 <100>; + reg = <0x0>; + color = ; + }; + + led@1 { + led-cur = /bits/ 8 <50>; + max-cur = /bits/ 8 <100>; + reg = <0x1>; + color = ; + }; + + led@6 { + led-cur = /bits/ 8 <50>; + max-cur = /bits/ 8 <100>; + reg = <0x6>; + color = ; + }; + }; +}; From patchwork Mon Oct 28 18:36:19 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Dan Murphy X-Patchwork-Id: 177956 Delivered-To: patch@linaro.org Received: by 2002:ac9:3c86:0:0:0:0:0 with SMTP id w6csp3417767ocf; Mon, 28 Oct 2019 11:38:13 -0700 (PDT) X-Google-Smtp-Source: APXvYqwMU9ql0fQZtpI7IKjHG4i21f6VtflR1uPr12GU+JxFOJaCcra2jCmKjqEPnkb6smaIha0S X-Received: by 2002:a05:6402:1349:: with SMTP id y9mr20929756edw.74.1572287893704; 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[209.132.180.67]) by mx.google.com with ESMTP id g31si9100337edg.206.2019.10.28.11.38.13; Mon, 28 Oct 2019 11:38:13 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-leds-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@ti.com header.s=ti-com-17Q1 header.b=M0RkyBYu; spf=pass (google.com: best guess record for domain of linux-leds-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-leds-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=NONE dis=NONE) header.from=ti.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727230AbfJ1SiN (ORCPT + 1 other); Mon, 28 Oct 2019 14:38:13 -0400 Received: from fllv0016.ext.ti.com ([198.47.19.142]:38568 "EHLO fllv0016.ext.ti.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726876AbfJ1SiN (ORCPT ); Mon, 28 Oct 2019 14:38:13 -0400 Received: from fllv0034.itg.ti.com ([10.64.40.246]) by fllv0016.ext.ti.com (8.15.2/8.15.2) with ESMTP id x9SIc7oI017049; Mon, 28 Oct 2019 13:38:07 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ti.com; s=ti-com-17Q1; t=1572287887; bh=IhBf76ZkV825gD29NdnMc9uoR76ENOTa4bPn385iiJ0=; h=From:To:CC:Subject:Date:In-Reply-To:References; b=M0RkyBYuwSEP872xxZtxn5EBZwTUDD4HNd8P7WtHs2eyE8He3YKCglxCjCqyghi4W fCQRswGe1o9+lidkm3O8ooUWqBS5U++g7BZ/yjfi4sSdufbObMtOaeRGznCpcS/6je qKdxqTHbD1jmwaq3F+JMmxGFNZ65O9zJ39LZzgD0= Received: from DLEE108.ent.ti.com (dlee108.ent.ti.com [157.170.170.38]) by fllv0034.itg.ti.com (8.15.2/8.15.2) with ESMTPS id x9SIc6cj103206 (version=TLSv1.2 cipher=AES256-GCM-SHA384 bits=256 verify=FAIL); Mon, 28 Oct 2019 13:38:07 -0500 Received: from DLEE108.ent.ti.com (157.170.170.38) by DLEE108.ent.ti.com (157.170.170.38) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.1713.5; Mon, 28 Oct 2019 13:37:54 -0500 Received: from lelv0326.itg.ti.com (10.180.67.84) by DLEE108.ent.ti.com (157.170.170.38) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.1713.5 via Frontend Transport; Mon, 28 Oct 2019 13:37:54 -0500 Received: from localhost (ileax41-snat.itg.ti.com [10.172.224.153]) by lelv0326.itg.ti.com (8.15.2/8.15.2) with ESMTP id x9SIc67g056418; Mon, 28 Oct 2019 13:38:06 -0500 From: Dan Murphy To: , CC: , , Dan Murphy , Tony Lindgren , =?utf-8?q?Beno?= =?utf-8?q?=C3=AEt_Cousson?= Subject: [PATCH v15 09/19] ARM: dts: n900: Add reg property to the LP5523 channel node Date: Mon, 28 Oct 2019 13:36:19 -0500 Message-ID: <20191028183629.11779-10-dmurphy@ti.com> X-Mailer: git-send-email 2.22.0.214.g8dca754b1e In-Reply-To: <20191028183629.11779-1-dmurphy@ti.com> References: <20191028183629.11779-1-dmurphy@ti.com> MIME-Version: 1.0 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 Sender: linux-leds-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-leds@vger.kernel.org Add the reg property to each channel node. This update is to accomodate the multicolor framework. In addition to the accomodation this allows the LEDs to be placed on any channel and allow designs to skip channels as opposed to requiring sequential order. Signed-off-by: Dan Murphy Acked-by: Tony Lindgren CC: Tony Lindgren CC: "Benoît Cousson" --- arch/arm/boot/dts/omap3-n900.dts | 29 ++++++++++++++++++++--------- 1 file changed, 20 insertions(+), 9 deletions(-) -- 2.22.0.214.g8dca754b1e diff --git a/arch/arm/boot/dts/omap3-n900.dts b/arch/arm/boot/dts/omap3-n900.dts index 84a5ade1e865..643f35619246 100644 --- a/arch/arm/boot/dts/omap3-n900.dts +++ b/arch/arm/boot/dts/omap3-n900.dts @@ -607,63 +607,74 @@ }; lp5523: lp5523@32 { + #address-cells = <1>; + #size-cells = <0>; compatible = "national,lp5523"; reg = <0x32>; clock-mode = /bits/ 8 <0>; /* LP55XX_CLOCK_AUTO */ enable-gpio = <&gpio2 9 GPIO_ACTIVE_HIGH>; /* 41 */ - chan0 { + chan@0 { chan-name = "lp5523:kb1"; led-cur = /bits/ 8 <50>; max-cur = /bits/ 8 <100>; + reg = <0>; }; - chan1 { + chan@1 { chan-name = "lp5523:kb2"; led-cur = /bits/ 8 <50>; max-cur = /bits/ 8 <100>; + reg = <1>; }; - chan2 { + chan@2 { chan-name = "lp5523:kb3"; led-cur = /bits/ 8 <50>; max-cur = /bits/ 8 <100>; + reg = <2>; }; - chan3 { + chan@3 { chan-name = "lp5523:kb4"; led-cur = /bits/ 8 <50>; max-cur = /bits/ 8 <100>; + reg = <3>; }; - chan4 { + chan@4 { chan-name = "lp5523:b"; led-cur = /bits/ 8 <50>; max-cur = /bits/ 8 <100>; + reg = <4>; }; - chan5 { + chan@5 { chan-name = "lp5523:g"; led-cur = /bits/ 8 <50>; max-cur = /bits/ 8 <100>; + reg = <5>; }; - chan6 { + chan@6 { chan-name = "lp5523:r"; led-cur = /bits/ 8 <50>; max-cur = /bits/ 8 <100>; + reg = <6>; }; - chan7 { + chan@7 { chan-name = "lp5523:kb5"; led-cur = /bits/ 8 <50>; max-cur = /bits/ 8 <100>; + reg = <7>; }; - chan8 { + chan@8 { chan-name = "lp5523:kb6"; led-cur = /bits/ 8 <50>; max-cur = /bits/ 8 <100>; + reg = <8>; }; }; From patchwork Mon Oct 28 18:36:20 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Dan Murphy X-Patchwork-Id: 177959 Delivered-To: patch@linaro.org Received: by 2002:ac9:3c86:0:0:0:0:0 with SMTP id w6csp3418274ocf; Mon, 28 Oct 2019 11:38:39 -0700 (PDT) X-Google-Smtp-Source: APXvYqxUcA76Qa3fiB2eWGJV81nkCSkvR32Kv48IsWTAoQuh547iy9EvsPf4Msuecp1DqMdg4rMo X-Received: by 2002:a05:6402:b06:: with SMTP id bm6mr21323995edb.160.1572287919628; Mon, 28 Oct 2019 11:38:39 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1572287919; cv=none; d=google.com; s=arc-20160816; b=MBVUpbKYnQ2rMaEaK3xemSQOc97ouJ5OQ/aQrYtX80RZiumeP4I+87yTqCLFe9nCEh 2w5UubI5Su4AevIsd3b6xF2ShkWgk+b44ExbAaNpuZKb0GdHURcsI1iXTxr3zcCG1SrP u+vfGSHul7fAPAPMHhia15R4fEIaJsHxaVQuGXn6hJNE+EUFimBGHJIG+3V8wKmehx3k ir2Ky75cm499cCA+eH7QVKnmIDwrwAh6AY0Z95Le04nrFXB93HdAnpJayCsBpB/Ejfk2 tp24LJbdT3M42foiU5I8LH4n4nQP+a4r9I7jB7Chjz/m8luKr2l4kzX4/EzOyoB4gkeC puHw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=Q6v3ZsELVVFaq45xRxLW4voHJAlhEXxHc1kVNsr3mZg=; b=QBG/bM0bMxsxx9xrsrQKPg9+KUCJ3u3te+ZTWKsCwk8w1H+gNYbgt9SGZaDypbmSSD 113+FLeAH98+WhfLoD9zAIgaW8Nn49VzGUkI8zyoqMS4VT6Vr1XQkODnjnet3XMIouyB SLMHecoxFH5cuNgcKDMIGOv09MLu3jSlvycw2VHkFb/h+fpUQQagHvI/qWYncHWbTIM5 RimanA6ya+KtTNKgoMPjGHwx11z6Z+IqWP7aby6HBvIP+VrQRSS4tZV2vPxIZsrQ7KQX Ngq2l2A7fkKmhnV30u3UiLKShqR9dn1xLmqSNhmFjz0CoMCcZ7tCAEbmjSDMgGO/vqDX Vugw== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@ti.com header.s=ti-com-17Q1 header.b="tG47n/CH"; spf=pass (google.com: best guess record for domain of linux-leds-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-leds-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=NONE dis=NONE) header.from=ti.com Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id cb1si7118718ejb.200.2019.10.28.11.38.39; Mon, 28 Oct 2019 11:38:39 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-leds-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@ti.com header.s=ti-com-17Q1 header.b="tG47n/CH"; spf=pass (google.com: best guess record for domain of linux-leds-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-leds-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=NONE dis=NONE) header.from=ti.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727769AbfJ1Sii (ORCPT + 1 other); Mon, 28 Oct 2019 14:38:38 -0400 Received: from fllv0016.ext.ti.com ([198.47.19.142]:38646 "EHLO fllv0016.ext.ti.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726876AbfJ1Sih (ORCPT ); Mon, 28 Oct 2019 14:38:37 -0400 Received: from lelv0266.itg.ti.com ([10.180.67.225]) by fllv0016.ext.ti.com (8.15.2/8.15.2) with ESMTP id x9SIcCrE017163; Mon, 28 Oct 2019 13:38:12 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ti.com; s=ti-com-17Q1; t=1572287892; bh=Q6v3ZsELVVFaq45xRxLW4voHJAlhEXxHc1kVNsr3mZg=; h=From:To:CC:Subject:Date:In-Reply-To:References; b=tG47n/CHsHNFRs02NRua1POnycbf+3dzYwtbY1tzEOKpdmvIEY6CkIrfuIEIywsr2 f7i6Nb7c1iIVqOgQngA75H6aZUThDPzE5Jm5w5da/opTDfQKHaSLUbEL0OrnaJrnnJ Qb1Zb8P4KiWshZ77kmRXro+QtlpqnSjjSl/y6C04= Received: from DFLE109.ent.ti.com (dfle109.ent.ti.com [10.64.6.30]) by lelv0266.itg.ti.com (8.15.2/8.15.2) with ESMTPS id x9SIcC7B078835 (version=TLSv1.2 cipher=AES256-GCM-SHA384 bits=256 verify=FAIL); Mon, 28 Oct 2019 13:38:12 -0500 Received: from DFLE114.ent.ti.com (10.64.6.35) by DFLE109.ent.ti.com (10.64.6.30) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.1713.5; Mon, 28 Oct 2019 13:38:00 -0500 Received: from fllv0039.itg.ti.com (10.64.41.19) by DFLE114.ent.ti.com (10.64.6.35) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.1713.5 via Frontend Transport; Mon, 28 Oct 2019 13:38:00 -0500 Received: from localhost (ileax41-snat.itg.ti.com [10.172.224.153]) by fllv0039.itg.ti.com (8.15.2/8.15.2) with ESMTP id x9SIcBRo123698; Mon, 28 Oct 2019 13:38:11 -0500 From: Dan Murphy To: , CC: , , Dan Murphy , Shawn Guo , Sascha Hauer , Pengutronix Kernel Team , Fabio Estevam , NXP Linux Team Subject: [PATCH v15 10/19] ARM: dts: imx6dl-yapp4: Add reg property to the lp5562 channel node Date: Mon, 28 Oct 2019 13:36:20 -0500 Message-ID: <20191028183629.11779-11-dmurphy@ti.com> X-Mailer: git-send-email 2.22.0.214.g8dca754b1e In-Reply-To: <20191028183629.11779-1-dmurphy@ti.com> References: <20191028183629.11779-1-dmurphy@ti.com> MIME-Version: 1.0 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 Sender: linux-leds-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-leds@vger.kernel.org Add the reg property to each channel node. This update is to accomodate the multicolor framework. In addition to the accomodation this allows the LEDs to be placed on any channel and allow designs to skip channels as opposed to requiring sequential order. Signed-off-by: Dan Murphy CC: Shawn Guo CC: Sascha Hauer CC: Pengutronix Kernel Team CC: Fabio Estevam CC: NXP Linux Team --- arch/arm/boot/dts/imx6dl-yapp4-common.dtsi | 14 ++++++++++---- 1 file changed, 10 insertions(+), 4 deletions(-) -- 2.22.0.214.g8dca754b1e diff --git a/arch/arm/boot/dts/imx6dl-yapp4-common.dtsi b/arch/arm/boot/dts/imx6dl-yapp4-common.dtsi index e8d800fec637..efc466ed1fea 100644 --- a/arch/arm/boot/dts/imx6dl-yapp4-common.dtsi +++ b/arch/arm/boot/dts/imx6dl-yapp4-common.dtsi @@ -257,29 +257,35 @@ reg = <0x30>; clock-mode = /bits/ 8 <1>; status = "disabled"; + #address-cells = <1>; + #size-cells = <0>; - chan0 { + chan@0 { chan-name = "R"; led-cur = /bits/ 8 <0x20>; max-cur = /bits/ 8 <0x60>; + reg = <0>; }; - chan1 { + chan@1 { chan-name = "G"; led-cur = /bits/ 8 <0x20>; max-cur = /bits/ 8 <0x60>; + reg = <1>; }; - chan2 { + chan@2 { chan-name = "B"; led-cur = /bits/ 8 <0x20>; max-cur = /bits/ 8 <0x60>; + reg = <2>; }; - chan3 { + chan@3 { chan-name = "W"; led-cur = /bits/ 8 <0x0>; max-cur = /bits/ 8 <0x0>; + reg = <3>; }; }; From patchwork Mon Oct 28 18:36:25 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Dan Murphy X-Patchwork-Id: 177963 Delivered-To: patch@linaro.org Received: by 2002:ac9:3c86:0:0:0:0:0 with SMTP id w6csp3418416ocf; Mon, 28 Oct 2019 11:38:48 -0700 (PDT) X-Google-Smtp-Source: APXvYqw9wafN5W6QzCjfRCSONd+cFAy6/qDGVtgwdHXH4Z/aOjglp+ojPwvgkFhDJ3gtZrYBUWaV X-Received: by 2002:a17:906:4d92:: with SMTP id s18mr9277323eju.121.1572287928261; Mon, 28 Oct 2019 11:38:48 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1572287928; cv=none; d=google.com; s=arc-20160816; b=csgMlKWvAXjZX1gWHCxPAk9vS56sFsLGi6xBcKSk4cStU25exAAsRKfws7Wcewonhe DBMQmWlsWPJaKRjJUo51o4ANemRzqXaz6e8Y2MKxk65jkMaYxscS7We38jdOEp6MZxgh 1p57MgsjUofCm1FtMfn9o61VGfT1lU9Pxj20gXCSAJJguuq06JCVH5x+OyHmxdlLxA8s dm9C/DcQ7HgJtKIW8T/C5/RUYO1fcXeIGDAiP14ywiRV6Cfp593opRxyxW1WHb8pGHWR ufenRTnsagHMNZUF9mKTq1DNvS6r0J6He3Sw4ZAHBOC2J0vuCODateIqhOeCZFVZ1/Mt bGKA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=5oPRgd9y4fLZAUSx3Us0YBQ1cAUc/cf63XhWxENhBFk=; b=Z5y+rO0D/sRpE7K2TR6m4zULVF/KybPxf1OVeF5bYqUuy/5N2oTuSgQXxE99vBKVBx OXVDv+Jr4RX/e81hX5u3bOqLmICbXbb5v/4p10/wzg88AxvNGz4h5WTMmd8fzCTD6yPh CRig+1q4+SRvWbPWqh1FIWpq96syGtc5Nfk+iJPP1DzSmkvh3CUikg1a7nBemLGeVzLW riiGMAtyY+6aXxkuHkMkD9bayCFSz6lDELTwa+UqYml0FgssfF4mI/vt2EHGZZ39rQ0T yFwC4KyoI1/a8gi/qZI4P+3hrI5uIiDHUIqaX8/8sLaAA47rhf56EtVL1905KFpNVZIc m3ZQ== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@ti.com header.s=ti-com-17Q1 header.b=rFmfGe9U; spf=pass (google.com: best guess record for domain of linux-leds-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-leds-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=NONE dis=NONE) header.from=ti.com Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id j5si8736296edc.195.2019.10.28.11.38.48; Mon, 28 Oct 2019 11:38:48 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-leds-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@ti.com header.s=ti-com-17Q1 header.b=rFmfGe9U; spf=pass (google.com: best guess record for domain of linux-leds-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-leds-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=NONE dis=NONE) header.from=ti.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727934AbfJ1Siq (ORCPT + 1 other); Mon, 28 Oct 2019 14:38:46 -0400 Received: from lelv0142.ext.ti.com ([198.47.23.249]:38482 "EHLO lelv0142.ext.ti.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1727847AbfJ1Siq (ORCPT ); Mon, 28 Oct 2019 14:38:46 -0400 Received: from fllv0035.itg.ti.com ([10.64.41.0]) by lelv0142.ext.ti.com (8.15.2/8.15.2) with ESMTP id x9SIchwN050106; Mon, 28 Oct 2019 13:38:43 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ti.com; s=ti-com-17Q1; t=1572287923; bh=5oPRgd9y4fLZAUSx3Us0YBQ1cAUc/cf63XhWxENhBFk=; h=From:To:CC:Subject:Date:In-Reply-To:References; b=rFmfGe9UjLYEo/015NyCfK7K4Jqkkj76fO0MF+m1Jj745DfSNXIQ5nr4GfBoxhUx0 ipR3FJMmqfdUcctI5WDXX6wx8hEiZ1MXrwSrVXRiA1H4yeH9fI68SlrVG0Ozxc52Gs W8xO4s/FtzyUD4GLU2M6ZxEPBr9zTo94/r0gMuso= Received: from DFLE114.ent.ti.com (dfle114.ent.ti.com [10.64.6.35]) by fllv0035.itg.ti.com (8.15.2/8.15.2) with ESMTP id x9SIchcF097587; Mon, 28 Oct 2019 13:38:43 -0500 Received: from DFLE103.ent.ti.com (10.64.6.24) by DFLE114.ent.ti.com (10.64.6.35) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.1713.5; Mon, 28 Oct 2019 13:38:31 -0500 Received: from lelv0326.itg.ti.com (10.180.67.84) by DFLE103.ent.ti.com (10.64.6.24) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.1713.5 via Frontend Transport; Mon, 28 Oct 2019 13:38:43 -0500 Received: from localhost (ileax41-snat.itg.ti.com [10.172.224.153]) by lelv0326.itg.ti.com (8.15.2/8.15.2) with ESMTP id x9SIchqm057644; Mon, 28 Oct 2019 13:38:43 -0500 From: Dan Murphy To: , CC: , , Dan Murphy Subject: [PATCH v15 15/19] leds: lp5521: Add multicolor framework multicolor brightness support Date: Mon, 28 Oct 2019 13:36:25 -0500 Message-ID: <20191028183629.11779-16-dmurphy@ti.com> X-Mailer: git-send-email 2.22.0.214.g8dca754b1e In-Reply-To: <20191028183629.11779-1-dmurphy@ti.com> References: <20191028183629.11779-1-dmurphy@ti.com> MIME-Version: 1.0 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 Sender: linux-leds-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-leds@vger.kernel.org Add the multicolor brightness call back to support the multicolor framework. This function allows setting the brightness across grouped LED channels in a single call. Signed-off-by: Dan Murphy --- drivers/leds/leds-lp5521.c | 20 ++++++++++++++++++++ 1 file changed, 20 insertions(+) -- 2.22.0.214.g8dca754b1e diff --git a/drivers/leds/leds-lp5521.c b/drivers/leds/leds-lp5521.c index 6ff81d6be789..f8bdd55e8349 100644 --- a/drivers/leds/leds-lp5521.c +++ b/drivers/leds/leds-lp5521.c @@ -349,6 +349,25 @@ static int lp5521_run_selftest(struct lp55xx_chip *chip, char *buf) return 0; } +static int lp5521_multicolor_brightness(struct lp55xx_led *led) +{ + struct lp55xx_chip *chip = led->chip; + int ret; + int i; + + mutex_lock(&chip->lock); + for (i = 0; i < led->mc_cdev.num_leds; i++) { + ret = lp55xx_write(chip, + LP5521_REG_LED_PWM_BASE + + led->color_components[i].output_num, + led->color_components[i].brightness); + if (ret) + break; + } + mutex_unlock(&chip->lock); + return ret; +} + static int lp5521_led_brightness(struct lp55xx_led *led) { struct lp55xx_chip *chip = led->chip; @@ -490,6 +509,7 @@ static struct lp55xx_device_config lp5521_cfg = { .max_channel = LP5521_MAX_LEDS, .post_init_device = lp5521_post_init_device, .brightness_fn = lp5521_led_brightness, + .multicolor_brightness_fn = lp5521_multicolor_brightness, .set_led_current = lp5521_set_led_current, .firmware_cb = lp5521_firmware_loaded, .run_engine = lp5521_run_engine, From patchwork Mon Oct 28 18:36:27 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Dan Murphy X-Patchwork-Id: 177965 Delivered-To: patch@linaro.org Received: by 2002:ac9:3c86:0:0:0:0:0 with SMTP id w6csp3418592ocf; Mon, 28 Oct 2019 11:38:57 -0700 (PDT) X-Google-Smtp-Source: APXvYqy8MKdyUOxKzogaq9j5uFW3lncebVBteMgpb5UJfVHmnDqRG+e6/pnXzx+sTZE70pDi5T9u X-Received: by 2002:a50:9269:: with SMTP id j38mr20942677eda.5.1572287937662; Mon, 28 Oct 2019 11:38:57 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1572287937; cv=none; d=google.com; s=arc-20160816; b=krB1Ks/aVSup4NJQUtmgD7hipZE5E9h8uAVAIyqVXQhXQh7QgsdkVH0pdpUuJcivGS 2jazFjxJ/h2tXJbUyA6trVHqrVpjIsQzjSDjE6qipi715JBgESJKJU/Q702jrYkjXPE4 AiKZPIOpDRtPMiNsz+oYyHGKS1IBW7iL75n9IwSq0Amus1WhzdIz/aUywPhmksJGH4iG qQKz4DcyEf5rVe/j6Mn5s3wu44P3j8PTyJBNH6i+s592qFVGgo7pvbBKtn18MsIYcqFU LVggjbTkjz5rLLuz1frLCodCLU5LUYSwtUwOkXA0fjn/ydyRpNMbc8S41PtfgN2RJbbS 79Sw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=NQIDcyaqyTtBOLVrg500yyWcRWTyZF2LrgrP3Wcd470=; b=AobjF/Ig4pnAmhObTheguCfQsEH8QIzvyhre8nJI4NraG0yUpD44tRpuEkSIiaMY0m 1JDFhuB5JWfp5XRRG/rIKNdFqo9LHaFs49qo5v/N+gcV7x8GgglRc9FBTr3cyzx1f6ec 8uGibCQUkDB7zl0PHOquTzoCebCtysT2R7dilFWhYkJbNv3212VXPvFhZe8YYxg8FOeo z+eRHGudDZf+VlOqSpZVeqVnjuOYEFxvc/f3zYRX4Ec4PPruvjxdLQmxkscY6o09j3dx RAd7frHU1TBCeAd3Mh9NADXrtnrA0P4dU8oT9gxYspq+strFJ8xu/zlJTb0QHYTCkMAT wG4Q== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@ti.com header.s=ti-com-17Q1 header.b="jm/MYWSo"; spf=pass (google.com: best guess record for domain of linux-leds-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-leds-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=NONE dis=NONE) header.from=ti.com Return-Path: Received: from vger.kernel.org (vger.kernel.org. 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Signed-off-by: Dan Murphy --- drivers/leds/leds-lp5523.c | 19 ++++++++++--------- 1 file changed, 10 insertions(+), 9 deletions(-) -- 2.22.0.214.g8dca754b1e diff --git a/drivers/leds/leds-lp5523.c b/drivers/leds/leds-lp5523.c index 609288077917..cb402b5b4495 100644 --- a/drivers/leds/leds-lp5523.c +++ b/drivers/leds/leds-lp5523.c @@ -23,13 +23,13 @@ #define LP5523_PROGRAM_LENGTH 32 /* bytes */ /* Memory is used like this: - 0x00 engine 1 program - 0x10 engine 2 program - 0x20 engine 3 program - 0x30 engine 1 muxing info - 0x40 engine 2 muxing info - 0x50 engine 3 muxing info -*/ + * 0x00 engine 1 program + * 0x10 engine 2 program + * 0x20 engine 3 program + * 0x30 engine 1 muxing info + * 0x40 engine 2 muxing info + * 0x50 engine 3 muxing info + */ #define LP5523_MAX_LEDS 9 /* Registers */ @@ -326,7 +326,7 @@ static int lp5523_update_program_memory(struct lp55xx_chip *chip, const u8 *data, size_t size) { u8 pattern[LP5523_PROGRAM_LENGTH] = {0}; - unsigned cmd; + unsigned int cmd; char c[3]; int nrchars; int ret; @@ -468,6 +468,7 @@ static int lp5523_mux_parse(const char *buf, u16 *mux, size_t len) static void lp5523_mux_to_array(u16 led_mux, char *array) { int i, pos = 0; + for (i = 0; i < LP5523_MAX_LEDS; i++) pos += sprintf(array + pos, "%x", LED_ACTIVE(led_mux, i)); @@ -506,7 +507,7 @@ static int lp5523_load_mux(struct lp55xx_chip *chip, u16 mux, int nr) if (ret) return ret; - ret = lp55xx_write(chip, LP5523_REG_PROG_MEM , (u8)(mux >> 8)); + ret = lp55xx_write(chip, LP5523_REG_PROG_MEM, (u8)(mux >> 8)); if (ret) return ret; From patchwork Mon Oct 28 18:36:28 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Dan Murphy X-Patchwork-Id: 177967 Delivered-To: patch@linaro.org Received: by 2002:ac9:3c86:0:0:0:0:0 with SMTP id w6csp3418861ocf; Mon, 28 Oct 2019 11:39:10 -0700 (PDT) X-Google-Smtp-Source: APXvYqw+2EHK//T5GAgfPPvdjsoKO3bNYGxyZa2xp+iCxapJjwuthBEIgBDfSokFaVPeAmowNRk/ X-Received: by 2002:aa7:cd48:: with SMTP id v8mr20405539edw.97.1572287950853; Mon, 28 Oct 2019 11:39:10 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1572287950; cv=none; d=google.com; s=arc-20160816; b=COnDp8avs6Idnpdhhm/FMgHdOYHyq2nsbML9Pv3hViQ9tV9LAnSuf0y8d+bGfOMHDD 6Pqd0dCCre+wV9RWzotRo9wwF5L5vVyfSfXgjd+mnOyJNe16jpXkrqo2xI8SPde43nam jzDk8p1nxIfehbkSt0rN4cTa8DZ7YlX12TdiESRVSth3RIxh3ccgo5oLqq34Q0lU1j/0 QLvQV2YYQIitqUP0Rxk9h75e+u3U4NkTxKwtc8Jcg/bFShCOMuJAqu5F2mJsGib6WdL/ eb9t9Php4qTSkSMaAsjCIrcvMwILccmbsjIwaSRmyxl9QhZNLiluyKV6AyPlcHWOKSVN ipLg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=EJK//JMShkFomcxIL7CoEODYJVjSFbKnvbLo+tDSL6s=; b=MwtkKFVwameKZeP38hxioRG8Z0veCoDEiviANN4+bjv9/y37C+V6AcpLNJOFqUSaLa Jd2bAQ+nac0Z1hkj7jYkFTKZd0n5o+Fa9PgtZdqx3iFcJ4hQghe7uxSh682fvqBdYHsU +lpYWUJ8Ltl9C/yE/9Y00waWjQcW0ObaTrTe0rzHcw86KuroCHh5dZvnwU7E+6Y94joB dXagfNAtSgwlyFLZ+pirWcwBFUToyOwAHokiU/3uI+S23mqCe6b+LjNiQ3AjELjKFa3p TKlLC1CXOxrx1LNE8PfGedOQwNa+/FbHPKhxt+oFrEFflpyFSxC1uYchJuixmlTPQn6p fsGg== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@ti.com header.s=ti-com-17Q1 header.b=e0SkayPO; spf=pass (google.com: best guess record for domain of linux-leds-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-leds-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=NONE dis=NONE) header.from=ti.com Return-Path: Received: from vger.kernel.org (vger.kernel.org. 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There are no changes to the DT properties. Signed-off-by: Dan Murphy CC: Rob Herring CC: Tony Lindgren CC: "Benoît Cousson" CC: Linus Walleij CC: Shawn Guo CC: Sascha Hauer CC: Pengutronix Kernel Team CC: Fabio Estevam CC: NXP Linux Team --- .../devicetree/bindings/leds/leds-lp55xx.txt | 58 +++++++++---------- 1 file changed, 29 insertions(+), 29 deletions(-) -- 2.22.0.214.g8dca754b1e diff --git a/Documentation/devicetree/bindings/leds/leds-lp55xx.txt b/Documentation/devicetree/bindings/leds/leds-lp55xx.txt index 0ccc1efc2499..5475f45ef51f 100644 --- a/Documentation/devicetree/bindings/leds/leds-lp55xx.txt +++ b/Documentation/devicetree/bindings/leds/leds-lp55xx.txt @@ -48,7 +48,7 @@ example 1) LP5521 'lp5521_pri:channel1' and 'lp5521_pri:channel2', with a heartbeat trigger on channel 0. -lp5521@32 { +led-controller@32 { #address-cells = <1>; #size-cells = <0>; compatible = "national,lp5521"; @@ -56,20 +56,20 @@ lp5521@32 { label = "lp5521_pri"; clock-mode = /bits/ 8 <2>; - chan@0 { + led@0 { reg = <0>; led-cur = /bits/ 8 <0x2f>; max-cur = /bits/ 8 <0x5f>; linux,default-trigger = "heartbeat"; }; - chan@1 { + led@1 { reg = <1>; led-cur = /bits/ 8 <0x2f>; max-cur = /bits/ 8 <0x5f>; }; - chan@2 { + led@2 { reg = <2>; led-cur = /bits/ 8 <0x2f>; max-cur = /bits/ 8 <0x5f>; @@ -88,70 +88,70 @@ ASEL1 ASEL0 Address VEN GND 34h VEN VEN 35h -lp5523@32 { +led-controller@32 { #address-cells = <1>; #size-cells = <0>; compatible = "national,lp5523"; reg = <0x32>; clock-mode = /bits/ 8 <1>; - chan@0 { + led@0 { reg = <0>; chan-name = "d1"; led-cur = /bits/ 8 <0x14>; max-cur = /bits/ 8 <0x20>; }; - chan@1 { + led@1 { reg = <1>; chan-name = "d2"; led-cur = /bits/ 8 <0x14>; max-cur = /bits/ 8 <0x20>; }; - chan@2 { + led@2 { reg = <2>; chan-name = "d3"; led-cur = /bits/ 8 <0x14>; max-cur = /bits/ 8 <0x20>; }; - chan@3 { + led@3 { reg = <3>; chan-name = "d4"; led-cur = /bits/ 8 <0x14>; max-cur = /bits/ 8 <0x20>; }; - chan@4 { + led@4 { reg = <4>; chan-name = "d5"; led-cur = /bits/ 8 <0x14>; max-cur = /bits/ 8 <0x20>; }; - chan@5 { + led@5 { reg = <5>; chan-name = "d6"; led-cur = /bits/ 8 <0x14>; max-cur = /bits/ 8 <0x20>; }; - chan@6 { + led@6 { reg = <6>; chan-name = "d7"; led-cur = /bits/ 8 <0x14>; max-cur = /bits/ 8 <0x20>; }; - chan@7 { + led@7 { reg = <7>; chan-name = "d8"; led-cur = /bits/ 8 <0x14>; max-cur = /bits/ 8 <0x20>; }; - chan@8 { + led@8 { reg = <8>; chan-name = "d9"; led-cur = /bits/ 8 <0x14>; @@ -162,35 +162,35 @@ lp5523@32 { example 3) LP5562 4 channels are defined. -lp5562@30 { +led-controller@30 { #address-cells = <1>; #size-cells = <0>; compatible = "ti,lp5562"; reg = <0x30>; clock-mode = /bits/8 <2>; - chan@0 { + led@0 { reg = <0>; chan-name = "R"; led-cur = /bits/ 8 <0x20>; max-cur = /bits/ 8 <0x60>; }; - chan@1 { + led@1 { reg = <1>; chan-name = "G"; led-cur = /bits/ 8 <0x20>; max-cur = /bits/ 8 <0x60>; }; - chan@2 { + led@2 { reg = <2>; chan-name = "B"; led-cur = /bits/ 8 <0x20>; max-cur = /bits/ 8 <0x60>; }; - chan@3 { + led@3 { reg = <3>; chan-name = "W"; led-cur = /bits/ 8 <0x20>; @@ -202,7 +202,7 @@ example 4) LP8501 9 channels are defined. The 'pwr-sel' is LP8501 specific property. Others are same as LP5523. -lp8501@32 { +led-controller@32 { #address-cells = <1>; #size-cells = <0>; compatible = "ti,lp8501"; @@ -210,63 +210,63 @@ lp8501@32 { clock-mode = /bits/ 8 <2>; pwr-sel = /bits/ 8 <3>; /* D1~9 connected to VOUT */ - chan@0 { + led@0 { reg = <0>; chan-name = "d1"; led-cur = /bits/ 8 <0x14>; max-cur = /bits/ 8 <0x20>; }; - chan@1 { + led@1 { reg = <1>; chan-name = "d2"; led-cur = /bits/ 8 <0x14>; max-cur = /bits/ 8 <0x20>; }; - chan@2 { + led@2 { reg = <2>; chan-name = "d3"; led-cur = /bits/ 8 <0x14>; max-cur = /bits/ 8 <0x20>; }; - chan@3 { + led@3 { reg = <3>; chan-name = "d4"; led-cur = /bits/ 8 <0x14>; max-cur = /bits/ 8 <0x20>; }; - chan@4 { + led@4 { reg = <4>; chan-name = "d5"; led-cur = /bits/ 8 <0x14>; max-cur = /bits/ 8 <0x20>; }; - chan@5 { + led@5 { reg = <5>; chan-name = "d6"; led-cur = /bits/ 8 <0x14>; max-cur = /bits/ 8 <0x20>; }; - chan@6 { + led@6 { reg = <6>; chan-name = "d7"; led-cur = /bits/ 8 <0x14>; max-cur = /bits/ 8 <0x20>; }; - chan@7 { + led@7 { reg = <7>; chan-name = "d8"; led-cur = /bits/ 8 <0x14>; max-cur = /bits/ 8 <0x20>; }; - chan@8 { + led@8 { reg = <8>; chan-name = "d9"; led-cur = /bits/ 8 <0x14>; From patchwork Mon Oct 28 18:36:29 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Dan Murphy X-Patchwork-Id: 177966 Delivered-To: patch@linaro.org Received: by 2002:ac9:3c86:0:0:0:0:0 with SMTP id w6csp3418786ocf; Mon, 28 Oct 2019 11:39:07 -0700 (PDT) X-Google-Smtp-Source: APXvYqzRmgcXxxppIc67MTZvuLHgRaji7lUYLRM3BYQcYOZ+ygQDy/Q+Y4TGwmg5VOkcQDO/kfX0 X-Received: by 2002:a17:906:1542:: with SMTP id c2mr17764845ejd.80.1572287947754; Mon, 28 Oct 2019 11:39:07 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1572287947; cv=none; d=google.com; s=arc-20160816; b=hLYNYNKUWXNtBN7CLqpiF6lzA0a+To6q5os8kKa4VFi5h3/jVEWs2v/4oiwzpPytOb 9a/VrVqE7aMbNoEZnQ3VYWf60vdlNfqAMiErKPKfBSeDB4+kgWh5XFRLdkiVYlK/73Ny 4bAj2Ewc4bBNSiQ3B+zDmJj1tXljLSVUhi3hSG8sFpe2BWKiz71s861RkR5GptjxtaLu dNHgIiWfN87TGRQIJIov2mPt1VRF+cGiEZGn0rWzPaB6WxGzO7Lsj7Uur5S+c1Uyiy8t bFHlRyChhDKYrqg9W0p3l5xd3oQh4nw/VhT/SteM9hlOyuQaYG/rCmwm/Qhd8Luw/Lob uxeg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=CiO3hXAyFsuZm3cE8SXZzPxL1D+KaY4p9kZlHGgSu6M=; b=RNzfEVFhySU1ITapdRhKZS3BwpmBXcLNaYxUe0Z8hJnSJGXeHbcpn2FV9S6hng2J8c brfrb+CkgzlVfeYPGdVmhznWNaMRnqEPxkri9tretxg3/z42XwVzJqgJP1kW8eroOXN6 5yFB891qcBqK9oEMDiGwRRVafVdiNoEvo9hpxoy1+wUrsDb2LjzqnttV42iivsinvxgO 3ApiMbzSOd7aU5UK9j36EviAKT82K4X22XVIqYBH/Xd5rs9eWVpRcv9JXnjAtxfo5C8A l+kaTRCGZaFNaghYUQTqx3bn3WbFPo9Vd3D5k8m/6nIG/1s9T+c8E92K/C8ez8i4PG+1 j3+g== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@ti.com header.s=ti-com-17Q1 header.b="vG8+/kNd"; spf=pass (google.com: best guess record for domain of linux-leds-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-leds-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=NONE dis=NONE) header.from=ti.com Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id a12si6263367ejp.425.2019.10.28.11.39.07; Mon, 28 Oct 2019 11:39:07 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-leds-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@ti.com header.s=ti-com-17Q1 header.b="vG8+/kNd"; spf=pass (google.com: best guess record for domain of linux-leds-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-leds-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=NONE dis=NONE) header.from=ti.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1728202AbfJ1SjH (ORCPT + 1 other); Mon, 28 Oct 2019 14:39:07 -0400 Received: from fllv0016.ext.ti.com ([198.47.19.142]:38676 "EHLO fllv0016.ext.ti.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1727034AbfJ1SjH (ORCPT ); Mon, 28 Oct 2019 14:39:07 -0400 Received: from fllv0035.itg.ti.com ([10.64.41.0]) by fllv0016.ext.ti.com (8.15.2/8.15.2) with ESMTP id x9SId4fq017495; Mon, 28 Oct 2019 13:39:04 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ti.com; s=ti-com-17Q1; t=1572287944; bh=CiO3hXAyFsuZm3cE8SXZzPxL1D+KaY4p9kZlHGgSu6M=; h=From:To:CC:Subject:Date:In-Reply-To:References; b=vG8+/kNdu5gLrWQRaesP8Zzm2ONBqG9DU2T+h0L1SzGFSAChCLXdF+Ol5od8fKNcp +QmAtQ+ntN1Bkb2YHcLI6Kg7BCuwT1RThVpH4gqmZbE//cJUKHOpOLiqhQfxWZ1YIw Shp8ffYkv8GxCUbgTkJ0GAPaCjmmthY2vlxowDHY= Received: from DFLE108.ent.ti.com (dfle108.ent.ti.com [10.64.6.29]) by fllv0035.itg.ti.com (8.15.2/8.15.2) with ESMTP id x9SId4GE098551; Mon, 28 Oct 2019 13:39:04 -0500 Received: from DFLE105.ent.ti.com (10.64.6.26) by DFLE108.ent.ti.com (10.64.6.29) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.1713.5; Mon, 28 Oct 2019 13:38:52 -0500 Received: from lelv0326.itg.ti.com (10.180.67.84) by DFLE105.ent.ti.com (10.64.6.26) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.1713.5 via Frontend Transport; Mon, 28 Oct 2019 13:38:52 -0500 Received: from localhost (ileax41-snat.itg.ti.com [10.172.224.153]) by lelv0326.itg.ti.com (8.15.2/8.15.2) with ESMTP id x9SId4n4058699; Mon, 28 Oct 2019 13:39:04 -0500 From: Dan Murphy To: , CC: , , Dan Murphy Subject: [PATCH v15 19/19] leds: lp55xx-common: Remove extern from lp55xx-common header Date: Mon, 28 Oct 2019 13:36:29 -0500 Message-ID: <20191028183629.11779-20-dmurphy@ti.com> X-Mailer: git-send-email 2.22.0.214.g8dca754b1e In-Reply-To: <20191028183629.11779-1-dmurphy@ti.com> References: <20191028183629.11779-1-dmurphy@ti.com> MIME-Version: 1.0 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 Sender: linux-leds-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-leds@vger.kernel.org extern is implied and is not needed in the common header file. Remove the extern keyword and re-align the code. Signed-off-by: Dan Murphy --- drivers/leds/leds-lp55xx-common.h | 26 ++++++++++++-------------- 1 file changed, 12 insertions(+), 14 deletions(-) -- 2.22.0.214.g8dca754b1e diff --git a/drivers/leds/leds-lp55xx-common.h b/drivers/leds/leds-lp55xx-common.h index 18476051d3d2..051f8b33c601 100644 --- a/drivers/leds/leds-lp55xx-common.h +++ b/drivers/leds/leds-lp55xx-common.h @@ -183,29 +183,27 @@ struct lp55xx_led { }; /* register access */ -extern int lp55xx_write(struct lp55xx_chip *chip, u8 reg, u8 val); -extern int lp55xx_read(struct lp55xx_chip *chip, u8 reg, u8 *val); -extern int lp55xx_update_bits(struct lp55xx_chip *chip, u8 reg, - u8 mask, u8 val); +int lp55xx_write(struct lp55xx_chip *chip, u8 reg, u8 val); +int lp55xx_read(struct lp55xx_chip *chip, u8 reg, u8 *val); +int lp55xx_update_bits(struct lp55xx_chip *chip, u8 reg, u8 mask, u8 val); /* external clock detection */ -extern bool lp55xx_is_extclk_used(struct lp55xx_chip *chip); +bool lp55xx_is_extclk_used(struct lp55xx_chip *chip); /* common device init/deinit functions */ -extern int lp55xx_init_device(struct lp55xx_chip *chip); -extern void lp55xx_deinit_device(struct lp55xx_chip *chip); +int lp55xx_init_device(struct lp55xx_chip *chip); +void lp55xx_deinit_device(struct lp55xx_chip *chip); /* common LED class device functions */ -extern int lp55xx_register_leds(struct lp55xx_led *led, - struct lp55xx_chip *chip); +int lp55xx_register_leds(struct lp55xx_led *led, struct lp55xx_chip *chip); /* common device attributes functions */ -extern int lp55xx_register_sysfs(struct lp55xx_chip *chip); -extern void lp55xx_unregister_sysfs(struct lp55xx_chip *chip); +int lp55xx_register_sysfs(struct lp55xx_chip *chip); +void lp55xx_unregister_sysfs(struct lp55xx_chip *chip); /* common device tree population function */ -extern struct lp55xx_platform_data -*lp55xx_of_populate_pdata(struct device *dev, struct device_node *np, - struct lp55xx_chip *chip); +struct lp55xx_platform_data *lp55xx_of_populate_pdata(struct device *dev, + struct device_node *np, + struct lp55xx_chip *chip); #endif /* _LEDS_LP55XX_COMMON_H */