From patchwork Mon Jul 1 02:12:14 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Slark Xiao X-Patchwork-Id: 808875 Received: from m16.mail.163.com (m16.mail.163.com [117.135.210.4]) by smtp.subspace.kernel.org (Postfix) with ESMTP id CFF2C171C9; Mon, 1 Jul 2024 02:13:14 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=117.135.210.4 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1719799997; cv=none; b=JGa6p6CYYikf1jT7LQ14oeFqamaI1uQUIg1s5z0WdXRABD0HXYg/QmMTt8+Sqrn1lFJZTG4ogXR3cD6GfHabflOCgTpm3o3ceFWavbxhKO2L9GqonA8bgKLybjoCp60K0BA28IytxjP83AxQmVQnKy6Q9zfITLVUO7axAOa7DdI= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1719799997; c=relaxed/simple; bh=92AGGsrcbotljDKeMUOW1yDTBBo1NNwetVgmd8RhVRo=; h=From:To:Cc:Subject:Date:Message-Id:MIME-Version; b=YeQNCB8cei0L5xndVV1u+F3RGA4hr00N4Sq7D8c8d0h2yx0E862Y9ZacksLqbrif0roIe/JNp7TySBZnJe7Psm0O9X0hQOWip8SA8uF+73vnqTU6Q6c13AyBobISNJXi71TQoLaEBYRnT0NO+nvtwho/Qu0fv+SyfQm/bqyxPy0= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=163.com; spf=pass smtp.mailfrom=163.com; dkim=pass (1024-bit key) header.d=163.com header.i=@163.com header.b=Dv9VK0Kx; arc=none smtp.client-ip=117.135.210.4 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=163.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=163.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=163.com header.i=@163.com header.b="Dv9VK0Kx" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=163.com; s=s110527; h=From:Subject:Date:Message-Id:MIME-Version; bh=qOVWR 6aXQqry3nItjJ+e8OBR8po78qC5/g5g+JfJjCI=; b=Dv9VK0KxkmIm3q8vlu8S3 FYk+DNS92yV5sq07dLJI6MBIbfOlRVWSa4McQetZLPP/Vb76Fj18whHGrXK1O7/y kZsES1jwlzwt1yjFma73VbhP8H77wgQ7TasybTrZOoSOEa8YMxFg9D6nitdcaOS4 u9vN3hfLB4+2w6VXJ/5hts= Received: from localhost.localdomain (unknown [223.104.68.114]) by gzga-smtp-mta-g3-3 (Coremail) with SMTP id _____wD3v0uFEIJm1iKSBA--.55558S2; Mon, 01 Jul 2024 10:12:22 +0800 (CST) From: Slark Xiao To: manivannan.sadhasivam@linaro.org, loic.poulain@linaro.org, ryazanov.s.a@gmail.com, johannes@sipsolutions.net, quic_jhugo@quicinc.com Cc: netdev@vger.kernel.org, mhi@lists.linux.dev, linux-arm-msm@vger.kernel.org, linux-kernel@vger.kernel.org, Slark Xiao Subject: [PATCH v4 1/3] bus: mhi: host: Add Foxconn SDX72 related support Date: Mon, 1 Jul 2024 10:12:14 +0800 Message-Id: <20240701021216.17734-1-slark_xiao@163.com> X-Mailer: git-send-email 2.25.1 Precedence: bulk X-Mailing-List: linux-arm-msm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-CM-TRANSID: _____wD3v0uFEIJm1iKSBA--.55558S2 X-Coremail-Antispam: 1Uf129KBjvJXoWxur15Kry7Zw47JF4rKw4UArb_yoW5KrykpF s3Z3yUta1kJFWrKFW8A34DG3Z5GrsxCr93KFnrKw1Igw1Yy3yYqFZ7K342kryYy3sFqryS yF95WFy293ZrJF7anT9S1TB71UUUUU7qnTZGkaVYY2UrUUUUjbIjqfuFe4nvWSU5nxnvy2 9KBjDUYxBIdaVFxhVjvjDU0xZFpf9x0pRijjhUUUUU= X-CM-SenderInfo: xvod2y5b0lt0i6rwjhhfrp/1tbiRwcPZGV4KDQrogAAsj Align with Qcom SDX72, add ready timeout item for Foxconn SDX72. And also, add firehose support since SDX72. Signed-off-by: Slark Xiao --- v2: (1). Update the edl file path and name (2). Set SDX72 support trigger edl mode by default v3: Divide into 2 parts for Foxconn sdx72 platform --- drivers/bus/mhi/host/pci_generic.c | 43 ++++++++++++++++++++++++++++++ 1 file changed, 43 insertions(+) diff --git a/drivers/bus/mhi/host/pci_generic.c b/drivers/bus/mhi/host/pci_generic.c index 35ae7cd0711f..1fb1c2f2fe12 100644 --- a/drivers/bus/mhi/host/pci_generic.c +++ b/drivers/bus/mhi/host/pci_generic.c @@ -399,6 +399,8 @@ static const struct mhi_channel_config mhi_foxconn_sdx55_channels[] = { MHI_CHANNEL_CONFIG_DL(13, "MBIM", 32, 0), MHI_CHANNEL_CONFIG_UL(32, "DUN", 32, 0), MHI_CHANNEL_CONFIG_DL(33, "DUN", 32, 0), + MHI_CHANNEL_CONFIG_UL_FP(34, "FIREHOSE", 32, 0), + MHI_CHANNEL_CONFIG_DL_FP(35, "FIREHOSE", 32, 0), MHI_CHANNEL_CONFIG_HW_UL(100, "IP_HW0_MBIM", 128, 2), MHI_CHANNEL_CONFIG_HW_DL(101, "IP_HW0_MBIM", 128, 3), }; @@ -419,6 +421,16 @@ static const struct mhi_controller_config modem_foxconn_sdx55_config = { .event_cfg = mhi_foxconn_sdx55_events, }; +static const struct mhi_controller_config modem_foxconn_sdx72_config = { + .max_channels = 128, + .timeout_ms = 20000, + .ready_timeout_ms = 50000, + .num_channels = ARRAY_SIZE(mhi_foxconn_sdx55_channels), + .ch_cfg = mhi_foxconn_sdx55_channels, + .num_events = ARRAY_SIZE(mhi_foxconn_sdx55_events), + .event_cfg = mhi_foxconn_sdx55_events, +}; + static const struct mhi_pci_dev_info mhi_foxconn_sdx55_info = { .name = "foxconn-sdx55", .fw = "qcom/sdx55m/sbl1.mbn", @@ -488,6 +500,28 @@ static const struct mhi_pci_dev_info mhi_foxconn_dw5932e_info = { .sideband_wake = false, }; +static const struct mhi_pci_dev_info mhi_foxconn_t99w515_info = { + .name = "foxconn-t99w515", + .edl = "fox/sdx72m/edl.mbn", + .edl_trigger = true, + .config = &modem_foxconn_sdx72_config, + .bar_num = MHI_PCI_DEFAULT_BAR_NUM, + .dma_data_width = 32, + .mru_default = 32768, + .sideband_wake = false, +}; + +static const struct mhi_pci_dev_info mhi_foxconn_dw5934e_info = { + .name = "foxconn-dw5934e", + .edl = "fox/sdx72m/edl.mbn", + .edl_trigger = true, + .config = &modem_foxconn_sdx72_config, + .bar_num = MHI_PCI_DEFAULT_BAR_NUM, + .dma_data_width = 32, + .mru_default = 32768, + .sideband_wake = false, +}; + static const struct mhi_channel_config mhi_mv3x_channels[] = { MHI_CHANNEL_CONFIG_UL(0, "LOOPBACK", 64, 0), MHI_CHANNEL_CONFIG_DL(1, "LOOPBACK", 64, 0), @@ -720,6 +754,15 @@ static const struct pci_device_id mhi_pci_id_table[] = { /* DW5932e (sdx62), Non-eSIM */ { PCI_DEVICE(PCI_VENDOR_ID_FOXCONN, 0xe0f9), .driver_data = (kernel_ulong_t) &mhi_foxconn_dw5932e_info }, + /* T99W515 (sdx72) */ + { PCI_DEVICE(PCI_VENDOR_ID_FOXCONN, 0xe118), + .driver_data = (kernel_ulong_t) &mhi_foxconn_t99w515_info }, + /* DW5934e(sdx72), With eSIM */ + { PCI_DEVICE(PCI_VENDOR_ID_FOXCONN, 0xe11d), + .driver_data = (kernel_ulong_t) &mhi_foxconn_dw5934e_info }, + /* DW5934e(sdx72), Non-eSIM */ + { PCI_DEVICE(PCI_VENDOR_ID_FOXCONN, 0xe11e), + .driver_data = (kernel_ulong_t) &mhi_foxconn_dw5934e_info }, /* MV31-W (Cinterion) */ { PCI_DEVICE(PCI_VENDOR_ID_THALES, 0x00b3), .driver_data = (kernel_ulong_t) &mhi_mv31_info }, From patchwork Mon Jul 1 02:12:15 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Slark Xiao X-Patchwork-Id: 808876 Received: from m16.mail.163.com (m16.mail.163.com [220.197.31.5]) by smtp.subspace.kernel.org (Postfix) with ESMTP id 5A8091366; Mon, 1 Jul 2024 02:13:09 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=220.197.31.5 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1719799993; cv=none; b=O0+AT11pKNGXFSzczJqb9J5r2pnN2cBPOkZ2RAl1pOxD0YVKUniIGgELLDkJMuBrxdhq7t/JaD644XHS6inzDbdonJyp7Qxg8u/q6pFnZhhrmqjlWOY81/Rq0JBx8YUeb973QnkbYSjGxj8+MtTWZM/d1sgjTJ+Mlr7RRHy3HB0= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1719799993; c=relaxed/simple; bh=3ASXS1O8xuC6hlbozKD1ZRDRpVxjFWQ09XQ80jRF37I=; h=From:To:Cc:Subject:Date:Message-Id:In-Reply-To:References: MIME-Version; b=H4QfGDSTrldkKSkBezDjLx/XRIlfbh/zzMbV0AUTXwZ0UsaL5h7RsFR2sjM3vMI8UKgrWKZvslLTZSe+JJl8DgkNFypU120F6Fz1KOZgi68+ZDqq8/O7cr2uAQx4dwRdVsonS6Fifm5OM1gYJUuto2ZJYcIjZeocFxxb6xObsdA= ARC-Authentication-Results: i=1; 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Mon, 01 Jul 2024 10:12:24 +0800 (CST) From: Slark Xiao To: manivannan.sadhasivam@linaro.org, loic.poulain@linaro.org, ryazanov.s.a@gmail.com, johannes@sipsolutions.net, quic_jhugo@quicinc.com Cc: netdev@vger.kernel.org, mhi@lists.linux.dev, linux-arm-msm@vger.kernel.org, linux-kernel@vger.kernel.org, Slark Xiao Subject: [PATCH v4 2/3] bus: mhi: host: Add name for mhi_controller Date: Mon, 1 Jul 2024 10:12:15 +0800 Message-Id: <20240701021216.17734-2-slark_xiao@163.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20240701021216.17734-1-slark_xiao@163.com> References: <20240701021216.17734-1-slark_xiao@163.com> Precedence: bulk X-Mailing-List: linux-arm-msm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-CM-TRANSID: _____wD3v0uFEIJm1iKSBA--.55558S3 X-Coremail-Antispam: 1Uf129KBjvJXoW7ZrWfJr1DAr1DAF17Jr1DKFg_yoW8ZrW5pa 1v9rW3Ar4fKrW5Kr1qk3s7ZF15Xw4DW342kwsrWw15K3sIg34qqFyvgFyrGF9I9rZakF12 yF4Fvry8W3WqvF7anT9S1TB71UUUUU7qnTZGkaVYY2UrUUUUjbIjqfuFe4nvWSU5nxnvy2 9KBjDUYxBIdaVFxhVjvjDU0xZFpf9x0zMVbyUUUUUU= X-CM-SenderInfo: xvod2y5b0lt0i6rwjhhfrp/1tbiRwsPZGV4KDQsAAAAsK For SDX72 MBIM mode, it starts data mux id from 112 instead of 0. This would lead to device can't ping outside successfully. Also MBIM side would report "bad packet session (112)".In order to fix this issue, we decide to use the device name of MHI controller to do a match in client driver side. Then client driver could set a corresponding mux_id value for this MHI product. Signed-off-by: Slark Xiao --- v2: Remove Fix flag v3: Use name match solution instead of use mux_id v4: Update the description of new member 'name' and move it to right position --- drivers/bus/mhi/host/pci_generic.c | 1 + include/linux/mhi.h | 2 ++ 2 files changed, 3 insertions(+) diff --git a/drivers/bus/mhi/host/pci_generic.c b/drivers/bus/mhi/host/pci_generic.c index 1fb1c2f2fe12..14a11880bcea 100644 --- a/drivers/bus/mhi/host/pci_generic.c +++ b/drivers/bus/mhi/host/pci_generic.c @@ -1086,6 +1086,7 @@ static int mhi_pci_probe(struct pci_dev *pdev, const struct pci_device_id *id) mhi_cntrl->runtime_get = mhi_pci_runtime_get; mhi_cntrl->runtime_put = mhi_pci_runtime_put; mhi_cntrl->mru = info->mru_default; + mhi_cntrl->name = info->name; if (info->edl_trigger) mhi_cntrl->edl_trigger = mhi_pci_generic_edl_trigger; diff --git a/include/linux/mhi.h b/include/linux/mhi.h index b573f15762f8..d45058d3dbed 100644 --- a/include/linux/mhi.h +++ b/include/linux/mhi.h @@ -289,6 +289,7 @@ struct mhi_controller_config { }; /** + * @name: device name of the MHI controller * struct mhi_controller - Master MHI controller structure * @cntrl_dev: Pointer to the struct device of physical bus acting as the MHI * controller (required) @@ -367,6 +368,7 @@ struct mhi_controller_config { * they can be populated depending on the usecase. */ struct mhi_controller { + const char *name; struct device *cntrl_dev; struct mhi_device *mhi_dev; struct dentry *debugfs_dentry;