From patchwork Tue Oct 29 16:44:26 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ulf Hansson X-Patchwork-Id: 178032 Delivered-To: patches@linaro.org Received: by 2002:a92:409a:0:0:0:0:0 with SMTP id d26csp51691ill; Tue, 29 Oct 2019 09:44:45 -0700 (PDT) X-Received: by 2002:a19:ec16:: with SMTP id b22mr2642506lfa.74.1572367485597; Tue, 29 Oct 2019 09:44:45 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1572367485; cv=none; d=google.com; s=arc-20160816; b=ATUvs6laXWo0WnoR8DHLt7wObyOuBz8GpmSTANugUgl8IsdZxJf9B4HF2HT2qT7FbE sK/ptGRSc+istj1bjajKd+uC57wjmoqTTi01HKvYFi7X/W5vXd6051nhohRGa4NhoadP rT5QB52AYm95VTNcxjYveGf5iV/JpwntEVVt8tah2f16ImFuCcs1zksG9GSKZMJrydMv /Wai9sdi3f4cK+6tCL2U1OLJn6iz9bcbV9hhrs9RjPObc/mEjckwaUwZUJwC5n6xhdAm Ufz0UHrn6pXnsNyktVH5vX8y6B2Lw0PeWC5zpqk0/3lDOtc/M/n0JShAZD08GamvjSyR 1S1w== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=bWmI0Xiuvq89sgTizuBFylB3C9/WTB7ILCq148rwhZk=; b=xxB5gU3YLSD+2u81uO2Wj7iD8V5IYKaLZ6rNAIQZWFKKoGB0tIDaR+/E5lW4Jd6Sgp JTNV7DPpqz9jYW6JiTO4WHiT3bGvApVKEcv5931ldviTIiaV5tCr0jtgdnsmpW9AnVW3 vWf++6r/BV7HS/tqAZiHsdfhPucoxZNPUPd5hSy/vjyv3HfMA6Ph/IAOwo2MQPloqmlS nuxJad7/EtgWAeJeLyTdqmeExyqH0aF5+ENEVKuXPa6ZFzVRbI1Yfyjz1f/zzeZ0Wzwe UzugHSa4t+tlcy4rAAhMR0mdga/ZJNlXJmIvePqQaqKdEgsBFFI+pvk203lZ7IlRdU8b k/Pg== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=nGhuDYkf; spf=pass (google.com: domain of ulf.hansson@linaro.org designates 209.85.220.65 as permitted sender) smtp.mailfrom=ulf.hansson@linaro.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from mail-sor-f65.google.com (mail-sor-f65.google.com. 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[158.174.22.210]) by smtp.gmail.com with ESMTPSA id f28sm2048161lfh.35.2019.10.29.09.44.43 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 29 Oct 2019 09:44:44 -0700 (PDT) From: Ulf Hansson To: "Rafael J . Wysocki" , Daniel Lezcano , Sudeep Holla , Lorenzo Pieralisi , Mark Rutland , Lina Iyer , linux-pm@vger.kernel.org Cc: Rob Herring , Vincent Guittot , Stephen Boyd , Andy Gross , Bjorn Andersson , Kevin Hilman , Ulf Hansson , linux-arm-kernel@lists.infradead.org, linux-arm-msm@vger.kernel.org Subject: [PATCH v2 01/13] cpuidle: psci: Align psci_power_state count with idle state count Date: Tue, 29 Oct 2019 17:44:26 +0100 Message-Id: <20191029164438.17012-2-ulf.hansson@linaro.org> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20191029164438.17012-1-ulf.hansson@linaro.org> References: <20191029164438.17012-1-ulf.hansson@linaro.org> From: Sudeep Holla Instead of allocating 'n-1' states in psci_power_state to manage 'n' idle states which include "ARM WFI" state, it would be simpler to have 1:1 mapping between psci_power_state and cpuidle driver states. ARM WFI state(i.e. idx == 0) is handled specially in the generic macro CPU_PM_CPU_IDLE_ENTER_PARAM and hence state[-1] is not possible. However for sake of code readability, it is better to have 1:1 mapping and not use [idx - 1] to access psci_power_state corresponding to driver cpuidle state for idx. psci_power_state[0] is default initialised to 0 and is never accessed while entering WFI state. Reported-by: Ulf Hansson Signed-off-by: Sudeep Holla Reviewed-by: Ulf Hansson --- Changes in v2: - Added tags. --- drivers/cpuidle/cpuidle-psci.c | 8 +++++--- 1 file changed, 5 insertions(+), 3 deletions(-) -- 2.17.1 diff --git a/drivers/cpuidle/cpuidle-psci.c b/drivers/cpuidle/cpuidle-psci.c index f3c1a2396f98..361985f52ddd 100644 --- a/drivers/cpuidle/cpuidle-psci.c +++ b/drivers/cpuidle/cpuidle-psci.c @@ -30,7 +30,7 @@ static int psci_enter_idle_state(struct cpuidle_device *dev, u32 *state = __this_cpu_read(psci_power_state); return CPU_PM_CPU_IDLE_ENTER_PARAM(psci_cpu_suspend_enter, - idx, state[idx - 1]); + idx, state[idx]); } static struct cpuidle_driver psci_idle_driver __initdata = { @@ -89,12 +89,14 @@ static int __init psci_dt_cpu_init_idle(struct device_node *cpu_node, int cpu) if (!count) return -ENODEV; + count++; /* Add WFI state too */ psci_states = kcalloc(count, sizeof(*psci_states), GFP_KERNEL); if (!psci_states) return -ENOMEM; - for (i = 0; i < count; i++) { - state_node = of_parse_phandle(cpu_node, "cpu-idle-states", i); + for (i = 1; i < count; i++) { + state_node = of_parse_phandle(cpu_node, "cpu-idle-states", + i - 1); ret = psci_dt_parse_state_node(state_node, &psci_states[i]); of_node_put(state_node); From patchwork Tue Oct 29 16:44:27 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ulf Hansson X-Patchwork-Id: 178033 Delivered-To: patches@linaro.org Received: by 2002:a92:409a:0:0:0:0:0 with SMTP id d26csp51744ill; Tue, 29 Oct 2019 09:44:47 -0700 (PDT) X-Received: by 2002:ac2:4a8f:: with SMTP id l15mr3093983lfp.5.1572367487508; Tue, 29 Oct 2019 09:44:47 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1572367487; cv=none; d=google.com; s=arc-20160816; b=S8/32hYkv4PmqsM7zy//tMV2usHytxT/RuyxleZFiboJfCoND1f9XxMKIw0xqK8pJs 0nzkSZ/atdP37alTcAjHeoziYHqD7C7So41S8nAX1mdVe7GGYZ9NBljYweXQVugunTWK 9YErSusJ5Gd6FSg8amWDJO8kqD/RsGO0OWCCpjWyZiwMitZS0OUy2B1iGO9dMr6PiBoe xTLBYwbhioURcmEKzjWiU7CwI/vHwiWIpJMhc8eWB14mJ7qkopNIWs+XwBbstCPgkI2e lv/YQKeaP99od3mYsLKCKnlcnFARCxVv+MseCFQ44VjifZPdYsO9hgCTblBuFwZeen+w UmbQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=vx1yeiYtbxdfUZEGLcn/GapdFgHrvVzZj2LYjH6Qipc=; b=UE294yNl4DlBWcuuD1nMxlv03eEpE247PxZwAMiUsD3JIzbUtycgYaeENBAIdz20SP 8KqBS5JWWX+a3OSUwtYU/VPMhEc/m4CJykkTohNvg60W1rEbWxCwtBQsiI8ScxCxJLY9 bIlWgk8+lIAIVsoXtXnyFyqfsH9wX73Xr4Ud8W+SLGafw9gZZuzVg2M6Wew1BDOk/iiz Jlru6Ua5PAu4Pw4LL/KYqwG5SpmOy0kKOURIRrWW4YxjMY2uQvQV4LOV5ho5+AJu0ZJE PP1938imudnbxaf8Z667r3ShtgvnfsrqwqRANNTGKSfiy1AGEjfLqT+Bn0Nv7TE2u6yt SwhQ== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=Fkoxqmi5; spf=pass (google.com: domain of ulf.hansson@linaro.org designates 209.85.220.65 as permitted sender) smtp.mailfrom=ulf.hansson@linaro.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from mail-sor-f65.google.com (mail-sor-f65.google.com. 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[158.174.22.210]) by smtp.gmail.com with ESMTPSA id f28sm2048161lfh.35.2019.10.29.09.44.45 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 29 Oct 2019 09:44:46 -0700 (PDT) From: Ulf Hansson To: "Rafael J . Wysocki" , Daniel Lezcano , Sudeep Holla , Lorenzo Pieralisi , Mark Rutland , Lina Iyer , linux-pm@vger.kernel.org Cc: Rob Herring , Vincent Guittot , Stephen Boyd , Andy Gross , Bjorn Andersson , Kevin Hilman , Ulf Hansson , linux-arm-kernel@lists.infradead.org, linux-arm-msm@vger.kernel.org, Lina Iyer Subject: [PATCH v2 02/13] dt: psci: Update DT bindings to support hierarchical PSCI states Date: Tue, 29 Oct 2019 17:44:27 +0100 Message-Id: <20191029164438.17012-3-ulf.hansson@linaro.org> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20191029164438.17012-1-ulf.hansson@linaro.org> References: <20191029164438.17012-1-ulf.hansson@linaro.org> Update PSCI DT bindings to allow to represent idle states for CPUs and the CPU topology, by using a hierarchical layout. Primarily this is done by re-using the existing DT bindings for PM domains [1] and for PM domain idle states [2]. Let's also add an example into the document for the PSCI DT bindings, to clearly show the new hierarchical based layout. The currently supported flattened layout, is already described in the ARM idle states bindings [3], so let's leave that as is. [1] Documentation/devicetree/bindings/power/power_domain.txt [2] Documentation/devicetree/bindings/power/domain-idle-state.txt [3] Documentation/devicetree/bindings/arm/idle-states.txt Co-developed-by: Lina Iyer Signed-off-by: Lina Iyer Signed-off-by: Ulf Hansson --- Changes in v2: - Clarifications and also added updates cpus.yaml, to descrive that CPUs may be attached to PM domains. --- .../devicetree/bindings/arm/cpus.yaml | 15 +++ .../devicetree/bindings/arm/psci.yaml | 102 ++++++++++++++++++ 2 files changed, 117 insertions(+) -- 2.17.1 diff --git a/Documentation/devicetree/bindings/arm/cpus.yaml b/Documentation/devicetree/bindings/arm/cpus.yaml index cb30895e3b67..92a775d6fc0e 100644 --- a/Documentation/devicetree/bindings/arm/cpus.yaml +++ b/Documentation/devicetree/bindings/arm/cpus.yaml @@ -241,6 +241,21 @@ properties: where voltage is in V, frequency is in MHz. + power-domains: + $ref: '/schemas/types.yaml#/definitions/phandle-array' + description: + List of phandles and PM domain specifiers, as defined by bindings of the + PM domain provider (see also ../power_domain.txt). + + power-domain-names: + $ref: '/schemas/types.yaml#/definitions/string-array' + description: + A list of power domain name strings sorted in the same order as the + power-domains property. + + For PSCI based platforms, the name corresponding to the index of the PSCI + PM domain provider, must be "psci". + qcom,saw: $ref: '/schemas/types.yaml#/definitions/phandle' description: | diff --git a/Documentation/devicetree/bindings/arm/psci.yaml b/Documentation/devicetree/bindings/arm/psci.yaml index 7abdf58b335e..9fed255cc92d 100644 --- a/Documentation/devicetree/bindings/arm/psci.yaml +++ b/Documentation/devicetree/bindings/arm/psci.yaml @@ -102,6 +102,34 @@ properties: [1] Kernel documentation - ARM idle states bindings Documentation/devicetree/bindings/arm/idle-states.txt + "#power-domain-cells": + description: + The number of cells in a PM domain specifier as per binding in [3]. + Must be 0 as to represent a single PM domain. + + ARM systems can have multiple cores, sometimes in an hierarchical + arrangement. This often, but not always, maps directly to the processor + power topology of the system. Individual nodes in a topology have their + own specific power states and can be better represented hierarchically. + + For these cases, the definitions of the idle states for the CPUs and the + CPU topology, must conform to the binding in [3]. The idle states + themselves must conform to the binding in [4] and must specify the + arm,psci-suspend-param property. + + It should also be noted that, in PSCI firmware v1.0 the OS-Initiated + (OSI) CPU suspend mode is introduced. Using a hierarchical representation + helps to implement support for OSI mode and OS implementations may choose + to mandate it. + + [3] Documentation/devicetree/bindings/power/power_domain.txt + [4] Documentation/devicetree/bindings/power/domain-idle-state.txt + + power-domains: + $ref: '/schemas/types.yaml#/definitions/phandle-array' + description: + List of phandles and PM domain specifiers, as defined by bindings of the + PM domain provider. required: - compatible @@ -160,4 +188,78 @@ examples: cpu_on = <0x95c10002>; cpu_off = <0x95c10001>; }; + + - |+ + + // Case 4: CPUs and CPU idle states described using the hierarchical model. + + cpus { + + CPU0: cpu@0 { + device_type = "cpu"; + compatible = "arm,cortex-a53", "arm,armv8"; + reg = <0x0>; + enable-method = "psci"; + power-domains = <&CPU_PD0>; + power-domain-names = "psci"; + }; + + CPU1: cpu@1 { + device_type = "cpu"; + compatible = "arm,cortex-a57", "arm,armv8"; + reg = <0x100>; + enable-method = "psci"; + power-domains = <&CPU_PD1>; + power-domain-names = "psci"; + }; + + idle-states { + + CPU_PWRDN: cpu-power-down { + compatible = "arm,idle-state"; + arm,psci-suspend-param = <0x0000001>; + entry-latency-us = <10>; + exit-latency-us = <10>; + min-residency-us = <100>; + }; + + CLUSTER_RET: cluster-retention { + compatible = "domain-idle-state"; + arm,psci-suspend-param = <0x1000011>; + entry-latency-us = <500>; + exit-latency-us = <500>; + min-residency-us = <2000>; + }; + + CLUSTER_PWRDN: cluster-power-down { + compatible = "domain-idle-state"; + arm,psci-suspend-param = <0x1000031>; + entry-latency-us = <2000>; + exit-latency-us = <2000>; + min-residency-us = <6000>; + }; + }; + }; + + psci { + compatible = "arm,psci-1.0"; + method = "smc"; + + CPU_PD0: cpu-pd0 { + #power-domain-cells = <0>; + domain-idle-states = <&CPU_PWRDN>; + power-domains = <&CLUSTER_PD>; + }; + + CPU_PD1: cpu-pd1 { + #power-domain-cells = <0>; + domain-idle-states = <&CPU_PWRDN>; + power-domains = <&CLUSTER_PD>; + }; + + CLUSTER_PD: cluster-pd { + #power-domain-cells = <0>; + domain-idle-states = <&CLUSTER_RET>, <&CLUSTER_PWRDN>; + }; + }; ... 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[158.174.22.210]) by smtp.gmail.com with ESMTPSA id f28sm2048161lfh.35.2019.10.29.09.44.47 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 29 Oct 2019 09:44:47 -0700 (PDT) From: Ulf Hansson To: "Rafael J . Wysocki" , Daniel Lezcano , Sudeep Holla , Lorenzo Pieralisi , Mark Rutland , Lina Iyer , linux-pm@vger.kernel.org Cc: Rob Herring , Vincent Guittot , Stephen Boyd , Andy Gross , Bjorn Andersson , Kevin Hilman , Ulf Hansson , linux-arm-kernel@lists.infradead.org, linux-arm-msm@vger.kernel.org Subject: [PATCH v2 03/13] firmware: psci: Export functions to manage the OSI mode Date: Tue, 29 Oct 2019 17:44:28 +0100 Message-Id: <20191029164438.17012-4-ulf.hansson@linaro.org> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20191029164438.17012-1-ulf.hansson@linaro.org> References: <20191029164438.17012-1-ulf.hansson@linaro.org> To allow subsequent changes to implement support for OSI mode through the cpuidle-psci driver, export the existing psci_has_osi_support(). Export also a new function, psci_set_osi_mode(), that allows its caller to enable the OS-initiated CPU-suspend mode in the PSCI FW. To deal with backwards compatibility for a kernel started through a kexec call, default to set the CPU-suspend mode to the Platform Coordinated mode during boot. Signed-off-by: Ulf Hansson Reviewed-by: Sudeep Holla --- Changes in v2: - Added tags. --- drivers/firmware/psci/psci.c | 18 ++++++++++++++++-- include/linux/psci.h | 2 ++ 2 files changed, 18 insertions(+), 2 deletions(-) -- 2.17.1 diff --git a/drivers/firmware/psci/psci.c b/drivers/firmware/psci/psci.c index 84f4ff351c62..76f3a991d4d7 100644 --- a/drivers/firmware/psci/psci.c +++ b/drivers/firmware/psci/psci.c @@ -89,7 +89,7 @@ static inline bool psci_has_ext_power_state(void) PSCI_1_0_FEATURES_CPU_SUSPEND_PF_MASK; } -static inline bool psci_has_osi_support(void) +bool psci_has_osi_support(void) { return psci_cpu_suspend_feature & PSCI_1_0_OS_INITIATED; } @@ -154,6 +154,15 @@ static u32 psci_get_version(void) return invoke_psci_fn(PSCI_0_2_FN_PSCI_VERSION, 0, 0, 0); } +int psci_set_osi_mode(void) +{ + int err; + + err = invoke_psci_fn(PSCI_1_0_FN_SET_SUSPEND_MODE, + PSCI_1_0_SUSPEND_MODE_OSI, 0, 0); + return psci_to_linux_errno(err); +} + static int psci_cpu_suspend(u32 state, unsigned long entry_point) { int err; @@ -536,9 +545,14 @@ static int __init psci_1_0_init(struct device_node *np) if (err) return err; - if (psci_has_osi_support()) + if (psci_has_osi_support()) { pr_info("OSI mode supported.\n"); + /* Default to PC mode. */ + invoke_psci_fn(PSCI_1_0_FN_SET_SUSPEND_MODE, + PSCI_1_0_SUSPEND_MODE_PC, 0, 0); + } + return 0; } diff --git a/include/linux/psci.h b/include/linux/psci.h index e2bacc6fd2f2..f76b45341adf 100644 --- a/include/linux/psci.h +++ b/include/linux/psci.h @@ -17,6 +17,8 @@ bool psci_tos_resident_on(int cpu); int psci_cpu_suspend_enter(u32 state); bool psci_power_state_is_valid(u32 state); +int psci_set_osi_mode(void); +bool psci_has_osi_support(void); enum psci_conduit { PSCI_CONDUIT_NONE, From patchwork Tue Oct 29 16:44:29 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ulf Hansson X-Patchwork-Id: 178035 Delivered-To: patches@linaro.org Received: by 2002:a92:409a:0:0:0:0:0 with SMTP id d26csp51812ill; Tue, 29 Oct 2019 09:44:50 -0700 (PDT) X-Received: by 2002:a2e:9112:: with SMTP id m18mr3465751ljg.75.1572367490594; Tue, 29 Oct 2019 09:44:50 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1572367490; cv=none; d=google.com; s=arc-20160816; b=gUsQ5WCp+OnU3CXDoKAUWyK/gCq1OINHZfVdGF4JXmW+a0k2O5lS/iQ6krURl+c6m+ +QP7na0hoFvudnuKrkanHjAAIA0qxGTiuTLOhxDF9Ts9M+cA0TWtUcPcr0K0goAlGx0c 0bM5FOL6ucvhsBfIbaGw8z/OLyInSc9Ls1twOEmJQSdRbuKqXVsoXTntRzTR05LOdcYQ 6OQn+ou2UwZjaUypI8R4sQwsWGyG/rUca7ZxURR/GgRegvf+zZW6n1Wkfup7RKzw4Wa9 EBcMjmYM7ehi+TX2nYJwNthZYLHaCDjOk9f+wmHxxTEfN1nu488TunZnyU+N7zWot7H3 UvpQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=gHfhTk/O49Ag6+ZgN50VNvSjMx4ttcjd8NQhNmRdxaI=; b=mCrU/29VN2qxyjKdpl2qMhnnNgBYZRv5WkV3r367OHcBpjpWQNAab/3eQYHNF7mNhL Xw4pyibEQc5QmFGu99ExPhIyAKv352Ozc+sQvI62pts3ZXHc42O0StW11M1+MwWYbAnk kauLD1zi5ITmjYOwZs0m1QymClokZJtCQ1kHylfG/xXyeFvdpWRNay6Y+TWq2EJO5isu RoX+VPq/6LOKTknND4s5LrsajlB0HEpNDRXj+HdXHbclwiDK/NOFdk17Q/ekfeqDmBEs dBb5utUhxRKnfy4flVPSUoLe8ZVlDzly/dXk5KWrKyvcT5JONEz4VGjLEjzz8A/PloES 6Xbg== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=kBwGCSdc; spf=pass (google.com: domain of ulf.hansson@linaro.org designates 209.85.220.65 as permitted sender) smtp.mailfrom=ulf.hansson@linaro.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from mail-sor-f65.google.com (mail-sor-f65.google.com. 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[158.174.22.210]) by smtp.gmail.com with ESMTPSA id f28sm2048161lfh.35.2019.10.29.09.44.48 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 29 Oct 2019 09:44:49 -0700 (PDT) From: Ulf Hansson To: "Rafael J . Wysocki" , Daniel Lezcano , Sudeep Holla , Lorenzo Pieralisi , Mark Rutland , Lina Iyer , linux-pm@vger.kernel.org Cc: Rob Herring , Vincent Guittot , Stephen Boyd , Andy Gross , Bjorn Andersson , Kevin Hilman , Ulf Hansson , linux-arm-kernel@lists.infradead.org, linux-arm-msm@vger.kernel.org, Lina Iyer Subject: [PATCH v2 04/13] of: base: Add of_get_cpu_state_node() to get idle states for a CPU node Date: Tue, 29 Oct 2019 17:44:29 +0100 Message-Id: <20191029164438.17012-5-ulf.hansson@linaro.org> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20191029164438.17012-1-ulf.hansson@linaro.org> References: <20191029164438.17012-1-ulf.hansson@linaro.org> The CPU's idle state nodes are currently parsed at the common cpuidle DT library, but also when initializing data for specific CPU idle operations, as in the PSCI cpuidle driver case and qcom-spm cpuidle case. To avoid open-coding, let's introduce of_get_cpu_state_node(), which takes the device node for the CPU and the index to the requested idle state node, as in-parameters. In case a corresponding idle state node is found, it returns the node with the refcount incremented for it, else it returns NULL. Moreover, for PSCI there are two options to describe the CPU's idle states [1], either via a flattened description or a hierarchical layout. Hence, let's take both options into account. [1] Documentation/devicetree/bindings/arm/psci.yaml Suggested-by: Sudeep Holla Co-developed-by: Lina Iyer Signed-off-by: Lina Iyer Reviewed-by: Rob Herring Reviewed-by: Daniel Lezcano Signed-off-by: Ulf Hansson Reviewed-by: Sudeep Holla --- Changes in v2: - Added tags. --- drivers/of/base.c | 36 ++++++++++++++++++++++++++++++++++++ include/linux/of.h | 8 ++++++++ 2 files changed, 44 insertions(+) -- 2.17.1 diff --git a/drivers/of/base.c b/drivers/of/base.c index 1d667eb730e1..0e4cdf0f3864 100644 --- a/drivers/of/base.c +++ b/drivers/of/base.c @@ -477,6 +477,42 @@ int of_cpu_node_to_id(struct device_node *cpu_node) } EXPORT_SYMBOL(of_cpu_node_to_id); +/** + * of_get_cpu_state_node - Get CPU's idle state node at the given index + * + * @cpu_node: The device node for the CPU + * @index: The index in the list of the idle states + * + * Two generic methods can be used to describe a CPU's idle states, either via + * a flattened description through the "cpu-idle-states" binding or via the + * hierarchical layout, using the "power-domains" and the "domain-idle-states" + * bindings. This function check for both and returns the idle state node for + * the requested index. + * + * In case an idle state node is found at @index, the refcount is incremented + * for it, so call of_node_put() on it when done. Returns NULL if not found. + */ +struct device_node *of_get_cpu_state_node(struct device_node *cpu_node, + int index) +{ + struct of_phandle_args args; + int err; + + err = of_parse_phandle_with_args(cpu_node, "power-domains", + "#power-domain-cells", 0, &args); + if (!err) { + struct device_node *state_node = + of_parse_phandle(args.np, "domain-idle-states", index); + + of_node_put(args.np); + if (state_node) + return state_node; + } + + return of_parse_phandle(cpu_node, "cpu-idle-states", index); +} +EXPORT_SYMBOL(of_get_cpu_state_node); + /** * __of_device_is_compatible() - Check if the node matches given constraints * @device: pointer to node diff --git a/include/linux/of.h b/include/linux/of.h index 844f89e1b039..c669c0a4732f 100644 --- a/include/linux/of.h +++ b/include/linux/of.h @@ -351,6 +351,8 @@ extern const void *of_get_property(const struct device_node *node, int *lenp); extern struct device_node *of_get_cpu_node(int cpu, unsigned int *thread); extern struct device_node *of_get_next_cpu_node(struct device_node *prev); +extern struct device_node *of_get_cpu_state_node(struct device_node *cpu_node, + int index); #define for_each_property_of_node(dn, pp) \ for (pp = dn->properties; pp != NULL; pp = pp->next) @@ -765,6 +767,12 @@ static inline struct device_node *of_get_next_cpu_node(struct device_node *prev) return NULL; } +static inline struct device_node *of_get_cpu_state_node(struct device_node *cpu_node, + int index) +{ + return NULL; +} + static inline int of_n_addr_cells(struct device_node *np) { return 0; From patchwork Tue Oct 29 16:44:30 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ulf Hansson X-Patchwork-Id: 178036 Delivered-To: patches@linaro.org Received: by 2002:a92:409a:0:0:0:0:0 with SMTP id d26csp51844ill; Tue, 29 Oct 2019 09:44:52 -0700 (PDT) X-Received: by 2002:ac2:4345:: with SMTP id o5mr3170627lfl.60.1572367492286; Tue, 29 Oct 2019 09:44:52 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1572367492; cv=none; d=google.com; s=arc-20160816; b=a1fcxBdVlx9L65uuJeQLsNmXWTWKnl8G1nX4XnZZ28fwrHntD0SP1ttLt9kycqqI55 e/ozzgItsDGMuvKv4IYM9Wnmf67eI+AqV6IwtRXwPncpihsfFy7LL9oq0liSqcWCJEld HO+VMqRJtgpggK3ahZKr1aNHE5ULc8W32hoSXXo7ePzBtRoE0qZdM9XtC6c9sBM9HCuc d4aOGuIXQMbFfNI7v0VUBkOP++eWMtmacADmMcPCtg+q0vqd/RPoLmc064pvwnaPgNMW 5BGc+bjjU98RG7Cp95VSd36K4Y4u9FgkIrNWbE5EagxRWT8ib96OmOPe4MHSTOC5Ojbr xX3A== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=ez2utYAtjrFLSHNrrL2RvE6Z5l8CFOmyZBlsi6wZqI8=; b=qBdliMWt52DFPCmwffJ6ZIurIikPfedcW1qWPisKEZm5gkOkt8zyLcxujGBfAccBg5 gkJJDSA1elZHQL+dvec9zN8KIkN5MjLUp+//tmphwn6MoUhc8fK5ox0ULxt6vavRyWtj mDJZP/dlERK69EJFVtgYJ5abKvfnjkbOJebaqYpJTaEej3sW34/XOrMAgB3q5be3m1IS u3FgzxBn1+4vT0piAu0lOUWf/wN9Rizcjr0amE8rLC4BSlKcEDpMiqtkgcsrzrlQuSQj Spds3AOcaXGU0NpkOwSGyBSHw64r4zRpdNP/qyMRWVSXDyJlOwJcgiMkVAdmjHhYHWpr fl8w== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=eCGaQk2C; spf=pass (google.com: domain of ulf.hansson@linaro.org designates 209.85.220.65 as permitted sender) smtp.mailfrom=ulf.hansson@linaro.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from mail-sor-f65.google.com (mail-sor-f65.google.com. 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[158.174.22.210]) by smtp.gmail.com with ESMTPSA id f28sm2048161lfh.35.2019.10.29.09.44.50 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 29 Oct 2019 09:44:51 -0700 (PDT) From: Ulf Hansson To: "Rafael J . Wysocki" , Daniel Lezcano , Sudeep Holla , Lorenzo Pieralisi , Mark Rutland , Lina Iyer , linux-pm@vger.kernel.org Cc: Rob Herring , Vincent Guittot , Stephen Boyd , Andy Gross , Bjorn Andersson , Kevin Hilman , Ulf Hansson , linux-arm-kernel@lists.infradead.org, linux-arm-msm@vger.kernel.org, Lina Iyer Subject: [PATCH v2 05/13] cpuidle: dt: Support hierarchical CPU idle states Date: Tue, 29 Oct 2019 17:44:30 +0100 Message-Id: <20191029164438.17012-6-ulf.hansson@linaro.org> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20191029164438.17012-1-ulf.hansson@linaro.org> References: <20191029164438.17012-1-ulf.hansson@linaro.org> From: Lina Iyer Currently CPU's idle states are represented using the flattened model. Let's add support for the hierarchical layout, via converting to use of_get_cpu_state_node(). Suggested-by: Sudeep Holla Signed-off-by: Lina Iyer Reviewed-by: Daniel Lezcano Co-developed-by: Ulf Hansson Signed-off-by: Ulf Hansson Reviewed-by: Sudeep Holla --- Changes in v2: - Added tags. --- drivers/cpuidle/dt_idle_states.c | 5 ++--- 1 file changed, 2 insertions(+), 3 deletions(-) -- 2.17.1 diff --git a/drivers/cpuidle/dt_idle_states.c b/drivers/cpuidle/dt_idle_states.c index d06d21a9525d..252f2a9686a6 100644 --- a/drivers/cpuidle/dt_idle_states.c +++ b/drivers/cpuidle/dt_idle_states.c @@ -111,8 +111,7 @@ static bool idle_state_valid(struct device_node *state_node, unsigned int idx, for (cpu = cpumask_next(cpumask_first(cpumask), cpumask); cpu < nr_cpu_ids; cpu = cpumask_next(cpu, cpumask)) { cpu_node = of_cpu_device_node_get(cpu); - curr_state_node = of_parse_phandle(cpu_node, "cpu-idle-states", - idx); + curr_state_node = of_get_cpu_state_node(cpu_node, idx); if (state_node != curr_state_node) valid = false; @@ -170,7 +169,7 @@ int dt_init_idle_driver(struct cpuidle_driver *drv, cpu_node = of_cpu_device_node_get(cpumask_first(cpumask)); for (i = 0; ; i++) { - state_node = of_parse_phandle(cpu_node, "cpu-idle-states", i); + state_node = of_get_cpu_state_node(cpu_node, i); if (!state_node) break; From patchwork Tue Oct 29 16:44:31 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ulf Hansson X-Patchwork-Id: 178037 Delivered-To: patches@linaro.org Received: by 2002:a92:409a:0:0:0:0:0 with SMTP id d26csp51885ill; Tue, 29 Oct 2019 09:44:54 -0700 (PDT) X-Received: by 2002:a2e:b5d0:: with SMTP id g16mr220329ljn.88.1572367494348; Tue, 29 Oct 2019 09:44:54 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1572367494; cv=none; d=google.com; s=arc-20160816; b=F+HPL+dxNzRKms6lY0PrmtYyKdkiPfgRxaLTP6JTvPj2u79puP+3sYH5gi/ziNc7Tp 3dCugZb3dEc8itxQL3QH3fQ+Q7+ZFFUYFsKZDZqcqdZ3jNhu1brh9gJwo+r4vjxH1r2r dfpOO19tQnf60DeAuO1Lq8R5WAreJZxvvxqAP3nI2COnXm4HvEl9fchg99Y93nf/MRre N1RjV23Wwa2MnjL0CyFctiSrwThWQSYpU9E9Ht/t43JBmphVExQYWUo0WppYPc2oQm3c B3f4STZKnBwdWCp/jnRmQvj4YERWc/GgNDknLT1tVMOXRmu9tpJNz0aPSKXl1SRlgBFf 4PUg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=lVOXUxxNfV4wN8bXUUjCt19F2H674agulhVmSpBAGAE=; b=YGrAfZtTL1/Yp5/oop0PTmLrkDsQ8mSsBwrbkoAHI+bVR7U+V/dLUB1eKFEibDOQPu nA85Akt3bfgz39zNtSaMlymdlA11AAEB5KXWrOiFiyjnGfOtjH9D7ewUNRzycl6UTZEl QG5qwNrwxBe6K1xtvCmgMfxcSkKCtxB9pqOch/toesqyY+j/+HeICi0rxwP7PycJ7Vkm OY14BrkaGzpdoqg/5GA7vkZ/Se8fgbgOhz5ZGHkgsy75pBj5DO59k5Y0lsB08hqJI9xv W1PK2VlH2NgTLTkNHBg5tcE0qQdfAj2ZmSdwJJCoQeN5AKnUudg6eRV5VHNQs165riq2 Ct8g== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=Wq5NfHQP; spf=pass (google.com: domain of ulf.hansson@linaro.org designates 209.85.220.65 as permitted sender) smtp.mailfrom=ulf.hansson@linaro.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from mail-sor-f65.google.com (mail-sor-f65.google.com. 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[158.174.22.210]) by smtp.gmail.com with ESMTPSA id f28sm2048161lfh.35.2019.10.29.09.44.52 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 29 Oct 2019 09:44:53 -0700 (PDT) From: Ulf Hansson To: "Rafael J . Wysocki" , Daniel Lezcano , Sudeep Holla , Lorenzo Pieralisi , Mark Rutland , Lina Iyer , linux-pm@vger.kernel.org Cc: Rob Herring , Vincent Guittot , Stephen Boyd , Andy Gross , Bjorn Andersson , Kevin Hilman , Ulf Hansson , linux-arm-kernel@lists.infradead.org, linux-arm-msm@vger.kernel.org Subject: [PATCH v2 06/13] cpuidle: psci: Simplify OF parsing of CPU idle state nodes Date: Tue, 29 Oct 2019 17:44:31 +0100 Message-Id: <20191029164438.17012-7-ulf.hansson@linaro.org> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20191029164438.17012-1-ulf.hansson@linaro.org> References: <20191029164438.17012-1-ulf.hansson@linaro.org> Iterating through the idle state nodes in DT, to find out the number of states that needs to be allocated is unnecessary, as it has already been done from dt_init_idle_driver(). Therefore, drop the iteration and use the number we already have at hand. Signed-off-by: Ulf Hansson --- Changes in v2: - Rebased. - Renamed variable and fixed tab-intendent. --- drivers/cpuidle/cpuidle-psci.c | 35 +++++++++++++++++----------------- 1 file changed, 17 insertions(+), 18 deletions(-) -- 2.17.1 diff --git a/drivers/cpuidle/cpuidle-psci.c b/drivers/cpuidle/cpuidle-psci.c index 361985f52ddd..761359be50f2 100644 --- a/drivers/cpuidle/cpuidle-psci.c +++ b/drivers/cpuidle/cpuidle-psci.c @@ -73,30 +73,24 @@ static int __init psci_dt_parse_state_node(struct device_node *np, u32 *state) return 0; } -static int __init psci_dt_cpu_init_idle(struct device_node *cpu_node, int cpu) +static int __init psci_dt_cpu_init_idle(struct device_node *cpu_node, + unsigned int state_count, int cpu) { - int i, ret = 0, count = 0; + int i, ret = 0; u32 *psci_states; struct device_node *state_node; - /* Count idle states */ - while ((state_node = of_parse_phandle(cpu_node, "cpu-idle-states", - count))) { - count++; - of_node_put(state_node); - } - - if (!count) - return -ENODEV; - - count++; /* Add WFI state too */ - psci_states = kcalloc(count, sizeof(*psci_states), GFP_KERNEL); + state_count++; /* Add WFI state too */ + psci_states = kcalloc(state_count, sizeof(*psci_states), GFP_KERNEL); if (!psci_states) return -ENOMEM; - for (i = 1; i < count; i++) { + for (i = 1; i < state_count; i++) { state_node = of_parse_phandle(cpu_node, "cpu-idle-states", i - 1); + if (!state_node) + break; + ret = psci_dt_parse_state_node(state_node, &psci_states[i]); of_node_put(state_node); @@ -106,6 +100,11 @@ static int __init psci_dt_cpu_init_idle(struct device_node *cpu_node, int cpu) pr_debug("psci-power-state %#x index %d\n", psci_states[i], i); } + if (i != state_count) { + ret = -ENODEV; + goto free_mem; + } + /* Idle states parsed correctly, initialize per-cpu pointer */ per_cpu(psci_power_state, cpu) = psci_states; return 0; @@ -115,7 +114,7 @@ static int __init psci_dt_cpu_init_idle(struct device_node *cpu_node, int cpu) return ret; } -static __init int psci_cpu_init_idle(unsigned int cpu) +static __init int psci_cpu_init_idle(unsigned int cpu, unsigned int state_count) { struct device_node *cpu_node; int ret; @@ -131,7 +130,7 @@ static __init int psci_cpu_init_idle(unsigned int cpu) if (!cpu_node) return -ENODEV; - ret = psci_dt_cpu_init_idle(cpu_node, cpu); + ret = psci_dt_cpu_init_idle(cpu_node, state_count, cpu); of_node_put(cpu_node); @@ -187,7 +186,7 @@ static int __init psci_idle_init_cpu(int cpu) /* * Initialize PSCI idle states. */ - ret = psci_cpu_init_idle(cpu); + ret = psci_cpu_init_idle(cpu, ret); if (ret) { pr_err("CPU %d failed to PSCI idle\n", cpu); goto out_kfree_drv; From patchwork Tue Oct 29 16:44:32 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ulf Hansson X-Patchwork-Id: 178038 Delivered-To: patches@linaro.org Received: by 2002:a92:409a:0:0:0:0:0 with SMTP id d26csp51923ill; Tue, 29 Oct 2019 09:44:55 -0700 (PDT) X-Received: by 2002:a19:9116:: with SMTP id t22mr1486415lfd.99.1572367495762; Tue, 29 Oct 2019 09:44:55 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1572367495; cv=none; d=google.com; s=arc-20160816; b=yfiTdSHtIAVKQDOEHaxZRp4JFCoANM2yDmLrWDSWOGwhmcacsmvDOZR0BAd9OPraba qMaoiRM09EXsyfV8pZzI9XsD/klytYabfscGg0DQNqyauFkdMJGIEqYkiGV+MI5xkOLO RFD//oNpuVT2fqrcSc9bkL2tvWpbGNMLWRWUf6IljQ3goNkktpD2mMrwI8AjwoWlD/W1 rh4XBGkBfgtqHith6K2+xrkgpoDIVwU10NqHyBQeQfUsbk4CNatGbFuKM8yMYK8Igm42 sQV3Wds8Cj/H95BRHaST0Z8L7jFOMlVOoL29keNsvdo4iSmQQDbw5f44VjYBrgEyZFCr COxw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=s+efRcFDZJGrl94RZ1Pp04/eQynZO0t/87C0fALcC2Y=; b=pK9YqpVGGfeye4IgXNswEpPQcImu0AAOhDnHMfIuXflCfkYo29o6LUVZFQXM4F3TyY P9ksrVXlyUOfc6qAkIhcdOlcUBxyQ0VIvGYgShixLbPgyjkW2h2P6Lr/RO27D9nRDv26 miCx4UeqMuYsyiNcXbK87gWDmmtnAntirQuvgPohlOdafd453++y4+93JSwL3vXxi9nl VZatZ2GURwqswj3m08yJgjIFbMkffdMSe6LOXoJbhP9Nv/y7+NJOPbDnnBjcVJ/QZsGQ l5KhHwTxDv6FJd42LR73fC0DlfZav6ndfYvAGJwoA0zXryzHnT4sz6Ten2xvTvYqcY6a mKOw== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=DcR31P7Q; spf=pass (google.com: domain of ulf.hansson@linaro.org designates 209.85.220.65 as permitted sender) smtp.mailfrom=ulf.hansson@linaro.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from mail-sor-f65.google.com (mail-sor-f65.google.com. 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[158.174.22.210]) by smtp.gmail.com with ESMTPSA id f28sm2048161lfh.35.2019.10.29.09.44.54 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 29 Oct 2019 09:44:54 -0700 (PDT) From: Ulf Hansson To: "Rafael J . Wysocki" , Daniel Lezcano , Sudeep Holla , Lorenzo Pieralisi , Mark Rutland , Lina Iyer , linux-pm@vger.kernel.org Cc: Rob Herring , Vincent Guittot , Stephen Boyd , Andy Gross , Bjorn Andersson , Kevin Hilman , Ulf Hansson , linux-arm-kernel@lists.infradead.org, linux-arm-msm@vger.kernel.org Subject: [PATCH v2 07/13] cpuidle: psci: Support hierarchical CPU idle states Date: Tue, 29 Oct 2019 17:44:32 +0100 Message-Id: <20191029164438.17012-8-ulf.hansson@linaro.org> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20191029164438.17012-1-ulf.hansson@linaro.org> References: <20191029164438.17012-1-ulf.hansson@linaro.org> Currently CPU's idle states are represented using the flattened model. Let's add support for the hierarchical layout, via converting to use of_get_cpu_state_node(). Signed-off-by: Ulf Hansson Reviewed-by: Sudeep Holla --- Changes in v2: - Added tags. --- drivers/cpuidle/cpuidle-psci.c | 3 +-- 1 file changed, 1 insertion(+), 2 deletions(-) -- 2.17.1 diff --git a/drivers/cpuidle/cpuidle-psci.c b/drivers/cpuidle/cpuidle-psci.c index 761359be50f2..830995b8a56f 100644 --- a/drivers/cpuidle/cpuidle-psci.c +++ b/drivers/cpuidle/cpuidle-psci.c @@ -86,8 +86,7 @@ static int __init psci_dt_cpu_init_idle(struct device_node *cpu_node, return -ENOMEM; for (i = 1; i < state_count; i++) { - state_node = of_parse_phandle(cpu_node, "cpu-idle-states", - i - 1); + state_node = of_get_cpu_state_node(cpu_node, i - 1); if (!state_node) break; From patchwork Tue Oct 29 16:44:33 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ulf Hansson X-Patchwork-Id: 178039 Delivered-To: patches@linaro.org Received: by 2002:a92:409a:0:0:0:0:0 with SMTP id d26csp51951ill; Tue, 29 Oct 2019 09:44:57 -0700 (PDT) X-Received: by 2002:a19:c192:: with SMTP id r140mr3158410lff.48.1572367497349; Tue, 29 Oct 2019 09:44:57 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1572367497; cv=none; d=google.com; s=arc-20160816; b=bdvgkwx2ZHh7z5pNH7uM408xpgeaVkxdMttDU46Ts8Vli6f/WtXB5XQFQMqt6Yn0Nl RBrjJwNCOPMjdg5PVHoCEpNwrNdVRg9I1D5o+eLI2GsBV4Vh4zw3vxJ+vm3ysSKncjb9 nfTyPsk0K8ldlM5inHvD36uwvJiyT8sNsSvZkZ4vHFmIFD/bXAHZ8/e33Iz5Z2PxHWJN vDrlvBrwcZUw3aD4nDv6BrP0Swsarys4bMPkpK+OTYdVCsKQbIj/UW0sOByscmwum9Qg 1Tj/jVpuKnzadAZHYnoVmbPXFiEyet/KKEI8IVV7pRPrJKp4aQAPCZiJ8W3uD6rGaq3k VbwQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=gp0cxGjsLa/5p2k8fB9GEAU+2hCtpg307yRdN/E/Ges=; b=Uz8xK7sJ3h/XG7XEbG7OypiM3Hocmmh/znxtu2owV9jYMtL/FLDPRMeBSrFHN2hr2f Xq/rt094+zZBLtQt5mtMZmuLi1KYe/eMDX7imLvVpr00S3iG4UUJfHLQNCZX5ufAfa5/ aoKQESHhbLh/BnKKEpPRK3ErpWhb2XoRHmtAU30g3VC49rsg4HaZozfteDdnaBh5to7o pMZJEYKct1/NorhwwOygjTTJe0ozM5R2Huu3iD2TSlJrloHtZHnaz7hw6SR1wO8fXRHS ITu8EmuZLIRJ+y0Tx1+3Z5+AG3lWtaTghsoisz24sqhtjWZW1LVuuvkRdMrWCQpfvoGj J0iQ== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=kloNjm7Q; spf=pass (google.com: domain of ulf.hansson@linaro.org designates 209.85.220.65 as permitted sender) smtp.mailfrom=ulf.hansson@linaro.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from mail-sor-f65.google.com (mail-sor-f65.google.com. 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[158.174.22.210]) by smtp.gmail.com with ESMTPSA id f28sm2048161lfh.35.2019.10.29.09.44.55 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 29 Oct 2019 09:44:56 -0700 (PDT) From: Ulf Hansson To: "Rafael J . Wysocki" , Daniel Lezcano , Sudeep Holla , Lorenzo Pieralisi , Mark Rutland , Lina Iyer , linux-pm@vger.kernel.org Cc: Rob Herring , Vincent Guittot , Stephen Boyd , Andy Gross , Bjorn Andersson , Kevin Hilman , Ulf Hansson , linux-arm-kernel@lists.infradead.org, linux-arm-msm@vger.kernel.org Subject: [PATCH v2 08/13] cpuidle: psci: Add a helper to attach a CPU to its PM domain Date: Tue, 29 Oct 2019 17:44:33 +0100 Message-Id: <20191029164438.17012-9-ulf.hansson@linaro.org> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20191029164438.17012-1-ulf.hansson@linaro.org> References: <20191029164438.17012-1-ulf.hansson@linaro.org> Introduce a PSCI DT helper function, psci_dt_attach_cpu(), which takes a CPU number as an in-parameter and tries to attach the CPU's struct device to its corresponding PM domain. Let's makes use of dev_pm_domain_attach_by_name(), as it allows us to specify "psci" as the "name" of the PM domain to attach to. Additionally, let's also prepare the attached device to be power managed via runtime PM. Note that, the implementation of the new helper function is in a new separate c-file, which may seems a bit too much at this point. However, subsequent changes that implements the remaining part of the PM domain support for cpuidle-psci, helps to justify this split. Signed-off-by: Ulf Hansson --- Changes in v2: - Reorder patch to be the first one that starts adding the PM domain support. - Rebased. --- drivers/cpuidle/Makefile | 4 ++- drivers/cpuidle/cpuidle-psci-domain.c | 36 +++++++++++++++++++++++++++ drivers/cpuidle/cpuidle-psci.h | 12 +++++++++ 3 files changed, 51 insertions(+), 1 deletion(-) create mode 100644 drivers/cpuidle/cpuidle-psci-domain.c create mode 100644 drivers/cpuidle/cpuidle-psci.h -- 2.17.1 diff --git a/drivers/cpuidle/Makefile b/drivers/cpuidle/Makefile index ee70d5cc5b99..cc8c769d7fa9 100644 --- a/drivers/cpuidle/Makefile +++ b/drivers/cpuidle/Makefile @@ -21,7 +21,9 @@ obj-$(CONFIG_ARM_U8500_CPUIDLE) += cpuidle-ux500.o obj-$(CONFIG_ARM_AT91_CPUIDLE) += cpuidle-at91.o obj-$(CONFIG_ARM_EXYNOS_CPUIDLE) += cpuidle-exynos.o obj-$(CONFIG_ARM_CPUIDLE) += cpuidle-arm.o -obj-$(CONFIG_ARM_PSCI_CPUIDLE) += cpuidle-psci.o +obj-$(CONFIG_ARM_PSCI_CPUIDLE) += cpuidle_psci.o +cpuidle_psci-y := cpuidle-psci.o +cpuidle_psci-$(CONFIG_PM_GENERIC_DOMAINS_OF) += cpuidle-psci-domain.o ############################################################################### # MIPS drivers diff --git a/drivers/cpuidle/cpuidle-psci-domain.c b/drivers/cpuidle/cpuidle-psci-domain.c new file mode 100644 index 000000000000..bc7df4dc0686 --- /dev/null +++ b/drivers/cpuidle/cpuidle-psci-domain.c @@ -0,0 +1,36 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * PM domains for CPUs via genpd - managed by cpuidle-psci. + * + * Copyright (C) 2019 Linaro Ltd. + * Author: Ulf Hansson + * + */ + +#include +#include +#include +#include +#include +#include + +#include "cpuidle-psci.h" + +struct device *psci_dt_attach_cpu(int cpu) +{ + struct device *dev; + + /* Currently limit the hierarchical topology to be used in OSI mode. */ + if (!psci_has_osi_support()) + return NULL; + + dev = dev_pm_domain_attach_by_name(get_cpu_device(cpu), "psci"); + if (IS_ERR_OR_NULL(dev)) + return dev; + + pm_runtime_irq_safe(dev); + if (cpu_online(cpu)) + pm_runtime_get_sync(dev); + + return dev; +} diff --git a/drivers/cpuidle/cpuidle-psci.h b/drivers/cpuidle/cpuidle-psci.h new file mode 100644 index 000000000000..0cadbb71dc55 --- /dev/null +++ b/drivers/cpuidle/cpuidle-psci.h @@ -0,0 +1,12 @@ +/* SPDX-License-Identifier: GPL-2.0 */ + +#ifndef __CPUIDLE_PSCI_H +#define __CPUIDLE_PSCI_H + +#ifdef CONFIG_PM_GENERIC_DOMAINS_OF +struct device *psci_dt_attach_cpu(int cpu); +#else +static inline struct device *psci_dt_attach_cpu(int cpu) { return NULL; } +#endif + +#endif /* __CPUIDLE_PSCI_H */ From patchwork Tue Oct 29 16:44:34 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ulf Hansson X-Patchwork-Id: 178040 Delivered-To: patches@linaro.org Received: by 2002:a92:409a:0:0:0:0:0 with SMTP id d26csp51992ill; Tue, 29 Oct 2019 09:44:59 -0700 (PDT) X-Received: by 2002:a05:651c:8b:: with SMTP id 11mr3310683ljq.98.1572367499000; Tue, 29 Oct 2019 09:44:59 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1572367498; cv=none; d=google.com; s=arc-20160816; b=QIHaSjRixj5MwTeDNWCMF8ZjlQ19wauzQuLOM3cO4m0knwmTLMDgv2kgbYxDdYaGxS qWXBi253VywWUadGlfXWPDUncU70NxoFK3ZBx+Lvj5oB0UqHDfNuc0msoBC33RFZlEpu A7IrTWREgzQaY5rzRoyDnIiYasR72H5vsdfFntzxbUooTnnMoH2hRpMfMU9jgkxrfVGw H3xNx3T25Vyf/Xdty/JUToyvuIFxVbn/1Y815/MVc0JHjjVyhJzmyZxkFKy6mbWXbWTI ASTbimICF/YLwgFnX2WU4uRLIi9hd5Y6O7SfhFcsP9RcufFbeN9KgefJLf1aJAn9d+Da wqrg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=vOTQa6UzVCEIiTs5syxBeghS5mOeakZSLZW0GE/rgZA=; b=jiZL/oonrGuhEAQIgEBa7wnChRErL85tPd89Oy1fC8ksyFTEPVMQuBfYn/YjZ5m98F sHueLEvz0YqzqOBP1amuPLxcRhYhpyAk/85PLdF9bKrGzqnwTDa0+gxpxLdoo+4PknB+ 1F7CvdNW6zw2W/dbff8u589oRr1Lj9AdTEzjMXkey5/T199SsD2tlCyo5JB9ZE6ke3IR 2SAxVKiEqAfpVxf07/03EiscLd/ueVLlJLDLMPatqu9l7lMRDpLYAzouFKAy5W9bm+67 /BgPNsALQ/iui06xlJyqh6DIx0c+N0rqBxT/NR2YAYAaBQz6vUWAAoVKhjQ9GxMFuLI5 /tZA== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=z8D6HMBX; spf=pass (google.com: domain of ulf.hansson@linaro.org designates 209.85.220.65 as permitted sender) smtp.mailfrom=ulf.hansson@linaro.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from mail-sor-f65.google.com (mail-sor-f65.google.com. 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[158.174.22.210]) by smtp.gmail.com with ESMTPSA id f28sm2048161lfh.35.2019.10.29.09.44.57 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 29 Oct 2019 09:44:57 -0700 (PDT) From: Ulf Hansson To: "Rafael J . Wysocki" , Daniel Lezcano , Sudeep Holla , Lorenzo Pieralisi , Mark Rutland , Lina Iyer , linux-pm@vger.kernel.org Cc: Rob Herring , Vincent Guittot , Stephen Boyd , Andy Gross , Bjorn Andersson , Kevin Hilman , Ulf Hansson , linux-arm-kernel@lists.infradead.org, linux-arm-msm@vger.kernel.org Subject: [PATCH v2 09/13] cpuidle: psci: Attach CPU devices to their PM domains Date: Tue, 29 Oct 2019 17:44:34 +0100 Message-Id: <20191029164438.17012-10-ulf.hansson@linaro.org> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20191029164438.17012-1-ulf.hansson@linaro.org> References: <20191029164438.17012-1-ulf.hansson@linaro.org> In order to enable a CPU to be power managed through its PM domain, let's try to attach it by calling psci_dt_attach_cpu() during the cpuidle initialization. psci_dt_attach_cpu() returns a pointer to the attached struct device, which later should be used for runtime PM, hence we need to store it somewhere. Rather than adding yet another per CPU variable, let's create a per CPU struct to collect the relevant per CPU variables. Signed-off-by: Ulf Hansson --- Changes in v2: - Rebased. --- drivers/cpuidle/cpuidle-psci.c | 24 ++++++++++++++++++++---- 1 file changed, 20 insertions(+), 4 deletions(-) -- 2.17.1 diff --git a/drivers/cpuidle/cpuidle-psci.c b/drivers/cpuidle/cpuidle-psci.c index 830995b8a56f..167249d0493f 100644 --- a/drivers/cpuidle/cpuidle-psci.c +++ b/drivers/cpuidle/cpuidle-psci.c @@ -20,14 +20,20 @@ #include +#include "cpuidle-psci.h" #include "dt_idle_states.h" -static DEFINE_PER_CPU_READ_MOSTLY(u32 *, psci_power_state); +struct psci_cpuidle_data { + u32 *psci_states; + struct device *dev; +}; + +static DEFINE_PER_CPU_READ_MOSTLY(struct psci_cpuidle_data, psci_cpuidle_data); static int psci_enter_idle_state(struct cpuidle_device *dev, struct cpuidle_driver *drv, int idx) { - u32 *state = __this_cpu_read(psci_power_state); + u32 *state = __this_cpu_read(psci_cpuidle_data.psci_states); return CPU_PM_CPU_IDLE_ENTER_PARAM(psci_cpu_suspend_enter, idx, state[idx]); @@ -78,7 +84,9 @@ static int __init psci_dt_cpu_init_idle(struct device_node *cpu_node, { int i, ret = 0; u32 *psci_states; + struct device *dev; struct device_node *state_node; + struct psci_cpuidle_data *data = per_cpu_ptr(&psci_cpuidle_data, cpu); state_count++; /* Add WFI state too */ psci_states = kcalloc(state_count, sizeof(*psci_states), GFP_KERNEL); @@ -104,8 +112,16 @@ static int __init psci_dt_cpu_init_idle(struct device_node *cpu_node, goto free_mem; } - /* Idle states parsed correctly, initialize per-cpu pointer */ - per_cpu(psci_power_state, cpu) = psci_states; + dev = psci_dt_attach_cpu(cpu); + if (IS_ERR(dev)) { + ret = PTR_ERR(dev); + goto free_mem; + } + + data->dev = dev; + + /* Idle states parsed correctly, store them in the per-cpu struct. */ + data->psci_states = psci_states; return 0; free_mem: From patchwork Tue Oct 29 16:44:35 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ulf Hansson X-Patchwork-Id: 178041 Delivered-To: patches@linaro.org Received: by 2002:a92:409a:0:0:0:0:0 with SMTP id d26csp52016ill; Tue, 29 Oct 2019 09:45:00 -0700 (PDT) X-Received: by 2002:a2e:80c1:: with SMTP id r1mr3359863ljg.195.1572367500598; Tue, 29 Oct 2019 09:45:00 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1572367500; cv=none; d=google.com; s=arc-20160816; b=scnX5+DVzzPe7qSC8lygn/A5ukzDR4pVnhn1l5N1GVXRNFw/UEeVz8k6q/rkPEgRnc ec/6o/kxdTqOQvnSBiiSY6Mw8vLljWDt9sr5k35/yrdRgo2q8VAtpR/wK3+x8DMGQyMP +qcWU9xHr8COKVS8P+5sr+92jI3Ez5r3CeTxQNSfqbzGL3SH0L+490hLNc3DDUiNa1iF 0EmDqPj2IZAQ4+f4lr13KU8BgatvpnHBrJLAyGPag1mXdJHh5iDVGZH95k/LXO5R6I+7 LnHAWbL5y0vhvvlXaNLNv/EUpITq8b+YqXt+ynDy/H59nH9KHYihIjo2fPf6rpBGbdzO uyGQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=rmTg5S9BzhED65UVWftQq6ljq1LQZhA0EBbzU9hhqeQ=; b=WvBAHkYiDVyqQOIo+51LF39L+h0efR+drF6tpJPiz2Nxz77rXbdwrbsrFaXNg/Bvpl rhWCsFhQTcRFFZAp1jUB32U6kcROwIyNxdRTmOt1FbV/Ga1/Typ3KCAA+h8ClApZ5mVh 6S4s0Z+PdeeNEd94sCzIeFDg35BgqO4jTiReHUmED72VU7Ctn588jVddF8A0wapCZ++N wQMMZiYeSU03MRhLMR+2xiERhKAZa+5KJ1TUmncH4Ygq1vgIs7aq0K6z1ckN+8WeTdW9 L3pkEIb4vy6RYoj++dpsCJbF+VK9bTgj1sEsqzQtF2/+JaaNY0+DqnofiSXMS0lGfZxB +n0g== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=aqzEO0G1; spf=pass (google.com: domain of ulf.hansson@linaro.org designates 209.85.220.65 as permitted sender) smtp.mailfrom=ulf.hansson@linaro.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from mail-sor-f65.google.com (mail-sor-f65.google.com. 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[158.174.22.210]) by smtp.gmail.com with ESMTPSA id f28sm2048161lfh.35.2019.10.29.09.44.58 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 29 Oct 2019 09:44:59 -0700 (PDT) From: Ulf Hansson To: "Rafael J . Wysocki" , Daniel Lezcano , Sudeep Holla , Lorenzo Pieralisi , Mark Rutland , Lina Iyer , linux-pm@vger.kernel.org Cc: Rob Herring , Vincent Guittot , Stephen Boyd , Andy Gross , Bjorn Andersson , Kevin Hilman , Ulf Hansson , linux-arm-kernel@lists.infradead.org, linux-arm-msm@vger.kernel.org, Lina Iyer Subject: [PATCH v2 10/13] cpuidle: psci: Prepare to use OS initiated suspend mode via PM domains Date: Tue, 29 Oct 2019 17:44:35 +0100 Message-Id: <20191029164438.17012-11-ulf.hansson@linaro.org> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20191029164438.17012-1-ulf.hansson@linaro.org> References: <20191029164438.17012-1-ulf.hansson@linaro.org> The per CPU variable psci_power_state, contains an array of fixed values, which reflects the corresponding arm,psci-suspend-param parsed from DT, for each of the available CPU idle states. This isn't sufficient when using the hierarchical CPU topology in DT, in combination with having PSCI OS initiated (OSI) mode enabled. More precisely, in OSI mode, Linux is responsible of telling the PSCI FW what idle state the cluster (a group of CPUs) should enter, while in PSCI Platform Coordinated (PC) mode, each CPU independently votes for an idle state of the cluster. For this reason, introduce a per CPU variable called domain_state and implement two helper functions to read/write its value. Then let the domain_state take precedence over the regular selected state, when entering and idle state. Finally, let's also avoid sprinkling the existing non-OSI path with operations being specific for OSI. Co-developed-by: Lina Iyer Signed-off-by: Lina Iyer Signed-off-by: Ulf Hansson --- Changes in v2: - Rebased. --- drivers/cpuidle/cpuidle-psci.c | 47 +++++++++++++++++++++++++++++++--- 1 file changed, 44 insertions(+), 3 deletions(-) -- 2.17.1 diff --git a/drivers/cpuidle/cpuidle-psci.c b/drivers/cpuidle/cpuidle-psci.c index 167249d0493f..4b0183d010e0 100644 --- a/drivers/cpuidle/cpuidle-psci.c +++ b/drivers/cpuidle/cpuidle-psci.c @@ -29,14 +29,55 @@ struct psci_cpuidle_data { }; static DEFINE_PER_CPU_READ_MOSTLY(struct psci_cpuidle_data, psci_cpuidle_data); +static DEFINE_PER_CPU(u32, domain_state); + +static inline void psci_set_domain_state(u32 state) +{ + __this_cpu_write(domain_state, state); +} + +static inline u32 psci_get_domain_state(void) +{ + return __this_cpu_read(domain_state); +} + +static inline int _psci_enter_state(int idx, u32 state) +{ + return CPU_PM_CPU_IDLE_ENTER_PARAM(psci_cpu_suspend_enter, idx, state); +} + +static int psci_enter_domain_state(int idx, struct psci_cpuidle_data *data) +{ + int ret; + u32 *states = data->psci_states; + u32 state = psci_get_domain_state(); + + if (!state) + state = states[idx]; + + ret = _psci_enter_state(idx, state); + + /* Clear the domain state to start fresh when back from idle. */ + psci_set_domain_state(0); + return ret; +} + +static int psci_enter_state(int idx, struct psci_cpuidle_data *data) +{ + u32 *states = data->psci_states; + + return _psci_enter_state(idx, states[idx]); +} static int psci_enter_idle_state(struct cpuidle_device *dev, struct cpuidle_driver *drv, int idx) { - u32 *state = __this_cpu_read(psci_cpuidle_data.psci_states); + struct psci_cpuidle_data *data = this_cpu_ptr(&psci_cpuidle_data); + + if (!data->dev) + return psci_enter_state(idx, data); - return CPU_PM_CPU_IDLE_ENTER_PARAM(psci_cpu_suspend_enter, - idx, state[idx]); + return psci_enter_domain_state(idx, data); } static struct cpuidle_driver psci_idle_driver __initdata = { From patchwork Tue Oct 29 16:44:36 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ulf Hansson X-Patchwork-Id: 178044 Delivered-To: patch@linaro.org Received: by 2002:a92:409a:0:0:0:0:0 with SMTP id d26csp54033ill; Tue, 29 Oct 2019 09:46:46 -0700 (PDT) X-Google-Smtp-Source: APXvYqyYiJcKLYjzL4N8tQzEFQHMBwezLv3uhZZKzrtd5k3aU1oi8RdiUORLv8uf/Hn5Iw1gGrrn X-Received: by 2002:a05:6402:13c5:: with SMTP id a5mr26410309edx.106.1572367504528; Tue, 29 Oct 2019 09:45:04 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1572367504; cv=none; d=google.com; s=arc-20160816; b=mhN+D1YcuNgiZ07F8h0S+xX+ebrw9+E7aRRt5vbmP1gvrChZpWP4dweg6Gj7r1gW5x LNMgDvBJYAKxd5yq4iy5WEv86nf4qrTfBbsjXMmuRakd1miROx5WWoYk6OXbj02voLXK lp/d9QrXwq0nue+caK5q3UykiTA6A1G6JrvLdSejj0bAPCGfL8h7hKlQDluI0dCowZcr gYiHqNi/C9inV2tytNuqxrNrk4+aJb8n7k4SDFMENO9H/T01RXZcrAW+WB1a7kQv/eSz LFWDTQNgp4tYc2JQzmLKylaB3tj5cUjsmFeAH2EX2MykplIq2ZfTrdKag4hQL4T6Y1YG +DYQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:references:in-reply-to:message-id:date :subject:cc:to:from:dkim-signature; bh=oPeghc6WqG1iFH3/ouy3iONyWp9Iyx8uFEd3HgEFhLk=; b=iLV9oQOWUBwWPGSWtCOc87p9jHOjH/KhNnGFuZQEjV9tB/nPSyTTbEehQ2FicP0ab9 zt7926ZwCroXV+q7rmbW0fLpBLTJ4XRo1dEXKDfhFLQSdEWVpsBjFb3MNXP2HLBpNegH OVZc9ypRH7COMqUXx1CqQ777ix9c9VA3tpjZeItLdTBck2JOpI2i8k9Yo7WKw1x+hWso KXfjDooAgWBZHZAu7mgrYjy/U5FVMCpAK65tdiODHlPD7g7YH3rBJJfB3VcCRTYTqRLL EZvoR7U762X0i/WhXbycI7+YD+wgtzhDhk0rUGi02214KhjowTCpn8o7iQI8KE0UkNTd Fg7g== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=wrOFgiwt; spf=pass (google.com: best guess record for domain of linux-pm-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-pm-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. 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[158.174.22.210]) by smtp.gmail.com with ESMTPSA id f28sm2048161lfh.35.2019.10.29.09.45.00 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 29 Oct 2019 09:45:01 -0700 (PDT) From: Ulf Hansson To: "Rafael J . Wysocki" , Daniel Lezcano , Sudeep Holla , Lorenzo Pieralisi , Mark Rutland , Lina Iyer , linux-pm@vger.kernel.org Cc: Rob Herring , Vincent Guittot , Stephen Boyd , Andy Gross , Bjorn Andersson , Kevin Hilman , Ulf Hansson , linux-arm-kernel@lists.infradead.org, linux-arm-msm@vger.kernel.org Subject: [PATCH v2 11/13] cpuidle: psci: Manage runtime PM in the idle path Date: Tue, 29 Oct 2019 17:44:36 +0100 Message-Id: <20191029164438.17012-12-ulf.hansson@linaro.org> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20191029164438.17012-1-ulf.hansson@linaro.org> References: <20191029164438.17012-1-ulf.hansson@linaro.org> Sender: linux-pm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-pm@vger.kernel.org In case we have succeeded to attach a CPU to its PM domain, let's deploy runtime PM support for the corresponding attached device, to allow the CPU to be powered-managed accordingly. To set the triggering point for when runtime PM reference counting should be done, let's store the index of deepest idle state for the CPU in the per CPU struct. Then use this index to compare the selected idle state index when entering idle, as to understand whether runtime PM reference counting is needed or not. Note that, from the hierarchical point view, there may be good reasons to do runtime PM reference counting even on shallower idle states, but at this point this isn't supported, mainly due to limitations set by the generic PM domain. Signed-off-by: Ulf Hansson --- Changes in v2: - Rebased. --- drivers/cpuidle/cpuidle-psci.c | 18 +++++++++++++++++- 1 file changed, 17 insertions(+), 1 deletion(-) -- 2.17.1 diff --git a/drivers/cpuidle/cpuidle-psci.c b/drivers/cpuidle/cpuidle-psci.c index 4b0183d010e0..937a8e450251 100644 --- a/drivers/cpuidle/cpuidle-psci.c +++ b/drivers/cpuidle/cpuidle-psci.c @@ -16,6 +16,7 @@ #include #include #include +#include #include #include @@ -25,6 +26,7 @@ struct psci_cpuidle_data { u32 *psci_states; + u32 rpm_state_id; struct device *dev; }; @@ -50,13 +52,26 @@ static int psci_enter_domain_state(int idx, struct psci_cpuidle_data *data) { int ret; u32 *states = data->psci_states; - u32 state = psci_get_domain_state(); + struct device *pd_dev = data->dev; + bool runtime_pm = (pd_dev && data->rpm_state_id == idx); + u32 state; + /* + * Do runtime PM if we are using the hierarchical CPU toplogy, but only + * when cpuidle have selected the deepest idle state for the CPU. + */ + if (runtime_pm) + pm_runtime_put_sync_suspend(pd_dev); + + state = psci_get_domain_state(); if (!state) state = states[idx]; ret = _psci_enter_state(idx, state); + if (runtime_pm) + pm_runtime_get_sync(pd_dev); + /* Clear the domain state to start fresh when back from idle. */ psci_set_domain_state(0); return ret; @@ -160,6 +175,7 @@ static int __init psci_dt_cpu_init_idle(struct device_node *cpu_node, } data->dev = dev; + data->rpm_state_id = state_count - 1; /* Idle states parsed correctly, store them in the per-cpu struct. */ data->psci_states = psci_states; From patchwork Tue Oct 29 16:44:37 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ulf Hansson X-Patchwork-Id: 178042 Delivered-To: patch@linaro.org Received: by 2002:a92:409a:0:0:0:0:0 with SMTP id d26csp52144ill; Tue, 29 Oct 2019 09:45:07 -0700 (PDT) X-Google-Smtp-Source: APXvYqxNgpCklVqRbm6uw+tYBEzOnDdBHLNbQDeSaGndCLraBrzu+sXaB3lNxQ5d34dEmuq8AsPu X-Received: by 2002:a50:8a90:: with SMTP id j16mr27513873edj.283.1572367507097; Tue, 29 Oct 2019 09:45:07 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1572367507; cv=none; d=google.com; s=arc-20160816; b=dO098HQzQrc45ym5KiaNkdvIwin94CdOFsUJF2C90FlmgJkpvpL2cIZ+qNT7A1u7I6 MhYPxrFPyezE02vRV3DJtbNqleMdaM7Z5Saw00QA+3Fw9HAsKzRm8yJX+qKxnEanN43h 41KOOiC4QspmSUgLlp6zGE+7WWJDu8dpBUWcIIFYUVK1H4iqaU0OIpWnnThqV/l4l7rt eqAl3GLUiowRJIh0Z2NK3d4RqLfQXQnzIpAUFRFNHnyACQtgtv2IGzgOM9CLkSu4u+T+ +K30YRthjTDQ9/u4rgz3ptfJzOo7lOp7qhn42uYm/qt/h8z+F/u7l3boYlRmPnT0u0qh EvWw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:references:in-reply-to:message-id:date :subject:cc:to:from:dkim-signature; bh=hmVZbRVz8KfqipbRYtbANumh10v6tAjJaji0EHXGY84=; b=iH3UvGrlG+Qu2G/VRjlEVpSSClFh9gGPthMlrMTFFazbPyvoC4fT2pF3MyYHRrsXJE clzpEfxmAlV/ZvMCCKrW63sk4+j/Zwp/FF4+wZC6Fs84CdTKmL/bmcVJKgW3k55B6OcD v27+cWde9NTrTUsYD9zy5HFxYVuM5rOlwLRjvDz+NNu3Z7kVcJoDpPxM7CkwrkfgG07/ 8ZU1ifFyZC0xSyjKkXiAj8VxJbMAcpyUbJltE9b/n3ANsdyloVDpbgaVlT2CL+uqE1py G+IhMsXlp13K8uSFL/2s8pZ/BMWC6CW7gggc1kLzananiK/WKyljNxxEf5HN7IAtycOi qdtA== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b="HznpTk/v"; spf=pass (google.com: best guess record for domain of linux-pm-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-pm-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. 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[158.174.22.210]) by smtp.gmail.com with ESMTPSA id f28sm2048161lfh.35.2019.10.29.09.45.01 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 29 Oct 2019 09:45:02 -0700 (PDT) From: Ulf Hansson To: "Rafael J . Wysocki" , Daniel Lezcano , Sudeep Holla , Lorenzo Pieralisi , Mark Rutland , Lina Iyer , linux-pm@vger.kernel.org Cc: Rob Herring , Vincent Guittot , Stephen Boyd , Andy Gross , Bjorn Andersson , Kevin Hilman , Ulf Hansson , linux-arm-kernel@lists.infradead.org, linux-arm-msm@vger.kernel.org, Lina Iyer Subject: [PATCH v2 12/13] cpuidle: psci: Add support for PM domains by using genpd Date: Tue, 29 Oct 2019 17:44:37 +0100 Message-Id: <20191029164438.17012-13-ulf.hansson@linaro.org> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20191029164438.17012-1-ulf.hansson@linaro.org> References: <20191029164438.17012-1-ulf.hansson@linaro.org> Sender: linux-pm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-pm@vger.kernel.org When the hierarchical CPU topology layout is used in DT and the PSCI OSI mode is supported by the PSCI FW, let's initialize a corresponding PM domain topology by using genpd. This enables a CPU and a group of CPUs, when attached to the topology, to be power-managed accordingly. To trigger the attempt to initialize the genpd data structures let's use a subsys_initcall, which should be early enough to allow CPUs, but also other devices to be attached. The initialization consists of parsing the PSCI OF node for the topology and the "domain idle states" DT bindings. In case the idle states are compatible with "domain-idle-state", the initialized genpd becomes responsible of selecting an idle state for the PM domain, via assigning it a genpd governor. Note that, a successful initialization of the genpd data structures, is followed by a call to psci_set_osi_mode(), as to try to enable the OSI mode in the PSCI FW. In case this fails, we fall back into a degraded mode rather than bailing out and returning an error code. Co-developed-by: Lina Iyer Signed-off-by: Lina Iyer Signed-off-by: Ulf Hansson --- Changes in v2: - Rebased. --- drivers/cpuidle/cpuidle-psci-domain.c | 266 ++++++++++++++++++++++++++ drivers/cpuidle/cpuidle-psci.c | 4 +- drivers/cpuidle/cpuidle-psci.h | 5 + 3 files changed, 273 insertions(+), 2 deletions(-) -- 2.17.1 diff --git a/drivers/cpuidle/cpuidle-psci-domain.c b/drivers/cpuidle/cpuidle-psci-domain.c index bc7df4dc0686..7429fd7626a1 100644 --- a/drivers/cpuidle/cpuidle-psci-domain.c +++ b/drivers/cpuidle/cpuidle-psci-domain.c @@ -7,15 +7,281 @@ * */ +#define pr_fmt(fmt) "CPUidle PSCI: " fmt + #include #include #include #include #include #include +#include +#include #include "cpuidle-psci.h" +struct psci_pd_provider { + struct list_head link; + struct device_node *node; +}; + +static LIST_HEAD(psci_pd_providers); +static bool osi_mode_enabled; + +static int psci_pd_power_off(struct generic_pm_domain *pd) +{ + struct genpd_power_state *state = &pd->states[pd->state_idx]; + u32 *pd_state; + + /* If we have failed to enable OSI mode, then abort power off. */ + if (!osi_mode_enabled) + return -EBUSY; + + if (!state->data) + return 0; + + /* OSI mode is enabled, set the corresponding domain state. */ + pd_state = state->data; + psci_set_domain_state(*pd_state); + + return 0; +} + +static int __init psci_pd_parse_state_nodes(struct genpd_power_state *states, + int state_count) +{ + int i, ret; + u32 psci_state, *psci_state_buf; + + for (i = 0; i < state_count; i++) { + ret = psci_dt_parse_state_node(to_of_node(states[i].fwnode), + &psci_state); + if (ret) + goto free_state; + + psci_state_buf = kmalloc(sizeof(u32), GFP_KERNEL); + if (!psci_state_buf) { + ret = -ENOMEM; + goto free_state; + } + *psci_state_buf = psci_state; + states[i].data = psci_state_buf; + } + + return 0; + +free_state: + i--; + for (; i >= 0; i--) + kfree(states[i].data); + return ret; +} + +static int __init psci_pd_parse_states(struct device_node *np, + struct genpd_power_state **states, int *state_count) +{ + int ret; + + /* Parse the domain idle states. */ + ret = of_genpd_parse_idle_states(np, states, state_count); + if (ret) + return ret; + + /* Fill out the PSCI specifics for each found state. */ + ret = psci_pd_parse_state_nodes(*states, *state_count); + if (ret) + kfree(*states); + + return ret; +} + +static void psci_pd_free_states(struct genpd_power_state *states, + unsigned int state_count) +{ + int i; + + for (i = 0; i < state_count; i++) + kfree(states[i].data); + kfree(states); +} + +static int __init psci_pd_init(struct device_node *np) +{ + struct generic_pm_domain *pd; + struct psci_pd_provider *pd_provider; + struct dev_power_governor *pd_gov; + struct genpd_power_state *states = NULL; + int ret = -ENOMEM, state_count = 0; + + pd = kzalloc(sizeof(*pd), GFP_KERNEL); + if (!pd) + goto out; + + pd_provider = kzalloc(sizeof(*pd_provider), GFP_KERNEL); + if (!pd_provider) + goto free_pd; + + pd->name = kasprintf(GFP_KERNEL, "%pOF", np); + if (!pd->name) + goto free_pd_prov; + + /* + * Parse the domain idle states and let genpd manage the state selection + * for those being compatible with "domain-idle-state". + */ + ret = psci_pd_parse_states(np, &states, &state_count); + if (ret) + goto free_name; + + pd->free_states = psci_pd_free_states; + pd->name = kbasename(pd->name); + pd->power_off = psci_pd_power_off; + pd->states = states; + pd->state_count = state_count; + pd->flags |= GENPD_FLAG_IRQ_SAFE | GENPD_FLAG_CPU_DOMAIN; + + /* Use governor for CPU PM domains if it has some states to manage. */ + pd_gov = state_count > 0 ? &pm_domain_cpu_gov : NULL; + + ret = pm_genpd_init(pd, pd_gov, false); + if (ret) { + psci_pd_free_states(states, state_count); + goto free_name; + } + + ret = of_genpd_add_provider_simple(np, pd); + if (ret) + goto remove_pd; + + pd_provider->node = of_node_get(np); + list_add(&pd_provider->link, &psci_pd_providers); + + pr_debug("init PM domain %s\n", pd->name); + return 0; + +remove_pd: + pm_genpd_remove(pd); +free_name: + kfree(pd->name); +free_pd_prov: + kfree(pd_provider); +free_pd: + kfree(pd); +out: + pr_err("failed to init PM domain ret=%d %pOF\n", ret, np); + return ret; +} + +static void __init psci_pd_remove(void) +{ + struct psci_pd_provider *pd_provider, *it; + struct generic_pm_domain *genpd; + + list_for_each_entry_safe(pd_provider, it, &psci_pd_providers, link) { + of_genpd_del_provider(pd_provider->node); + + genpd = of_genpd_remove_last(pd_provider->node); + if (!IS_ERR(genpd)) + kfree(genpd); + + of_node_put(pd_provider->node); + list_del(&pd_provider->link); + kfree(pd_provider); + } +} + +static int __init psci_pd_init_topology(struct device_node *np) +{ + struct device_node *node; + struct of_phandle_args child, parent; + int ret; + + for_each_child_of_node(np, node) { + if (of_parse_phandle_with_args(node, "power-domains", + "#power-domain-cells", 0, &parent)) + continue; + + child.np = node; + child.args_count = 0; + + ret = of_genpd_add_subdomain(&parent, &child); + of_node_put(parent.np); + if (ret) { + of_node_put(node); + return ret; + } + } + + return 0; +} + +static const struct of_device_id psci_of_match[] __initconst = { + { .compatible = "arm,psci" }, + { .compatible = "arm,psci-0.2" }, + { .compatible = "arm,psci-1.0" }, + {} +}; + +static int __init psci_idle_init_domains(void) +{ + struct device_node *np = of_find_matching_node(NULL, psci_of_match); + struct device_node *node; + int ret = 0, pd_count = 0; + + if (!np) + return -ENODEV; + + /* Currently limit the hierarchical topology to be used in OSI mode. */ + if (!psci_has_osi_support()) + goto out; + + /* + * Parse child nodes for the "#power-domain-cells" property and + * initialize a genpd/genpd-of-provider pair when it's found. + */ + for_each_child_of_node(np, node) { + if (!of_find_property(node, "#power-domain-cells", NULL)) + continue; + + ret = psci_pd_init(node); + if (ret) + goto put_node; + + pd_count++; + } + + /* Bail out if not using the hierarchical CPU topology. */ + if (!pd_count) + goto out; + + /* Link genpd masters/subdomains to model the CPU topology. */ + ret = psci_pd_init_topology(np); + if (ret) + goto remove_pd; + + /* Try to enable OSI mode. */ + ret = psci_set_osi_mode(); + if (ret) + pr_warn("failed to enable OSI mode: %d\n", ret); + else + osi_mode_enabled = true; + + of_node_put(np); + pr_info("Initialized CPU PM domain topology\n"); + return pd_count; + +put_node: + of_node_put(node); +remove_pd: + if (pd_count) + psci_pd_remove(); + pr_err("failed to create CPU PM domains ret=%d\n", ret); +out: + of_node_put(np); + return ret; +} +subsys_initcall(psci_idle_init_domains); + struct device *psci_dt_attach_cpu(int cpu) { struct device *dev; diff --git a/drivers/cpuidle/cpuidle-psci.c b/drivers/cpuidle/cpuidle-psci.c index 937a8e450251..3e747a3b6264 100644 --- a/drivers/cpuidle/cpuidle-psci.c +++ b/drivers/cpuidle/cpuidle-psci.c @@ -33,7 +33,7 @@ struct psci_cpuidle_data { static DEFINE_PER_CPU_READ_MOSTLY(struct psci_cpuidle_data, psci_cpuidle_data); static DEFINE_PER_CPU(u32, domain_state); -static inline void psci_set_domain_state(u32 state) +void psci_set_domain_state(u32 state) { __this_cpu_write(domain_state, state); } @@ -118,7 +118,7 @@ static const struct of_device_id psci_idle_state_match[] __initconst = { { }, }; -static int __init psci_dt_parse_state_node(struct device_node *np, u32 *state) +int __init psci_dt_parse_state_node(struct device_node *np, u32 *state) { int err = of_property_read_u32(np, "arm,psci-suspend-param", state); diff --git a/drivers/cpuidle/cpuidle-psci.h b/drivers/cpuidle/cpuidle-psci.h index 0cadbb71dc55..d2e55cad9ac6 100644 --- a/drivers/cpuidle/cpuidle-psci.h +++ b/drivers/cpuidle/cpuidle-psci.h @@ -3,6 +3,11 @@ #ifndef __CPUIDLE_PSCI_H #define __CPUIDLE_PSCI_H +struct device_node; + +void psci_set_domain_state(u32 state); +int __init psci_dt_parse_state_node(struct device_node *np, u32 *state); + #ifdef CONFIG_PM_GENERIC_DOMAINS_OF struct device *psci_dt_attach_cpu(int cpu); #else