From patchwork Fri Nov 8 12:35:06 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ard Biesheuvel X-Patchwork-Id: 178890 Delivered-To: patch@linaro.org Received: by 2002:a92:38d5:0:0:0:0:0 with SMTP id g82csp2636154ilf; Fri, 8 Nov 2019 04:36:17 -0800 (PST) X-Google-Smtp-Source: APXvYqxP3/HMB0/gDbUnqdYcZ18Eu2EP9MYaEcjUx6UCCLgWsBG0oyBlzxyE2RDpT/YEWOozGJEQ X-Received: by 2002:a17:906:2ada:: with SMTP id m26mr8465327eje.87.1573216577420; Fri, 08 Nov 2019 04:36:17 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1573216577; cv=none; d=google.com; s=arc-20160816; b=I2eiC45z/4jQbPp88ORIwirh2Fqbmcs1eOf8YOpy0DA9236gMlfNcvzL/rLeemwmEQ AeX0rpSodFZXezwZdN5N4KHBfJOe+2gA+Mzx3gYHNIc7OtPxYtpmEXBDtcWNUxZQkgKG XOfG/a4SgoNI23aAdLxrQ55ES8pFvyxOgBSXaQLBf+4mJEzw4209tnlzRZ0UOFNI4KFv lJ6xR1BB4oSf6j3+TncqJI+ERlojtZ8ELbSQ8IaOGjWds4SgQXst7zxsNS0F/yqk9mI6 +FDeQfD2PPd7k1NqVQr1W2uTAXlWzw5xKlcoqUE6Lrlzvh7WNVL01Fx6KzvazGKsSez0 CtZw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=1+mGRSp6oNIjPKktzv/t5XAJ0LxFFinOwSk1WnEfNuQ=; b=QU17n7gWqCRW/XZnr66dhfUIQTrEYzLXRjJk3HgfzsH0SnVFGRdR0eWINwPw4bGzrf 1nugC0HqX4Ro4Bn7mrdFPRVu7Hn+LyPp3yVowte5QBoOwe1HuQyMlMXFV6648O7a0Lcg 60Pxq3G8kqFKo6XQ6TuNrdK5L4cbsJZySENRfSrSHdqznq5jD5TySKttJ05KcuhzMzDf QrHKUVtXgf+Sl0zK7e6mLHPQs216Y616ELTNlDUqUOQ07wnDfzIUOyBfVfT2950cvaWf TGaIF5vxTENS8D4R/VZAHek+E4WuuIKKBpAQaDWE4gWz6q7xULZig6ryFqJZM8AaWs+x kasw== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@kernel.org header.s=default header.b=2cmv5whw; spf=pass (google.com: best guess record for domain of stable-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=stable-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id o19si3411305ejc.315.2019.11.08.04.36.17; Fri, 08 Nov 2019 04:36:17 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of stable-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@kernel.org header.s=default header.b=2cmv5whw; spf=pass (google.com: best guess record for domain of stable-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=stable-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726935AbfKHMgQ (ORCPT + 14 others); Fri, 8 Nov 2019 07:36:16 -0500 Received: from mail.kernel.org ([198.145.29.99]:43790 "EHLO mail.kernel.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726251AbfKHMgQ (ORCPT ); Fri, 8 Nov 2019 07:36:16 -0500 Received: from localhost.localdomain (lfbn-mar-1-550-151.w90-118.abo.wanadoo.fr [90.118.131.151]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPSA id 291362245B; Fri, 8 Nov 2019 12:36:13 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=default; t=1573216575; bh=pesbwD8RHiAAwRio/nd/EfhYiMJ22NjZjKXdXI/0j8M=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=2cmv5whwD9zXc2aSCk0I0mrFOnbIYHzKCR64ydK6yW7rdLEGGjD+eW2CKL7ej0CuV iqXB03C7bkEz02rNmx1aPK6QSQakFCALnBuzqs6eYg/psJw9cKa7RgUEa3PmCPAiHV 7BResjkCnt6hzVch3X/w9P+UoeOBm0Xl0R/YQ3eo= From: Ard Biesheuvel To: stable@vger.kernel.org Cc: linus.walleij@linaro.org, rmk+kernel@armlinux.org.uk, Jens Wiklander , Ard Biesheuvel Subject: [PATCH for-stable-4.4 02/50] ARM: 8478/2: arm/arm64: add arm-smccc Date: Fri, 8 Nov 2019 13:35:06 +0100 Message-Id: <20191108123554.29004-3-ardb@kernel.org> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20191108123554.29004-1-ardb@kernel.org> References: <20191108123554.29004-1-ardb@kernel.org> MIME-Version: 1.0 Sender: stable-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: stable@vger.kernel.org From: Jens Wiklander Commit 98dd64f34f47ce19b388d9015f767f48393a81eb upstream. Adds helpers to do SMC and HVC based on ARM SMC Calling Convention. CONFIG_HAVE_ARM_SMCCC is enabled for architectures that may support the SMC or HVC instruction. It's the responsibility of the caller to know if the SMC instruction is supported by the platform. This patch doesn't provide an implementation of the declared functions. Later patches will bring in implementations and set CONFIG_HAVE_ARM_SMCCC for ARM and ARM64 respectively. Reviewed-by: Lorenzo Pieralisi Signed-off-by: Jens Wiklander Signed-off-by: Russell King Signed-off-by: Ard Biesheuvel --- drivers/firmware/Kconfig | 3 + include/linux/arm-smccc.h | 104 ++++++++++++++++++++ 2 files changed, 107 insertions(+) -- 2.20.1 diff --git a/drivers/firmware/Kconfig b/drivers/firmware/Kconfig index b0d42234fba0..cc5e79dc4cda 100644 --- a/drivers/firmware/Kconfig +++ b/drivers/firmware/Kconfig @@ -174,6 +174,9 @@ config QCOM_SCM_64 def_bool y depends on QCOM_SCM && ARM64 +config HAVE_ARM_SMCCC + bool + source "drivers/firmware/broadcom/Kconfig" source "drivers/firmware/google/Kconfig" source "drivers/firmware/efi/Kconfig" diff --git a/include/linux/arm-smccc.h b/include/linux/arm-smccc.h new file mode 100644 index 000000000000..b5abfda80465 --- /dev/null +++ b/include/linux/arm-smccc.h @@ -0,0 +1,104 @@ +/* + * Copyright (c) 2015, Linaro Limited + * + * This software is licensed under the terms of the GNU General Public + * License version 2, as published by the Free Software Foundation, and + * may be copied, distributed, and modified under those terms. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + */ +#ifndef __LINUX_ARM_SMCCC_H +#define __LINUX_ARM_SMCCC_H + +#include +#include + +/* + * This file provides common defines for ARM SMC Calling Convention as + * specified in + * http://infocenter.arm.com/help/topic/com.arm.doc.den0028a/index.html + */ + +#define ARM_SMCCC_STD_CALL 0 +#define ARM_SMCCC_FAST_CALL 1 +#define ARM_SMCCC_TYPE_SHIFT 31 + +#define ARM_SMCCC_SMC_32 0 +#define ARM_SMCCC_SMC_64 1 +#define ARM_SMCCC_CALL_CONV_SHIFT 30 + +#define ARM_SMCCC_OWNER_MASK 0x3F +#define ARM_SMCCC_OWNER_SHIFT 24 + +#define ARM_SMCCC_FUNC_MASK 0xFFFF + +#define ARM_SMCCC_IS_FAST_CALL(smc_val) \ + ((smc_val) & (ARM_SMCCC_FAST_CALL << ARM_SMCCC_TYPE_SHIFT)) +#define ARM_SMCCC_IS_64(smc_val) \ + ((smc_val) & (ARM_SMCCC_SMC_64 << ARM_SMCCC_CALL_CONV_SHIFT)) +#define ARM_SMCCC_FUNC_NUM(smc_val) ((smc_val) & ARM_SMCCC_FUNC_MASK) +#define ARM_SMCCC_OWNER_NUM(smc_val) \ + (((smc_val) >> ARM_SMCCC_OWNER_SHIFT) & ARM_SMCCC_OWNER_MASK) + +#define ARM_SMCCC_CALL_VAL(type, calling_convention, owner, func_num) \ + (((type) << ARM_SMCCC_TYPE_SHIFT) | \ + ((calling_convention) << ARM_SMCCC_CALL_CONV_SHIFT) | \ + (((owner) & ARM_SMCCC_OWNER_MASK) << ARM_SMCCC_OWNER_SHIFT) | \ + ((func_num) & ARM_SMCCC_FUNC_MASK)) + +#define ARM_SMCCC_OWNER_ARCH 0 +#define ARM_SMCCC_OWNER_CPU 1 +#define ARM_SMCCC_OWNER_SIP 2 +#define ARM_SMCCC_OWNER_OEM 3 +#define ARM_SMCCC_OWNER_STANDARD 4 +#define ARM_SMCCC_OWNER_TRUSTED_APP 48 +#define ARM_SMCCC_OWNER_TRUSTED_APP_END 49 +#define ARM_SMCCC_OWNER_TRUSTED_OS 50 +#define ARM_SMCCC_OWNER_TRUSTED_OS_END 63 + +/** + * struct arm_smccc_res - Result from SMC/HVC call + * @a0-a3 result values from registers 0 to 3 + */ +struct arm_smccc_res { + unsigned long a0; + unsigned long a1; + unsigned long a2; + unsigned long a3; +}; + +/** + * arm_smccc_smc() - make SMC calls + * @a0-a7: arguments passed in registers 0 to 7 + * @res: result values from registers 0 to 3 + * + * This function is used to make SMC calls following SMC Calling Convention. + * The content of the supplied param are copied to registers 0 to 7 prior + * to the SMC instruction. The return values are updated with the content + * from register 0 to 3 on return from the SMC instruction. + */ +asmlinkage void arm_smccc_smc(unsigned long a0, unsigned long a1, + unsigned long a2, unsigned long a3, unsigned long a4, + unsigned long a5, unsigned long a6, unsigned long a7, + struct arm_smccc_res *res); + +/** + * arm_smccc_hvc() - make HVC calls + * @a0-a7: arguments passed in registers 0 to 7 + * @res: result values from registers 0 to 3 + * + * This function is used to make HVC calls following SMC Calling + * Convention. The content of the supplied param are copied to registers 0 + * to 7 prior to the HVC instruction. The return values are updated with + * the content from register 0 to 3 on return from the HVC instruction. + */ +asmlinkage void arm_smccc_hvc(unsigned long a0, unsigned long a1, + unsigned long a2, unsigned long a3, unsigned long a4, + unsigned long a5, unsigned long a6, unsigned long a7, + struct arm_smccc_res *res); + +#endif /*__LINUX_ARM_SMCCC_H*/ From patchwork Fri Nov 8 12:35:07 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ard Biesheuvel X-Patchwork-Id: 178891 Delivered-To: patch@linaro.org Received: by 2002:a92:38d5:0:0:0:0:0 with SMTP id g82csp2636193ilf; Fri, 8 Nov 2019 04:36:19 -0800 (PST) X-Google-Smtp-Source: APXvYqz9qx+SHQqEGpoIJLF0SsgDNHK8FKd3AWvjOM4clpNLTX+2c+iszPnJ9qVYXVKMnK7W0KUO X-Received: by 2002:a05:6402:1299:: with SMTP id w25mr9906613edv.10.1573216579212; Fri, 08 Nov 2019 04:36:19 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1573216579; cv=none; d=google.com; s=arc-20160816; b=gu1/iauddF4wf1ewSm2m0baoweZ94zH5QyB+CKjL0sasa15lS8FOE9yR4g8fo6CckB VXK5H8cupb0ReHFGVr0P0IiQ5EX4W2X1CcmCbkHmGHbL5LKY+LhDpnlItMKNbIk5jPe7 naZf+mj3ynlCK8PU6BLwOVQQ+zmYsi4eqpnisKrbdMQ2HTPnE/d+dQZ8Z5vHm7DiqSi6 KVCIfvrB32blXRFBHZDHwCDM4FA83wYF4qa+FJ8BRyLp7YO+mA6L4u09a46nIgObs030 mtciojExClKDIPZDZROYZYPpoHRDFUqbvN1f6aiYNWqXVZdTGRnOxXFPu4Ev+zmZCoSD LSNQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=E/nm+w17Zblg/2bBrlqrb8u49cYE2PmikEjH8Ej1A3o=; b=FXV6yCZxIuLXRcIo3ekwTkcf6yzpoHjZj9kOyQOvKVoVj1TFQctZMvqAj+zJaHQQyz Kzs//uR08K5n6IsEzm50aO5LpsAQd8/S0S9wNOKIQ482QSqkkxXHglo2KK82fyih0wWc beDlzgSxPawVnbGx6ZERtYYu0wtGFi7bJE2/Ryknmt1FirK5NESPhL8PvU4XEXE5erUO RujCE9ZNpghnKDPqLQ7rL/5Yz0omhdVX5ETYLG3jf7iwXWudzjtGvQxG1NWb8Hkuwfa2 qs6j3NZtiSGsefAEhFZiV5mOfAouDT4NPx584qfzZZyvgygRBSfvtehNIFV1WFN5Q5BO Swrg== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@kernel.org header.s=default header.b=UdACFC15; spf=pass (google.com: best guess record for domain of stable-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=stable-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id o19si3411305ejc.315.2019.11.08.04.36.19; Fri, 08 Nov 2019 04:36:19 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of stable-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@kernel.org header.s=default header.b=UdACFC15; spf=pass (google.com: best guess record for domain of stable-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=stable-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726932AbfKHMgS (ORCPT + 14 others); Fri, 8 Nov 2019 07:36:18 -0500 Received: from mail.kernel.org ([198.145.29.99]:43820 "EHLO mail.kernel.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726251AbfKHMgS (ORCPT ); Fri, 8 Nov 2019 07:36:18 -0500 Received: from localhost.localdomain (lfbn-mar-1-550-151.w90-118.abo.wanadoo.fr [90.118.131.151]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPSA id CF06C222CE; Fri, 8 Nov 2019 12:36:15 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=default; t=1573216577; bh=eqbrTzgAoQz/Aum8KB3AxELDR9bRDRjpvbg+YfXUfpA=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=UdACFC15vhQrIRbH14f5d7ZwZf8UfTEpG2RKyEgVFhbcn9uJHuKaRcwwVotLyMukd Iy2J6TaslEvxg3zgbUkahFjd/5IzJwQCoYxEgEh9MiNRUfjsMeKvzAANsmKd5MkNPa d+930+mq8kCJvzZ0F6NnGbWxDlnEOvFdWSHWvizo= From: Ard Biesheuvel To: stable@vger.kernel.org Cc: linus.walleij@linaro.org, rmk+kernel@armlinux.org.uk, Jens Wiklander , Ard Biesheuvel Subject: [PATCH for-stable-4.4 03/50] ARM: 8479/2: add implementation for arm-smccc Date: Fri, 8 Nov 2019 13:35:07 +0100 Message-Id: <20191108123554.29004-4-ardb@kernel.org> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20191108123554.29004-1-ardb@kernel.org> References: <20191108123554.29004-1-ardb@kernel.org> MIME-Version: 1.0 Sender: stable-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: stable@vger.kernel.org From: Jens Wiklander Commit b329f95d70f3f955093e9a2b18ac1ed3587a8f73 upstream. Adds implementation for arm-smccc and enables CONFIG_HAVE_SMCCC for architectures that may support arm-smccc. It's the responsibility of the caller to know if the SMC instruction is supported by the platform. Reviewed-by: Lars Persson Signed-off-by: Jens Wiklander Signed-off-by: Russell King Signed-off-by: Ard Biesheuvel --- arch/arm/Kconfig | 1 + arch/arm/kernel/Makefile | 2 + arch/arm/kernel/armksyms.c | 6 ++ arch/arm/kernel/smccc-call.S | 62 ++++++++++++++++++++ 4 files changed, 71 insertions(+) -- 2.20.1 diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig index 737c8b0dda84..ef742bacd568 100644 --- a/arch/arm/Kconfig +++ b/arch/arm/Kconfig @@ -37,6 +37,7 @@ config ARM select HAVE_ARCH_KGDB if !CPU_ENDIAN_BE32 select HAVE_ARCH_SECCOMP_FILTER if (AEABI && !OABI_COMPAT) select HAVE_ARCH_TRACEHOOK + select HAVE_ARM_SMCCC if CPU_V7 select HAVE_BPF_JIT select HAVE_CC_STACKPROTECTOR select HAVE_CONTEXT_TRACKING diff --git a/arch/arm/kernel/Makefile b/arch/arm/kernel/Makefile index 3c789496297f..599c950468fc 100644 --- a/arch/arm/kernel/Makefile +++ b/arch/arm/kernel/Makefile @@ -91,4 +91,6 @@ obj-y += psci-call.o obj-$(CONFIG_SMP) += psci_smp.o endif +obj-$(CONFIG_HAVE_ARM_SMCCC) += smccc-call.o + extra-y := $(head-y) vmlinux.lds diff --git a/arch/arm/kernel/armksyms.c b/arch/arm/kernel/armksyms.c index f89811fb9a55..7e45f69a0ddc 100644 --- a/arch/arm/kernel/armksyms.c +++ b/arch/arm/kernel/armksyms.c @@ -16,6 +16,7 @@ #include #include #include +#include #include #include @@ -175,3 +176,8 @@ EXPORT_SYMBOL(__gnu_mcount_nc); EXPORT_SYMBOL(__pv_phys_pfn_offset); EXPORT_SYMBOL(__pv_offset); #endif + +#ifdef CONFIG_HAVE_ARM_SMCCC +EXPORT_SYMBOL(arm_smccc_smc); +EXPORT_SYMBOL(arm_smccc_hvc); +#endif diff --git a/arch/arm/kernel/smccc-call.S b/arch/arm/kernel/smccc-call.S new file mode 100644 index 000000000000..2e48b674aab1 --- /dev/null +++ b/arch/arm/kernel/smccc-call.S @@ -0,0 +1,62 @@ +/* + * Copyright (c) 2015, Linaro Limited + * + * This software is licensed under the terms of the GNU General Public + * License version 2, as published by the Free Software Foundation, and + * may be copied, distributed, and modified under those terms. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + */ +#include + +#include +#include +#include + + /* + * Wrap c macros in asm macros to delay expansion until after the + * SMCCC asm macro is expanded. + */ + .macro SMCCC_SMC + __SMC(0) + .endm + + .macro SMCCC_HVC + __HVC(0) + .endm + + .macro SMCCC instr +UNWIND( .fnstart) + mov r12, sp + push {r4-r7} +UNWIND( .save {r4-r7}) + ldm r12, {r4-r7} + \instr + pop {r4-r7} + ldr r12, [sp, #(4 * 4)] + stm r12, {r0-r3} + bx lr +UNWIND( .fnend) + .endm + +/* + * void smccc_smc(unsigned long a0, unsigned long a1, unsigned long a2, + * unsigned long a3, unsigned long a4, unsigned long a5, + * unsigned long a6, unsigned long a7, struct arm_smccc_res *res) + */ +ENTRY(arm_smccc_smc) + SMCCC SMCCC_SMC +ENDPROC(arm_smccc_smc) + +/* + * void smccc_hvc(unsigned long a0, unsigned long a1, unsigned long a2, + * unsigned long a3, unsigned long a4, unsigned long a5, + * unsigned long a6, unsigned long a7, struct arm_smccc_res *res) + */ +ENTRY(arm_smccc_hvc) + SMCCC SMCCC_HVC +ENDPROC(arm_smccc_hvc) From patchwork Fri Nov 8 12:35:08 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ard Biesheuvel X-Patchwork-Id: 178892 Delivered-To: patch@linaro.org Received: by 2002:a92:38d5:0:0:0:0:0 with SMTP id g82csp2636218ilf; Fri, 8 Nov 2019 04:36:20 -0800 (PST) X-Google-Smtp-Source: APXvYqyvAgYXzJaiDoQsyEexUFQuAi60x74kOnYem1WgOoSIDahnzjdpswwGiRaVZREEuS7pQQKc X-Received: by 2002:a05:6402:20c:: with SMTP id t12mr9888041edv.109.1573216580660; Fri, 08 Nov 2019 04:36:20 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1573216580; cv=none; d=google.com; s=arc-20160816; b=qtTmFX0E1kVZqzlCE3PJjhloOgoEccVXapclI5N170SaZC59CnwUwg7awsL1mLWeCF EogC8nInHNqct3nSb78qBc1dSQpiHMf6gU8dnH4+IvEyoFrwWM4GXyMaLVIavshAvSz0 LtnkBY0/pOQKYQfe8mo79gjGzMJgSE0mGMbJyJ8rbyTIREk6f+7vyIEWywpi3/csAGk6 BAndKSl8NwL/42dX7gcUs63rIFQSkdViXd1q4BPchLziDbYY7/JeyQ8PgJTETxs1XHt8 NdHxCfIPED7HoNUa5MCMtQ6/ilpxTLZKJX7jyYtfHC+aFCJ+hfhws8YucMXb+u5lcTx3 +cVw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=uHZE0zmAt31vGVkJsMkXy1a+Y7WeNiWHlMl6csYBKAw=; b=O+Hwsue1G4neWaFS+CB2GiaYj8wKEG/HraIc9dFtiFygF5Cgb0E3vHk+XfBMvDs9cN yjt4ihFM6sU71toOo43+KTSiwY5kdsfHbmg4hR96JSPH33focqBDVjZacVIlnnY6aqlW byctKKCy3oz5xi7JlUoo+es4H2e1rOJUlMrcyJNagrT0+XNOb/haY4D5abrIHRgZpYuf gGrDVl/pXkv7Pp4MM3Ti0F/XUgABBb+8Lb9f4LlFfxEloTxCZqkmAEM4+x2+Sd9GEnVP UKGquIzjVyDPxHHbIfIBPRuu2Xxlg+1l+3e6WSIm1hmWWzU3M01PViGoCm99/M/yOhOD Eupw== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@kernel.org header.s=default header.b="00/IrQhE"; spf=pass (google.com: best guess record for domain of stable-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=stable-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id o19si3411305ejc.315.2019.11.08.04.36.20; Fri, 08 Nov 2019 04:36:20 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of stable-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@kernel.org header.s=default header.b="00/IrQhE"; spf=pass (google.com: best guess record for domain of stable-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=stable-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726946AbfKHMgU (ORCPT + 14 others); Fri, 8 Nov 2019 07:36:20 -0500 Received: from mail.kernel.org ([198.145.29.99]:43844 "EHLO mail.kernel.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726251AbfKHMgT (ORCPT ); Fri, 8 Nov 2019 07:36:19 -0500 Received: from localhost.localdomain (lfbn-mar-1-550-151.w90-118.abo.wanadoo.fr [90.118.131.151]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPSA id 801B722459; Fri, 8 Nov 2019 12:36:17 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=default; t=1573216578; bh=Qhze+DAxqnSql1irx5ReBUS36kARlhoQ16aQor49tM8=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=00/IrQhEl0bYbUl/eTrvS8rTdgFPdbpHpPGBKVCsT8etkALbkRQk9tP/G9zXYsJFa XfuZHs7ttBT3QaVWNCEO/k/8FkcdztxCZA+Ait06ZaUWnnzrIqDDrHhlGzwS+WO8/3 zPKzWxfTELxTMvAOt1h4HCHd8RENUaWrv95IRr8g= From: Ard Biesheuvel To: stable@vger.kernel.org Cc: linus.walleij@linaro.org, rmk+kernel@armlinux.org.uk, Jens Wiklander , Ard Biesheuvel Subject: [PATCH for-stable-4.4 04/50] ARM: 8480/2: arm64: add implementation for arm-smccc Date: Fri, 8 Nov 2019 13:35:08 +0100 Message-Id: <20191108123554.29004-5-ardb@kernel.org> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20191108123554.29004-1-ardb@kernel.org> References: <20191108123554.29004-1-ardb@kernel.org> MIME-Version: 1.0 Sender: stable-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: stable@vger.kernel.org From: Jens Wiklander Commit 14457459f9ca2ff8521686168ea179edc3a56a44 upstream. Adds implementation for arm-smccc and enables CONFIG_HAVE_SMCCC. Acked-by: Will Deacon Signed-off-by: Jens Wiklander Signed-off-by: Russell King Signed-off-by: Ard Biesheuvel --- arch/arm64/Kconfig | 1 + arch/arm64/kernel/Makefile | 2 +- arch/arm64/kernel/arm64ksyms.c | 5 +++ arch/arm64/kernel/asm-offsets.c | 3 ++ arch/arm64/kernel/smccc-call.S | 43 ++++++++++++++++++++ 5 files changed, 53 insertions(+), 1 deletion(-) -- 2.20.1 diff --git a/arch/arm64/Kconfig b/arch/arm64/Kconfig index f18b8c26a959..644f4326b3e7 100644 --- a/arch/arm64/Kconfig +++ b/arch/arm64/Kconfig @@ -92,6 +92,7 @@ config ARM64 select SPARSE_IRQ select SYSCTL_EXCEPTION_TRACE select HAVE_CONTEXT_TRACKING + select HAVE_ARM_SMCCC help ARM 64-bit (AArch64) Linux support. diff --git a/arch/arm64/kernel/Makefile b/arch/arm64/kernel/Makefile index 474691f8b13a..0170bea3d4ae 100644 --- a/arch/arm64/kernel/Makefile +++ b/arch/arm64/kernel/Makefile @@ -17,7 +17,7 @@ arm64-obj-y := debug-monitors.o entry.o irq.o fpsimd.o \ hyp-stub.o psci.o psci-call.o cpu_ops.o insn.o \ return_address.o cpuinfo.o cpu_errata.o \ cpufeature.o alternative.o cacheinfo.o \ - smp.o smp_spin_table.o topology.o + smp.o smp_spin_table.o topology.o smccc-call.o extra-$(CONFIG_EFI) := efi-entry.o diff --git a/arch/arm64/kernel/arm64ksyms.c b/arch/arm64/kernel/arm64ksyms.c index 3b6d8cc9dfe0..678f30b05a45 100644 --- a/arch/arm64/kernel/arm64ksyms.c +++ b/arch/arm64/kernel/arm64ksyms.c @@ -26,6 +26,7 @@ #include #include #include +#include #include @@ -68,3 +69,7 @@ EXPORT_SYMBOL(test_and_change_bit); #ifdef CONFIG_FUNCTION_TRACER EXPORT_SYMBOL(_mcount); #endif + + /* arm-smccc */ +EXPORT_SYMBOL(arm_smccc_smc); +EXPORT_SYMBOL(arm_smccc_hvc); diff --git a/arch/arm64/kernel/asm-offsets.c b/arch/arm64/kernel/asm-offsets.c index 087cf9a65359..7c4146a4257b 100644 --- a/arch/arm64/kernel/asm-offsets.c +++ b/arch/arm64/kernel/asm-offsets.c @@ -28,6 +28,7 @@ #include #include #include +#include int main(void) { @@ -162,5 +163,7 @@ int main(void) DEFINE(SLEEP_SAVE_SP_PHYS, offsetof(struct sleep_save_sp, save_ptr_stash_phys)); DEFINE(SLEEP_SAVE_SP_VIRT, offsetof(struct sleep_save_sp, save_ptr_stash)); #endif + DEFINE(ARM_SMCCC_RES_X0_OFFS, offsetof(struct arm_smccc_res, a0)); + DEFINE(ARM_SMCCC_RES_X2_OFFS, offsetof(struct arm_smccc_res, a2)); return 0; } diff --git a/arch/arm64/kernel/smccc-call.S b/arch/arm64/kernel/smccc-call.S new file mode 100644 index 000000000000..ae0496fa4235 --- /dev/null +++ b/arch/arm64/kernel/smccc-call.S @@ -0,0 +1,43 @@ +/* + * Copyright (c) 2015, Linaro Limited + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License Version 2 as + * published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + */ +#include +#include + + .macro SMCCC instr + .cfi_startproc + \instr #0 + ldr x4, [sp] + stp x0, x1, [x4, #ARM_SMCCC_RES_X0_OFFS] + stp x2, x3, [x4, #ARM_SMCCC_RES_X2_OFFS] + ret + .cfi_endproc + .endm + +/* + * void arm_smccc_smc(unsigned long a0, unsigned long a1, unsigned long a2, + * unsigned long a3, unsigned long a4, unsigned long a5, + * unsigned long a6, unsigned long a7, struct arm_smccc_res *res) + */ +ENTRY(arm_smccc_smc) + SMCCC smc +ENDPROC(arm_smccc_smc) + +/* + * void arm_smccc_hvc(unsigned long a0, unsigned long a1, unsigned long a2, + * unsigned long a3, unsigned long a4, unsigned long a5, + * unsigned long a6, unsigned long a7, struct arm_smccc_res *res) + */ +ENTRY(arm_smccc_hvc) + SMCCC hvc +ENDPROC(arm_smccc_hvc) From patchwork Fri Nov 8 12:35:09 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ard Biesheuvel X-Patchwork-Id: 178893 Delivered-To: patch@linaro.org Received: by 2002:a92:38d5:0:0:0:0:0 with SMTP id g82csp2636253ilf; Fri, 8 Nov 2019 04:36:22 -0800 (PST) X-Google-Smtp-Source: APXvYqzvmoRNq680HKHiuIjxBaNi+Z1HVLvwZe36ITSBs41nd8ylRglObZGYWcGy8Hm0RZiMi+GP X-Received: by 2002:a50:b6cb:: with SMTP id f11mr9765906ede.299.1573216582695; Fri, 08 Nov 2019 04:36:22 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1573216582; cv=none; d=google.com; s=arc-20160816; b=ntOaJlu79PTqOW7kmhPM4uzvz9ceT7J3HRbMizr/kqpyhH3N58gJbQx9GhNyBfIAWS RRwF9JxEROSB/s4UJERhiuZaZM7Xs84GEUF/XqBzDOcl0zvktautk+4Joajx8AXTn7GN 6UGtQIItGrmiQ5Uxq077JayHPQdbocmxbk0OKetVjhxaSqK87uBeaWmnVZvqdCH6W2M+ C38W1Sm385d0RHSnRYq2sk5q4sZMJ+vyZ1+GQucE8OQEHezXfRPbbXskIwNTkjKSowA4 aQnpxVO6XwG3J0kdtQe4wFVbUt7zwJ8K0uGDBTkqeu/q6MydfoqvsEOCDpAn0MorJ9HQ AOdA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=PEUrtdEIFufmH9iKqdfgdjzv8W/lM8TQKDZe7AaPFh4=; b=uw1P6jG1ajopjt0ZD6a2BexS0uJrozh3aJ06YLr9qPkUDZV4KR8S9gzHO6QwCR9cFc ihWt8mbTkWGmEqXyyjG/idilhEPymF65JDbpgzz0XiqPa72C0lCxwzofW9eaXaJ/Widv ZIPQq5nWwPZWw3AunCdQc78jLXW5ZZeLbcF00jR4yLcoWtUK1Am9X+D3VeTselGLvvR6 GbtohZ60EDRXdU3QO53pbLmRtlYoZpvk1I+7MX6bcxeLJzDpBjFs9p/Hp7+SaYkvYtPx ArPkvuUoMVo/ZUCMcH3GI51EOqGPT+8wqvKEGygg54FNdVdIhvxF77eBsSN8iFGWk3qw Y4kA== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@kernel.org header.s=default header.b=dqhpvi2t; spf=pass (google.com: best guess record for domain of stable-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=stable-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id o19si3411305ejc.315.2019.11.08.04.36.22; Fri, 08 Nov 2019 04:36:22 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of stable-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@kernel.org header.s=default header.b=dqhpvi2t; spf=pass (google.com: best guess record for domain of stable-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=stable-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726251AbfKHMgW (ORCPT + 14 others); Fri, 8 Nov 2019 07:36:22 -0500 Received: from mail.kernel.org ([198.145.29.99]:43876 "EHLO mail.kernel.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726121AbfKHMgV (ORCPT ); Fri, 8 Nov 2019 07:36:21 -0500 Received: from localhost.localdomain (lfbn-mar-1-550-151.w90-118.abo.wanadoo.fr [90.118.131.151]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPSA id 3300B22466; Fri, 8 Nov 2019 12:36:19 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=default; t=1573216580; bh=ZGlooRu68ALzwcRr49X3h4MeIPaVrWziQxRIRV/+AUE=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=dqhpvi2tklL5WdCKsvHk0ElP1/lXcmNjARiW0M6LUZGRVQIoJts/4Mw55SHWB+QJx 3h8Y8Ga3zV+FPhrw7z6mLU0AQcXdV+hooKuCLl3t7UOlJOK54feiwsEADd61wXIitn pOhXQXoXhGCtY7J8Y5sV+KP2vw73Xa270A/UM9rA= From: Ard Biesheuvel To: stable@vger.kernel.org Cc: linus.walleij@linaro.org, rmk+kernel@armlinux.org.uk, Jens Wiklander , Ard Biesheuvel Subject: [PATCH for-stable-4.4 05/50] ARM: 8481/2: drivers: psci: replace psci firmware calls Date: Fri, 8 Nov 2019 13:35:09 +0100 Message-Id: <20191108123554.29004-6-ardb@kernel.org> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20191108123554.29004-1-ardb@kernel.org> References: <20191108123554.29004-1-ardb@kernel.org> MIME-Version: 1.0 Sender: stable-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: stable@vger.kernel.org From: Jens Wiklander Commit e679660dbb8347f275fe5d83a5dd59c1fb6c8e63 upstream. Switch to use a generic interface for issuing SMC/HVC based on ARM SMC Calling Convention. Removes now the now unused psci-call.S. Acked-by: Will Deacon Reviewed-by: Mark Rutland Tested-by: Mark Rutland Acked-by: Lorenzo Pieralisi Tested-by: Lorenzo Pieralisi Signed-off-by: Jens Wiklander Signed-off-by: Russell King Signed-off-by: Ard Biesheuvel --- arch/arm/Kconfig | 2 +- arch/arm/kernel/Makefile | 1 - arch/arm/kernel/psci-call.S | 31 -------------------- arch/arm64/kernel/Makefile | 2 +- arch/arm64/kernel/psci-call.S | 28 ------------------ drivers/firmware/psci.c | 23 +++++++++++++-- 6 files changed, 23 insertions(+), 64 deletions(-) -- 2.20.1 diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig index ef742bacd568..2ba69df49cf8 100644 --- a/arch/arm/Kconfig +++ b/arch/arm/Kconfig @@ -1482,7 +1482,7 @@ config HOTPLUG_CPU config ARM_PSCI bool "Support for the ARM Power State Coordination Interface (PSCI)" - depends on CPU_V7 + depends on HAVE_ARM_SMCCC select ARM_PSCI_FW help Say Y here if you want Linux to communicate with system firmware diff --git a/arch/arm/kernel/Makefile b/arch/arm/kernel/Makefile index 599c950468fc..82bdac0f2804 100644 --- a/arch/arm/kernel/Makefile +++ b/arch/arm/kernel/Makefile @@ -87,7 +87,6 @@ obj-$(CONFIG_EARLY_PRINTK) += early_printk.o obj-$(CONFIG_ARM_VIRT_EXT) += hyp-stub.o ifeq ($(CONFIG_ARM_PSCI),y) -obj-y += psci-call.o obj-$(CONFIG_SMP) += psci_smp.o endif diff --git a/arch/arm/kernel/psci-call.S b/arch/arm/kernel/psci-call.S deleted file mode 100644 index a78e9e1e206d..000000000000 --- a/arch/arm/kernel/psci-call.S +++ /dev/null @@ -1,31 +0,0 @@ -/* - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * Copyright (C) 2015 ARM Limited - * - * Author: Mark Rutland - */ - -#include - -#include -#include - -/* int __invoke_psci_fn_hvc(u32 function_id, u32 arg0, u32 arg1, u32 arg2) */ -ENTRY(__invoke_psci_fn_hvc) - __HVC(0) - bx lr -ENDPROC(__invoke_psci_fn_hvc) - -/* int __invoke_psci_fn_smc(u32 function_id, u32 arg0, u32 arg1, u32 arg2) */ -ENTRY(__invoke_psci_fn_smc) - __SMC(0) - bx lr -ENDPROC(__invoke_psci_fn_smc) diff --git a/arch/arm64/kernel/Makefile b/arch/arm64/kernel/Makefile index 0170bea3d4ae..27bf1e5180a1 100644 --- a/arch/arm64/kernel/Makefile +++ b/arch/arm64/kernel/Makefile @@ -14,7 +14,7 @@ CFLAGS_REMOVE_return_address.o = -pg arm64-obj-y := debug-monitors.o entry.o irq.o fpsimd.o \ entry-fpsimd.o process.o ptrace.o setup.o signal.o \ sys.o stacktrace.o time.o traps.o io.o vdso.o \ - hyp-stub.o psci.o psci-call.o cpu_ops.o insn.o \ + hyp-stub.o psci.o cpu_ops.o insn.o \ return_address.o cpuinfo.o cpu_errata.o \ cpufeature.o alternative.o cacheinfo.o \ smp.o smp_spin_table.o topology.o smccc-call.o diff --git a/arch/arm64/kernel/psci-call.S b/arch/arm64/kernel/psci-call.S deleted file mode 100644 index cf83e61cd3b5..000000000000 --- a/arch/arm64/kernel/psci-call.S +++ /dev/null @@ -1,28 +0,0 @@ -/* - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * Copyright (C) 2015 ARM Limited - * - * Author: Will Deacon - */ - -#include - -/* int __invoke_psci_fn_hvc(u64 function_id, u64 arg0, u64 arg1, u64 arg2) */ -ENTRY(__invoke_psci_fn_hvc) - hvc #0 - ret -ENDPROC(__invoke_psci_fn_hvc) - -/* int __invoke_psci_fn_smc(u64 function_id, u64 arg0, u64 arg1, u64 arg2) */ -ENTRY(__invoke_psci_fn_smc) - smc #0 - ret -ENDPROC(__invoke_psci_fn_smc) diff --git a/drivers/firmware/psci.c b/drivers/firmware/psci.c index ae70d2485ca1..b38305ba0965 100644 --- a/drivers/firmware/psci.c +++ b/drivers/firmware/psci.c @@ -13,6 +13,7 @@ #define pr_fmt(fmt) "psci: " fmt +#include #include #include #include @@ -58,8 +59,6 @@ struct psci_operations psci_ops; typedef unsigned long (psci_fn)(unsigned long, unsigned long, unsigned long, unsigned long); -asmlinkage psci_fn __invoke_psci_fn_hvc; -asmlinkage psci_fn __invoke_psci_fn_smc; static psci_fn *invoke_psci_fn; enum psci_function { @@ -107,6 +106,26 @@ bool psci_power_state_is_valid(u32 state) return !(state & ~valid_mask); } +static unsigned long __invoke_psci_fn_hvc(unsigned long function_id, + unsigned long arg0, unsigned long arg1, + unsigned long arg2) +{ + struct arm_smccc_res res; + + arm_smccc_hvc(function_id, arg0, arg1, arg2, 0, 0, 0, 0, &res); + return res.a0; +} + +static unsigned long __invoke_psci_fn_smc(unsigned long function_id, + unsigned long arg0, unsigned long arg1, + unsigned long arg2) +{ + struct arm_smccc_res res; + + arm_smccc_smc(function_id, arg0, arg1, arg2, 0, 0, 0, 0, &res); + return res.a0; +} + static int psci_to_linux_errno(int errno) { switch (errno) { From patchwork Fri Nov 8 12:35:12 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ard Biesheuvel X-Patchwork-Id: 178894 Delivered-To: patch@linaro.org Received: by 2002:a92:38d5:0:0:0:0:0 with SMTP id g82csp2636362ilf; Fri, 8 Nov 2019 04:36:26 -0800 (PST) X-Google-Smtp-Source: APXvYqxCmVVASKVMNtoojOGBemN+DG+1hCn3wzr8/JohyGfhSWxAjQofqpIgwZfoKd9IXVntRGjB X-Received: by 2002:a50:8dc5:: with SMTP id s5mr9882028edh.115.1573216586798; Fri, 08 Nov 2019 04:36:26 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1573216586; cv=none; d=google.com; s=arc-20160816; b=X2ywfia3n4TA/6YItfyw29knt3cRzWU5duazexJGmOWDb6oUMOqMthQQhnEN0jqt4r c2OVqeeF/taoGnqnyyN3t9UoGE7bAuatFV/YcRcLfr0cPJriMqIcDkY5oGDe1xLCiJpt JnCVm8qKLxnq+hEfcoEu4i/ShoPsiHY8H3Mx1VVBALcAkVtzyuqN9XmhCtYVeU9KbxDx oMsqpjsxKsK+rgOpePeMAgmybrQlwafHktXu9vuhq6Rd2xzGF4Q+LB6mIJlKPTXkDkrX K9QK3MUpnubKQtROoDbLfkdOhk8dDfBIQ7Ib+OY4qVgmz0LUTULYayoS3QcDFMoW8DsE UTDQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=K42O/6QyhR54vhMT4trmRz//ZUyyAahk1VRmkKV19y8=; b=1DLEd5oUWCsRu9+RCzLX1NoArcPY8XRjD3igNrU+Go08vX92nTC+p9TcXeQ5j4LX1Q OFn80vCBNrFGnrEhCavSm9Pb9oRQmjrjtCC6SAGoOijDWj6YInGJeojFO5shajFFX+JT j4oEa60SDvngyy9WfDad/iJiTieEd4vkeGAkJM520Vi06X7x39Hw5BIehvUr7pcA4dFR WYttXAjC/N9oAEBVUxIs4HPc2izS9+YTIXIs6OoCLSKJst2DBwU4Bsx+jrNEesFi4cVf W4adGLLWTdS/liPbLaBP8Z4sgLR/xrWU1nM430hvBRK8wep2wQVITRQjnIl7C+osCHa+ kaDQ== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@kernel.org header.s=default header.b=v5KuRm2y; spf=pass (google.com: best guess record for domain of stable-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=stable-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id o19si3411305ejc.315.2019.11.08.04.36.26; Fri, 08 Nov 2019 04:36:26 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of stable-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@kernel.org header.s=default header.b=v5KuRm2y; spf=pass (google.com: best guess record for domain of stable-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=stable-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726953AbfKHMg0 (ORCPT + 14 others); Fri, 8 Nov 2019 07:36:26 -0500 Received: from mail.kernel.org ([198.145.29.99]:43954 "EHLO mail.kernel.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726121AbfKHMgZ (ORCPT ); Fri, 8 Nov 2019 07:36:25 -0500 Received: from localhost.localdomain (lfbn-mar-1-550-151.w90-118.abo.wanadoo.fr [90.118.131.151]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPSA id 3A8C0222CE; Fri, 8 Nov 2019 12:36:24 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=default; t=1573216585; bh=O3Df2egrqzPiGFuLv9Icx067z6DRVdx5E5+uXkzuBQ0=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=v5KuRm2yEPH+KoabBEDtgYBV/Xk7mZFV5Qe5ui0HT1R3EJmxs6N4jCy3l2DdmOWIi 6Keq67Ex9hQWkFkKzxEUqEZ5JvaSxAgrXxcoG674KpK+HtPuEtn+/3Ar/OyVUpT2gz ROgkWqgwkSaORbT4HimRnpYm630wwAOxRLfJFZv8= From: Ard Biesheuvel To: stable@vger.kernel.org Cc: linus.walleij@linaro.org, rmk+kernel@armlinux.org.uk, Mark Rutland , Ard Biesheuvel Subject: [PATCH for-stable-4.4 08/50] arm/arm64: KVM: Advertise SMCCC v1.1 Date: Fri, 8 Nov 2019 13:35:12 +0100 Message-Id: <20191108123554.29004-9-ardb@kernel.org> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20191108123554.29004-1-ardb@kernel.org> References: <20191108123554.29004-1-ardb@kernel.org> MIME-Version: 1.0 Sender: stable-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: stable@vger.kernel.org From: Mark Rutland From: Marc Zyngier commit 09e6be12effdb33bf7210c8867bbd213b66a499e upstream. The new SMC Calling Convention (v1.1) allows for a reduced overhead when calling into the firmware, and provides a new feature discovery mechanism. Make it visible to KVM guests. Tested-by: Ard Biesheuvel Reviewed-by: Christoffer Dall Signed-off-by: Marc Zyngier Signed-off-by: Catalin Marinas [v4.9: account for files moved to virt/ upstream] Signed-off-by: Mark Rutland [v4.9 backport] Tested-by: Greg Hackmann Signed-off-by: Greg Kroah-Hartman [ardb: restrict to include/linux/arm-smccc.h, drop KVM bits] Signed-off-by: Ard Biesheuvel --- include/linux/arm-smccc.h | 22 +++++++++++++++++--- 1 file changed, 19 insertions(+), 3 deletions(-) -- 2.20.1 diff --git a/include/linux/arm-smccc.h b/include/linux/arm-smccc.h index b5abfda80465..8bf047eab116 100644 --- a/include/linux/arm-smccc.h +++ b/include/linux/arm-smccc.h @@ -14,9 +14,6 @@ #ifndef __LINUX_ARM_SMCCC_H #define __LINUX_ARM_SMCCC_H -#include -#include - /* * This file provides common defines for ARM SMC Calling Convention as * specified in @@ -60,6 +57,24 @@ #define ARM_SMCCC_OWNER_TRUSTED_OS 50 #define ARM_SMCCC_OWNER_TRUSTED_OS_END 63 +#define ARM_SMCCC_VERSION_1_0 0x10000 +#define ARM_SMCCC_VERSION_1_1 0x10001 + +#define ARM_SMCCC_VERSION_FUNC_ID \ + ARM_SMCCC_CALL_VAL(ARM_SMCCC_FAST_CALL, \ + ARM_SMCCC_SMC_32, \ + 0, 0) + +#define ARM_SMCCC_ARCH_FEATURES_FUNC_ID \ + ARM_SMCCC_CALL_VAL(ARM_SMCCC_FAST_CALL, \ + ARM_SMCCC_SMC_32, \ + 0, 1) + +#ifndef __ASSEMBLY__ + +#include +#include + /** * struct arm_smccc_res - Result from SMC/HVC call * @a0-a3 result values from registers 0 to 3 @@ -101,4 +116,5 @@ asmlinkage void arm_smccc_hvc(unsigned long a0, unsigned long a1, unsigned long a5, unsigned long a6, unsigned long a7, struct arm_smccc_res *res); +#endif /*__ASSEMBLY__*/ #endif /*__LINUX_ARM_SMCCC_H*/ From patchwork Fri Nov 8 12:35:13 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ard Biesheuvel X-Patchwork-Id: 178895 Delivered-To: patch@linaro.org Received: by 2002:a92:38d5:0:0:0:0:0 with SMTP id g82csp2636405ilf; Fri, 8 Nov 2019 04:36:28 -0800 (PST) X-Google-Smtp-Source: APXvYqyrCd7yKr2D1cdfYOqJvzxtebxpXcDpOGOQWfGBzyy5pMSVjOUI3MGMwhiU4vR/y6ViuakU X-Received: by 2002:a50:cc07:: with SMTP id m7mr10122847edi.146.1573216588465; Fri, 08 Nov 2019 04:36:28 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1573216588; cv=none; d=google.com; s=arc-20160816; b=zhNhzW8irwes+fxBwH6GrFnXaaooNQDa4B/WPmOwmKNXilsE17YPIfZYCkLe7A3+Bl 1vKVP/C1n4SyC5HrJW/IsUbDUgJe3Um4cA0idjri3emuzun65jNWaGj8wc1bPI1Tcc1g 5qto2jmAgVuLwnDgmnzsTZxYJtFUsSWzjHBokBrr/68aA+cn8+DDba9+oT2HHUH/AlfL aF35M9JgNRHu+D8Q5MHyMBOJBPnShcIuHyXICgr54mmLZFZVuGqJZbgmbjDsU9pJ5+mA N051TMafSkWR7Ja4ECynCwo+nPrIJwQGYxDoZ2AhwNYaypZNhZNHOt5CBIauTyi1o06w Qfuw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=W9OUPUBOBsQ5xGM1+gKA8sR8pLMR37uq4R9HGBXyeKc=; b=UKRu37Rf9SEBGaRu6SvWxh0cTFW3MNQDlFnHSavz9njSW56Wo8J3zgnnLLRcEinMGB qHeWykvyq07L2dWVRxR5iBFT53trYN92ZAr0FV+sm00EHMt7hETbOOZo3Btisuek3JZm Ofv1jIjx4o3f94tfTQM8KAeu9fnJcZmnSiHzTqzxW1e3hSq7Zmp7AL909vA/OpZwwp0D q/dbZwZqVizd/NfySLPGGo0OCwEeV6iBpSHOawP27aSi9U/mPxjIE/ONDVVkqxSdIoTD nDbvUgvHVnHerilP5nVk0MDSLdjG0crhJ+6JPkTCap3EMN5YMRfRM1XYnme34npL0N5t 6JhA== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@kernel.org header.s=default header.b=zUkrh+UF; spf=pass (google.com: best guess record for domain of stable-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=stable-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id o19si3411305ejc.315.2019.11.08.04.36.28; Fri, 08 Nov 2019 04:36:28 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of stable-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@kernel.org header.s=default header.b=zUkrh+UF; spf=pass (google.com: best guess record for domain of stable-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=stable-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726957AbfKHMg1 (ORCPT + 14 others); Fri, 8 Nov 2019 07:36:27 -0500 Received: from mail.kernel.org ([198.145.29.99]:43990 "EHLO mail.kernel.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726121AbfKHMg1 (ORCPT ); Fri, 8 Nov 2019 07:36:27 -0500 Received: from localhost.localdomain (lfbn-mar-1-550-151.w90-118.abo.wanadoo.fr [90.118.131.151]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPSA id E09F4222C9; Fri, 8 Nov 2019 12:36:25 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=default; t=1573216587; bh=MbXatxJpsvst8ICGkSFEmESQab2TZO2tWpDaaS3zX6Q=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=zUkrh+UFeXkCwh6QVxtXf75N9DQGyTbDGiv5sQ4hI6iXgflFyXfIFik9Se192+M34 LnCVy/tqb42xqSn2MIjfOgiDZadYmNuy35QR7ol51bDHZtK+AgwCB0BNWbfBN7x7M5 wSxYeI6fF6gWQlnUET3MZLUmgv4e3VlUc7ZiYK1Y= From: Ard Biesheuvel To: stable@vger.kernel.org Cc: linus.walleij@linaro.org, rmk+kernel@armlinux.org.uk, Mark Rutland , Ard Biesheuvel Subject: [PATCH for-stable-4.4 09/50] arm64: KVM: Report SMCCC_ARCH_WORKAROUND_1 BP hardening support Date: Fri, 8 Nov 2019 13:35:13 +0100 Message-Id: <20191108123554.29004-10-ardb@kernel.org> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20191108123554.29004-1-ardb@kernel.org> References: <20191108123554.29004-1-ardb@kernel.org> MIME-Version: 1.0 Sender: stable-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: stable@vger.kernel.org From: Mark Rutland From: Marc Zyngier commit 6167ec5c9145cdf493722dfd80a5d48bafc4a18a upstream. A new feature of SMCCC 1.1 is that it offers firmware-based CPU workarounds. In particular, SMCCC_ARCH_WORKAROUND_1 provides BP hardening for CVE-2017-5715. If the host has some mitigation for this issue, report that we deal with it using SMCCC_ARCH_WORKAROUND_1, as we apply the host workaround on every guest exit. Tested-by: Ard Biesheuvel Reviewed-by: Christoffer Dall Signed-off-by: Marc Zyngier Signed-off-by: Catalin Marinas [v4.9: account for files moved to virt/ upstream] Signed-off-by: Mark Rutland [v4.9 backport] Tested-by: Greg Hackmann Signed-off-by: Greg Kroah-Hartman [ardb: restrict to include/linux/arm-smccc.h] Signed-off-by: Ard Biesheuvel --- include/linux/arm-smccc.h | 5 +++++ 1 file changed, 5 insertions(+) -- 2.20.1 diff --git a/include/linux/arm-smccc.h b/include/linux/arm-smccc.h index 8bf047eab116..f2416b58367d 100644 --- a/include/linux/arm-smccc.h +++ b/include/linux/arm-smccc.h @@ -70,6 +70,11 @@ ARM_SMCCC_SMC_32, \ 0, 1) +#define ARM_SMCCC_ARCH_WORKAROUND_1 \ + ARM_SMCCC_CALL_VAL(ARM_SMCCC_FAST_CALL, \ + ARM_SMCCC_SMC_32, \ + 0, 0x8000) + #ifndef __ASSEMBLY__ #include From patchwork Fri Nov 8 12:35:14 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ard Biesheuvel X-Patchwork-Id: 178896 Delivered-To: patch@linaro.org Received: by 2002:a92:38d5:0:0:0:0:0 with SMTP id g82csp2636452ilf; Fri, 8 Nov 2019 04:36:30 -0800 (PST) X-Google-Smtp-Source: APXvYqyir5LSuC8f7L2lJjJy58vhMmuXgtbi6CZtD38sxqDnQTS9IWPKB0u2hG9TYjYzzJEF2Wn+ X-Received: by 2002:a17:906:386:: with SMTP id b6mr8330012eja.148.1573216590395; Fri, 08 Nov 2019 04:36:30 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1573216590; cv=none; d=google.com; s=arc-20160816; b=L8yGUrVDJgwB4qitTkNvsnYnxwAikBpO50L0Fh3h7zMFqN7grK2Gk12NERy3CP/tY7 gxnxkkUA00Q6MT8Vx+m2k3WIrftRpJ1ODe5WlDa3P7F7Kzpnjw3QYOOheZPImqKr+Vax f4B0LUK3Tt722wwlLp9V47gddPYWVSEQaYmbrJQlOjbnbspyi7mSzd5k55/n3g7yz1wf aAEdW/CGVsioj1KvZdv/rIjgEVJpxAxca4awX8nJSCdboxUVtyUgQEtVa9rl2+SN5/Si ob243IMoEAAw/oYlSV8giTorVYWW32Pmoj1rSnU+cI+v8PfHISA2lNq7ofJqGE2WKJJA HXHA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=Cd1pQJx2yWbUxhIZC3VadDc8DTgfKl5X9bZ8zV4FMr8=; b=vauUfD6LWwOqYdP4lOtO0KYiXA3KMxc0ZFIfRpDBtBVrmuKYAudB0qraT7w86//MOu uTgGxrb7AmDyJXWJPmxSIXxbR18g6PJX2e+iuEFVBUn1fp0/tswb5FVIpd4EI4gPkSEh sKSPuEMEk95HP2IIPnZvUmUrNQkmO9wELiqM+X7ost131oMO6ebibD0cWD/QzyuP7a8B 0BsudXxz1mwfvAuBdgLe9LjWN0SQspjkHTzTK0jNvEepatG8M4rZYsKSe/FQHJQKcJjz kcw1gqfXmiZdyNf4pte6kMT2xkAP5pp8cP17DOgwa+r7mgSWED1ozbLfeR81JC2DqRh2 alsA== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@kernel.org header.s=default header.b=qUnpISO7; spf=pass (google.com: best guess record for domain of stable-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=stable-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id o19si3411305ejc.315.2019.11.08.04.36.30; Fri, 08 Nov 2019 04:36:30 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of stable-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@kernel.org header.s=default header.b=qUnpISO7; spf=pass (google.com: best guess record for domain of stable-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=stable-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726959AbfKHMg3 (ORCPT + 14 others); Fri, 8 Nov 2019 07:36:29 -0500 Received: from mail.kernel.org ([198.145.29.99]:44018 "EHLO mail.kernel.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726121AbfKHMg3 (ORCPT ); Fri, 8 Nov 2019 07:36:29 -0500 Received: from localhost.localdomain (lfbn-mar-1-550-151.w90-118.abo.wanadoo.fr [90.118.131.151]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPSA id 92F7E22459; Fri, 8 Nov 2019 12:36:27 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=default; t=1573216588; bh=inb/cqMT+oShP3jVH33yG8lEW3vWYc4DlUhG+Dmlb08=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=qUnpISO7D6Dm8xiLb+F+c385GkQ4ZfoyytCyFE/gbd9ZnSxuE3HvJhQGLtMgJgtKq i6+DYsrQh85MKBfOUygCJ+MKJ25C8JvD9wDnrMMuNmqjQkX6TipdNcMyRqAFv01sK4 uWpfzPC2Cujy6N+3KH74SYxjGB8k1GzAg+jsQ7q8= From: Ard Biesheuvel To: stable@vger.kernel.org Cc: linus.walleij@linaro.org, rmk+kernel@armlinux.org.uk, Mark Rutland , Ard Biesheuvel Subject: [PATCH for-stable-4.4 10/50] firmware/psci: Expose PSCI conduit Date: Fri, 8 Nov 2019 13:35:14 +0100 Message-Id: <20191108123554.29004-11-ardb@kernel.org> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20191108123554.29004-1-ardb@kernel.org> References: <20191108123554.29004-1-ardb@kernel.org> MIME-Version: 1.0 Sender: stable-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: stable@vger.kernel.org From: Mark Rutland From: Marc Zyngier commit 09a8d6d48499f93e2abde691f5800081cd858726 upstream. In order to call into the firmware to apply workarounds, it is useful to find out whether we're using HVC or SMC. Let's expose this through the psci_ops. Acked-by: Lorenzo Pieralisi Reviewed-by: Robin Murphy Tested-by: Ard Biesheuvel Signed-off-by: Marc Zyngier Signed-off-by: Catalin Marinas Signed-off-by: Mark Rutland [v4.9 backport] Tested-by: Greg Hackmann Signed-off-by: Greg Kroah-Hartman Signed-off-by: Ard Biesheuvel --- drivers/firmware/psci.c | 28 ++++++++++++++++---- include/linux/psci.h | 7 +++++ 2 files changed, 30 insertions(+), 5 deletions(-) -- 2.20.1 diff --git a/drivers/firmware/psci.c b/drivers/firmware/psci.c index b38305ba0965..eb5f9161ff10 100644 --- a/drivers/firmware/psci.c +++ b/drivers/firmware/psci.c @@ -55,7 +55,9 @@ bool psci_tos_resident_on(int cpu) return cpu == resident_cpu; } -struct psci_operations psci_ops; +struct psci_operations psci_ops = { + .conduit = PSCI_CONDUIT_NONE, +}; typedef unsigned long (psci_fn)(unsigned long, unsigned long, unsigned long, unsigned long); @@ -206,6 +208,22 @@ static unsigned long psci_migrate_info_up_cpu(void) 0, 0, 0); } +static void set_conduit(enum psci_conduit conduit) +{ + switch (conduit) { + case PSCI_CONDUIT_HVC: + invoke_psci_fn = __invoke_psci_fn_hvc; + break; + case PSCI_CONDUIT_SMC: + invoke_psci_fn = __invoke_psci_fn_smc; + break; + default: + WARN(1, "Unexpected PSCI conduit %d\n", conduit); + } + + psci_ops.conduit = conduit; +} + static int get_set_conduit_method(struct device_node *np) { const char *method; @@ -218,9 +236,9 @@ static int get_set_conduit_method(struct device_node *np) } if (!strcmp("hvc", method)) { - invoke_psci_fn = __invoke_psci_fn_hvc; + set_conduit(PSCI_CONDUIT_HVC); } else if (!strcmp("smc", method)) { - invoke_psci_fn = __invoke_psci_fn_smc; + set_conduit(PSCI_CONDUIT_SMC); } else { pr_warn("invalid \"method\" property: %s\n", method); return -EINVAL; @@ -480,9 +498,9 @@ int __init psci_acpi_init(void) pr_info("probing for conduit method from ACPI.\n"); if (acpi_psci_use_hvc()) - invoke_psci_fn = __invoke_psci_fn_hvc; + set_conduit(PSCI_CONDUIT_HVC); else - invoke_psci_fn = __invoke_psci_fn_smc; + set_conduit(PSCI_CONDUIT_SMC); return psci_probe(); } diff --git a/include/linux/psci.h b/include/linux/psci.h index 12c4865457ad..864cdede8d15 100644 --- a/include/linux/psci.h +++ b/include/linux/psci.h @@ -24,6 +24,12 @@ bool psci_tos_resident_on(int cpu); bool psci_power_state_loses_context(u32 state); bool psci_power_state_is_valid(u32 state); +enum psci_conduit { + PSCI_CONDUIT_NONE, + PSCI_CONDUIT_SMC, + PSCI_CONDUIT_HVC, +}; + struct psci_operations { int (*cpu_suspend)(u32 state, unsigned long entry_point); int (*cpu_off)(u32 state); @@ -32,6 +38,7 @@ struct psci_operations { int (*affinity_info)(unsigned long target_affinity, unsigned long lowest_affinity_level); int (*migrate_info_type)(void); + enum psci_conduit conduit; }; extern struct psci_operations psci_ops; From patchwork Fri Nov 8 12:35:15 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ard Biesheuvel X-Patchwork-Id: 178897 Delivered-To: patch@linaro.org Received: by 2002:a92:38d5:0:0:0:0:0 with SMTP id g82csp2636490ilf; Fri, 8 Nov 2019 04:36:32 -0800 (PST) X-Google-Smtp-Source: APXvYqzoRQ8gM54cW+5Is8n6dhtWV5JQ6fEoJjoDvaMIyBLHnfLcSHw1lmZoC4S8+9K+RUTJ9QS/ X-Received: by 2002:a05:6402:20c:: with SMTP id t12mr9889137edv.109.1573216592087; Fri, 08 Nov 2019 04:36:32 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1573216592; cv=none; d=google.com; s=arc-20160816; b=jqcfrZ0fdMc5iayfO17KS2lgwuIlDtSHLmXtrPbTTCGVyKYVxV+uc8tC9D1nVISQ+2 GrbXE1JU5D+JnFMHPYvuWOAtzhlFmV+rAHIOXbkzz8pqdARE4xHAGulseD8pig+Ow+SG pI7Z/OfYTY+h+uu+kIjJg2AimF0/0nItIkHv+rrMldrAogFy1FoBTARn9jRPYkiHUzBB a3Vd4nk2AemntwiQ2eWq2+OZu2H/B1FgvdqIOZJgWDmx6k9ev7WmYOxyOhqMXT+FfnNy 9ee9b6laBk6irkhHzZHznYwlhvCKNcPvAw+RTu8MVHNp2y5ZkXOUNp6fdQEf/uirzVo7 blSw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=Zl7NE+rbqKR37xlAlOnQNX3h0HPfNe9qB8I7g0K5rDM=; b=0e2fD7hMBe26ZOgCooWm3C8kZPnLYNgrbi1bLQxSODIIygLiDG2KIT5oQXi5dIYMzn JQrhVrfTN1EjPooFBQ8+TC1dqB9YUd2dehmx8BZFUEkgRz8ybbYW9KyteLhl3yN2D4PA cizZnn8sHnth0TlUSlDWeGjOIZOQxjnPs9eB7NI/bRsqt9qWzDI5S9Lbxqu+VoT5uPr6 2qC3/GHPb3IxcFDB8C3zkB1ocP//wZW2A0wRvEeN5vV4USF7lF3m11JzwcvTanopTXc7 XsFC+fihrAezmBjDMOG1u5VT1MrX+1IZlJDCIQq7ezztYM52Jc6EFJqDKh1AgScWN2aH 4zxg== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@kernel.org header.s=default header.b=xcm4sKP5; spf=pass (google.com: best guess record for domain of stable-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=stable-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id o19si3411305ejc.315.2019.11.08.04.36.31; Fri, 08 Nov 2019 04:36:32 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of stable-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@kernel.org header.s=default header.b=xcm4sKP5; spf=pass (google.com: best guess record for domain of stable-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=stable-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726964AbfKHMgb (ORCPT + 14 others); Fri, 8 Nov 2019 07:36:31 -0500 Received: from mail.kernel.org ([198.145.29.99]:44042 "EHLO mail.kernel.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726121AbfKHMgb (ORCPT ); Fri, 8 Nov 2019 07:36:31 -0500 Received: from localhost.localdomain (lfbn-mar-1-550-151.w90-118.abo.wanadoo.fr [90.118.131.151]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPSA id 455662245A; Fri, 8 Nov 2019 12:36:29 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=default; t=1573216590; bh=R/teWzkKlAclgziOTLglPUbWYKOqfY6WpljAdcggmHI=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=xcm4sKP507/rfZcd0zFRBc/sX/ISZXeaa9Tvrga2q4N5Xp1WaomCJ0T5qKxV1nVv4 zRFvcmw9IbRscHkTs347HfppVXf0WkSvwCwaYrOmmzxsP+zU1NlDg6oKkzOr+Q9bnp 95IYpW9d5Kv2VQigQIn/gvGwlVf5f9vK20VMDmUc= From: Ard Biesheuvel To: stable@vger.kernel.org Cc: linus.walleij@linaro.org, rmk+kernel@armlinux.org.uk, Mark Rutland , Ard Biesheuvel Subject: [PATCH for-stable-4.4 11/50] firmware/psci: Expose SMCCC version through psci_ops Date: Fri, 8 Nov 2019 13:35:15 +0100 Message-Id: <20191108123554.29004-12-ardb@kernel.org> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20191108123554.29004-1-ardb@kernel.org> References: <20191108123554.29004-1-ardb@kernel.org> MIME-Version: 1.0 Sender: stable-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: stable@vger.kernel.org From: Mark Rutland From: Marc Zyngier commit e78eef554a912ef6c1e0bbf97619dafbeae3339f upstream. Since PSCI 1.0 allows the SMCCC version to be (indirectly) probed, let's do that at boot time, and expose the version of the calling convention as part of the psci_ops structure. Acked-by: Lorenzo Pieralisi Reviewed-by: Robin Murphy Tested-by: Ard Biesheuvel Signed-off-by: Marc Zyngier Signed-off-by: Catalin Marinas Signed-off-by: Mark Rutland [v4.9 backport] Tested-by: Greg Hackmann Signed-off-by: Greg Kroah-Hartman Signed-off-by: Ard Biesheuvel --- drivers/firmware/psci.c | 27 ++++++++++++++++++++ include/linux/psci.h | 6 +++++ 2 files changed, 33 insertions(+) -- 2.20.1 diff --git a/drivers/firmware/psci.c b/drivers/firmware/psci.c index eb5f9161ff10..bc3efe6c9279 100644 --- a/drivers/firmware/psci.c +++ b/drivers/firmware/psci.c @@ -57,6 +57,7 @@ bool psci_tos_resident_on(int cpu) struct psci_operations psci_ops = { .conduit = PSCI_CONDUIT_NONE, + .smccc_version = SMCCC_VERSION_1_0, }; typedef unsigned long (psci_fn)(unsigned long, unsigned long, @@ -339,6 +340,31 @@ static void __init psci_init_migrate(void) pr_info("Trusted OS resident on physical CPU 0x%lx\n", cpuid); } +static void __init psci_init_smccc(void) +{ + u32 ver = ARM_SMCCC_VERSION_1_0; + int feature; + + feature = psci_features(ARM_SMCCC_VERSION_FUNC_ID); + + if (feature != PSCI_RET_NOT_SUPPORTED) { + u32 ret; + ret = invoke_psci_fn(ARM_SMCCC_VERSION_FUNC_ID, 0, 0, 0); + if (ret == ARM_SMCCC_VERSION_1_1) { + psci_ops.smccc_version = SMCCC_VERSION_1_1; + ver = ret; + } + } + + /* + * Conveniently, the SMCCC and PSCI versions are encoded the + * same way. No, this isn't accidental. + */ + pr_info("SMC Calling Convention v%d.%d\n", + PSCI_VERSION_MAJOR(ver), PSCI_VERSION_MINOR(ver)); + +} + static void __init psci_0_2_set_functions(void) { pr_info("Using standard PSCI v0.2 function IDs\n"); @@ -385,6 +411,7 @@ static int __init psci_probe(void) psci_init_migrate(); if (PSCI_VERSION_MAJOR(ver) >= 1) { + psci_init_smccc(); psci_init_cpu_suspend(); psci_init_system_suspend(); } diff --git a/include/linux/psci.h b/include/linux/psci.h index 864cdede8d15..f78438214a59 100644 --- a/include/linux/psci.h +++ b/include/linux/psci.h @@ -30,6 +30,11 @@ enum psci_conduit { PSCI_CONDUIT_HVC, }; +enum smccc_version { + SMCCC_VERSION_1_0, + SMCCC_VERSION_1_1, +}; + struct psci_operations { int (*cpu_suspend)(u32 state, unsigned long entry_point); int (*cpu_off)(u32 state); @@ -39,6 +44,7 @@ struct psci_operations { unsigned long lowest_affinity_level); int (*migrate_info_type)(void); enum psci_conduit conduit; + enum smccc_version smccc_version; }; extern struct psci_operations psci_ops; From patchwork Fri Nov 8 12:35:16 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ard Biesheuvel X-Patchwork-Id: 178898 Delivered-To: patch@linaro.org Received: by 2002:a92:38d5:0:0:0:0:0 with SMTP id g82csp2636534ilf; Fri, 8 Nov 2019 04:36:34 -0800 (PST) X-Google-Smtp-Source: APXvYqzn8BxBu/cevuS9Pw48dzDeqtIYhc/peGZbqAVCsdwWXTyJxaHoU39frzK45l1Lq3/D39y2 X-Received: by 2002:a17:906:948a:: with SMTP id t10mr8467870ejx.110.1573216593916; Fri, 08 Nov 2019 04:36:33 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1573216593; cv=none; d=google.com; s=arc-20160816; b=y40fm29bivZWApFHYwag5MMIzzJu6WYcM6fF1sF6R/0lSSGcxzr3bT9AIiAUHwQzQV LQGPgUwXSVYMqKry92TuH2JCdmxnNhV1Cw3lCTT2KPKRDkeB6O3UuRRhXWqPt8q5+ZNl xIgcj3Vg3/zuxGKXdAh4+HRG/mTJoRbukzgbWbZM5v1jXEkjiya3mgjm2pBy2m0rAaN6 UW1FCaWAwIPKYRmiJKZEVoYDfAB5WjBo1j6y8QnUHsLKUSaiCPGbnsZpzRdERIXT9S7r GkjYilaqR+dHI/BRrgcYbMVot3ZE74m1xyiDhmGzGEBKaywKpJ8Xe2quNTZ9Io/PUaFf T+Ow== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=nLqnsvQD+SCON052tKP+P8JtTf/6sIIpHZd8mjnujKI=; b=Nez+1kcX3uDzFZch0JoeJLyfIw/QQounB5aLkS2yatq3PwEX/QGUgz2q0XC/5uHu98 sQuB9Kv3NNbo87cuiwxvncZ6vgRuXx+rlGMMwrNjQuxfXvZCzPzuAM95aCJQyno0AU+j 2Eq37GlUxTQUGYOKvHagiDTzk61NDQ1cl9m6r6wtjQup9tjZ+jlUy6eundnBQdXx+sho xE0oGn4A9LtVNyZAF40Ae3V/1lsabSpqUBxTZlYu4jKxLV6K/Ic+p0dHYC35cVjqbxGr v0aqQw5n14sYhkfaZ31oMVBK47Rv9a0e6A0v71DW25AsHKMLDs164iUu+Lh5wqhExYvm kiDg== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@kernel.org header.s=default header.b=nxH6mMbo; spf=pass (google.com: best guess record for domain of stable-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=stable-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id o19si3411305ejc.315.2019.11.08.04.36.33; Fri, 08 Nov 2019 04:36:33 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of stable-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@kernel.org header.s=default header.b=nxH6mMbo; spf=pass (google.com: best guess record for domain of stable-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=stable-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726970AbfKHMgd (ORCPT + 14 others); Fri, 8 Nov 2019 07:36:33 -0500 Received: from mail.kernel.org ([198.145.29.99]:44066 "EHLO mail.kernel.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726121AbfKHMgd (ORCPT ); Fri, 8 Nov 2019 07:36:33 -0500 Received: from localhost.localdomain (lfbn-mar-1-550-151.w90-118.abo.wanadoo.fr [90.118.131.151]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPSA id EA823222D1; Fri, 8 Nov 2019 12:36:30 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=default; t=1573216592; bh=hZ58KCeOpoXgrQzTAjH4w4oy23xL1jI0H0PeVuccAMU=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=nxH6mMboS0cRp0baXTtWpN7s+hduPTy6a7sTkGDaSVYoC1d8odOxVB9cdF+d2zmcm SMj4iTLybYKd3RJFnf/JVRfb0fBm1zxjsbxwqN4rKaNnhuyVjVJEDsG+KPQAFnxgfb w0PTwJrg+u+HZV+JiCppfLtYdUbsJAa/oUf2I1pc= From: Ard Biesheuvel To: stable@vger.kernel.org Cc: linus.walleij@linaro.org, rmk+kernel@armlinux.org.uk, Mark Rutland , Ard Biesheuvel Subject: [PATCH for-stable-4.4 12/50] arm/arm64: smccc: Make function identifiers an unsigned quantity Date: Fri, 8 Nov 2019 13:35:16 +0100 Message-Id: <20191108123554.29004-13-ardb@kernel.org> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20191108123554.29004-1-ardb@kernel.org> References: <20191108123554.29004-1-ardb@kernel.org> MIME-Version: 1.0 Sender: stable-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: stable@vger.kernel.org From: Mark Rutland From: Marc Zyngier commit ded4c39e93f3b72968fdb79baba27f3b83dad34c upstream. Function identifiers are a 32bit, unsigned quantity. But we never tell so to the compiler, resulting in the following: 4ac: b26187e0 mov x0, #0xffffffff80000001 We thus rely on the firmware narrowing it for us, which is not always a reasonable expectation. Cc: stable@vger.kernel.org Reported-by: Ard Biesheuvel Acked-by: Ard Biesheuvel Reviewed-by: Robin Murphy Tested-by: Ard Biesheuvel Signed-off-by: Marc Zyngier Signed-off-by: Catalin Marinas Signed-off-by: Mark Rutland [v4.9 backport] Tested-by: Greg Hackmann Signed-off-by: Greg Kroah-Hartman Signed-off-by: Ard Biesheuvel --- include/linux/arm-smccc.h | 6 ++++-- 1 file changed, 4 insertions(+), 2 deletions(-) -- 2.20.1 diff --git a/include/linux/arm-smccc.h b/include/linux/arm-smccc.h index f2416b58367d..82e1f3ae4010 100644 --- a/include/linux/arm-smccc.h +++ b/include/linux/arm-smccc.h @@ -14,14 +14,16 @@ #ifndef __LINUX_ARM_SMCCC_H #define __LINUX_ARM_SMCCC_H +#include + /* * This file provides common defines for ARM SMC Calling Convention as * specified in * http://infocenter.arm.com/help/topic/com.arm.doc.den0028a/index.html */ -#define ARM_SMCCC_STD_CALL 0 -#define ARM_SMCCC_FAST_CALL 1 +#define ARM_SMCCC_STD_CALL _AC(0,U) +#define ARM_SMCCC_FAST_CALL _AC(1,U) #define ARM_SMCCC_TYPE_SHIFT 31 #define ARM_SMCCC_SMC_32 0 From patchwork Fri Nov 8 12:35:17 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ard Biesheuvel X-Patchwork-Id: 178899 Delivered-To: patch@linaro.org Received: by 2002:a92:38d5:0:0:0:0:0 with SMTP id g82csp2636577ilf; Fri, 8 Nov 2019 04:36:36 -0800 (PST) X-Google-Smtp-Source: APXvYqz3uFJHU4OOxwCuDaYR74bv6C40Sj3Ix/pNTwglR55v+nMEoZJn/um09w55lDyHoVmWdJeK X-Received: by 2002:a17:906:684a:: with SMTP id a10mr8244624ejs.160.1573216595990; Fri, 08 Nov 2019 04:36:35 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1573216595; cv=none; d=google.com; s=arc-20160816; b=FAhtRMEmoDQ9RIdVCUQ8+2nz6HFZ6sLWMYCTMHs3eFM3PI7kSZhY/1yLgOCYuDoFOG MDNFGM6YXPvqb/wzMTD6c4dIz+IkVY1Kz36J2iql4pT6ZSW6wNLuu/cuar/gfXMzU+DK gwnDsKaW9J2onZGzIYvn7zO8vgzQs941TW8UOqpevqGF/Ng1D3vsp7SXKiFoUZ5T8imE 9XHM1By0ZDXMuHkXZ3PLuEOrixZ6EX3bBY47m62TDWiZJy8wX2akoJ/cI14LNaGKX3SB dvKQVofwH+jHZAKj6VN9yklRYqPEOgAZWYiVGtDo4NlxIBYwX1NnV1keLaZ+MlhQhZPN 3MCQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=WG6HCTbmbXUxgrP4YZtd1mvfhRgiQTVaXrlVd1L/zYw=; b=I4sGPl9iJZzxV1Vq+pBoMF7gw6kHHeTKObbvDA1PMveG8NOKspNFHNLfgkR//lhlkH Cs3bNOMZmLyoChfehyGQVG2ZSWUY9KGdIlwAP+wk7XTDIwOodABZuDdDZIMlTGu1JPzL d0Yq/vh/xycUC9rDGDbta9dT1bNQAreneIqgaSvugCzKBK8RzOH8UWtdhdlaKH+vnR4H 8Xb1GdwZvP0Qj6jGVVEg3YocQy3D7fz5sIdJNwjeLNEZ2llUgFQE4h+jWo/X5Q/9P1Ra VEomxIJAXQ7KZcClg4UZGROqmqTh9GoGz4g/SKbLMKootD939JfdnWMlUea0rgYwy3oT t9zQ== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@kernel.org header.s=default header.b=hz9fsjGf; spf=pass (google.com: best guess record for domain of stable-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=stable-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id o19si3411305ejc.315.2019.11.08.04.36.35; Fri, 08 Nov 2019 04:36:35 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of stable-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@kernel.org header.s=default header.b=hz9fsjGf; spf=pass (google.com: best guess record for domain of stable-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=stable-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726976AbfKHMgf (ORCPT + 14 others); Fri, 8 Nov 2019 07:36:35 -0500 Received: from mail.kernel.org ([198.145.29.99]:44094 "EHLO mail.kernel.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726121AbfKHMgf (ORCPT ); Fri, 8 Nov 2019 07:36:35 -0500 Received: from localhost.localdomain (lfbn-mar-1-550-151.w90-118.abo.wanadoo.fr [90.118.131.151]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPSA id 9D8602245B; Fri, 8 Nov 2019 12:36:32 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=default; t=1573216593; bh=Jt9GHAdPFmLo6XzYeEy/3HhMNOMRZCBgbenRtnBl4ew=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=hz9fsjGfG4Biabo3+I784Nrml6WkzYzoMKcSKpqxUjlklOK/yfOFDz8YsH2Rcpyab DafK3wcixbJHhDy0wv5JjofzuqhDgOdVkLkBCwCgb8wEoTBhaudpAc8hCCGUO+s8/A 1n80HGjg62uMvSQCGqo8DJXQ4MrfRlCczn7izPDA= From: Ard Biesheuvel To: stable@vger.kernel.org Cc: linus.walleij@linaro.org, rmk+kernel@armlinux.org.uk, Mark Rutland , Ard Biesheuvel Subject: [PATCH for-stable-4.4 13/50] arm/arm64: smccc: Implement SMCCC v1.1 inline primitive Date: Fri, 8 Nov 2019 13:35:17 +0100 Message-Id: <20191108123554.29004-14-ardb@kernel.org> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20191108123554.29004-1-ardb@kernel.org> References: <20191108123554.29004-1-ardb@kernel.org> MIME-Version: 1.0 Sender: stable-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: stable@vger.kernel.org From: Mark Rutland From: Marc Zyngier commit f2d3b2e8759a5833df6f022e42df2d581e6d843c upstream. One of the major improvement of SMCCC v1.1 is that it only clobbers the first 4 registers, both on 32 and 64bit. This means that it becomes very easy to provide an inline version of the SMC call primitive, and avoid performing a function call to stash the registers that would otherwise be clobbered by SMCCC v1.0. Reviewed-by: Robin Murphy Tested-by: Ard Biesheuvel Signed-off-by: Marc Zyngier Signed-off-by: Catalin Marinas Signed-off-by: Mark Rutland [v4.9 backport] Tested-by: Greg Hackmann Signed-off-by: Greg Kroah-Hartman Signed-off-by: Ard Biesheuvel --- include/linux/arm-smccc.h | 141 ++++++++++++++++++++ 1 file changed, 141 insertions(+) -- 2.20.1 diff --git a/include/linux/arm-smccc.h b/include/linux/arm-smccc.h index 82e1f3ae4010..eb79d0e21148 100644 --- a/include/linux/arm-smccc.h +++ b/include/linux/arm-smccc.h @@ -123,5 +123,146 @@ asmlinkage void arm_smccc_hvc(unsigned long a0, unsigned long a1, unsigned long a5, unsigned long a6, unsigned long a7, struct arm_smccc_res *res); +/* SMCCC v1.1 implementation madness follows */ +#ifdef CONFIG_ARM64 + +#define SMCCC_SMC_INST "smc #0" +#define SMCCC_HVC_INST "hvc #0" + +#elif defined(CONFIG_ARM) +#include +#include + +#define SMCCC_SMC_INST __SMC(0) +#define SMCCC_HVC_INST __HVC(0) + +#endif + +#define ___count_args(_0, _1, _2, _3, _4, _5, _6, _7, _8, x, ...) x + +#define __count_args(...) \ + ___count_args(__VA_ARGS__, 7, 6, 5, 4, 3, 2, 1, 0) + +#define __constraint_write_0 \ + "+r" (r0), "=&r" (r1), "=&r" (r2), "=&r" (r3) +#define __constraint_write_1 \ + "+r" (r0), "+r" (r1), "=&r" (r2), "=&r" (r3) +#define __constraint_write_2 \ + "+r" (r0), "+r" (r1), "+r" (r2), "=&r" (r3) +#define __constraint_write_3 \ + "+r" (r0), "+r" (r1), "+r" (r2), "+r" (r3) +#define __constraint_write_4 __constraint_write_3 +#define __constraint_write_5 __constraint_write_4 +#define __constraint_write_6 __constraint_write_5 +#define __constraint_write_7 __constraint_write_6 + +#define __constraint_read_0 +#define __constraint_read_1 +#define __constraint_read_2 +#define __constraint_read_3 +#define __constraint_read_4 "r" (r4) +#define __constraint_read_5 __constraint_read_4, "r" (r5) +#define __constraint_read_6 __constraint_read_5, "r" (r6) +#define __constraint_read_7 __constraint_read_6, "r" (r7) + +#define __declare_arg_0(a0, res) \ + struct arm_smccc_res *___res = res; \ + register u32 r0 asm("r0") = a0; \ + register unsigned long r1 asm("r1"); \ + register unsigned long r2 asm("r2"); \ + register unsigned long r3 asm("r3") + +#define __declare_arg_1(a0, a1, res) \ + struct arm_smccc_res *___res = res; \ + register u32 r0 asm("r0") = a0; \ + register typeof(a1) r1 asm("r1") = a1; \ + register unsigned long r2 asm("r2"); \ + register unsigned long r3 asm("r3") + +#define __declare_arg_2(a0, a1, a2, res) \ + struct arm_smccc_res *___res = res; \ + register u32 r0 asm("r0") = a0; \ + register typeof(a1) r1 asm("r1") = a1; \ + register typeof(a2) r2 asm("r2") = a2; \ + register unsigned long r3 asm("r3") + +#define __declare_arg_3(a0, a1, a2, a3, res) \ + struct arm_smccc_res *___res = res; \ + register u32 r0 asm("r0") = a0; \ + register typeof(a1) r1 asm("r1") = a1; \ + register typeof(a2) r2 asm("r2") = a2; \ + register typeof(a3) r3 asm("r3") = a3 + +#define __declare_arg_4(a0, a1, a2, a3, a4, res) \ + __declare_arg_3(a0, a1, a2, a3, res); \ + register typeof(a4) r4 asm("r4") = a4 + +#define __declare_arg_5(a0, a1, a2, a3, a4, a5, res) \ + __declare_arg_4(a0, a1, a2, a3, a4, res); \ + register typeof(a5) r5 asm("r5") = a5 + +#define __declare_arg_6(a0, a1, a2, a3, a4, a5, a6, res) \ + __declare_arg_5(a0, a1, a2, a3, a4, a5, res); \ + register typeof(a6) r6 asm("r6") = a6 + +#define __declare_arg_7(a0, a1, a2, a3, a4, a5, a6, a7, res) \ + __declare_arg_6(a0, a1, a2, a3, a4, a5, a6, res); \ + register typeof(a7) r7 asm("r7") = a7 + +#define ___declare_args(count, ...) __declare_arg_ ## count(__VA_ARGS__) +#define __declare_args(count, ...) ___declare_args(count, __VA_ARGS__) + +#define ___constraints(count) \ + : __constraint_write_ ## count \ + : __constraint_read_ ## count \ + : "memory" +#define __constraints(count) ___constraints(count) + +/* + * We have an output list that is not necessarily used, and GCC feels + * entitled to optimise the whole sequence away. "volatile" is what + * makes it stick. + */ +#define __arm_smccc_1_1(inst, ...) \ + do { \ + __declare_args(__count_args(__VA_ARGS__), __VA_ARGS__); \ + asm volatile(inst "\n" \ + __constraints(__count_args(__VA_ARGS__))); \ + if (___res) \ + *___res = (typeof(*___res)){r0, r1, r2, r3}; \ + } while (0) + +/* + * arm_smccc_1_1_smc() - make an SMCCC v1.1 compliant SMC call + * + * This is a variadic macro taking one to eight source arguments, and + * an optional return structure. + * + * @a0-a7: arguments passed in registers 0 to 7 + * @res: result values from registers 0 to 3 + * + * This macro is used to make SMC calls following SMC Calling Convention v1.1. + * The content of the supplied param are copied to registers 0 to 7 prior + * to the SMC instruction. The return values are updated with the content + * from register 0 to 3 on return from the SMC instruction if not NULL. + */ +#define arm_smccc_1_1_smc(...) __arm_smccc_1_1(SMCCC_SMC_INST, __VA_ARGS__) + +/* + * arm_smccc_1_1_hvc() - make an SMCCC v1.1 compliant HVC call + * + * This is a variadic macro taking one to eight source arguments, and + * an optional return structure. + * + * @a0-a7: arguments passed in registers 0 to 7 + * @res: result values from registers 0 to 3 + * + * This macro is used to make HVC calls following SMC Calling Convention v1.1. + * The content of the supplied param are copied to registers 0 to 7 prior + * to the HVC instruction. The return values are updated with the content + * from register 0 to 3 on return from the HVC instruction if not NULL. + */ +#define arm_smccc_1_1_hvc(...) __arm_smccc_1_1(SMCCC_HVC_INST, __VA_ARGS__) + #endif /*__ASSEMBLY__*/ #endif /*__LINUX_ARM_SMCCC_H*/ From patchwork Fri Nov 8 12:35:18 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ard Biesheuvel X-Patchwork-Id: 178900 Delivered-To: patch@linaro.org Received: by 2002:a92:38d5:0:0:0:0:0 with SMTP id g82csp2636598ilf; Fri, 8 Nov 2019 04:36:37 -0800 (PST) X-Google-Smtp-Source: APXvYqxB6/kkD4XYeYF1UHM6IkmFvevBGgyGL9J2GdXv9NMbI4oe9SAbGOSqWZaiWb/nrUiWEX9T X-Received: by 2002:a17:907:2122:: with SMTP id qo2mr8619259ejb.12.1573216596899; Fri, 08 Nov 2019 04:36:36 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1573216596; cv=none; d=google.com; s=arc-20160816; b=dC3fUf17aGSkSzpTzpF4sMXpvigWzfTG3CjZkvw5Kw/6o+v3qbN8aFiEaKm6Wb1/Uf kAyP7BFC6QT8FMkZ9Vt7+gcJkPJDGjudDEmfLr0b1MPweRENvVMmEXE/YReuCJVm4Ru1 1e4UubYrYW9gaNxVqsKjkWuag6qXR7tE4SA4LmaGqMQtwtN6oAiDiHUYNrsRJMRAXpO7 T7mG/+TdbZWpieNDtTEibA39AU8u9rkHt1WVbTA4/MwTTELat6ZFTnx1BjUJP9IOwvv6 kX3CyDksH8Fz3YPWQxj95kxd82JBajp4p44d5t2I1L7vDjUOq+pUCS6PsDunBmz7zDmu zXzA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=uQNi6iT8LsH7ngwMbwUNEh5pQif/Auo+VDaBLo8x8c8=; b=eAc6FPehbawJBiRn91KVhsfaKB0PnTmQfF0PYTeQ/zxxutu6HIaa7/+W+gMt2D76wV QKlqvofWLPx89EPNv83kAQ6IfRvs1zrNEXozU4lC3LEWLl0cir5qF54NA4tq/x7SoUJm uT6HIIR3drlGk/Ko6CWeykNuplILcM2mH21QsX1BsLzXUdKNbraZExww531c6Mbh1u+5 fqliYWrgiQgn4e193OZXyTqyViOC8ND3HZhu8w/pthJtPUBGfO/N8yQv1upuUDQoobUo DvvnJiLa23aORd3oOCczt71iy8os7NDOGedW8T6X6tQR2MrK5n3B4R5O4MuOrDH/g3AW cNGw== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@kernel.org header.s=default header.b=WWKmmvJJ; spf=pass (google.com: best guess record for domain of stable-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=stable-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id o19si3411305ejc.315.2019.11.08.04.36.36; Fri, 08 Nov 2019 04:36:36 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of stable-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@kernel.org header.s=default header.b=WWKmmvJJ; spf=pass (google.com: best guess record for domain of stable-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=stable-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726977AbfKHMgg (ORCPT + 14 others); Fri, 8 Nov 2019 07:36:36 -0500 Received: from mail.kernel.org ([198.145.29.99]:44112 "EHLO mail.kernel.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726121AbfKHMgg (ORCPT ); Fri, 8 Nov 2019 07:36:36 -0500 Received: from localhost.localdomain (lfbn-mar-1-550-151.w90-118.abo.wanadoo.fr [90.118.131.151]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPSA id 4EB4A2245C; Fri, 8 Nov 2019 12:36:34 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=default; t=1573216595; bh=eXsPx6g2htrTWxGDDFeZO3cZPAUOiKL3Y2Y3MDblzsc=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=WWKmmvJJBo+mHm6IG+Qm3vri3P5p/42onQJNwBBwIhc9XVjRWWGoyDXMwCeXmsSlW MQs8eEnYjW1xaOlb02xKACzOj5lcxZLdCQ9t+9L0KvPvNH/stqaodVoq+LgC7WXmoD zB77/9nLHnzqLjeXW5WEToaPB804RJ1fevTFDkLw= From: Ard Biesheuvel To: stable@vger.kernel.org Cc: linus.walleij@linaro.org, rmk+kernel@armlinux.org.uk, Marc Zyngier , Ard Biesheuvel Subject: [PATCH for-stable-4.4 14/50] arm/arm64: smccc: Add SMCCC-specific return codes Date: Fri, 8 Nov 2019 13:35:18 +0100 Message-Id: <20191108123554.29004-15-ardb@kernel.org> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20191108123554.29004-1-ardb@kernel.org> References: <20191108123554.29004-1-ardb@kernel.org> MIME-Version: 1.0 Sender: stable-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: stable@vger.kernel.org From: Marc Zyngier commit eff0e9e1078ea7dc1d794dc50e31baef984c46d7 upstream. We've so far used the PSCI return codes for SMCCC because they were extremely similar. But with the new ARM DEN 0070A specification, "NOT_REQUIRED" (-2) is clashing with PSCI's "PSCI_RET_INVALID_PARAMS". Let's bite the bullet and add SMCCC specific return codes. Users can be repainted as and when required. Acked-by: Will Deacon Reviewed-by: Mark Rutland Signed-off-by: Marc Zyngier Signed-off-by: Catalin Marinas Signed-off-by: Marc Zyngier Signed-off-by: Greg Kroah-Hartman Signed-off-by: Ard Biesheuvel --- include/linux/arm-smccc.h | 5 +++++ 1 file changed, 5 insertions(+) -- 2.20.1 diff --git a/include/linux/arm-smccc.h b/include/linux/arm-smccc.h index eb79d0e21148..a4eec441f82d 100644 --- a/include/linux/arm-smccc.h +++ b/include/linux/arm-smccc.h @@ -264,5 +264,10 @@ asmlinkage void arm_smccc_hvc(unsigned long a0, unsigned long a1, */ #define arm_smccc_1_1_hvc(...) __arm_smccc_1_1(SMCCC_HVC_INST, __VA_ARGS__) +/* Return codes defined in ARM DEN 0070A */ +#define SMCCC_RET_SUCCESS 0 +#define SMCCC_RET_NOT_SUPPORTED -1 +#define SMCCC_RET_NOT_REQUIRED -2 + #endif /*__ASSEMBLY__*/ #endif /*__LINUX_ARM_SMCCC_H*/ From patchwork Fri Nov 8 12:35:19 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ard Biesheuvel X-Patchwork-Id: 178901 Delivered-To: patch@linaro.org Received: by 2002:a92:38d5:0:0:0:0:0 with SMTP id g82csp2636649ilf; Fri, 8 Nov 2019 04:36:39 -0800 (PST) X-Google-Smtp-Source: APXvYqy6uv6x7VfyecaC5vFEDQtmlCnMfmy8MoXT2y7PRnQdCPMIZrIxgXbOlBiZv5ttStCQIS5h X-Received: by 2002:a17:906:48b:: with SMTP id f11mr8327644eja.225.1573216599094; Fri, 08 Nov 2019 04:36:39 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1573216599; cv=none; d=google.com; s=arc-20160816; b=RZ0RKnXU61TUShBowKEyJ1422xl5thNvnIkAjCiEVEAutOZXV1emJi3nSOBzH4hNo7 FeEVCo9w4Me7RAWuiKrooTZJbtOF3/NB+e7MdDus+PSCjlPy7NWwMlyGzoSDPMU6VZIJ /puPyL8m2cfIbrapJCqHJj6H0Xxuqae35WForqNs3klK/4wGgYEW/y5yTu2tbk33vaN6 cnUy7srBcDIraB9I4+Aa32+SzWRmDlW7GteZwZOjzkUS9Ch/8ZkPdB8B8pDkcAHuhZSo WqpjKqB+04pS6RGWRNPwwPHRkKpd/mZMz2rSkYMfHigX/MlM9nRpG0blIjn4rCs2tWEo 1ciQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=I8iOEZ1SS9cxaI1M3aArEO9NbvQhBBAOuzNIynOA7qs=; b=O8TQGJaaBWhhmTmIkKRwSYB749KKy/zySolnIAkxfc55zVfVng4HvBzR6+5WUgeRem zzgb/iTAz51IjyS22Ud3K/ImbNRF15VES74ULY9vNmU+CTBdaLbJYRJeCVnw89nq5aR5 4RQZDIO//n7SBqNRlBApUDQ+A1srVI7/Hmcinryqi2aJk6ZgCU0UkYTGhfoBM2HVPF2V JfB8tliNvP91/dIOskucGPcdn78uk1vzvUwKFlNuBB0X8NqlCJStkTpJS7f0v8gAl65T i0Bqzrhj3OhIqZY3jzPmSRUiKuGW2CHw99SB8JsAKMR0fWoL+tGzTSYwUHD+M7bvVuls st3A== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@kernel.org header.s=default header.b=krWsqwHy; spf=pass (google.com: best guess record for domain of stable-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=stable-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id o19si3411305ejc.315.2019.11.08.04.36.38; Fri, 08 Nov 2019 04:36:39 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of stable-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@kernel.org header.s=default header.b=krWsqwHy; spf=pass (google.com: best guess record for domain of stable-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=stable-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726979AbfKHMgi (ORCPT + 14 others); Fri, 8 Nov 2019 07:36:38 -0500 Received: from mail.kernel.org ([198.145.29.99]:44170 "EHLO mail.kernel.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726121AbfKHMgi (ORCPT ); Fri, 8 Nov 2019 07:36:38 -0500 Received: from localhost.localdomain (lfbn-mar-1-550-151.w90-118.abo.wanadoo.fr [90.118.131.151]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPSA id 003B9222CE; Fri, 8 Nov 2019 12:36:35 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=default; t=1573216597; bh=lfqNguIX+MS46uPt+mN0qDZclrGzkeCxHG39i5vuD9E=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=krWsqwHyo6DwWAFs7OvJ5/sUootB7W7uX9cXhbmaiqyt6g8HYLbGPxI1dyhDQ/RQJ QYPAj/XJ4Ek0UEkeW32I+WIbq4/FI2jkhrCoTqlswEz1bCRDT6WjlwDi2y3B9YbU6a feR4hWu3MDUAJlPldL8RaiFfYniHqD4hu6S2LF18= From: Ard Biesheuvel To: stable@vger.kernel.org Cc: linus.walleij@linaro.org, rmk+kernel@armlinux.org.uk, Marc Zyngier , Ard Biesheuvel Subject: [PATCH for-stable-4.4 15/50] arm/arm64: smccc-1.1: Make return values unsigned long Date: Fri, 8 Nov 2019 13:35:19 +0100 Message-Id: <20191108123554.29004-16-ardb@kernel.org> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20191108123554.29004-1-ardb@kernel.org> References: <20191108123554.29004-1-ardb@kernel.org> MIME-Version: 1.0 Sender: stable-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: stable@vger.kernel.org From: Marc Zyngier [ Upstream commit 1d8f574708a3fb6f18c85486d0c5217df893c0cf ] An unfortunate consequence of having a strong typing for the input values to the SMC call is that it also affects the type of the return values, limiting r0 to 32 bits and r{1,2,3} to whatever was passed as an input. Let's turn everything into "unsigned long", which satisfies the requirements of both architectures, and allows for the full range of return values. Reported-by: Julien Grall Signed-off-by: Marc Zyngier Signed-off-by: Will Deacon Signed-off-by: Sasha Levin Signed-off-by: Greg Kroah-Hartman Signed-off-by: Ard Biesheuvel --- include/linux/arm-smccc.h | 20 ++++++++++---------- 1 file changed, 10 insertions(+), 10 deletions(-) -- 2.20.1 diff --git a/include/linux/arm-smccc.h b/include/linux/arm-smccc.h index a4eec441f82d..9b340ff4fd7b 100644 --- a/include/linux/arm-smccc.h +++ b/include/linux/arm-smccc.h @@ -167,31 +167,31 @@ asmlinkage void arm_smccc_hvc(unsigned long a0, unsigned long a1, #define __declare_arg_0(a0, res) \ struct arm_smccc_res *___res = res; \ - register u32 r0 asm("r0") = a0; \ + register unsigned long r0 asm("r0") = (u32)a0; \ register unsigned long r1 asm("r1"); \ register unsigned long r2 asm("r2"); \ register unsigned long r3 asm("r3") #define __declare_arg_1(a0, a1, res) \ struct arm_smccc_res *___res = res; \ - register u32 r0 asm("r0") = a0; \ - register typeof(a1) r1 asm("r1") = a1; \ + register unsigned long r0 asm("r0") = (u32)a0; \ + register unsigned long r1 asm("r1") = a1; \ register unsigned long r2 asm("r2"); \ register unsigned long r3 asm("r3") #define __declare_arg_2(a0, a1, a2, res) \ struct arm_smccc_res *___res = res; \ - register u32 r0 asm("r0") = a0; \ - register typeof(a1) r1 asm("r1") = a1; \ - register typeof(a2) r2 asm("r2") = a2; \ + register unsigned long r0 asm("r0") = (u32)a0; \ + register unsigned long r1 asm("r1") = a1; \ + register unsigned long r2 asm("r2") = a2; \ register unsigned long r3 asm("r3") #define __declare_arg_3(a0, a1, a2, a3, res) \ struct arm_smccc_res *___res = res; \ - register u32 r0 asm("r0") = a0; \ - register typeof(a1) r1 asm("r1") = a1; \ - register typeof(a2) r2 asm("r2") = a2; \ - register typeof(a3) r3 asm("r3") = a3 + register unsigned long r0 asm("r0") = (u32)a0; \ + register unsigned long r1 asm("r1") = a1; \ + register unsigned long r2 asm("r2") = a2; \ + register unsigned long r3 asm("r3") = a3 #define __declare_arg_4(a0, a1, a2, a3, a4, res) \ __declare_arg_3(a0, a1, a2, a3, res); \ From patchwork Fri Nov 8 12:35:20 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ard Biesheuvel X-Patchwork-Id: 178902 Delivered-To: patch@linaro.org Received: by 2002:a92:38d5:0:0:0:0:0 with SMTP id g82csp2636694ilf; Fri, 8 Nov 2019 04:36:41 -0800 (PST) X-Google-Smtp-Source: APXvYqzlEvdwsUNguOjSeIQGbwTs/mR2x7ujnDUsWwVNt5gO4gXUbYV7QyntU0f2v5KDDTzQ48vy X-Received: by 2002:a17:906:48b:: with SMTP id f11mr8327802eja.225.1573216601132; Fri, 08 Nov 2019 04:36:41 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1573216601; cv=none; d=google.com; s=arc-20160816; b=YXDK9+t6tD01U13PXi2LJYXcjwcu80/1gqJU/jhQwJnbiuiybwlr5ajc0Ams8aH4TN OaxG9FkyyU0PoQlVIZaKAmR0+oYZvmMxVoLyh1By+kWXGWgRohT0PBhaxB/wuRhMQ9Wi WpyGi/lgKYE0WV3IW14QlSWRfAYOguc+oh6S21WJOlg4p/FHOwcbEMSDSv+7hXgbj5g/ 1MmsIZyhglgyDNPrUp0z1SMWRa+tn8VJNjYg7fFuIpbk5qVHDSSP9g5VKiPnEJFgPaM/ Cx8r0LeRQLKUHlMbRT6S2pI7QsytWFg9dhS17QjAR7RiXvPcCQJv9/Lhl/qsP9jZ6OGA 7mMw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=oXzDF4kUMSNpL2LfGqVke6muD1Fhdk6CRhidJoae45I=; b=QBg2cL+EUTAwZY/VL3dItxkDm0HDK2m+vkZVVC5wDF7YZ9P8yN8qRTNNVV4fb8q4aH 7XVzsT0Ajs9ALMGrfvGhY1En4geaZYhrrlPHEqXAAe/zP0ca0mptzu9FHGZrz7iYk9fW h0Gziw5pjM9g40xBXVADbe3/O6NG0Xv/eiJZfOBJkmIdGRAukQSIxmKbsnAXJ41dNuK0 zfbYRQXz8ggnZ1L61B2Gx6fTp/Tpi2PPsrgo+1LmY12xJLRRfVNhVhZxB6/aYljPOy12 6dj9wBd4QjwMNuTL+nTMtrTshCRrY6EL1dyO35TRWQSpzR6eHbd9xLqlqdEBkSxbbstd l8Uw== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@kernel.org header.s=default header.b=qsWzBCOO; spf=pass (google.com: best guess record for domain of stable-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=stable-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id o19si3411305ejc.315.2019.11.08.04.36.40; Fri, 08 Nov 2019 04:36:41 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of stable-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@kernel.org header.s=default header.b=qsWzBCOO; spf=pass (google.com: best guess record for domain of stable-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=stable-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726983AbfKHMgk (ORCPT + 14 others); Fri, 8 Nov 2019 07:36:40 -0500 Received: from mail.kernel.org ([198.145.29.99]:44190 "EHLO mail.kernel.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726121AbfKHMgk (ORCPT ); Fri, 8 Nov 2019 07:36:40 -0500 Received: from localhost.localdomain (lfbn-mar-1-550-151.w90-118.abo.wanadoo.fr [90.118.131.151]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPSA id A63B522473; Fri, 8 Nov 2019 12:36:37 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=default; t=1573216598; bh=WSTMKA6CZD25gPji7U33DAMleVGxbEX54DWnjjhYd2E=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=qsWzBCOOTQsAdHUWwvrPJ/p6mVzuIJsxSPXaUgtM7iD76kS1OZGdt0rCggv5iayAp spZJiVcJNjl6e2CiRDlZ6/4dvAoCZCeJReFSNyTViROCSsyBDOODU6RRqE1ivkxJuU x1GpGjzT6rQkErbpkwWj6vHTsst/Qhz5nCN9HLZ4= From: Ard Biesheuvel To: stable@vger.kernel.org Cc: linus.walleij@linaro.org, rmk+kernel@armlinux.org.uk, Marc Zyngier , Ard Biesheuvel Subject: [PATCH for-stable-4.4 16/50] arm/arm64: smccc-1.1: Handle function result as parameters Date: Fri, 8 Nov 2019 13:35:20 +0100 Message-Id: <20191108123554.29004-17-ardb@kernel.org> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20191108123554.29004-1-ardb@kernel.org> References: <20191108123554.29004-1-ardb@kernel.org> MIME-Version: 1.0 Sender: stable-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: stable@vger.kernel.org From: Marc Zyngier [ Upstream commit 755a8bf5579d22eb5636685c516d8dede799e27b ] If someone has the silly idea to write something along those lines: extern u64 foo(void); void bar(struct arm_smccc_res *res) { arm_smccc_1_1_smc(0xbad, foo(), res); } they are in for a surprise, as this gets compiled as: 0000000000000588 : 588: a9be7bfd stp x29, x30, [sp, #-32]! 58c: 910003fd mov x29, sp 590: f9000bf3 str x19, [sp, #16] 594: aa0003f3 mov x19, x0 598: aa1e03e0 mov x0, x30 59c: 94000000 bl 0 <_mcount> 5a0: 94000000 bl 0 5a4: aa0003e1 mov x1, x0 5a8: d4000003 smc #0x0 5ac: b4000073 cbz x19, 5b8 5b0: a9000660 stp x0, x1, [x19] 5b4: a9010e62 stp x2, x3, [x19, #16] 5b8: f9400bf3 ldr x19, [sp, #16] 5bc: a8c27bfd ldp x29, x30, [sp], #32 5c0: d65f03c0 ret 5c4: d503201f nop The call to foo "overwrites" the x0 register for the return value, and we end up calling the wrong secure service. A solution is to evaluate all the parameters before assigning anything to specific registers, leading to the expected result: 0000000000000588 : 588: a9be7bfd stp x29, x30, [sp, #-32]! 58c: 910003fd mov x29, sp 590: f9000bf3 str x19, [sp, #16] 594: aa0003f3 mov x19, x0 598: aa1e03e0 mov x0, x30 59c: 94000000 bl 0 <_mcount> 5a0: 94000000 bl 0 5a4: aa0003e1 mov x1, x0 5a8: d28175a0 mov x0, #0xbad 5ac: d4000003 smc #0x0 5b0: b4000073 cbz x19, 5bc 5b4: a9000660 stp x0, x1, [x19] 5b8: a9010e62 stp x2, x3, [x19, #16] 5bc: f9400bf3 ldr x19, [sp, #16] 5c0: a8c27bfd ldp x29, x30, [sp], #32 5c4: d65f03c0 ret Reported-by: Julien Grall Signed-off-by: Marc Zyngier Signed-off-by: Will Deacon Signed-off-by: Sasha Levin Signed-off-by: Greg Kroah-Hartman Signed-off-by: Ard Biesheuvel --- include/linux/arm-smccc.h | 30 +++++++++++++------- 1 file changed, 20 insertions(+), 10 deletions(-) -- 2.20.1 diff --git a/include/linux/arm-smccc.h b/include/linux/arm-smccc.h index 9b340ff4fd7b..78b8e0a61f3f 100644 --- a/include/linux/arm-smccc.h +++ b/include/linux/arm-smccc.h @@ -173,41 +173,51 @@ asmlinkage void arm_smccc_hvc(unsigned long a0, unsigned long a1, register unsigned long r3 asm("r3") #define __declare_arg_1(a0, a1, res) \ + typeof(a1) __a1 = a1; \ struct arm_smccc_res *___res = res; \ register unsigned long r0 asm("r0") = (u32)a0; \ - register unsigned long r1 asm("r1") = a1; \ + register unsigned long r1 asm("r1") = __a1; \ register unsigned long r2 asm("r2"); \ register unsigned long r3 asm("r3") #define __declare_arg_2(a0, a1, a2, res) \ + typeof(a1) __a1 = a1; \ + typeof(a2) __a2 = a2; \ struct arm_smccc_res *___res = res; \ register unsigned long r0 asm("r0") = (u32)a0; \ - register unsigned long r1 asm("r1") = a1; \ - register unsigned long r2 asm("r2") = a2; \ + register unsigned long r1 asm("r1") = __a1; \ + register unsigned long r2 asm("r2") = __a2; \ register unsigned long r3 asm("r3") #define __declare_arg_3(a0, a1, a2, a3, res) \ + typeof(a1) __a1 = a1; \ + typeof(a2) __a2 = a2; \ + typeof(a3) __a3 = a3; \ struct arm_smccc_res *___res = res; \ register unsigned long r0 asm("r0") = (u32)a0; \ - register unsigned long r1 asm("r1") = a1; \ - register unsigned long r2 asm("r2") = a2; \ - register unsigned long r3 asm("r3") = a3 + register unsigned long r1 asm("r1") = __a1; \ + register unsigned long r2 asm("r2") = __a2; \ + register unsigned long r3 asm("r3") = __a3 #define __declare_arg_4(a0, a1, a2, a3, a4, res) \ + typeof(a4) __a4 = a4; \ __declare_arg_3(a0, a1, a2, a3, res); \ - register typeof(a4) r4 asm("r4") = a4 + register unsigned long r4 asm("r4") = __a4 #define __declare_arg_5(a0, a1, a2, a3, a4, a5, res) \ + typeof(a5) __a5 = a5; \ __declare_arg_4(a0, a1, a2, a3, a4, res); \ - register typeof(a5) r5 asm("r5") = a5 + register unsigned long r5 asm("r5") = __a5 #define __declare_arg_6(a0, a1, a2, a3, a4, a5, a6, res) \ + typeof(a6) __a6 = a6; \ __declare_arg_5(a0, a1, a2, a3, a4, a5, res); \ - register typeof(a6) r6 asm("r6") = a6 + register unsigned long r6 asm("r6") = __a6 #define __declare_arg_7(a0, a1, a2, a3, a4, a5, a6, a7, res) \ + typeof(a7) __a7 = a7; \ __declare_arg_6(a0, a1, a2, a3, a4, a5, a6, res); \ - register typeof(a7) r7 asm("r7") = a7 + register unsigned long r7 asm("r7") = __a7 #define ___declare_args(count, ...) __declare_arg_ ## count(__VA_ARGS__) #define __declare_args(count, ...) ___declare_args(count, __VA_ARGS__)