From patchwork Sat Nov 9 15:15:15 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Grygorii Strashko X-Patchwork-Id: 179023 Delivered-To: patch@linaro.org Received: by 2002:a92:38d5:0:0:0:0:0 with SMTP id g82csp4307409ilf; Sat, 9 Nov 2019 07:16:04 -0800 (PST) X-Google-Smtp-Source: APXvYqwIRPHIqm0G0Oy7EsKBHO0pD3Pmi2hj/jp6bc1EM/zcp1FU7b4X9Tw165T8Z81SB9GcoYbR X-Received: by 2002:a17:906:8141:: with SMTP id z1mr14559214ejw.128.1573312564764; Sat, 09 Nov 2019 07:16:04 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1573312564; cv=none; d=google.com; s=arc-20160816; b=1Eyf526yx6FooTb4SWq7m0aS7tCrnTW2IXJp88u8vDUbeP2qp+9tlpCfvM71K/KF9a DRU5OwkgNuDTcjfPtS/VQeboErDR5Ly8CoOcn5OXlFdDKUwrZ3bn/L7nTE6DYfNnCxfg ftL4euS6HEYRJBjK+EIORSdB34eLb7J07tU5ILgLCNSiVKviUvaqbdX9GXgBgD7A8x5J VpBlf2bcEEPXj7zyAUo2nVJlgvZUrLsbA9mG4BTP1hkuQsdNEAqiCCkam3n5+xN75JYW fnMBaRNxgmkQyg83G+kHvZsscV+oYfAbeMK4rA8P4eHtcsfqS34Na/tLoZO9ySM6dzzy qiYg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:dkim-signature; bh=XXR2u0gdRak80i7pzoRzSNxStU4rnWKt2lklBYWgMGg=; b=rIQoGCMhVhWB4yat6p/hLU+ywRZSiGQKZ0MQ5N2b2GlRTFce+M+XZ7qO9aaZLy/PCX EKjeT9iLkjSISnE9P0YZ1HZ8Yn9UyGD/EwDXtkqKygdmTfHJPr5mWmrqZV8Qqmmd2nHo 1rcuLvOLiRopiSiJUvapDpeyD6l3c0kyOjdPjTjigwKFl1kiYVjfEIwtk1GFCqHpzz33 wwmhdhhKebeD4xj2yHZuBwq6ZKsGf+PofcszNdTAkwcTg8ROmQEBdLRTvPeXUtbA1T7b Ew3gug1HSZBSre2T/DU+YvaiOk1lXEkEFfZ9980tJ6JsE08Yg1yNu8M7t7razd3uhQOD JZKg== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@ti.com header.s=ti-com-17Q1 header.b=BT4vH0lE; spf=pass (google.com: best guess record for domain of netdev-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=netdev-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=NONE dis=NONE) header.from=ti.com Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id n2si5988996ejx.38.2019.11.09.07.16.04; Sat, 09 Nov 2019 07:16:04 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of netdev-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@ti.com header.s=ti-com-17Q1 header.b=BT4vH0lE; spf=pass (google.com: best guess record for domain of netdev-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=netdev-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=NONE dis=NONE) header.from=ti.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726778AbfKIPQB (ORCPT + 9 others); Sat, 9 Nov 2019 10:16:01 -0500 Received: from lelv0143.ext.ti.com ([198.47.23.248]:39496 "EHLO lelv0143.ext.ti.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726597AbfKIPQA (ORCPT ); Sat, 9 Nov 2019 10:16:00 -0500 Received: from fllv0034.itg.ti.com ([10.64.40.246]) by lelv0143.ext.ti.com (8.15.2/8.15.2) with ESMTP id xA9FFrgQ067040; Sat, 9 Nov 2019 09:15:53 -0600 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ti.com; s=ti-com-17Q1; t=1573312553; bh=XXR2u0gdRak80i7pzoRzSNxStU4rnWKt2lklBYWgMGg=; h=From:To:CC:Subject:Date:In-Reply-To:References; b=BT4vH0lE8+W8ClqDQlMkXiby7CHOUvhkRUBk8gk2k8MrX7QndsGdKFJ7iUIq0vSfP UtqCcRYoRRz2DfcYcGlNvJSFjrQQxp1x79MIgG8X8/m6dTxdiIzs1DZMwtLA6f3XE5 Uy2ags8qsUD6A0+I9ZZue8oS+TmgPX2edsxr6AHk= Received: from DFLE115.ent.ti.com (dfle115.ent.ti.com [10.64.6.36]) by fllv0034.itg.ti.com (8.15.2/8.15.2) with ESMTPS id xA9FFreF087406 (version=TLSv1.2 cipher=AES256-GCM-SHA384 bits=256 verify=FAIL); Sat, 9 Nov 2019 09:15:53 -0600 Received: from DFLE115.ent.ti.com (10.64.6.36) by DFLE115.ent.ti.com (10.64.6.36) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.1847.3; Sat, 9 Nov 2019 09:15:36 -0600 Received: from fllv0039.itg.ti.com (10.64.41.19) by DFLE115.ent.ti.com (10.64.6.36) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.1847.3 via Frontend Transport; Sat, 9 Nov 2019 09:15:36 -0600 Received: from localhost (ileax41-snat.itg.ti.com [10.172.224.153]) by fllv0039.itg.ti.com (8.15.2/8.15.2) with ESMTP id xA9FFpBA047269; Sat, 9 Nov 2019 09:15:52 -0600 From: Grygorii Strashko To: Florian Fainelli , , Ilias Apalodimas , Andrew Lunn , "David S . Miller" , Ivan Khoronzhuk , Jiri Pirko CC: Sekhar Nori , , , Murali Karicheri , Ivan Vecera , Rob Herring , , Grygorii Strashko Subject: [PATCH v6 net-next 03/13] net: ethernet: ti: ale: modify vlan/mdb api for switchdev Date: Sat, 9 Nov 2019 17:15:15 +0200 Message-ID: <20191109151525.18651-4-grygorii.strashko@ti.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20191109151525.18651-1-grygorii.strashko@ti.com> References: <20191109151525.18651-1-grygorii.strashko@ti.com> MIME-Version: 1.0 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 Sender: netdev-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: netdev@vger.kernel.org From: Ilias Apalodimas A following patch introduces switchdev functionality, so modify ALE engine VLANs/MDBs API: - cpsw_ale_del_mcast(): update so it will remove only selected ports from mcast port_mask or delete whole mcast record if !port_mask - cpsw_ale_del_vlan(): update so it will remove only selected ports from all VLAN record's masks or delete whole VLAN record if !port_mask - add cpsw_ale_vlan_add_modify() to add or modify existing VLAN record's masks - add cpsw_ale_set_unreg_mcast() for enabling unreg mcast on port VLANs Signed-off-by: Ilias Apalodimas Signed-off-by: Grygorii Strashko --- drivers/net/ethernet/ti/cpsw_ale.c | 127 ++++++++++++++++++++++++++--- drivers/net/ethernet/ti/cpsw_ale.h | 6 ++ 2 files changed, 123 insertions(+), 10 deletions(-) -- 2.17.1 diff --git a/drivers/net/ethernet/ti/cpsw_ale.c b/drivers/net/ethernet/ti/cpsw_ale.c index 977bb4251100..1d9214b0cd11 100644 --- a/drivers/net/ethernet/ti/cpsw_ale.c +++ b/drivers/net/ethernet/ti/cpsw_ale.c @@ -384,6 +384,7 @@ int cpsw_ale_del_mcast(struct cpsw_ale *ale, const u8 *addr, int port_mask, int flags, u16 vid) { u32 ale_entry[ALE_ENTRY_WORDS] = {0, 0, 0}; + int mcast_members; int idx; idx = cpsw_ale_match_addr(ale, addr, (flags & ALE_VLAN) ? vid : 0); @@ -392,11 +393,15 @@ int cpsw_ale_del_mcast(struct cpsw_ale *ale, const u8 *addr, int port_mask, cpsw_ale_read(ale, idx, ale_entry); - if (port_mask) - cpsw_ale_set_port_mask(ale_entry, port_mask, + if (port_mask) { + mcast_members = cpsw_ale_get_port_mask(ale_entry, + ale->port_mask_bits); + mcast_members &= ~port_mask; + cpsw_ale_set_port_mask(ale_entry, mcast_members, ale->port_mask_bits); - else + } else { cpsw_ale_set_entry_type(ale_entry, ALE_TYPE_FREE); + } cpsw_ale_write(ale, idx, ale_entry); return 0; @@ -428,7 +433,7 @@ static void cpsw_ale_set_vlan_untag(struct cpsw_ale *ale, u32 *ale_entry, bitmap_clear(ale->p0_untag_vid_mask, vid, 1); } -int cpsw_ale_add_vlan(struct cpsw_ale *ale, u16 vid, int port, int untag, +int cpsw_ale_add_vlan(struct cpsw_ale *ale, u16 vid, int port_mask, int untag, int reg_mcast, int unreg_mcast) { u32 ale_entry[ALE_ENTRY_WORDS] = {0, 0, 0}; @@ -450,7 +455,8 @@ int cpsw_ale_add_vlan(struct cpsw_ale *ale, u16 vid, int port, int untag, } else { cpsw_ale_set_vlan_mcast(ale, ale_entry, reg_mcast, unreg_mcast); } - cpsw_ale_set_vlan_member_list(ale_entry, port, ale->vlan_field_bits); + cpsw_ale_set_vlan_member_list(ale_entry, port_mask, + ale->vlan_field_bits); if (idx < 0) idx = cpsw_ale_match_free(ale); @@ -463,6 +469,41 @@ int cpsw_ale_add_vlan(struct cpsw_ale *ale, u16 vid, int port, int untag, return 0; } +static void cpsw_ale_del_vlan_modify(struct cpsw_ale *ale, u32 *ale_entry, + u16 vid, int port_mask) +{ + int reg_mcast, unreg_mcast; + int members, untag; + + members = cpsw_ale_get_vlan_member_list(ale_entry, + ale->vlan_field_bits); + members &= ~port_mask; + + untag = cpsw_ale_get_vlan_untag_force(ale_entry, + ale->vlan_field_bits); + reg_mcast = cpsw_ale_get_vlan_reg_mcast(ale_entry, + ale->vlan_field_bits); + unreg_mcast = cpsw_ale_get_vlan_unreg_mcast(ale_entry, + ale->vlan_field_bits); + untag &= members; + reg_mcast &= members; + unreg_mcast &= members; + + cpsw_ale_set_vlan_untag(ale, ale_entry, vid, untag); + + if (!ale->params.nu_switch_ale) { + cpsw_ale_set_vlan_reg_mcast(ale_entry, reg_mcast, + ale->vlan_field_bits); + cpsw_ale_set_vlan_unreg_mcast(ale_entry, unreg_mcast, + ale->vlan_field_bits); + } else { + cpsw_ale_set_vlan_mcast(ale, ale_entry, reg_mcast, + unreg_mcast); + } + cpsw_ale_set_vlan_member_list(ale_entry, members, + ale->vlan_field_bits); +} + int cpsw_ale_del_vlan(struct cpsw_ale *ale, u16 vid, int port_mask) { u32 ale_entry[ALE_ENTRY_WORDS] = {0, 0, 0}; @@ -473,18 +514,84 @@ int cpsw_ale_del_vlan(struct cpsw_ale *ale, u16 vid, int port_mask) return -ENOENT; cpsw_ale_read(ale, idx, ale_entry); - cpsw_ale_set_vlan_untag(ale, ale_entry, vid, 0); - if (port_mask) - cpsw_ale_set_vlan_member_list(ale_entry, port_mask, - ale->vlan_field_bits); - else + if (port_mask) { + cpsw_ale_del_vlan_modify(ale, ale_entry, vid, port_mask); + } else { + cpsw_ale_set_vlan_untag(ale, ale_entry, vid, 0); cpsw_ale_set_entry_type(ale_entry, ALE_TYPE_FREE); + } cpsw_ale_write(ale, idx, ale_entry); + return 0; } +int cpsw_ale_vlan_add_modify(struct cpsw_ale *ale, u16 vid, int port_mask, + int untag_mask, int reg_mask, int unreg_mask) +{ + u32 ale_entry[ALE_ENTRY_WORDS] = {0, 0, 0}; + int reg_mcast_members, unreg_mcast_members; + int vlan_members, untag_members; + int idx, ret = 0; + + idx = cpsw_ale_match_vlan(ale, vid); + if (idx >= 0) + cpsw_ale_read(ale, idx, ale_entry); + + vlan_members = cpsw_ale_get_vlan_member_list(ale_entry, + ale->vlan_field_bits); + reg_mcast_members = cpsw_ale_get_vlan_reg_mcast(ale_entry, + ale->vlan_field_bits); + unreg_mcast_members = + cpsw_ale_get_vlan_unreg_mcast(ale_entry, + ale->vlan_field_bits); + untag_members = cpsw_ale_get_vlan_untag_force(ale_entry, + ale->vlan_field_bits); + + vlan_members |= port_mask; + untag_members = (untag_members & ~port_mask) | untag_mask; + reg_mcast_members = (reg_mcast_members & ~port_mask) | reg_mask; + unreg_mcast_members = (unreg_mcast_members & ~port_mask) | unreg_mask; + + ret = cpsw_ale_add_vlan(ale, vid, vlan_members, untag_members, + reg_mcast_members, unreg_mcast_members); + if (ret) { + dev_err(ale->params.dev, "Unable to add vlan\n"); + return ret; + } + dev_dbg(ale->params.dev, "port mask 0x%x untag 0x%x\n", vlan_members, + untag_mask); + + return ret; +} + +void cpsw_ale_set_unreg_mcast(struct cpsw_ale *ale, int unreg_mcast_mask, + bool add) +{ + u32 ale_entry[ALE_ENTRY_WORDS]; + int unreg_members = 0; + int type, idx; + + for (idx = 0; idx < ale->params.ale_entries; idx++) { + cpsw_ale_read(ale, idx, ale_entry); + type = cpsw_ale_get_entry_type(ale_entry); + if (type != ALE_TYPE_VLAN) + continue; + + unreg_members = + cpsw_ale_get_vlan_unreg_mcast(ale_entry, + ale->vlan_field_bits); + if (add) + unreg_members |= unreg_mcast_mask; + else + unreg_members &= ~unreg_mcast_mask; + cpsw_ale_set_vlan_unreg_mcast(ale_entry, unreg_members, + ale->vlan_field_bits); + cpsw_ale_write(ale, idx, ale_entry); + } +} + void cpsw_ale_set_allmulti(struct cpsw_ale *ale, int allmulti, int port) { u32 ale_entry[ALE_ENTRY_WORDS]; diff --git a/drivers/net/ethernet/ti/cpsw_ale.h b/drivers/net/ethernet/ti/cpsw_ale.h index 93d6d56d12f4..70d0955c2652 100644 --- a/drivers/net/ethernet/ti/cpsw_ale.h +++ b/drivers/net/ethernet/ti/cpsw_ale.h @@ -120,4 +120,10 @@ static inline int cpsw_ale_get_vlan_p0_untag(struct cpsw_ale *ale, u16 vid) { return test_bit(vid, ale->p0_untag_vid_mask); } + +int cpsw_ale_vlan_add_modify(struct cpsw_ale *ale, u16 vid, int port_mask, + int untag_mask, int reg_mcast, int unreg_mcast); +void cpsw_ale_set_unreg_mcast(struct cpsw_ale *ale, int unreg_mcast_mask, + bool add); + #endif From patchwork Sat Nov 9 15:15:25 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Grygorii Strashko X-Patchwork-Id: 179032 Delivered-To: patch@linaro.org Received: by 2002:a92:38d5:0:0:0:0:0 with SMTP id g82csp4308564ilf; Sat, 9 Nov 2019 07:17:04 -0800 (PST) X-Google-Smtp-Source: APXvYqw92yiSlCXUuhLm8bDL85ZEIWAuE97SP5+VtTgDFIMyMW+WGveAkAZFUwnULAp/E39Cp1Xe X-Received: by 2002:a17:906:4019:: with SMTP id v25mr14595752ejj.11.1573312623953; Sat, 09 Nov 2019 07:17:03 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1573312623; cv=none; d=google.com; s=arc-20160816; b=UB5TAGzRUw8GTODO76m18tFBSyZ9r9466Z/2p35z6SxPU/44QmmR7qyEmm4NmGoagd bVkQ1xt9ztGqTrrx4sELFpyYtSN4AfAeOm7SWV+GGizi//zdg0sxwYhd3SkEIsN+u1UV hu9s94C2LJfV2ilBcZfRoE1qFgCnAipgTLgOboLdLyPmJM8nCHMl4yhzKuRExJ95BZ6l q4BFIHG4Vszcg0TDKObCYMMgwNGvyfiGrbtW2gsnKAYBbIxvEaNoki30jgX7mM0DcBN8 Ctx+1f503ZF+c0/iIEnLl+ch5A2/DA8zYUVhf7+XlcpahgRgpGB1mZ50ApFCCvoG+8qy 4aEQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:dkim-signature; bh=xWIoQSrYXNWBqcNp2g+cclEnGktsP5JwTLkmsEQZEpM=; b=yXhexnZ11Be21a7jcooAY9RDGdPQQuC77ZPD0G72RAcMuJkbYBaICNEbfasyoVxQgh ECHlJZo4OXulyi4wkkKB1Qw9axOton9xYqykboDjVWnlKwBP7zIcMNM5T19xvNcrXqF2 nJ0O269nYHI2gBbfHT9AvN0yeJIrtceoWNzYVJt4pbCpULI2QJe5z1M3EFi1WxjQse01 jhogB5NPVd8IDYt/cW8e6eoLre1I8fDuAUa4IsEKQtn3dWqCiLqGut5knwUJIU2ea2c/ 7tWlkcNi8B4AR8RuXMev8wywm5VzoFzSuOzzuQIww2O3cf9amFFRb5u99lZMPn9mHLcw GaHg== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@ti.com header.s=ti-com-17Q1 header.b=yNdXtTrz; spf=pass (google.com: best guess record for domain of netdev-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=netdev-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=NONE dis=NONE) header.from=ti.com Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id mj3si6046708ejb.381.2019.11.09.07.17.03; Sat, 09 Nov 2019 07:17:03 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of netdev-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@ti.com header.s=ti-com-17Q1 header.b=yNdXtTrz; spf=pass (google.com: best guess record for domain of netdev-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=netdev-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=NONE dis=NONE) header.from=ti.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727143AbfKIPRA (ORCPT + 9 others); Sat, 9 Nov 2019 10:17:00 -0500 Received: from lelv0143.ext.ti.com ([198.47.23.248]:39694 "EHLO lelv0143.ext.ti.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1727050AbfKIPQ7 (ORCPT ); Sat, 9 Nov 2019 10:16:59 -0500 Received: from fllv0035.itg.ti.com ([10.64.41.0]) by lelv0143.ext.ti.com (8.15.2/8.15.2) with ESMTP id xA9FGqA1067260; Sat, 9 Nov 2019 09:16:52 -0600 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ti.com; s=ti-com-17Q1; t=1573312612; bh=xWIoQSrYXNWBqcNp2g+cclEnGktsP5JwTLkmsEQZEpM=; h=From:To:CC:Subject:Date:In-Reply-To:References; b=yNdXtTrztUhBab4VjOsMO7bUdlOX9QDrHAHHLfABSHUU8m2WlO4N/ZODCBi9RSH5C LJ/T+we68KA8YwQ5xo5fI9AE2r1r8d9Fph0+/OKhSmykY/04LegD4UoaoJy/7gbF1v qeeiBO9HpKs3dPTLDaDWJTv3xivEuFZOohe2A2BA= Received: from DLEE109.ent.ti.com (dlee109.ent.ti.com [157.170.170.41]) by fllv0035.itg.ti.com (8.15.2/8.15.2) with ESMTP id xA9FGqFp108670; Sat, 9 Nov 2019 09:16:52 -0600 Received: from DLEE108.ent.ti.com (157.170.170.38) by DLEE109.ent.ti.com (157.170.170.41) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.1847.3; Sat, 9 Nov 2019 09:16:35 -0600 Received: from fllv0040.itg.ti.com (10.64.41.20) by DLEE108.ent.ti.com (157.170.170.38) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.1847.3 via Frontend Transport; Sat, 9 Nov 2019 09:16:51 -0600 Received: from localhost (ileax41-snat.itg.ti.com [10.172.224.153]) by fllv0040.itg.ti.com (8.15.2/8.15.2) with ESMTP id xA9FGosN061723; Sat, 9 Nov 2019 09:16:51 -0600 From: Grygorii Strashko To: Florian Fainelli , , Ilias Apalodimas , Andrew Lunn , "David S . Miller" , Ivan Khoronzhuk , Jiri Pirko CC: Sekhar Nori , , , Murali Karicheri , Ivan Vecera , Rob Herring , , Grygorii Strashko Subject: [PATCH v6 net-next 13/13] arm: omap2plus_defconfig: enable new cpsw switchdev driver Date: Sat, 9 Nov 2019 17:15:25 +0200 Message-ID: <20191109151525.18651-14-grygorii.strashko@ti.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20191109151525.18651-1-grygorii.strashko@ti.com> References: <20191109151525.18651-1-grygorii.strashko@ti.com> MIME-Version: 1.0 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 Sender: netdev-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: netdev@vger.kernel.org Add CONFIG_TI_CPSW_SWITCHDEV option to enable new cpsw switchdev driver Signed-off-by: Grygorii Strashko --- arch/arm/configs/omap2plus_defconfig | 1 + 1 file changed, 1 insertion(+) -- 2.17.1 diff --git a/arch/arm/configs/omap2plus_defconfig b/arch/arm/configs/omap2plus_defconfig index 40d7f1a4fc45..89cce8d4bc6b 100644 --- a/arch/arm/configs/omap2plus_defconfig +++ b/arch/arm/configs/omap2plus_defconfig @@ -554,3 +554,4 @@ CONFIG_DEBUG_INFO_DWARF4=y CONFIG_MAGIC_SYSRQ=y CONFIG_SCHEDSTATS=y # CONFIG_DEBUG_BUGVERBOSE is not set +CONFIG_TI_CPSW_SWITCHDEV=y