From patchwork Mon Dec 2 10:29:04 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Andreas_F=C3=A4rber?= X-Patchwork-Id: 180585 Delivered-To: patch@linaro.org Received: by 2002:a92:3001:0:0:0:0:0 with SMTP id x1csp5010673ile; Mon, 2 Dec 2019 02:29:55 -0800 (PST) X-Google-Smtp-Source: APXvYqwTr04aClEKIN1SQQikTexyLvtndvK3XsKHJbc3K7T39+GIctoiqM7eRM46IQKQL/7C9pQ1 X-Received: by 2002:a17:906:1d50:: with SMTP id o16mr14935428ejh.111.1575282594899; Mon, 02 Dec 2019 02:29:54 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1575282594; cv=none; d=google.com; s=arc-20160816; b=1CkzPkXxSZS7kBFwfcU8jHBnn275b/7BsWloYv27qS1habeLLuR+zoGb5KQQkTAt79 DgZv5GmD2n/q8Fzkk2dQK46EyDy9cgz4dd0n/WM06PntWXPZ8pOgSeAdeDkEGSPbfAwc 8woziFQWJiFjVtdHfS3PPD792iqR5fJmpSZI68fGfJtaApDVIAI6qivjXpTD8tyuD+cG 0jUPIkt3yXP5WFauoK8oHDaJu7LE0PrcQtsbmtPk1aX0+9y4NRYxd886sh0eJ+SDe0V9 /BYJmxyUPpLNASLKlAo7sL6IvlsVi+PmmHiKQL0k2Rr+Z5G9WAVHaTaSxRIPRBBBndtx OyiA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from; bh=rqmJ+MLUqIwO/rObser9An9b2bYpvXRp3EK9jFOMoLM=; b=CYW1qTlTGNB9gTcNg+BlH3Pl39eNJOSN/079GqGaEXWwfPV9n0GVKndmwgXN8eRaxZ Hkbk1Z43Ar8EW67b2pUuKcnWxBvEMZHJJcoMAZ9W9IL/0f9WEJeHPFhPnVfGOq6aSXF0 3eXR7rxOKmg+XosL+6dDcMnpBz9WATmw6oEa0PwKdGpJ3Qk+KX9U6qSPUcXQhA3uMtRj HvjdgJHXoJ7N6+AaOgjIHyfC12l4RDYdXSgcWI0CWe8xXPWmmwfXgJs0DJYC/ML5llXf S2fncEQxTAxKj3VQpbNt45bOPEALTbj5UzkG1iCCsJMzVoD/1QnZdB05DBqkJx8mXFMc P7XQ== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id f9si20193873edy.221.2019.12.02.02.29.54; Mon, 02 Dec 2019 02:29:54 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727553AbfLBK3u (ORCPT + 27 others); Mon, 2 Dec 2019 05:29:50 -0500 Received: from mx2.suse.de ([195.135.220.15]:57520 "EHLO mx1.suse.de" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S1727378AbfLBK3W (ORCPT ); Mon, 2 Dec 2019 05:29:22 -0500 X-Virus-Scanned: by amavisd-new at test-mx.suse.de Received: from relay2.suse.de (unknown [195.135.220.254]) by mx1.suse.de (Postfix) with ESMTP id EEFA4B279; Mon, 2 Dec 2019 10:29:19 +0000 (UTC) From: =?utf-8?q?Andreas_F=C3=A4rber?= To: linux-realtek-soc@lists.infradead.org Cc: linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, =?utf-8?q?Andreas_F=C3=A4rber?= , Rob Herring , Mark Rutland , devicetree@vger.kernel.org Subject: [PATCH v2 3/9] arm64: dts: realtek: rtd129x: Introduce r-bus Date: Mon, 2 Dec 2019 11:29:04 +0100 Message-Id: <20191202102910.26916-4-afaerber@suse.de> X-Mailer: git-send-email 2.16.4 In-Reply-To: <20191202102910.26916-1-afaerber@suse.de> References: <20191202102910.26916-1-afaerber@suse.de> MIME-Version: 1.0 Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Model Realtek's register bus in DT. Signed-off-by: Andreas Färber --- v1 -> v2: * Fixed r-bus size from 0x100000 to 0x200000 (James) * Renamed node from r-bus to bus (Rob) arch/arm64/boot/dts/realtek/rtd129x.dtsi | 136 ++++++++++++++++--------------- 1 file changed, 72 insertions(+), 64 deletions(-) -- 2.16.4 diff --git a/arch/arm64/boot/dts/realtek/rtd129x.dtsi b/arch/arm64/boot/dts/realtek/rtd129x.dtsi index 8d80cca945bc..5e755dda7abb 100644 --- a/arch/arm64/boot/dts/realtek/rtd129x.dtsi +++ b/arch/arm64/boot/dts/realtek/rtd129x.dtsi @@ -55,70 +55,78 @@ /* Exclude up to 2 GiB of RAM */ ranges = <0x80000000 0x80000000 0x80000000>; - reset1: reset-controller@98000000 { - compatible = "snps,dw-low-reset"; - reg = <0x98000000 0x4>; - #reset-cells = <1>; - }; - - reset2: reset-controller@98000004 { - compatible = "snps,dw-low-reset"; - reg = <0x98000004 0x4>; - #reset-cells = <1>; - }; - - reset3: reset-controller@98000008 { - compatible = "snps,dw-low-reset"; - reg = <0x98000008 0x4>; - #reset-cells = <1>; - }; - - reset4: reset-controller@98000050 { - compatible = "snps,dw-low-reset"; - reg = <0x98000050 0x4>; - #reset-cells = <1>; - }; - - iso_reset: reset-controller@98007088 { - compatible = "snps,dw-low-reset"; - reg = <0x98007088 0x4>; - #reset-cells = <1>; - }; - - wdt: watchdog@98007680 { - compatible = "realtek,rtd1295-watchdog"; - reg = <0x98007680 0x100>; - clocks = <&osc27M>; - }; - - uart0: serial@98007800 { - compatible = "snps,dw-apb-uart"; - reg = <0x98007800 0x400>; - reg-shift = <2>; - reg-io-width = <4>; - clock-frequency = <27000000>; - resets = <&iso_reset RTD1295_ISO_RSTN_UR0>; - status = "disabled"; - }; - - uart1: serial@9801b200 { - compatible = "snps,dw-apb-uart"; - reg = <0x9801b200 0x100>; - reg-shift = <2>; - reg-io-width = <4>; - clock-frequency = <432000000>; - resets = <&reset2 RTD1295_RSTN_UR1>; - status = "disabled"; - }; - - uart2: serial@9801b400 { - compatible = "snps,dw-apb-uart"; - reg = <0x9801b400 0x100>; - reg-shift = <2>; - reg-io-width = <4>; - clock-frequency = <432000000>; - resets = <&reset2 RTD1295_RSTN_UR2>; - status = "disabled"; + rbus: bus@98000000 { + compatible = "simple-bus"; + reg = <0x98000000 0x200000>; + #address-cells = <1>; + #size-cells = <1>; + ranges = <0x0 0x98000000 0x200000>; + + reset1: reset-controller@0 { + compatible = "snps,dw-low-reset"; + reg = <0x0 0x4>; + #reset-cells = <1>; + }; + + reset2: reset-controller@4 { + compatible = "snps,dw-low-reset"; + reg = <0x4 0x4>; + #reset-cells = <1>; + }; + + reset3: reset-controller@8 { + compatible = "snps,dw-low-reset"; + reg = <0x8 0x4>; + #reset-cells = <1>; + }; + + reset4: reset-controller@50 { + compatible = "snps,dw-low-reset"; + reg = <0x50 0x4>; + #reset-cells = <1>; + }; + + iso_reset: reset-controller@7088 { + compatible = "snps,dw-low-reset"; + reg = <0x7088 0x4>; + #reset-cells = <1>; + }; + + wdt: watchdog@7680 { + compatible = "realtek,rtd1295-watchdog"; + reg = <0x7680 0x100>; + clocks = <&osc27M>; + }; + + uart0: serial@7800 { + compatible = "snps,dw-apb-uart"; + reg = <0x7800 0x400>; + reg-shift = <2>; + reg-io-width = <4>; + clock-frequency = <27000000>; + resets = <&iso_reset RTD1295_ISO_RSTN_UR0>; + status = "disabled"; + }; + + uart1: serial@1b200 { + compatible = "snps,dw-apb-uart"; + reg = <0x1b200 0x100>; + reg-shift = <2>; + reg-io-width = <4>; + clock-frequency = <432000000>; + resets = <&reset2 RTD1295_RSTN_UR1>; + status = "disabled"; + }; + + uart2: serial@1b400 { + compatible = "snps,dw-apb-uart"; + reg = <0x1b400 0x100>; + reg-shift = <2>; + reg-io-width = <4>; + clock-frequency = <432000000>; + resets = <&reset2 RTD1295_RSTN_UR2>; + status = "disabled"; + }; }; gic: interrupt-controller@ff011000 { From patchwork Mon Dec 2 10:29:07 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Andreas_F=C3=A4rber?= X-Patchwork-Id: 180583 Delivered-To: patch@linaro.org Received: by 2002:a92:3001:0:0:0:0:0 with SMTP id x1csp5010443ile; Mon, 2 Dec 2019 02:29:42 -0800 (PST) X-Google-Smtp-Source: APXvYqyamYAnWpH5Nv42FUE1xWMHFy+3VYybQ6kQEX3iiRRTn5fRSnYqSXKRsLvtKKRrUKB8EW2F X-Received: by 2002:a17:906:f90e:: with SMTP id lc14mr523538ejb.217.1575282582595; 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[209.132.180.67]) by mx.google.com with ESMTP id r8si2117358ejo.175.2019.12.02.02.29.42; Mon, 02 Dec 2019 02:29:42 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727468AbfLBK3Z (ORCPT + 27 others); Mon, 2 Dec 2019 05:29:25 -0500 Received: from mx2.suse.de ([195.135.220.15]:57574 "EHLO mx1.suse.de" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S1727433AbfLBK3X (ORCPT ); Mon, 2 Dec 2019 05:29:23 -0500 X-Virus-Scanned: by amavisd-new at test-mx.suse.de Received: from relay2.suse.de (unknown [195.135.220.254]) by mx1.suse.de (Postfix) with ESMTP id D2779B2BF; Mon, 2 Dec 2019 10:29:21 +0000 (UTC) From: =?utf-8?q?Andreas_F=C3=A4rber?= To: linux-realtek-soc@lists.infradead.org Cc: linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, =?utf-8?q?Andreas_F=C3=A4rber?= , Rob Herring , Mark Rutland , devicetree@vger.kernel.org Subject: [PATCH v2 6/9] dt-bindings: arm: realtek: Add RTD1395 and Banana Pi BPI-M4 Date: Mon, 2 Dec 2019 11:29:07 +0100 Message-Id: <20191202102910.26916-7-afaerber@suse.de> X-Mailer: git-send-email 2.16.4 In-Reply-To: <20191202102910.26916-1-afaerber@suse.de> References: <20191202102910.26916-1-afaerber@suse.de> MIME-Version: 1.0 Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Define compatible strings for Realtek RTD1395 SoC and BPI-M4 SBC. Reviewed-by: Rob Herring Signed-off-by: Andreas Färber --- v1 -> v2: Unchanged * Picked up Reviewed-by from Rob Documentation/devicetree/bindings/arm/realtek.yaml | 6 ++++++ 1 file changed, 6 insertions(+) -- 2.16.4 diff --git a/Documentation/devicetree/bindings/arm/realtek.yaml b/Documentation/devicetree/bindings/arm/realtek.yaml index 445c56cbdcbb..dc097ed5a7e5 100644 --- a/Documentation/devicetree/bindings/arm/realtek.yaml +++ b/Documentation/devicetree/bindings/arm/realtek.yaml @@ -41,6 +41,12 @@ properties: - synology,ds418 # Synology DiskStation DS418 - const: realtek,rtd1296 + # RTD1395 SoC based boards + - items: + - enum: + - bananapi,bpi-m4 # Banana Pi BPI-M4 + - const: realtek,rtd1395 + # RTD1619 SoC based boards - items: - enum: From patchwork Mon Dec 2 10:29:08 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Andreas_F=C3=A4rber?= X-Patchwork-Id: 180581 Delivered-To: patch@linaro.org Received: by 2002:a92:3001:0:0:0:0:0 with SMTP id x1csp5010303ile; Mon, 2 Dec 2019 02:29:33 -0800 (PST) X-Google-Smtp-Source: APXvYqxgFWOhKT1/OImfyhAkD3lHbdf8z8MNBeho+VIi5bIPvSUbTCTioH06OXSoISTCRAfGzpZu X-Received: by 2002:a17:906:8498:: with SMTP id m24mr53239720ejx.43.1575282573787; Mon, 02 Dec 2019 02:29:33 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1575282573; cv=none; d=google.com; s=arc-20160816; b=cM6fMBUqkmKw7sqAzxSI/oUcdK9g79SsVAqlIKLj3ZSaOjlg305g0CEQvIkuLD4cFz xcnNEqrucx7JxKoH0qPnFiBqdQfkbaQntVQ69gDv3AKaCn0aXaPVHt98LPbKSDKEjEwh xBjJ/C2qA5lMRQyZA1gmOTlFk8VsNAUu1yJlBlklR2fuuPHvwCvpKxqN+k86miW+59qe 33O5c3MVkPFqZ+EQTX6FPfYpIneSQNs/Ee4aM5mKBpy9EDygtCtB8M5KkrbY3u1uhptI XhzjnR0KV0i786fXzbAhUXy6f7uxsnc47gPuHPNTJzTvKQMhO/mJZKpbTxb8ARXPI9B1 QZPQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from; bh=uKhqY6U/ffZp6U+YmovXVpx6wyYlxpTx9OreC+7ITyU=; b=rbnOUEOln+PopUnuo4ku30W9vDVq+7OVSsEhO9VdUhc9U86RT6AU08spZbr5uw0NMC DUWPmJvHSdWdJsGJFGi9lk0TeOSMFkRQ4TELow48sHFbwWaLgEKtgiHk2EjI146rC6iQ /k4WyKAwBApWIHsH0rCbmU7AFly3CsxjgbM1FgKYqWRHbphXfm0HbxGxS2QBoeQyeBUM dXimccgOqFylu4Fo9JUHJKPeIEVsQ9CPiGjfeVVQHrCRwU3+tuhmXnoxRqOrKiKZbU6z xHXVO50aBzhFVZ0uZLbXegVm+tYQG9UW9KohyeBq1IIuOu8yONiUWaGjdnpMrV/UjB4G zeWQ== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id e1si9025259edn.154.2019.12.02.02.29.33; Mon, 02 Dec 2019 02:29:33 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727527AbfLBK33 (ORCPT + 27 others); Mon, 2 Dec 2019 05:29:29 -0500 Received: from mx2.suse.de ([195.135.220.15]:57614 "EHLO mx1.suse.de" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S1727442AbfLBK3Z (ORCPT ); Mon, 2 Dec 2019 05:29:25 -0500 X-Virus-Scanned: by amavisd-new at test-mx.suse.de Received: from relay2.suse.de (unknown [195.135.220.254]) by mx1.suse.de (Postfix) with ESMTP id 9DC99B2E6; Mon, 2 Dec 2019 10:29:22 +0000 (UTC) From: =?utf-8?q?Andreas_F=C3=A4rber?= To: linux-realtek-soc@lists.infradead.org Cc: linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, =?utf-8?q?Andreas_F=C3=A4rber?= , Rob Herring , Mark Rutland , devicetree@vger.kernel.org Subject: [PATCH v2 7/9] arm64: dts: realtek: Add RTD1395 and BPi-M4 Date: Mon, 2 Dec 2019 11:29:08 +0100 Message-Id: <20191202102910.26916-8-afaerber@suse.de> X-Mailer: git-send-email 2.16.4 In-Reply-To: <20191202102910.26916-1-afaerber@suse.de> References: <20191202102910.26916-1-afaerber@suse.de> MIME-Version: 1.0 Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Add Device Trees for Realtek RTD1395 SoC and Banana Pi BPi-M4 SBC. For now reuse RTD1295 reset constants. Signed-off-by: Andreas Färber --- To be followed up by patch unshadowing more RAM from /soc 0x98000000..0xffffffff, once we know the higher RAM windows. v1 -> v2: * Fixed r-bus size from 0x100000 to 0x200000 (James) * Changed #address-cells and #size-cells from 2 to 1 (James) * Carved out boot ROM from /memory and added it to /soc ranges (Rob/James) arch/arm64/boot/dts/realtek/Makefile | 2 + arch/arm64/boot/dts/realtek/rtd1395-bpi-m4.dts | 30 ++++++ arch/arm64/boot/dts/realtek/rtd1395.dtsi | 65 +++++++++++ arch/arm64/boot/dts/realtek/rtd139x.dtsi | 142 +++++++++++++++++++++++++ 4 files changed, 239 insertions(+) create mode 100644 arch/arm64/boot/dts/realtek/rtd1395-bpi-m4.dts create mode 100644 arch/arm64/boot/dts/realtek/rtd1395.dtsi create mode 100644 arch/arm64/boot/dts/realtek/rtd139x.dtsi -- 2.16.4 diff --git a/arch/arm64/boot/dts/realtek/Makefile b/arch/arm64/boot/dts/realtek/Makefile index fb5f05978ecc..f614080b5e27 100644 --- a/arch/arm64/boot/dts/realtek/Makefile +++ b/arch/arm64/boot/dts/realtek/Makefile @@ -8,4 +8,6 @@ dtb-$(CONFIG_ARCH_REALTEK) += rtd1295-zidoo-x9s.dtb dtb-$(CONFIG_ARCH_REALTEK) += rtd1296-ds418.dtb +dtb-$(CONFIG_ARCH_REALTEK) += rtd1395-bpi-m4.dtb + dtb-$(CONFIG_ARCH_REALTEK) += rtd1619-mjolnir.dtb diff --git a/arch/arm64/boot/dts/realtek/rtd1395-bpi-m4.dts b/arch/arm64/boot/dts/realtek/rtd1395-bpi-m4.dts new file mode 100644 index 000000000000..9891967d1315 --- /dev/null +++ b/arch/arm64/boot/dts/realtek/rtd1395-bpi-m4.dts @@ -0,0 +1,30 @@ +// SPDX-License-Identifier: (GPL-2.0-or-later OR BSD-2-Clause) +/* + * Copyright (c) 2019 Andreas Färber + */ + +/dts-v1/; + +#include "rtd1395.dtsi" + +/ { + compatible = "bananapi,bpi-m4", "realtek,rtd1395"; + model = "Banana Pi BPI-M4"; + + memory@2f000 { + device_type = "memory"; + reg = <0x2f000 0x3ffd1000>; /* boot ROM to 1 GiB or 2 GiB */ + }; + + aliases { + serial0 = &uart0; + }; + + chosen { + stdout-path = "serial0:115200n8"; + }; +}; + +&uart0 { + status = "okay"; +}; diff --git a/arch/arm64/boot/dts/realtek/rtd1395.dtsi b/arch/arm64/boot/dts/realtek/rtd1395.dtsi new file mode 100644 index 000000000000..05c9216a87ee --- /dev/null +++ b/arch/arm64/boot/dts/realtek/rtd1395.dtsi @@ -0,0 +1,65 @@ +// SPDX-License-Identifier: (GPL-2.0-or-later OR BSD-2-Clause) +/* + * Realtek RTD1395 SoC + * + * Copyright (c) 2019 Andreas Färber + */ + +#include "rtd139x.dtsi" + +/ { + compatible = "realtek,rtd1395"; + + cpus { + #address-cells = <2>; + #size-cells = <0>; + + cpu0: cpu@0 { + device_type = "cpu"; + compatible = "arm,cortex-a53"; + reg = <0x0 0x0>; + next-level-cache = <&l2>; + }; + + cpu1: cpu@1 { + device_type = "cpu"; + compatible = "arm,cortex-a53"; + reg = <0x0 0x1>; + next-level-cache = <&l2>; + }; + + cpu2: cpu@2 { + device_type = "cpu"; + compatible = "arm,cortex-a53"; + reg = <0x0 0x2>; + next-level-cache = <&l2>; + }; + + cpu3: cpu@3 { + device_type = "cpu"; + compatible = "arm,cortex-a53"; + reg = <0x0 0x3>; + next-level-cache = <&l2>; + }; + + l2: l2-cache { + compatible = "cache"; + }; + }; + + timer { + compatible = "arm,armv8-timer"; + interrupts = , + , + , + ; + }; +}; + +&arm_pmu { + interrupt-affinity = <&cpu0>, <&cpu1>, <&cpu2>, <&cpu3>; +}; diff --git a/arch/arm64/boot/dts/realtek/rtd139x.dtsi b/arch/arm64/boot/dts/realtek/rtd139x.dtsi new file mode 100644 index 000000000000..c11a505e43e2 --- /dev/null +++ b/arch/arm64/boot/dts/realtek/rtd139x.dtsi @@ -0,0 +1,142 @@ +// SPDX-License-Identifier: (GPL-2.0-or-later OR BSD-2-Clause) +/* + * Realtek RTD1395 SoC family + * + * Copyright (c) 2019 Andreas Färber + */ + +/memreserve/ 0x0000000000000000 0x000000000002f000; +/memreserve/ 0x000000000002f000 0x00000000000d1000; + +#include +#include + +/ { + interrupt-parent = <&gic>; + #address-cells = <1>; + #size-cells = <1>; + + reserved-memory { + #address-cells = <1>; + #size-cells = <1>; + ranges; + + rpc_comm: rpc@2f000 { + reg = <0x2f000 0x1000>; + }; + + rpc_ringbuf: rpc@1ffe000 { + reg = <0x1ffe000 0x4000>; + }; + + tee: tee@10100000 { + reg = <0x10100000 0xf00000>; + no-map; + }; + }; + + arm_pmu: arm-pmu { + compatible = "arm,cortex-a53-pmu"; + interrupts = ; + }; + + osc27M: osc { + compatible = "fixed-clock"; + clock-frequency = <27000000>; + #clock-cells = <0>; + clock-output-names = "osc27M"; + }; + + soc { + compatible = "simple-bus"; + #address-cells = <1>; + #size-cells = <1>; + ranges = <0x00000000 0x00000000 0x0001f000>, /* boot ROM */ + <0x98000000 0x98000000 0x68000000>; + + rbus: bus@98000000 { + compatible = "simple-bus"; + reg = <0x98000000 0x200000>; + #address-cells = <1>; + #size-cells = <1>; + ranges = <0x0 0x98000000 0x200000>; + + reset1: reset-controller@0 { + compatible = "snps,dw-low-reset"; + reg = <0x0 0x4>; + #reset-cells = <1>; + }; + + reset2: reset-controller@4 { + compatible = "snps,dw-low-reset"; + reg = <0x4 0x4>; + #reset-cells = <1>; + }; + + reset3: reset-controller@8 { + compatible = "snps,dw-low-reset"; + reg = <0x8 0x4>; + #reset-cells = <1>; + }; + + reset4: reset-controller@50 { + compatible = "snps,dw-low-reset"; + reg = <0x50 0x4>; + #reset-cells = <1>; + }; + + iso_reset: reset-controller@7088 { + compatible = "snps,dw-low-reset"; + reg = <0x7088 0x4>; + #reset-cells = <1>; + }; + + wdt: watchdog@7680 { + compatible = "realtek,rtd1295-watchdog"; + reg = <0x7680 0x100>; + clocks = <&osc27M>; + }; + + uart0: serial@7800 { + compatible = "snps,dw-apb-uart"; + reg = <0x7800 0x400>; + reg-shift = <2>; + reg-io-width = <4>; + clock-frequency = <27000000>; + resets = <&iso_reset RTD1295_ISO_RSTN_UR0>; + status = "disabled"; + }; + + uart1: serial@1b200 { + compatible = "snps,dw-apb-uart"; + reg = <0x1b200 0x100>; + reg-shift = <2>; + reg-io-width = <4>; + clock-frequency = <432000000>; + resets = <&reset2 RTD1295_RSTN_UR1>; + status = "disabled"; + }; + + uart2: serial@1b400 { + compatible = "snps,dw-apb-uart"; + reg = <0x1b400 0x100>; + reg-shift = <2>; + reg-io-width = <4>; + clock-frequency = <432000000>; + resets = <&reset2 RTD1295_RSTN_UR2>; + status = "disabled"; + }; + }; + + gic: interrupt-controller@ff011000 { + compatible = "arm,gic-400"; + reg = <0xff011000 0x1000>, + <0xff012000 0x2000>, + <0xff014000 0x2000>, + <0xff016000 0x2000>; + interrupts = ; + interrupt-controller; + #interrupt-cells = <3>; + }; + }; +}; From patchwork Mon Dec 2 10:29:09 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Andreas_F=C3=A4rber?= X-Patchwork-Id: 180582 Delivered-To: patch@linaro.org Received: by 2002:a92:3001:0:0:0:0:0 with SMTP id x1csp5010308ile; Mon, 2 Dec 2019 02:29:34 -0800 (PST) X-Google-Smtp-Source: APXvYqzTr3fLgcEeOHWXFa/QjWS7TPssOeMV0uvxwknF3HN7nRfej+YX7M5a1rVO4zp5tB0OLblI X-Received: by 2002:a50:eb95:: with SMTP id y21mr32828328edr.212.1575282574241; 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[209.132.180.67]) by mx.google.com with ESMTP id e1si9025259edn.154.2019.12.02.02.29.34; Mon, 02 Dec 2019 02:29:34 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727513AbfLBK32 (ORCPT + 27 others); Mon, 2 Dec 2019 05:29:28 -0500 Received: from mx2.suse.de ([195.135.220.15]:57626 "EHLO mx1.suse.de" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S1727451AbfLBK3Y (ORCPT ); Mon, 2 Dec 2019 05:29:24 -0500 X-Virus-Scanned: by amavisd-new at test-mx.suse.de Received: from relay2.suse.de (unknown [195.135.220.254]) by mx1.suse.de (Postfix) with ESMTP id 0D394AD00; Mon, 2 Dec 2019 10:29:23 +0000 (UTC) From: =?utf-8?q?Andreas_F=C3=A4rber?= To: linux-realtek-soc@lists.infradead.org Cc: linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, =?utf-8?q?Andreas_F=C3=A4rber?= , Rob Herring , Mark Rutland , devicetree@vger.kernel.org Subject: [PATCH v2 8/9] dt-bindings: arm: realtek: Add Realtek Lion Skin EVB Date: Mon, 2 Dec 2019 11:29:09 +0100 Message-Id: <20191202102910.26916-9-afaerber@suse.de> X-Mailer: git-send-email 2.16.4 In-Reply-To: <20191202102910.26916-1-afaerber@suse.de> References: <20191202102910.26916-1-afaerber@suse.de> MIME-Version: 1.0 Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Define a compatible string for Realtek RTD1395 Lion Skin eval board. Signed-off-by: Andreas Färber --- v2: New Documentation/devicetree/bindings/arm/realtek.yaml | 1 + 1 file changed, 1 insertion(+) -- 2.16.4 diff --git a/Documentation/devicetree/bindings/arm/realtek.yaml b/Documentation/devicetree/bindings/arm/realtek.yaml index dc097ed5a7e5..40ca4c3f21f4 100644 --- a/Documentation/devicetree/bindings/arm/realtek.yaml +++ b/Documentation/devicetree/bindings/arm/realtek.yaml @@ -45,6 +45,7 @@ properties: - items: - enum: - bananapi,bpi-m4 # Banana Pi BPI-M4 + - realtek,lion-skin # Realtek Lion Skin EVB - const: realtek,rtd1395 # RTD1619 SoC based boards From patchwork Mon Dec 2 10:29:10 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Andreas_F=C3=A4rber?= X-Patchwork-Id: 180584 Delivered-To: patch@linaro.org Received: by 2002:a92:3001:0:0:0:0:0 with SMTP id x1csp5010495ile; Mon, 2 Dec 2019 02:29:45 -0800 (PST) X-Google-Smtp-Source: APXvYqwGJ88iS1lNf9riYE18AIuOBjNM4YhCfiInTfX6hkaEmjBqC6IBb33063Db5YAHM5Gbzplb X-Received: by 2002:a05:6402:38c:: with SMTP id o12mr3522005edv.273.1575282585049; Mon, 02 Dec 2019 02:29:45 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1575282585; cv=none; d=google.com; s=arc-20160816; b=Hh04c75Sz59joQUz3m1VgahzWOUAUGhLZXr22VdF95cbohXt4CSGTcHBpAd4IoObCo HphacGwdTOQw4ihRJSW/YQr1PUL3Fv8ePrA6WhBPvayY66LTte2tI8CRgFYcAzWVsgrZ hStRtWlDYn/2jcc3b5Qa15WE1AIgDz4BfBSZaR68U2/xE1gfECxoOvnimjig2L6xkBZF QABIQhBTvIgqzyqIbH/+Rp0idbTtYdOw49ZHuZSmFvAU6jxoDFsWJATqHpGF79u3ED/z QLqhvJ8mFZLjSQiWCTVVaPJEpepiE2WSQ1KElVb8AtXMMVqKqqKZo8EPoKiCLeakOIlD JtCA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from; bh=cEhr5dDmLc4c3B8BdAQuWU1kIuZHVwigIOnjQp1o0Ew=; b=TTrlDIaYgxkgPiyFYAxjWr0i0JcKIZ3s79bJ64G/Ez1mr0wMvbvR53XMO7i3aSeY9h 0N3U31ZRYiitsxGF59gjag6+gDLb+YywFFNrywGDMzgHFzxqMEUqXOxUOYuCSB+OUtxQ qaYIC/KmUGv7rNDGgitj8Ht5YGjPw2wCOg5mn+J4nkm01K4BVJ1P0NS2PZIxnK3oizNh BksefPP0O6xGEj2nn9iwpjKZRsdSx837gyi1C2mftDhv6Of73nCIdGJ6YhPCpWZ7PpeZ LzyVoQcQuUAYFnuahNwW4lPRMon7d8mJjFerBkXsi5hXuXoz3MKavN+c455VZmD2L7rK 22iA== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id r8si2117358ejo.175.2019.12.02.02.29.44; Mon, 02 Dec 2019 02:29:45 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727541AbfLBK3n (ORCPT + 27 others); Mon, 2 Dec 2019 05:29:43 -0500 Received: from mx2.suse.de ([195.135.220.15]:57574 "EHLO mx1.suse.de" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S1727454AbfLBK3Z (ORCPT ); Mon, 2 Dec 2019 05:29:25 -0500 X-Virus-Scanned: by amavisd-new at test-mx.suse.de Received: from relay2.suse.de (unknown [195.135.220.254]) by mx1.suse.de (Postfix) with ESMTP id 9B2BCB220; Mon, 2 Dec 2019 10:29:23 +0000 (UTC) From: =?utf-8?q?Andreas_F=C3=A4rber?= To: linux-realtek-soc@lists.infradead.org Cc: linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, =?utf-8?q?Andreas_F=C3=A4rber?= , Rob Herring , Mark Rutland , devicetree@vger.kernel.org Subject: [PATCH v2 9/9] arm64: dts: realtek: rtd1395: Add Realtek Lion Skin EVB Date: Mon, 2 Dec 2019 11:29:10 +0100 Message-Id: <20191202102910.26916-10-afaerber@suse.de> X-Mailer: git-send-email 2.16.4 In-Reply-To: <20191202102910.26916-1-afaerber@suse.de> References: <20191202102910.26916-1-afaerber@suse.de> MIME-Version: 1.0 Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Add a Device Tree for Realtek RTD1395 SoC Lion Skin evaluation board. Signed-off-by: Andreas Färber --- v2: New arch/arm64/boot/dts/realtek/Makefile | 1 + arch/arm64/boot/dts/realtek/rtd1395-lionskin.dts | 36 ++++++++++++++++++++++++ 2 files changed, 37 insertions(+) create mode 100644 arch/arm64/boot/dts/realtek/rtd1395-lionskin.dts -- 2.16.4 diff --git a/arch/arm64/boot/dts/realtek/Makefile b/arch/arm64/boot/dts/realtek/Makefile index f614080b5e27..54bd02d11c02 100644 --- a/arch/arm64/boot/dts/realtek/Makefile +++ b/arch/arm64/boot/dts/realtek/Makefile @@ -9,5 +9,6 @@ dtb-$(CONFIG_ARCH_REALTEK) += rtd1295-zidoo-x9s.dtb dtb-$(CONFIG_ARCH_REALTEK) += rtd1296-ds418.dtb dtb-$(CONFIG_ARCH_REALTEK) += rtd1395-bpi-m4.dtb +dtb-$(CONFIG_ARCH_REALTEK) += rtd1395-lionskin.dtb dtb-$(CONFIG_ARCH_REALTEK) += rtd1619-mjolnir.dtb diff --git a/arch/arm64/boot/dts/realtek/rtd1395-lionskin.dts b/arch/arm64/boot/dts/realtek/rtd1395-lionskin.dts new file mode 100644 index 000000000000..83f9b536cdea --- /dev/null +++ b/arch/arm64/boot/dts/realtek/rtd1395-lionskin.dts @@ -0,0 +1,36 @@ +// SPDX-License-Identifier: (GPL-2.0-or-later OR BSD-2-Clause) +/* + * Copyright (c) 2019 Andreas Färber + */ + +/dts-v1/; + +#include "rtd1395.dtsi" + +/ { + compatible = "realtek,lion-skin", "realtek,rtd1395"; + model = "Realtek Lion Skin EVB"; + + memory@2f000 { + device_type = "memory"; + reg = <0x2f000 0x3ffd1000>; /* boot ROM to 1 GiB or 2 GiB */ + }; + + aliases { + serial0 = &uart0; + }; + + chosen { + stdout-path = "serial0:115200n8"; + }; +}; + +/* debug console (J1) */ +&uart0 { + status = "okay"; +}; + +/* M.2 slot (CON1) */ +&uart1 { + status = "disabled"; +};