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Mon, 28 Oct 2024 08:19:04 -0700 (PDT) X-Received: by 2002:a05:600c:5253:b0:431:46fe:4cc1 with SMTP id 5b1f17b1804b1-4319aca42bemr78560835e9.10.1730128744045; Mon, 28 Oct 2024 08:19:04 -0700 (PDT) Received: from [192.168.10.3] ([151.49.226.83]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-43193594ff3sm111869205e9.12.2024.10.28.08.19.02 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 28 Oct 2024 08:19:02 -0700 (PDT) From: Paolo Bonzini To: qemu-devel@nongnu.org Cc: richard.henderson@linaro.org Subject: [PATCH 02/14] target/i386: Tidy cc_op_str usage Date: Mon, 28 Oct 2024 16:18:39 +0100 Message-ID: <20241028151851.376355-3-pbonzini@redhat.com> X-Mailer: git-send-email 2.47.0 In-Reply-To: <20241028151851.376355-1-pbonzini@redhat.com> References: <20241028151851.376355-1-pbonzini@redhat.com> MIME-Version: 1.0 Received-SPF: pass client-ip=170.10.133.124; envelope-from=pbonzini@redhat.com; helo=us-smtp-delivery-124.mimecast.com X-Spam_score_int: -24 X-Spam_score: -2.5 X-Spam_bar: -- X-Spam_report: (-2.5 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-0.373, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, RCVD_IN_MSPIKE_H3=0.001, RCVD_IN_MSPIKE_WL=0.001, RCVD_IN_VALIDITY_RPBL_BLOCKED=0.001, RCVD_IN_VALIDITY_SAFE_BLOCKED=0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org From: Richard Henderson Make const. Use the read-only strings directly; do not copy them into an on-stack buffer with snprintf. Allow for holes in the cc_op_str array, now present with CC_OP_POPCNT. Fixes: 460231ad369 ("target/i386: give CC_OP_POPCNT low bits corresponding to MO_TL") Signed-off-by: Richard Henderson Link: https://lore.kernel.org/r/20240701025115.1265117-2-richard.henderson@linaro.org Signed-off-by: Paolo Bonzini --- target/i386/cpu-dump.c | 17 +++++++++++------ 1 file changed, 11 insertions(+), 6 deletions(-) diff --git a/target/i386/cpu-dump.c b/target/i386/cpu-dump.c index 3bb8e440916..dc6723aedee 100644 --- a/target/i386/cpu-dump.c +++ b/target/i386/cpu-dump.c @@ -27,7 +27,7 @@ /***********************************************************/ /* x86 debug */ -static const char *cc_op_str[CC_OP_NB] = { +static const char * const cc_op_str[] = { [CC_OP_DYNAMIC] = "DYNAMIC", [CC_OP_EFLAGS] = "EFLAGS", @@ -347,7 +347,6 @@ void x86_cpu_dump_state(CPUState *cs, FILE *f, int flags) X86CPU *cpu = X86_CPU(cs); CPUX86State *env = &cpu->env; int eflags, i, nb; - char cc_op_name[32]; static const char *seg_name[6] = { "ES", "CS", "SS", "DS", "FS", "GS" }; eflags = cpu_compute_eflags(env); @@ -456,10 +455,16 @@ void x86_cpu_dump_state(CPUState *cs, FILE *f, int flags) env->dr[6], env->dr[7]); } if (flags & CPU_DUMP_CCOP) { - if ((unsigned)env->cc_op < CC_OP_NB) - snprintf(cc_op_name, sizeof(cc_op_name), "%s", cc_op_str[env->cc_op]); - else - snprintf(cc_op_name, sizeof(cc_op_name), "[%d]", env->cc_op); + const char *cc_op_name = NULL; + char cc_op_buf[32]; + + if ((unsigned)env->cc_op < ARRAY_SIZE(cc_op_str)) { + cc_op_name = cc_op_str[env->cc_op]; + } + if (cc_op_name == NULL) { + snprintf(cc_op_buf, sizeof(cc_op_buf), "[%d]", env->cc_op); + cc_op_name = cc_op_buf; + } #ifdef TARGET_X86_64 if (env->hflags & HF_CS64_MASK) { qemu_fprintf(f, "CCS=%016" PRIx64 " CCD=%016" PRIx64 " CCO=%s\n", From patchwork Mon Oct 28 15:18:41 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Paolo Bonzini X-Patchwork-Id: 839126 Delivered-To: patch@linaro.org Received: by 2002:adf:e287:0:b0:37d:45d0:187 with SMTP id v7csp1651061wri; Mon, 28 Oct 2024 08:21:32 -0700 (PDT) X-Forwarded-Encrypted: i=2; AJvYcCV/FBjYVHYNWNz5gm8OIcBG7dp4vmPN0T1I0S6Dvgaccy5Hd3ByY3ET4REzxikXKMT/6Qb2SQ==@linaro.org X-Google-Smtp-Source: AGHT+IFiQwyoDvYGOJXbDuLsROYro7n2g5NrHXlKB1MM3XkAtoOEBVt9INGN6joKxeT9cTa+v0M3 X-Received: by 2002:a05:6102:1610:b0:4a4:93d0:df13 with SMTP id ada2fe7eead31-4a8cfb8572amr6455856137.16.1730128892238; Mon, 28 Oct 2024 08:21:32 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1730128892; cv=none; d=google.com; s=arc-20240605; b=JN3Z39fC4doDU64A/UcBhGUs+KmI9U7/ZpfzmDvnjPSb83+AUbJMUDQx+ZVx+lmdEP iiXP/WGMcckUXmP/z8CPSF6DMMTwVgceDh1/f+J0hburAdyuuA1prR6DjlAVVtg4655Z /Aex4alTHghJs9XKD3gwGMDtKKn+U9//fvgDPnElIazleBxm52b34bgJx3pjFXwZ4Mzy mLAEQeHtfAf8BHyJTFt64cVpquDMoGDJ1r0TQCihieW5t3/rctWQ4430cHJHxZ7ddGAj w8fM9e+jf1htOFP52Z8TcE0aK0NsLDceh36htci9qGf/7sKXSjVUo/A7cmm3no073ymn G0qA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20240605; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:cc:to :from:dkim-signature; bh=+8Ycd/z4FSPPHkMPrNjkGaE9+9ckB94sy40JwoCKvsU=; fh=MmLbUYMFRk+lJjthCIVqr42l66o0jnBuoFM0CcrBzlo=; b=EgalClYgNPtLKRpPHPFLiEIwGIFgvZAMPCrTXA4TOAYYuNhtgJA8ZkPnlMbOPNy6hE E+OrYcywDL85kL4TNZnWKNG5rL4x7/fkAVNSIIJPyjWlq2WiC5VoRpsyY8n5Q1sSrXnX gCw/Shon1E1aJ4OadvaFZcG/l87EImQnQJiifq573+8HmOyMXSxgdwK9bCssePubQb2e J8DPzrjszCVRr/8QQ8Nz/aORrKMd/bdYO26+zJxKFfsOJQZ1keelzL336vOzoUq6SMF5 rRLAu4gxnj3+37t1undEbFPhIuJMrsDWLQNrWAGlIsweYaoDBQR9zVG+wWI5VZaDeNqI Swbw==; dara=google.com ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@redhat.com header.s=mimecast20190719 header.b=a1OjoLLN; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=redhat.com Return-Path: Received: from lists.gnu.org (lists.gnu.org. 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Mon, 28 Oct 2024 08:19:08 -0700 (PDT) X-Received: by 2002:a5d:49c2:0:b0:37d:373c:ed24 with SMTP id ffacd0b85a97d-380610f41damr6656469f8f.4.1730128747994; Mon, 28 Oct 2024 08:19:07 -0700 (PDT) Received: from [192.168.10.3] ([151.49.226.83]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-4319360c10asm112627335e9.43.2024.10.28.08.19.07 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 28 Oct 2024 08:19:07 -0700 (PDT) From: Paolo Bonzini To: qemu-devel@nongnu.org Cc: richard.henderson@linaro.org Subject: [PATCH 04/14] target/i386: Rearrange CCOp Date: Mon, 28 Oct 2024 16:18:41 +0100 Message-ID: <20241028151851.376355-5-pbonzini@redhat.com> X-Mailer: git-send-email 2.47.0 In-Reply-To: <20241028151851.376355-1-pbonzini@redhat.com> References: <20241028151851.376355-1-pbonzini@redhat.com> MIME-Version: 1.0 Received-SPF: pass client-ip=170.10.129.124; envelope-from=pbonzini@redhat.com; helo=us-smtp-delivery-124.mimecast.com X-Spam_score_int: -24 X-Spam_score: -2.5 X-Spam_bar: -- X-Spam_report: (-2.5 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-0.373, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, RCVD_IN_MSPIKE_H2=-0.001, RCVD_IN_VALIDITY_RPBL_BLOCKED=0.001, RCVD_IN_VALIDITY_SAFE_BLOCKED=0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org From: Richard Henderson Give the first few enumerators explicit integer constants, align the BWLQ enumerators. This will be used to simplify ((op - CC_OP_*B) & 3). Signed-off-by: Richard Henderson Link: https://lore.kernel.org/r/20240701025115.1265117-4-richard.henderson@linaro.org Signed-off-by: Paolo Bonzini --- target/i386/cpu.h | 14 ++++++++------ 1 file changed, 8 insertions(+), 6 deletions(-) diff --git a/target/i386/cpu.h b/target/i386/cpu.h index c89db50eddc..b605f592521 100644 --- a/target/i386/cpu.h +++ b/target/i386/cpu.h @@ -1292,11 +1292,10 @@ uint64_t x86_cpu_get_supported_feature_word(X86CPU *cpu, FeatureWord w); * are only needed for conditional branches. */ typedef enum { - CC_OP_DYNAMIC, /* must use dynamic code to get cc_op */ - CC_OP_EFLAGS, /* all cc are explicitly computed, CC_SRC = flags */ - CC_OP_ADCX, /* CC_DST = C, CC_SRC = rest. */ - CC_OP_ADOX, /* CC_SRC2 = O, CC_SRC = rest. */ - CC_OP_ADCOX, /* CC_DST = C, CC_SRC2 = O, CC_SRC = rest. */ + CC_OP_EFLAGS = 0, /* all cc are explicitly computed, CC_SRC = flags */ + CC_OP_ADCX = 1, /* CC_DST = C, CC_SRC = rest. */ + CC_OP_ADOX = 2, /* CC_SRC2 = O, CC_SRC = rest. */ + CC_OP_ADCOX = 3, /* CC_DST = C, CC_SRC2 = O, CC_SRC = rest. */ CC_OP_MULB, /* modify all flags, C, O = (CC_SRC != 0) */ CC_OP_MULW, @@ -1369,9 +1368,12 @@ typedef enum { CC_OP_POPCNTQ__, CC_OP_POPCNT = sizeof(target_ulong) == 8 ? CC_OP_POPCNTQ__ : CC_OP_POPCNTL__, + CC_OP_DYNAMIC, /* must use dynamic code to get cc_op */ CC_OP_NB, } CCOp; -QEMU_BUILD_BUG_ON(CC_OP_NB >= 128); + +/* See X86DecodedInsn.cc_op, using int8_t. */ +QEMU_BUILD_BUG_ON(CC_OP_DYNAMIC > INT8_MAX); typedef struct SegmentCache { uint32_t selector; From patchwork Mon Oct 28 15:18:42 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Paolo Bonzini X-Patchwork-Id: 839127 Delivered-To: patch@linaro.org Received: by 2002:adf:e287:0:b0:37d:45d0:187 with SMTP id v7csp1651255wri; Mon, 28 Oct 2024 08:21:49 -0700 (PDT) X-Forwarded-Encrypted: i=2; AJvYcCVVyUYMtDMbdLBg+MOwh0YcRhSqumZHG6cfFGW4wl4tn57Mseilq8MkqwmRllY5rJlxvhLc5A==@linaro.org X-Google-Smtp-Source: AGHT+IFi+sQ0Xaw0VKIxaRbpXEPBu7fKxxiEuxTD2O0NH1jRGjFJ6ZeDTJKmnOY7byclzkImaW/L X-Received: by 2002:a05:6102:26d0:b0:4a4:6f3d:1f61 with SMTP id ada2fe7eead31-4a8cfb6907bmr6899882137.17.1730128909402; Mon, 28 Oct 2024 08:21:49 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1730128909; cv=none; d=google.com; s=arc-20240605; b=eJC0XdP5yJBThwtMVrFSQVlvl05tPS9jjVLoIUmmd7s/FgsB8SRxzRGvZancVvk+Tj mf9uebpEG2I40OiPIYZmwPfcyclWWjAb6Rv6qh5Qk4XRUL+yB2pKdgEDSfjACB5R2yZp HRHqh5/Sh0XnPGtjkvRie+ydU39ulE2MS2pSzAt4Bum/GK9aNaBZNcNwlI0Oh55x/YhW UDgQEUMhN9x+GI9BFLwcCuk14mqCyd6UYmkzECIHormlKOjcOiv/OMwzQiqF3kbwpS2Z aYGptlt5+mMs6alqC+H8WzxrInbEOuFy7fWYlPIW8OAd8RPNVho7rrDOQ9xvqzz5MlpM 5OpQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20240605; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:cc:to :from:dkim-signature; bh=QvJLaUXFnx51Ug+obYoa6k7VHJ36CTBZhnV1VhVECZk=; fh=MmLbUYMFRk+lJjthCIVqr42l66o0jnBuoFM0CcrBzlo=; b=cfm/GWPSoTS2s58VR6dbkH7vDHEhYYRPSb06i0uYHrmHmUTzZ9khiJsJkkpwQ6xAa/ xTY2IcoxAgtj4By92pRkf09ARoWpLfjqhTTkJCiFa0CBOkHdrLAsTj4RsC9NzkUNX0Tx PiryqmAMFCM3BWbviHWO4HM2X6hmrHYJ15AJ+SQGZGEtSPW/vpPrgnWk/stpl/2jkfGG OOP1oofnAMhoc8vu50WhR9ARlA64CzllpNyzBAGNRCaYKXbviPuF4YAzrJhobZZHrqoh fN7SSF1QEsrruiIPPLk1cxNL3FiFwvlgnwdqs25KXuGYX24pS0nJe2RpsjYtS1QdcjUh qIoA==; dara=google.com ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@redhat.com header.s=mimecast20190719 header.b=WC2132QX; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=redhat.com Return-Path: Received: from lists.gnu.org (lists.gnu.org. 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Assert that the op has a size and that it is valid for the configuration. Signed-off-by: Richard Henderson Link: https://lore.kernel.org/r/20240701025115.1265117-6-richard.henderson@linaro.org Signed-off-by: Paolo Bonzini --- target/i386/cpu.h | 17 ++++++++++++++++- target/i386/tcg/translate.c | 17 +++++++---------- target/i386/tcg/emit.c.inc | 5 +++-- 3 files changed, 26 insertions(+), 13 deletions(-) diff --git a/target/i386/cpu.h b/target/i386/cpu.h index b605f592521..e598fe3de9a 100644 --- a/target/i386/cpu.h +++ b/target/i386/cpu.h @@ -24,6 +24,7 @@ #include "cpu-qom.h" #include "kvm/hyperv-proto.h" #include "exec/cpu-defs.h" +#include "exec/memop.h" #include "hw/i386/topology.h" #include "qapi/qapi-types-common.h" #include "qemu/cpu-float.h" @@ -1297,7 +1298,9 @@ typedef enum { CC_OP_ADOX = 2, /* CC_SRC2 = O, CC_SRC = rest. */ CC_OP_ADCOX = 3, /* CC_DST = C, CC_SRC2 = O, CC_SRC = rest. */ - CC_OP_MULB, /* modify all flags, C, O = (CC_SRC != 0) */ + /* Low 2 bits = MemOp constant for the size */ +#define CC_OP_FIRST_BWLQ CC_OP_MULB + CC_OP_MULB = 4, /* modify all flags, C, O = (CC_SRC != 0) */ CC_OP_MULW, CC_OP_MULL, CC_OP_MULQ, @@ -1367,6 +1370,7 @@ typedef enum { CC_OP_POPCNTL__, CC_OP_POPCNTQ__, CC_OP_POPCNT = sizeof(target_ulong) == 8 ? CC_OP_POPCNTQ__ : CC_OP_POPCNTL__, +#define CC_OP_LAST_BWLQ CC_OP_POPCNTQ__ CC_OP_DYNAMIC, /* must use dynamic code to get cc_op */ CC_OP_NB, @@ -1375,6 +1379,17 @@ typedef enum { /* See X86DecodedInsn.cc_op, using int8_t. */ QEMU_BUILD_BUG_ON(CC_OP_DYNAMIC > INT8_MAX); +static inline MemOp cc_op_size(CCOp op) +{ + MemOp size = op & 3; + + QEMU_BUILD_BUG_ON(CC_OP_FIRST_BWLQ & 3); + assert(op >= CC_OP_FIRST_BWLQ && op <= CC_OP_LAST_BWLQ); + assert(size <= MO_TL); + + return size; +} + typedef struct SegmentCache { uint32_t selector; target_ulong base; diff --git a/target/i386/tcg/translate.c b/target/i386/tcg/translate.c index a20fbb019c8..46062002c02 100644 --- a/target/i386/tcg/translate.c +++ b/target/i386/tcg/translate.c @@ -885,7 +885,7 @@ static CCPrepare gen_prepare_eflags_c(DisasContext *s, TCGv reg) case CC_OP_ADDB ... CC_OP_ADDQ: /* (DATA_TYPE)CC_DST < (DATA_TYPE)CC_SRC */ - size = s->cc_op - CC_OP_ADDB; + size = cc_op_size(s->cc_op); tcg_gen_ext_tl(cpu_cc_dst, cpu_cc_dst, size); tcg_gen_ext_tl(cpu_cc_src, cpu_cc_src, size); return (CCPrepare) { .cond = TCG_COND_LTU, .reg = cpu_cc_dst, @@ -902,7 +902,7 @@ static CCPrepare gen_prepare_eflags_c(DisasContext *s, TCGv reg) case CC_OP_SHLB ... CC_OP_SHLQ: /* (CC_SRC >> (DATA_BITS - 1)) & 1 */ - size = s->cc_op - CC_OP_SHLB; + size = cc_op_size(s->cc_op); return gen_prepare_sign_nz(cpu_cc_src, size); case CC_OP_MULB ... CC_OP_MULQ: @@ -910,11 +910,11 @@ static CCPrepare gen_prepare_eflags_c(DisasContext *s, TCGv reg) .reg = cpu_cc_src }; case CC_OP_BMILGB ... CC_OP_BMILGQ: - size = s->cc_op - CC_OP_BMILGB; + size = cc_op_size(s->cc_op); return gen_prepare_val_nz(cpu_cc_src, size, true); case CC_OP_BLSIB ... CC_OP_BLSIQ: - size = s->cc_op - CC_OP_BLSIB; + size = cc_op_size(s->cc_op); return gen_prepare_val_nz(cpu_cc_src, size, false); case CC_OP_ADCX: @@ -966,10 +966,7 @@ static CCPrepare gen_prepare_eflags_s(DisasContext *s, TCGv reg) case CC_OP_POPCNT: return (CCPrepare) { .cond = TCG_COND_NEVER }; default: - { - MemOp size = (s->cc_op - CC_OP_ADDB) & 3; - return gen_prepare_sign_nz(cpu_cc_dst, size); - } + return gen_prepare_sign_nz(cpu_cc_dst, cc_op_size(s->cc_op)); } } @@ -1007,7 +1004,7 @@ static CCPrepare gen_prepare_eflags_z(DisasContext *s, TCGv reg) .imm = CC_Z }; default: { - MemOp size = (s->cc_op - CC_OP_ADDB) & 3; + MemOp size = cc_op_size(s->cc_op); return gen_prepare_val_nz(cpu_cc_dst, size, true); } } @@ -1028,7 +1025,7 @@ static CCPrepare gen_prepare_cc(DisasContext *s, int b, TCGv reg) switch (s->cc_op) { case CC_OP_SUBB ... CC_OP_SUBQ: /* We optimize relational operators for the cmp/jcc case. */ - size = s->cc_op - CC_OP_SUBB; + size = cc_op_size(s->cc_op); switch (jcc_op) { case JCC_BE: tcg_gen_ext_tl(s->cc_srcT, s->cc_srcT, size); diff --git a/target/i386/tcg/emit.c.inc b/target/i386/tcg/emit.c.inc index 790307dbba8..45ac5edb1ae 100644 --- a/target/i386/tcg/emit.c.inc +++ b/target/i386/tcg/emit.c.inc @@ -1466,7 +1466,7 @@ static void gen_bt_flags(DisasContext *s, X86DecodedInsn *decode, TCGv src, TCGv */ decode->cc_src = tcg_temp_new(); decode->cc_dst = cpu_cc_dst; - decode->cc_op = ((s->cc_op - CC_OP_MULB) & 3) + CC_OP_SARB; + decode->cc_op = CC_OP_SARB + cc_op_size(s->cc_op); tcg_gen_shr_tl(decode->cc_src, src, s->T1); } } @@ -3346,7 +3346,8 @@ static bool gen_eflags_adcox(DisasContext *s, X86DecodedInsn *decode, bool want_ * bit, we might as well fish CF out of EFLAGS and save a shift. */ if (want_carry && (!need_flags || s->cc_op == CC_OP_SHLB + MO_TL)) { - tcg_gen_shri_tl(decode->cc_dst, cpu_cc_src, (8 << (s->cc_op - CC_OP_SHLB)) - 1); + MemOp size = cc_op_size(s->cc_op); + tcg_gen_shri_tl(decode->cc_dst, cpu_cc_src, (8 << size) - 1); got_cf = true; } gen_mov_eflags(s, decode->cc_src); From patchwork Mon Oct 28 15:18:43 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Paolo Bonzini X-Patchwork-Id: 839125 Delivered-To: patch@linaro.org Received: by 2002:adf:e287:0:b0:37d:45d0:187 with SMTP id v7csp1650664wri; Mon, 28 Oct 2024 08:20:46 -0700 (PDT) X-Forwarded-Encrypted: i=2; AJvYcCU22F2Uk/BAWc2wcXaoSpMIzO3+uatUlWo+tSJftc3agQKbYHum76OPOC77g4+BxIEA/H9rDg==@linaro.org X-Google-Smtp-Source: AGHT+IEDEZ6o6B05CF1mmIienp9bG1/G2NIj7CbFIQJKidoT5Nk//+hUWAQJ1Hm0WedYpXvF1rJW X-Received: by 2002:a05:6870:1654:b0:286:f24f:c231 with SMTP id 586e51a60fabf-29051c046c4mr7301379fac.25.1730128846601; Mon, 28 Oct 2024 08:20:46 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1730128846; cv=none; d=google.com; s=arc-20240605; b=ZZosI/KCMux0Cq7SzKjcy/PJuRtUzZk0Mly3Cmt9VrnQWB8JCB0075Ts6Ai+n70+cY qmrdl7xGkoICMgusSrofWlDjQ4SbDrlI4CwWDy8Moc+J1OMzRUQUmSSDhaD/mzWu0zxs wL1n0b4KE8W37VGxUek0TuGXs4j5Kc9w20bZN1m+dJaU9BpTeVylwmiACPv6LIU9r0Yz IUg5DXVVQ08NZ0lBpC/gd5++NIRNsuYYIviwkYo1eEEZHb9sxtq/QhXQrgxfENekFDTw g1RrYBVPohNlniRn4oCC6e0T7oC0iLEhGXhzfm2iGOntMcx+vw2Yujpfxhqh0nCSyCDD 2a7A== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20240605; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:cc:to :from:dkim-signature; bh=FBu80ghROOFVl+ODQDotB85rk6JKcA8U1vloiGHevjg=; fh=MmLbUYMFRk+lJjthCIVqr42l66o0jnBuoFM0CcrBzlo=; b=kTAP/qjWCDDPw3vsgmobDg4NILyYOus73usV2kOnkQ6WJODwun4Vat/HBWi3lA92lV d0BC8ZF+8rP14Ch0qGL1nqhiyZjAAkdC3iQiDi9wAisHqWPHqllJrtJW8fxQWa/gFEGC zVuj0xHknKxTGIC3RM3OyPAX49OpXlOCpQaf2pnqpOpLmHXFAiIDaeDbdgajAW+VJSSj 8xj+ApHTI7SShfxPvXN+mYlMz0k2G/83dUzhjzYDdY1v3KpBfpMLB8YMF/OvVi9Js3HK 8MuBsi7FZ+CgtLzpe9/8FL8o0BkoIfB+wLjDlPQq6+dj+6ROeI+nwPunLLgWFcbuV3mJ M5dg==; dara=google.com ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@redhat.com header.s=mimecast20190719 header.b=JYrRF9KY; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=redhat.com Return-Path: Received: from lists.gnu.org (lists.gnu.org. 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Mon, 28 Oct 2024 08:19:15 -0700 (PDT) X-Received: by 2002:a05:600c:3b23:b0:431:4fbd:f571 with SMTP id 5b1f17b1804b1-431b2ae97dcmr1632695e9.13.1730128754779; Mon, 28 Oct 2024 08:19:14 -0700 (PDT) Received: from [192.168.10.3] ([151.49.226.83]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-43193573d47sm114822155e9.3.2024.10.28.08.19.12 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 28 Oct 2024 08:19:12 -0700 (PDT) From: Paolo Bonzini To: qemu-devel@nongnu.org Cc: richard.henderson@linaro.org Subject: [PATCH 06/14] target/i386: Wrap cc_op_live with a validity check Date: Mon, 28 Oct 2024 16:18:43 +0100 Message-ID: <20241028151851.376355-7-pbonzini@redhat.com> X-Mailer: git-send-email 2.47.0 In-Reply-To: <20241028151851.376355-1-pbonzini@redhat.com> References: <20241028151851.376355-1-pbonzini@redhat.com> MIME-Version: 1.0 Received-SPF: pass client-ip=170.10.133.124; envelope-from=pbonzini@redhat.com; helo=us-smtp-delivery-124.mimecast.com X-Spam_score_int: -24 X-Spam_score: -2.5 X-Spam_bar: -- X-Spam_report: (-2.5 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-0.373, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, RCVD_IN_MSPIKE_H3=0.001, RCVD_IN_MSPIKE_WL=0.001, RCVD_IN_VALIDITY_RPBL_BLOCKED=0.001, RCVD_IN_VALIDITY_SAFE_BLOCKED=0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org From: Richard Henderson Assert that op is known and that cc_op_live_ is populated. Reviewed-by: Richard Henderson Signed-off-by: Paolo Bonzini --- target/i386/cpu.h | 1 - target/i386/tcg/translate.c | 21 ++++++++++++++++++--- target/i386/tcg/decode-new.c.inc | 2 +- target/i386/tcg/emit.c.inc | 4 ++-- 4 files changed, 21 insertions(+), 7 deletions(-) diff --git a/target/i386/cpu.h b/target/i386/cpu.h index e598fe3de9a..afe6643db83 100644 --- a/target/i386/cpu.h +++ b/target/i386/cpu.h @@ -1373,7 +1373,6 @@ typedef enum { #define CC_OP_LAST_BWLQ CC_OP_POPCNTQ__ CC_OP_DYNAMIC, /* must use dynamic code to get cc_op */ - CC_OP_NB, } CCOp; /* See X86DecodedInsn.cc_op, using int8_t. */ diff --git a/target/i386/tcg/translate.c b/target/i386/tcg/translate.c index 46062002c02..1a9a2fe709e 100644 --- a/target/i386/tcg/translate.c +++ b/target/i386/tcg/translate.c @@ -291,7 +291,7 @@ enum { }; /* Bit set if the global variable is live after setting CC_OP to X. */ -static const uint8_t cc_op_live[CC_OP_NB] = { +static const uint8_t cc_op_live_[] = { [CC_OP_DYNAMIC] = USES_CC_DST | USES_CC_SRC | USES_CC_SRC2, [CC_OP_EFLAGS] = USES_CC_SRC, [CC_OP_MULB ... CC_OP_MULQ] = USES_CC_DST | USES_CC_SRC, @@ -312,6 +312,21 @@ static const uint8_t cc_op_live[CC_OP_NB] = { [CC_OP_POPCNT] = USES_CC_DST, }; +static uint8_t cc_op_live(CCOp op) +{ + uint8_t result; + assert(op >= 0 && op < ARRAY_SIZE(cc_op_live_)); + + /* + * Check that the array is fully populated. A zero entry would correspond + * to a fixed value of EFLAGS, which can be obtained with CC_OP_EFLAGS + * as well. + */ + result = cc_op_live_[op]; + assert(result); + return result; +} + static void set_cc_op_1(DisasContext *s, CCOp op, bool dirty) { int dead; @@ -321,7 +336,7 @@ static void set_cc_op_1(DisasContext *s, CCOp op, bool dirty) } /* Discard CC computation that will no longer be used. */ - dead = cc_op_live[s->cc_op] & ~cc_op_live[op]; + dead = cc_op_live(s->cc_op) & ~cc_op_live(op); if (dead & USES_CC_DST) { tcg_gen_discard_tl(cpu_cc_dst); } @@ -808,7 +823,7 @@ static void gen_mov_eflags(DisasContext *s, TCGv reg) src2 = cpu_cc_src2; /* Take care to not read values that are not live. */ - live = cc_op_live[s->cc_op] & ~USES_CC_SRCT; + live = cc_op_live(s->cc_op) & ~USES_CC_SRCT; dead = live ^ (USES_CC_DST | USES_CC_SRC | USES_CC_SRC2); if (dead) { TCGv zero = tcg_constant_tl(0); diff --git a/target/i386/tcg/decode-new.c.inc b/target/i386/tcg/decode-new.c.inc index 48bf730cd3e..cda32ee6784 100644 --- a/target/i386/tcg/decode-new.c.inc +++ b/target/i386/tcg/decode-new.c.inc @@ -2865,7 +2865,7 @@ static void disas_insn(DisasContext *s, CPUState *cpu) tcg_gen_mov_i32(cpu_cc_op, decode.cc_op_dynamic); } set_cc_op(s, decode.cc_op); - cc_live = cc_op_live[decode.cc_op]; + cc_live = cc_op_live(decode.cc_op); } else { cc_live = 0; } diff --git a/target/i386/tcg/emit.c.inc b/target/i386/tcg/emit.c.inc index 45ac5edb1ae..785ff63f2ac 100644 --- a/target/i386/tcg/emit.c.inc +++ b/target/i386/tcg/emit.c.inc @@ -3777,13 +3777,13 @@ static void gen_shift_dynamic_flags(DisasContext *s, X86DecodedInsn *decode, TCG decode->cc_op_dynamic = tcg_temp_new_i32(); assert(decode->cc_dst == s->T0); - if (cc_op_live[s->cc_op] & USES_CC_DST) { + if (cc_op_live(s->cc_op) & USES_CC_DST) { decode->cc_dst = tcg_temp_new(); tcg_gen_movcond_tl(TCG_COND_EQ, decode->cc_dst, count, tcg_constant_tl(0), cpu_cc_dst, s->T0); } - if (cc_op_live[s->cc_op] & USES_CC_SRC) { + if (cc_op_live(s->cc_op) & USES_CC_SRC) { tcg_gen_movcond_tl(TCG_COND_EQ, decode->cc_src, count, tcg_constant_tl(0), cpu_cc_src, decode->cc_src); }