From patchwork Wed Dec 11 20:36:13 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Richard Henderson X-Patchwork-Id: 181312 Delivered-To: patch@linaro.org Received: by 2002:a92:3001:0:0:0:0:0 with SMTP id x1csp1032367ile; Wed, 11 Dec 2019 12:36:45 -0800 (PST) X-Google-Smtp-Source: APXvYqz/oaUMDZJKFl164j5gZ5Uh2XaZEQQ9M1SHnIda6Mjns5eM9NKLochj02Xd7LDfuUDrKKXX X-Received: by 2002:a05:6830:1309:: with SMTP id p9mr3916715otq.328.1576096605398; Wed, 11 Dec 2019 12:36:45 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1576096605; cv=none; d=google.com; s=arc-20160816; b=vgNqqd0BQAItv4YH1uBBkkOSw5DNNClEaNqa5ryQfMLBuTEh6VZBi4qrl25VKD6tjB RfB3/kUWe9Mn73U+8MOeeJhJare7YNiDMMOtzrIv2RaUidcxZcx7ylm7nJlJO7R4a2EY f2heXu/NVI5AmRBuvIJnzKLjzO/a2lEnTjWEdtuDBRjVooQPec8HdVN98pbwxEP0m7Mv IicW7QpYuSY2t4EEwbDZYq5oscMoekQw4MODIhxNkev3a32cEz8lk84F1lw0wbzVMLL/ YEpEuCTPyHdElQqaW0eQxfLajk6Pkn1bCSHuTyAQen7nhpRkWOcqFr518D6ngQG9xpBe 8vkw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:cc:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:to:from :dkim-signature; bh=knjG1W+JMFdlNWZyzKDLUOddBzH6VeQ/PZgBz+DCRgI=; b=wUWcSmTRXd6p76gZQ3kuO82DH2kvw37tiqBiCywGJhQwbuoxiFbz5L6ZFMHTUMOjXF 5paw62l7cBwBGql0xpRJKGnudObs0x8tgHMpUbTv341VX/6+Cl+BWHhiwWYbmKk/E07r pkLr/5Sdlxy0B9lLb7C7S2XsjN+aCvNrtYG8p0YPdAlsLuXuQQ5NAbFEgzsk9UG/nYDN U2+FJJI9MNQOwB0EduvN14aF0nzoo+eFsv4MQb2uEuE8xIgFApaU17D2XtvEpv6E4XRb SMi9xv+64rth7Nz3dqNkqPg6nDZXiqvJ1BIwhfgMveuzhsb/amFhu98li7fOWi/uLWAt Xb1A== ARC-Authentication-Results: i=1; mx.google.com; dkim=fail header.i=@linaro.org header.s=google header.b=hpmm9ywG; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. 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[97.113.7.119]) by smtp.gmail.com with ESMTPSA id b21sm4280335pfp.0.2019.12.11.12.36.16 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 11 Dec 2019 12:36:16 -0800 (PST) From: Richard Henderson To: qemu-devel@nongnu.org Subject: [PATCH 1/2] target/s390x: Split out helper_per_store_real Date: Wed, 11 Dec 2019 12:36:13 -0800 Message-Id: <20191211203614.15611-2-richard.henderson@linaro.org> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20191211203614.15611-1-richard.henderson@linaro.org> References: <20191211203614.15611-1-richard.henderson@linaro.org> MIME-Version: 1.0 X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2607:f8b0:4864:20::442 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: qemu-s390x@nongnu.org, david@redhat.com Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" Split the PER handling for store-to-real-address into its own helper function, conditionally called when PER is enabled, just as we do for per_branch and per_ifetch. Signed-off-by: Richard Henderson --- target/s390x/helper.h | 1 + target/s390x/mem_helper.c | 16 ---------------- target/s390x/misc_helper.c | 10 ++++++++++ target/s390x/translate.c | 8 ++++++++ 4 files changed, 19 insertions(+), 16 deletions(-) -- 2.20.1 Reviewed-by: David Hildenbrand diff --git a/target/s390x/helper.h b/target/s390x/helper.h index 56e8149866..f5b4bb6a31 100644 --- a/target/s390x/helper.h +++ b/target/s390x/helper.h @@ -331,6 +331,7 @@ DEF_HELPER_FLAGS_3(sturg, TCG_CALL_NO_WG, void, env, i64, i64) DEF_HELPER_1(per_check_exception, void, env) DEF_HELPER_FLAGS_3(per_branch, TCG_CALL_NO_RWG, void, env, i64, i64) DEF_HELPER_FLAGS_2(per_ifetch, TCG_CALL_NO_RWG, void, env, i64) +DEF_HELPER_FLAGS_1(per_store_real, TCG_CALL_NO_RWG, void, env) DEF_HELPER_FLAGS_1(stfl, TCG_CALL_NO_RWG, void, env) DEF_HELPER_2(xsch, void, env, i64) diff --git a/target/s390x/mem_helper.c b/target/s390x/mem_helper.c index 2325767f17..b1b3f406c9 100644 --- a/target/s390x/mem_helper.c +++ b/target/s390x/mem_helper.c @@ -2344,27 +2344,11 @@ uint64_t HELPER(lurag)(CPUS390XState *env, uint64_t addr) void HELPER(stura)(CPUS390XState *env, uint64_t addr, uint64_t v1) { cpu_stl_real_ra(env, wrap_address(env, addr), (uint32_t)v1, GETPC()); - - if ((env->psw.mask & PSW_MASK_PER) && - (env->cregs[9] & PER_CR9_EVENT_STORE) && - (env->cregs[9] & PER_CR9_EVENT_STORE_REAL)) { - /* PSW is saved just before calling the helper. */ - env->per_address = env->psw.addr; - env->per_perc_atmid = PER_CODE_EVENT_STORE_REAL | get_per_atmid(env); - } } void HELPER(sturg)(CPUS390XState *env, uint64_t addr, uint64_t v1) { cpu_stq_real_ra(env, wrap_address(env, addr), v1, GETPC()); - - if ((env->psw.mask & PSW_MASK_PER) && - (env->cregs[9] & PER_CR9_EVENT_STORE) && - (env->cregs[9] & PER_CR9_EVENT_STORE_REAL)) { - /* PSW is saved just before calling the helper. */ - env->per_address = env->psw.addr; - env->per_perc_atmid = PER_CODE_EVENT_STORE_REAL | get_per_atmid(env); - } } /* load real address */ diff --git a/target/s390x/misc_helper.c b/target/s390x/misc_helper.c index bfb457fb63..58dbc023eb 100644 --- a/target/s390x/misc_helper.c +++ b/target/s390x/misc_helper.c @@ -620,6 +620,16 @@ void HELPER(per_ifetch)(CPUS390XState *env, uint64_t addr) } } } + +void HELPER(per_store_real)(CPUS390XState *env) +{ + if ((env->cregs[9] & PER_CR9_EVENT_STORE) && + (env->cregs[9] & PER_CR9_EVENT_STORE_REAL)) { + /* PSW is saved just before calling the helper. */ + env->per_address = env->psw.addr; + env->per_perc_atmid = PER_CODE_EVENT_STORE_REAL | get_per_atmid(env); + } +} #endif static uint8_t stfl_bytes[2048]; diff --git a/target/s390x/translate.c b/target/s390x/translate.c index 151dfa91fb..ef751fefa4 100644 --- a/target/s390x/translate.c +++ b/target/s390x/translate.c @@ -4507,12 +4507,20 @@ static DisasJumpType op_stnosm(DisasContext *s, DisasOps *o) static DisasJumpType op_stura(DisasContext *s, DisasOps *o) { gen_helper_stura(cpu_env, o->in2, o->in1); + if (s->base.tb->flags & FLAG_MASK_PER) { + update_psw_addr(s); + gen_helper_per_store_real(cpu_env); + } return DISAS_NEXT; } static DisasJumpType op_sturg(DisasContext *s, DisasOps *o) { gen_helper_sturg(cpu_env, o->in2, o->in1); + if (s->base.tb->flags & FLAG_MASK_PER) { + update_psw_addr(s); + gen_helper_per_store_real(cpu_env); + } return DISAS_NEXT; } #endif From patchwork Wed Dec 11 20:36:14 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Richard Henderson X-Patchwork-Id: 181313 Delivered-To: patch@linaro.org Received: by 2002:a92:3001:0:0:0:0:0 with SMTP id x1csp1032957ile; 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[97.113.7.119]) by smtp.gmail.com with ESMTPSA id b21sm4280335pfp.0.2019.12.11.12.36.17 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 11 Dec 2019 12:36:17 -0800 (PST) From: Richard Henderson To: qemu-devel@nongnu.org Subject: [PATCH 2/2] target/s390x: Implement LOAD/STORE TO REAL ADDRESS inline Date: Wed, 11 Dec 2019 12:36:14 -0800 Message-Id: <20191211203614.15611-3-richard.henderson@linaro.org> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20191211203614.15611-1-richard.henderson@linaro.org> References: <20191211203614.15611-1-richard.henderson@linaro.org> MIME-Version: 1.0 X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2607:f8b0:4864:20::441 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: qemu-s390x@nongnu.org, david@redhat.com Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" These are trivially done by performing a memory operation with the correct mmu_idx. The only tricky part is using get_address directly in order to get the address wrapped; we cannot use la2 because of the format. Signed-off-by: Richard Henderson --- target/s390x/helper.h | 4 ---- target/s390x/mem_helper.c | 22 ---------------------- target/s390x/translate.c | 21 ++++----------------- target/s390x/insn-data.def | 8 ++++---- 4 files changed, 8 insertions(+), 47 deletions(-) -- 2.20.1 Reviewed-by: David Hildenbrand diff --git a/target/s390x/helper.h b/target/s390x/helper.h index f5b4bb6a31..b5813c2ac2 100644 --- a/target/s390x/helper.h +++ b/target/s390x/helper.h @@ -324,10 +324,6 @@ DEF_HELPER_FLAGS_4(ipte, TCG_CALL_NO_RWG, void, env, i64, i64, i32) DEF_HELPER_FLAGS_1(ptlb, TCG_CALL_NO_RWG, void, env) DEF_HELPER_FLAGS_1(purge, TCG_CALL_NO_RWG, void, env) DEF_HELPER_2(lra, i64, env, i64) -DEF_HELPER_FLAGS_2(lura, TCG_CALL_NO_WG, i64, env, i64) -DEF_HELPER_FLAGS_2(lurag, TCG_CALL_NO_WG, i64, env, i64) -DEF_HELPER_FLAGS_3(stura, TCG_CALL_NO_WG, void, env, i64, i64) -DEF_HELPER_FLAGS_3(sturg, TCG_CALL_NO_WG, void, env, i64, i64) DEF_HELPER_1(per_check_exception, void, env) DEF_HELPER_FLAGS_3(per_branch, TCG_CALL_NO_RWG, void, env, i64, i64) DEF_HELPER_FLAGS_2(per_ifetch, TCG_CALL_NO_RWG, void, env, i64) diff --git a/target/s390x/mem_helper.c b/target/s390x/mem_helper.c index b1b3f406c9..2921419c27 100644 --- a/target/s390x/mem_helper.c +++ b/target/s390x/mem_helper.c @@ -2329,28 +2329,6 @@ void HELPER(purge)(CPUS390XState *env) tlb_flush_all_cpus_synced(env_cpu(env)); } -/* load using real address */ -uint64_t HELPER(lura)(CPUS390XState *env, uint64_t addr) -{ - return cpu_ldl_real_ra(env, wrap_address(env, addr), GETPC()); -} - -uint64_t HELPER(lurag)(CPUS390XState *env, uint64_t addr) -{ - return cpu_ldq_real_ra(env, wrap_address(env, addr), GETPC()); -} - -/* store using real address */ -void HELPER(stura)(CPUS390XState *env, uint64_t addr, uint64_t v1) -{ - cpu_stl_real_ra(env, wrap_address(env, addr), (uint32_t)v1, GETPC()); -} - -void HELPER(sturg)(CPUS390XState *env, uint64_t addr, uint64_t v1) -{ - cpu_stq_real_ra(env, wrap_address(env, addr), v1, GETPC()); -} - /* load real address */ uint64_t HELPER(lra)(CPUS390XState *env, uint64_t addr) { diff --git a/target/s390x/translate.c b/target/s390x/translate.c index ef751fefa4..4292bb0dd0 100644 --- a/target/s390x/translate.c +++ b/target/s390x/translate.c @@ -3272,13 +3272,8 @@ static DisasJumpType op_lpq(DisasContext *s, DisasOps *o) #ifndef CONFIG_USER_ONLY static DisasJumpType op_lura(DisasContext *s, DisasOps *o) { - gen_helper_lura(o->out, cpu_env, o->in2); - return DISAS_NEXT; -} - -static DisasJumpType op_lurag(DisasContext *s, DisasOps *o) -{ - gen_helper_lurag(o->out, cpu_env, o->in2); + o->addr1 = get_address(s, 0, get_field(s->fields, r2), 0); + tcg_gen_qemu_ld_tl(o->out, o->addr1, MMU_REAL_IDX, s->insn->data); return DISAS_NEXT; } #endif @@ -4506,17 +4501,9 @@ static DisasJumpType op_stnosm(DisasContext *s, DisasOps *o) static DisasJumpType op_stura(DisasContext *s, DisasOps *o) { - gen_helper_stura(cpu_env, o->in2, o->in1); - if (s->base.tb->flags & FLAG_MASK_PER) { - update_psw_addr(s); - gen_helper_per_store_real(cpu_env); - } - return DISAS_NEXT; -} + o->addr1 = get_address(s, 0, get_field(s->fields, r2), 0); + tcg_gen_qemu_st_tl(o->in1, o->addr1, MMU_REAL_IDX, s->insn->data); -static DisasJumpType op_sturg(DisasContext *s, DisasOps *o) -{ - gen_helper_sturg(cpu_env, o->in2, o->in1); if (s->base.tb->flags & FLAG_MASK_PER) { update_psw_addr(s); gen_helper_per_store_real(cpu_env); diff --git a/target/s390x/insn-data.def b/target/s390x/insn-data.def index 449eee1662..2bc77f0871 100644 --- a/target/s390x/insn-data.def +++ b/target/s390x/insn-data.def @@ -1275,8 +1275,8 @@ F(0xe313, LRAY, RXY_a, LD, 0, a2, r1, 0, lra, 0, IF_PRIV) F(0xe303, LRAG, RXY_a, Z, 0, a2, r1, 0, lra, 0, IF_PRIV) /* LOAD USING REAL ADDRESS */ - F(0xb24b, LURA, RRE, Z, 0, r2, new, r1_32, lura, 0, IF_PRIV) - F(0xb905, LURAG, RRE, Z, 0, r2, r1, 0, lurag, 0, IF_PRIV) + E(0xb24b, LURA, RRE, Z, 0, 0, new, r1_32, lura, 0, MO_TEUL, IF_PRIV) + E(0xb905, LURAG, RRE, Z, 0, 0, r1, 0, lura, 0, MO_TEQ, IF_PRIV) /* MOVE TO PRIMARY */ F(0xda00, MVCP, SS_d, Z, la1, a2, 0, 0, mvcp, 0, IF_PRIV) /* MOVE TO SECONDARY */ @@ -1329,8 +1329,8 @@ /* STORE THEN OR SYSTEM MASK */ F(0xad00, STOSM, SI, Z, la1, 0, 0, 0, stnosm, 0, IF_PRIV) /* STORE USING REAL ADDRESS */ - F(0xb246, STURA, RRE, Z, r1_o, r2_o, 0, 0, stura, 0, IF_PRIV) - F(0xb925, STURG, RRE, Z, r1_o, r2_o, 0, 0, sturg, 0, IF_PRIV) + E(0xb246, STURA, RRE, Z, r1_o, 0, 0, 0, stura, 0, MO_TEUL, IF_PRIV) + E(0xb925, STURG, RRE, Z, r1_o, 0, 0, 0, stura, 0, MO_TEQ, IF_PRIV) /* TEST BLOCK */ F(0xb22c, TB, RRE, Z, 0, r2_o, 0, 0, testblock, 0, IF_PRIV) /* TEST PROTECTION */