From patchwork Thu Dec 12 03:39:28 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Andreas_F=C3=A4rber?= X-Patchwork-Id: 181384 Delivered-To: patch@linaro.org Received: by 2002:a92:3001:0:0:0:0:0 with SMTP id x1csp371229ile; Wed, 11 Dec 2019 19:40:00 -0800 (PST) X-Google-Smtp-Source: APXvYqwh1/VqyyQrmIUMyRN5KDsPUubKRwZ6XHx09Mu8m3tsV+eN3gWDwnWD2fB2Ir4ic/bh3PbC X-Received: by 2002:a05:6830:1e81:: with SMTP id n1mr5481804otr.53.1576122000455; Wed, 11 Dec 2019 19:40:00 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1576122000; cv=none; d=google.com; s=arc-20160816; b=uoJOSxVB1iKStuKgdThNqQWiyKMdsrwJe1LlsVCAKwwtUcD4bI/j8OD98Lm77tqSij gGnN/nZYRe2OiU7mHWbLfxXfZz6y1OYBFOiNPJoEGh1jBP814shRNbyubkaFA9iCqrpH ykg5roNLuEo3qi52MKbmhtKCkiVLnUCsLpORKUEye6ESwgkWDIzu/bRenkIC49TERMok SkKu7rHGSlS3H8VaNwRXyKycs/BVQVxuuXxhtDwL2fdgWk6QTbyuNQpLqP4wtTalE4LI qXbHQnrMMo3dK+sIzgkcqdISFvHNxGWUGkOmepzwjD3bfGsqJkjnPzxMkyvUIu53cyrf sHtw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from; bh=FFihCdrgpe17JJD65+ujFQ1GUh/dlHT4SCPI0duxTwY=; b=Py6RxNSF5J4SBn2/gLsw0A7Bv8iqdBETjHSomN+Sl7Uf7msmFq93oU3eUoHTN38z2I /UwWwCDOBM4CtohtSfd+idJnP1BSwK744mdAqUe8BqQj/HoDmd+vRVJ0dsW8rbHWSX49 vs+A/ZM9x/HtTOIIIJtDieU+dpA5tZLCg8Z3c5lM/t0SpOZi94JmYnGiEnHl6+i3yBZ4 rM4TkhByDhaacarUXFqTWOVoXFd6cA/VehAJKM6xUYyug1UJL65YUFFkB+Ww6amM+4C0 j7C9ZV/Bo9sP0hUMVTLQb9DoLO5ztlcga+lEOXZTo8ws2kZ4FeM2AP+AhlavRAUXEI6f pPTQ== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id m3si2478938otq.321.2019.12.11.19.40.00; Wed, 11 Dec 2019 19:40:00 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727448AbfLLDj6 (ORCPT + 27 others); Wed, 11 Dec 2019 22:39:58 -0500 Received: from mx2.suse.de ([195.135.220.15]:58428 "EHLO mx1.suse.de" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S1726638AbfLLDj6 (ORCPT ); Wed, 11 Dec 2019 22:39:58 -0500 X-Virus-Scanned: by amavisd-new at test-mx.suse.de Received: from relay2.suse.de (unknown [195.135.220.254]) by mx1.suse.de (Postfix) with ESMTP id 7A1F1ADBB; Thu, 12 Dec 2019 03:39:56 +0000 (UTC) From: =?utf-8?q?Andreas_F=C3=A4rber?= To: linux-realtek-soc@lists.infradead.org, linux-leds@vger.kernel.org Cc: Jacek Anaszewski , Pavel Machek , Dan Murphy , linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, =?utf-8?q?Andreas_F=C3=A4rber?= , Rob Herring , Mark Rutland , devicetree@vger.kernel.org Subject: [RFC 01/25] dt-bindings: vendor-prefixes: Add Xnano Date: Thu, 12 Dec 2019 04:39:28 +0100 Message-Id: <20191212033952.5967-2-afaerber@suse.de> X-Mailer: git-send-email 2.16.4 In-Reply-To: <20191212033952.5967-1-afaerber@suse.de> References: <20191212033952.5967-1-afaerber@suse.de> MIME-Version: 1.0 Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Xnano is a Chinese TV box brand, but not much more is publicly known. Signed-off-by: Andreas Färber --- Documentation/devicetree/bindings/vendor-prefixes.yaml | 2 ++ 1 file changed, 2 insertions(+) -- 2.16.4 diff --git a/Documentation/devicetree/bindings/vendor-prefixes.yaml b/Documentation/devicetree/bindings/vendor-prefixes.yaml index 6046f4555852..84a76efad2a8 100644 --- a/Documentation/devicetree/bindings/vendor-prefixes.yaml +++ b/Documentation/devicetree/bindings/vendor-prefixes.yaml @@ -1058,6 +1058,8 @@ patternProperties: description: Xillybus Ltd. "^xlnx,.*": description: Xilinx + "^xnano,.*": + description: Xnano "^xunlong,.*": description: Shenzhen Xunlong Software CO.,Limited "^yones-toptech,.*": From patchwork Thu Dec 12 03:39:29 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Andreas_F=C3=A4rber?= X-Patchwork-Id: 181385 Delivered-To: patch@linaro.org Received: by 2002:a92:3001:0:0:0:0:0 with SMTP id x1csp371231ile; Wed, 11 Dec 2019 19:40:01 -0800 (PST) X-Google-Smtp-Source: APXvYqy4Mn400nG13zTKazxQrrRc+CqXBs23ASlHBVSc2dz91j3L4KoNOGS+06YadpO6BD4C8+d5 X-Received: by 2002:a9d:70cb:: with SMTP id w11mr5809067otj.157.1576122000943; Wed, 11 Dec 2019 19:40:00 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1576122000; cv=none; d=google.com; s=arc-20160816; b=UvadKFhcqPNYhazcETEb/r7UNeGAGBmArltwKrox/HXCiu93bpgNf59N8wBo3gFGDv HuI11jKFkQ9bm2Ae3Ap4IS036iD5Hitlvr98nDN01lvbl/158KI4cNy11e6dAbtyAPgQ CCTpcwz2O1RjNXsipOl7/VFCJ4Dg5yARcfgfekU5d8rmgd8Uvqy6epko/liwIgoH4LJO +2A2sQYRMiYQNF/JLyFnjXKZ1HEgScxmKHDnLoyJuweD2iYo4C7vLhqxDrY/fNHfqi9m nKPldRs7RxxUbY7i14tPEAy/qtnLpDW4vkFg/QW3A/VGU67hM+CiQDTzx/mAkES9TBKV AttA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from; bh=KcYruxNJqssuO9v9faeVOqGv1u95XmpZ4TsNGf5WaQQ=; b=Ir8EIjUdcXBhD9VSfQbs6vxC2IJUQwtYrj4cOf3CzWZFvA1uUdQccoqlJF7Eq323dB TOAS01PzoOEjqhLoqlwZmz4ifGVknJfsv3xC1HSCndWaIzB7RD32NRZsRjMFL8BpPLOS W0poY+c2mpaueWQ2wXNgqlF9NL6o19JRIcoWHrzBjdHP8ktn9e/fSaUe+AePUsuuajfc 0xgdMjdmxU3cwwFvMih1jv4b2C6da56wYb9l7zehxyDgQwKTkri6Hb+92HVOkoDkWDeZ Krcd6fQCgWKlDubtCsQoPoqqVRwOHqMFAgHERWmoRgdFZNhaTqxR5f7bmdqFgm4aqOXh GamA== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id m3si2478938otq.321.2019.12.11.19.40.00; Wed, 11 Dec 2019 19:40:00 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727571AbfLLDj7 (ORCPT + 27 others); Wed, 11 Dec 2019 22:39:59 -0500 Received: from mx2.suse.de ([195.135.220.15]:58454 "EHLO mx1.suse.de" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S1726759AbfLLDj6 (ORCPT ); Wed, 11 Dec 2019 22:39:58 -0500 X-Virus-Scanned: by amavisd-new at test-mx.suse.de Received: from relay2.suse.de (unknown [195.135.220.254]) by mx1.suse.de (Postfix) with ESMTP id AC443ADE1; Thu, 12 Dec 2019 03:39:56 +0000 (UTC) From: =?utf-8?q?Andreas_F=C3=A4rber?= To: linux-realtek-soc@lists.infradead.org, linux-leds@vger.kernel.org Cc: Jacek Anaszewski , Pavel Machek , Dan Murphy , linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, =?utf-8?q?Andreas_F=C3=A4rber?= , Rob Herring , Mark Rutland , devicetree@vger.kernel.org Subject: [RFC 02/25] dt-bindings: arm: realtek: Add Xnano X5 Date: Thu, 12 Dec 2019 04:39:29 +0100 Message-Id: <20191212033952.5967-3-afaerber@suse.de> X-Mailer: git-send-email 2.16.4 In-Reply-To: <20191212033952.5967-1-afaerber@suse.de> References: <20191212033952.5967-1-afaerber@suse.de> MIME-Version: 1.0 Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Define a compatible string for Xnano X5 OTT TV Box. Signed-off-by: Andreas Färber --- Documentation/devicetree/bindings/arm/realtek.yaml | 1 + 1 file changed, 1 insertion(+) -- 2.16.4 diff --git a/Documentation/devicetree/bindings/arm/realtek.yaml b/Documentation/devicetree/bindings/arm/realtek.yaml index db43dc3ab7ac..e11616883736 100644 --- a/Documentation/devicetree/bindings/arm/realtek.yaml +++ b/Documentation/devicetree/bindings/arm/realtek.yaml @@ -32,6 +32,7 @@ properties: - enum: - mele,v9 # MeLE V9 - probox2,ava # ProBox2 AVA + - xnano,x5 # Xnano X5 - zidoo,x9s # Zidoo X9S - const: realtek,rtd1295 From patchwork Thu Dec 12 03:39:32 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Andreas_F=C3=A4rber?= X-Patchwork-Id: 181409 Delivered-To: patch@linaro.org Received: by 2002:a92:3001:0:0:0:0:0 with SMTP id x1csp372485ile; Wed, 11 Dec 2019 19:41:38 -0800 (PST) X-Google-Smtp-Source: APXvYqwoeVYz9QOJwuzH8h7r7wM3di2ahmeqvuzC40WtTDXWB3lMXopglyJJIwVdmTx3Iwa8/Ac4 X-Received: by 2002:a05:6830:1e81:: with SMTP id n1mr5488734otr.53.1576122098602; Wed, 11 Dec 2019 19:41:38 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1576122098; cv=none; d=google.com; s=arc-20160816; b=ayntqo70Frniug5Mi0cPNWdAL1JeyMUsp4pf+TkM+nqP4Iui8HAEPSD+YNFmwkWise b3Ffjuil/BunqDQbDP150mi4LtuVtQ4KUWpT87kgYQ9IH45ErHidlrvb0S6Q43rB9Qwx nlyyV/Ho+mVJRuaHDOoZQ8cHOC1jnoXIUPYzioXGKfVqZ71QpW0edYeBw4AdPqaJZxMl 88UWXfnFKUPm8uE1Ml3yydj18IBEUr0iZMo+q7j9TifY5wjGGUgJxZVnFyUkV6WTTviE fR+hHoUmwxb+o7Tllahk2dT6qzKOMcjLPIE1HnZGNhgnj1pOcujiD6UONwrPb5VI2Neu vqjQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from; bh=uVTqLVp0K2EbX4o2iNRKAoRAS6Ss1L4t043Rzd86B7M=; b=m/1DGgFAcsC/nABJlCHAoStCMlq4S4b037EX33wxpAomU39NB4o+dIjFX1QPLkXI9Q OhBwReskoV2BXpqVRd8plsl+IBgKc42dwLsGjJ+nvG6A06vqqkNmfXI3qu31pTfuGKpF cpGgwc27H8rB7IYLeUoQBqyx7fwiQfqR3gdNUheul5ou04NcKnCvQiqhFhhON5ckQnCD dsQbOmjoQVdbT/Zm4uGykDHakTL9VRhj8MlNiZiDRyht1itAXQ4Ck6ptnS2NdpPTAU1k FHtxmUs9ThPX4SQ6UaA2S4enOoaEgj7gegkc/p5S0dQ820ixUrSi0MdNpR4tWHoLjOvM DdDw== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id d22si2375539ote.229.2019.12.11.19.41.38; Wed, 11 Dec 2019 19:41:38 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1728078AbfLLDlh (ORCPT + 27 others); Wed, 11 Dec 2019 22:41:37 -0500 Received: from mx2.suse.de ([195.135.220.15]:58556 "EHLO mx1.suse.de" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S1727524AbfLLDkA (ORCPT ); Wed, 11 Dec 2019 22:40:00 -0500 X-Virus-Scanned: by amavisd-new at test-mx.suse.de Received: from relay2.suse.de (unknown [195.135.220.254]) by mx1.suse.de (Postfix) with ESMTP id 9C4C9AE47; Thu, 12 Dec 2019 03:39:58 +0000 (UTC) From: =?utf-8?q?Andreas_F=C3=A4rber?= To: linux-realtek-soc@lists.infradead.org, linux-leds@vger.kernel.org Cc: Jacek Anaszewski , Pavel Machek , Dan Murphy , linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, =?utf-8?q?Andreas_F=C3=A4rber?= , zypeng@titanmec.com, Rob Herring , Mark Rutland , devicetree@vger.kernel.org Subject: [RFC 05/25] dt-bindings: vendor-prefixes: Add Titan Micro Electronics Date: Thu, 12 Dec 2019 04:39:32 +0100 Message-Id: <20191212033952.5967-6-afaerber@suse.de> X-Mailer: git-send-email 2.16.4 In-Reply-To: <20191212033952.5967-1-afaerber@suse.de> References: <20191212033952.5967-1-afaerber@suse.de> MIME-Version: 1.0 Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Assign vendor prefix "titanmec", matching their domain name. Cc: zypeng@titanmec.com Signed-off-by: Andreas Färber --- Documentation/devicetree/bindings/vendor-prefixes.yaml | 2 ++ 1 file changed, 2 insertions(+) -- 2.16.4 diff --git a/Documentation/devicetree/bindings/vendor-prefixes.yaml b/Documentation/devicetree/bindings/vendor-prefixes.yaml index 84a76efad2a8..31d0c4772b96 100644 --- a/Documentation/devicetree/bindings/vendor-prefixes.yaml +++ b/Documentation/devicetree/bindings/vendor-prefixes.yaml @@ -951,6 +951,8 @@ patternProperties: description: Texas Instruments "^tianma,.*": description: Tianma Micro-electronics Co., Ltd. + "^titanmec,.*": + description: Shenzhen Titan Micro Electronics Co., Ltd. "^tlm,.*": description: Trusted Logic Mobility "^tmt,.*": From patchwork Thu Dec 12 03:39:33 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Andreas_F=C3=A4rber?= X-Patchwork-Id: 181405 Delivered-To: patch@linaro.org Received: by 2002:a92:3001:0:0:0:0:0 with SMTP id x1csp372124ile; Wed, 11 Dec 2019 19:41:11 -0800 (PST) X-Google-Smtp-Source: APXvYqyA7V7TRe2Etom8CoEOibEETFYVxpIVFMoDdce+wgWOj8r53cdtMran1nl9IuRauztniQxP X-Received: by 2002:a05:6830:1415:: with SMTP id v21mr5944261otp.188.1576122071860; Wed, 11 Dec 2019 19:41:11 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1576122071; cv=none; d=google.com; s=arc-20160816; b=mVXqhcVplyAzq8v7b4ww/toUYkRivXEBOLod2NiLpPTJIl7FGtD4qw0bKYVoXRHYgd b94qSpgUD2w+tTJLRHXqnoQAE6ZbnLSRjCtpy4DirueRV0Hf284a/a2DKoPPKRwoZ9rH 0FSffJ6HXggYf0PrBPwp07GZmKaLGh/68Qq5yqvP6mKKqPuTUz6avhxShEG4EMX2P8Dt Es/ztzJYeZCp4VQsOtgBin/Ewm7N5eivi4oPa9K67EzkH2vJeqWOGwdfkBc6UhE1Kgd4 aCutxhRwmG8Ts5oCqzM/qZlxIk1OiwllQTG1lh/nQZOTO7VGossJW3YMDEspJw2EblIr SmhQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from; bh=YkN8Qj2fK9yzRWm1uktodcm51G+ht7uFvw22lipRBD4=; b=XOQivKskgM0L1yPgKJK/juoOK9wD0Ox0o/FApsxjgbvq8/TIuzWOFJhRJa65ovX17K /sBtRoHSEsu+tPuxJsdy0gHxWq6CjDUQLBw3xMs6mjjZXFBHj/nVtzqJsFXxtrM3lokh Snz5oVK+ZWnzIcX1lZq2+VWBt1r5UZ1SUkxdnfB7EqC9Yf8b7/SCXrodLr2KeR3KE0XK SIK3uRA/wfYA1wYX9pLFg0PH8NlItB+dLaNiiefa8UjhO+hWwR9beIphlAdnnCPN9e1U g7TLoST2lJIfdJs/ObeaugJYp5inpmVjpaCmHFjSdoP4nq2UZq8mEbNo4yKNtrPJydbC wHfg== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id r65si2395195oig.69.2019.12.11.19.41.11; Wed, 11 Dec 2019 19:41:11 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727716AbfLLDkE (ORCPT + 27 others); Wed, 11 Dec 2019 22:40:04 -0500 Received: from mx2.suse.de ([195.135.220.15]:58596 "EHLO mx1.suse.de" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S1726759AbfLLDkB (ORCPT ); Wed, 11 Dec 2019 22:40:01 -0500 X-Virus-Scanned: by amavisd-new at test-mx.suse.de Received: from relay2.suse.de (unknown [195.135.220.254]) by mx1.suse.de (Postfix) with ESMTP id 0861BAE57; Thu, 12 Dec 2019 03:39:59 +0000 (UTC) From: =?utf-8?q?Andreas_F=C3=A4rber?= To: linux-realtek-soc@lists.infradead.org, linux-leds@vger.kernel.org Cc: Jacek Anaszewski , Pavel Machek , Dan Murphy , linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, =?utf-8?q?Andreas_F=C3=A4rber?= , zypeng@titanmec.com, Rob Herring , Mark Rutland , devicetree@vger.kernel.org Subject: [RFC 06/25] dt-bindings: leds: Add Titan Micro Electronics TM1628 Date: Thu, 12 Dec 2019 04:39:33 +0100 Message-Id: <20191212033952.5967-7-afaerber@suse.de> X-Mailer: git-send-email 2.16.4 In-Reply-To: <20191212033952.5967-1-afaerber@suse.de> References: <20191212033952.5967-1-afaerber@suse.de> MIME-Version: 1.0 Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Add a YAML schema binding for TM1628 LED controller. Cc: zypeng@titanmec.com Signed-off-by: Andreas Färber --- @Rob: How could we express constraints on two-cell reg value ranges here? Should we also model constraints on reg range by #grids property? .../devicetree/bindings/leds/titanmec,tm1628.yaml | 80 ++++++++++++++++++++++ 1 file changed, 80 insertions(+) create mode 100644 Documentation/devicetree/bindings/leds/titanmec,tm1628.yaml -- 2.16.4 diff --git a/Documentation/devicetree/bindings/leds/titanmec,tm1628.yaml b/Documentation/devicetree/bindings/leds/titanmec,tm1628.yaml new file mode 100644 index 000000000000..024875656e79 --- /dev/null +++ b/Documentation/devicetree/bindings/leds/titanmec,tm1628.yaml @@ -0,0 +1,80 @@ +# SPDX-License-Identifier: (GPL-2.0-or-later OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/leds/titanmec,tm1628.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Titan Micro Electronics TM1628 LED controller + +maintainers: + - Andreas Färber + +properties: + compatible: + enum: + - titanmec,tm1628 + + reg: + maxItems: 1 + + "#grids": + description: | + Number of GRID output lines to use. + This limits the number of available SEG output lines. + minimum: 4 + maximum: 7 + + "#address-cells": + const: 2 + + "#size-cells": + const: 0 + +required: + - compatible + - reg + +patternProperties: + "^.*@[1-7],([1-9]|1[02-4])$": + type: object + description: | + Properties for a single LED. + + properties: + reg: + description: | + 1-based grid number, followed by 1-based segment number. + maxItems: 1 + + linux,default-trigger: true + + required: + - reg + +examples: + - | + #include + + spi { + #address-cells = <1>; + #size-cells = <0>; + + led-controller@0 { + compatible = "titanmec,tm1628"; + reg = <0>; + spi-3-wire; + spi-lsb-first; + spi-max-frequency = <500000>; + #grids = <7>; + #address-cells = <2>; + #size-cells = <0>; + + colon@5,4 { + reg = <5 4>; + color = ; + function = LED_FUNCTION_INDICATOR; + linux,default-trigger = "heartbeat"; + }; + }; + }; +... From patchwork Thu Dec 12 03:39:34 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Andreas_F=C3=A4rber?= X-Patchwork-Id: 181391 Delivered-To: patch@linaro.org Received: by 2002:a92:3001:0:0:0:0:0 with SMTP id x1csp371385ile; Wed, 11 Dec 2019 19:40:12 -0800 (PST) X-Google-Smtp-Source: APXvYqyZ1p2Bl2aw6pQQnoUAXNSI2w2v64RS8e4Aa+XhFAMfq5ojn4GdbVtpgLjRWgU0wAiwpcsZ X-Received: by 2002:a9d:768b:: with SMTP id j11mr5728669otl.116.1576122012604; Wed, 11 Dec 2019 19:40:12 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1576122012; cv=none; d=google.com; s=arc-20160816; b=BRZh3uOwlTbQzTSIsBD9HHj5ogjvEu8LGRQWNT1iHuyV6VoZDESaogC8dpq0foop/I ctVgdFXXYCAyveczFhmifiWjTXpP2rJdFuoO03Bu6ugwMVbedrz589tkdi/wOmvYq3Ox fDj75U/JNMBShroDj8YOevBASoiLGkd0IXcNiWhA6VP3+ojP2hirmkVpNuzTKuFGmdH0 NjIc/+IUFWfLVcPM0yRQndVXvUr/P/F6e8mwsqzOWng3HfvmvwXR3gW0Xup/oA1/fyye yRPd0Ttv46S6/c72+S+kWPYcAso6RhcbALMYi/AUDgoMADqOoE+PQQDqR4GfosIvzrxx yWvw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from; bh=oTEqDq7C2mF6hIYhqLV2MTKDSZ5PHyTyPqbyLJBnrDo=; b=uk/+AzPH1jjM1pG74G2b3i/wRM4OmbAoDPagav3nbD9doBuU0/+7fTZ4fLP99C6bTn 3RWRBgaNQFeg+H4+3zG/a68GSCz3I06zZ11DDRhwCmBCgQcU/UOPpEoS6dLA/+rhuimA ChgsK/uqF+XvxIQUkDf8ALtDmNm1aNLcha1zjtTUYAojyX3II+soRllZt8zESA5bvhD+ CMutr7A+NtvtVdXCtyhJu1XsFsMbA5+Dv3xzVVwu7XtYCMrxpcJA9IVXctuOfBuyvYpY RdaiWqmEGI0PF7DOWAfRzpgMOQu0ASQ8n892fJPSZfBmZUL4c7WTPJbQ9Qkrk2LJEH72 u5Ag== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id u18si2420033oia.80.2019.12.11.19.40.12; Wed, 11 Dec 2019 19:40:12 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727825AbfLLDkL (ORCPT + 27 others); Wed, 11 Dec 2019 22:40:11 -0500 Received: from mx2.suse.de ([195.135.220.15]:58662 "EHLO mx1.suse.de" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S1727594AbfLLDkD (ORCPT ); Wed, 11 Dec 2019 22:40:03 -0500 X-Virus-Scanned: by amavisd-new at test-mx.suse.de Received: from relay2.suse.de (unknown [195.135.220.254]) by mx1.suse.de (Postfix) with ESMTP id D1D8BAF21; Thu, 12 Dec 2019 03:39:59 +0000 (UTC) From: =?utf-8?q?Andreas_F=C3=A4rber?= To: linux-realtek-soc@lists.infradead.org, linux-leds@vger.kernel.org Cc: Jacek Anaszewski , Pavel Machek , Dan Murphy , linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, =?utf-8?q?Andreas_F=C3=A4rber?= , zypeng@titanmec.com Subject: [RFC 07/25] leds: Add Titan Micro Electronics TM1628 Date: Thu, 12 Dec 2019 04:39:34 +0100 Message-Id: <20191212033952.5967-8-afaerber@suse.de> X-Mailer: git-send-email 2.16.4 In-Reply-To: <20191212033952.5967-1-afaerber@suse.de> References: <20191212033952.5967-1-afaerber@suse.de> MIME-Version: 1.0 Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Add a driver for TM1628 LED controller. Cc: zypeng@titanmec.com Signed-off-by: Andreas Färber --- drivers/leds/Kconfig | 11 ++ drivers/leds/Makefile | 1 + drivers/leds/leds-tm1628.c | 420 +++++++++++++++++++++++++++++++++++++++++++++ 3 files changed, 432 insertions(+) create mode 100644 drivers/leds/leds-tm1628.c -- 2.16.4 diff --git a/drivers/leds/Kconfig b/drivers/leds/Kconfig index 4b68520ac251..f3afb419a9a1 100644 --- a/drivers/leds/Kconfig +++ b/drivers/leds/Kconfig @@ -836,6 +836,17 @@ config LEDS_LM36274 Say Y to enable the LM36274 LED driver for TI LMU devices. This supports the LED device LM36274. +config LEDS_TM1628 + tristate "LED driver for TM1628" + depends on LEDS_CLASS + depends on SPI + depends on OF || COMPILE_TEST + help + Say Y to enable support for Titan Micro Electronics TM1628 + LED controllers. + They are 3-wire SPI devices controlling a two-dimensional grid of + LEDs. Dimming is applied to all outputs through an internal PWM. + comment "LED Triggers" source "drivers/leds/trigger/Kconfig" diff --git a/drivers/leds/Makefile b/drivers/leds/Makefile index 2da39e896ce8..4c931002ef44 100644 --- a/drivers/leds/Makefile +++ b/drivers/leds/Makefile @@ -90,6 +90,7 @@ obj-$(CONFIG_LEDS_LM36274) += leds-lm36274.o obj-$(CONFIG_LEDS_CR0014114) += leds-cr0014114.o obj-$(CONFIG_LEDS_DAC124S085) += leds-dac124s085.o obj-$(CONFIG_LEDS_EL15203000) += leds-el15203000.o +obj-$(CONFIG_LEDS_TM1628) += leds-tm1628.o # LED Userspace Drivers obj-$(CONFIG_LEDS_USER) += uleds.o diff --git a/drivers/leds/leds-tm1628.c b/drivers/leds/leds-tm1628.c new file mode 100644 index 000000000000..319bf34ce835 --- /dev/null +++ b/drivers/leds/leds-tm1628.c @@ -0,0 +1,420 @@ +// SPDX-License-Identifier: GPL-2.0-or-later +/* + * Titan Micro Electronics TM1628 LED controller + * + * Copyright (c) 2019 Andreas Färber + */ + +#include +#include +#include +#include +#include +#include + +#define TM1628_CMD_MASK GENMASK(7, 6) +#define TM1628_CMD_DISPLAY_MODE (0x0 << 6) +#define TM1628_CMD_DATA_SETTING (0x1 << 6) +#define TM1628_CMD_DISPLAY_CTRL (0x2 << 6) +#define TM1628_CMD_ADDRESS_SETTING (0x3 << 6) + +#define TM1628_DISPLAY_MODE_MODE_MASK GENMASK(1, 0) + +#define TM1628_DATA_SETTING_MODE_MASK GENMASK(1, 0) +#define TM1628_DATA_SETTING_WRITE_DATA 0x0 +#define TM1628_DATA_SETTING_READ_DATA 0x2 +#define TM1628_DATA_SETTING_FIXED_ADDR BIT(2) +#define TM1628_DATA_SETTING_TEST_MODE BIT(3) + +#define TM1628_DISPLAY_CTRL_PW_MASK GENMASK(2, 0) + +#define TM1628_DISPLAY_CTRL_DISPLAY_ON BIT(3) + +struct tm1628_mode { + u8 grid_mask; + u16 seg_mask; +}; + +struct tm1628_info { + u8 grid_mask; + u16 seg_mask; + const struct tm1628_mode *modes; + int default_mode; + const struct pwm_capture *pwm_map; + int default_pwm; +}; + +struct tm1628_led { + struct led_classdev leddev; + struct tm1628 *ctrl; + u32 grid; + u32 seg; +}; + +struct tm1628 { + struct spi_device *spi; + const struct tm1628_info *info; + u32 grids; + unsigned int segments; + int mode_index; + int pwm_index; + u8 data[14]; + unsigned int num_leds; + struct tm1628_led leds[]; +}; + +/* Command 1: Display Mode Setting */ +static int tm1628_set_display_mode(struct spi_device *spi, u8 grid_mode) +{ + u8 cmd = TM1628_CMD_DISPLAY_MODE; + + if (unlikely(grid_mode & ~TM1628_DISPLAY_MODE_MODE_MASK)) + return -EINVAL; + + cmd |= grid_mode; + + return spi_write(spi, &cmd, 1); +} + +/* Command 2: Data Setting */ +static int tm1628_write_data(struct spi_device *spi, const u8 *data, unsigned int len) +{ + u8 cmd = TM1628_CMD_DATA_SETTING | TM1628_DATA_SETTING_WRITE_DATA; + struct spi_transfer xfers[] = { + { + .tx_buf = &cmd, + .len = 1, + }, + { + .tx_buf = data, + .len = len, + }, + }; + + if (len > 14) + return -EINVAL; + + return spi_sync_transfer(spi, xfers, ARRAY_SIZE(xfers)); +} + +/* Command 3: Address Setting */ +static int tm1628_set_address(struct spi_device *spi, u8 addr) +{ + u8 cmd = TM1628_CMD_ADDRESS_SETTING; + + cmd |= (addr & GENMASK(3, 0)); + + return spi_write(spi, &cmd, 1); +} + +/* Command 4: Display Control */ +static int tm1628_set_display_ctrl(struct spi_device *spi, bool on, u8 pwm_index) +{ + u8 cmd = TM1628_CMD_DISPLAY_CTRL; + + if (on) + cmd |= TM1628_DISPLAY_CTRL_DISPLAY_ON; + + if (pwm_index & ~TM1628_DISPLAY_CTRL_PW_MASK) + return -EINVAL; + + cmd |= pwm_index; + + return spi_write(spi, &cmd, 1); +} + +static inline bool tm1628_is_valid_grid(struct tm1628 *s, unsigned int grid) +{ + return s->info->modes[s->mode_index].grid_mask & BIT(grid); +} + +static inline bool tm1628_is_valid_seg(struct tm1628 *s, unsigned int seg) +{ + return s->info->modes[s->mode_index].seg_mask & BIT(seg); +} + +static int tm1628_get_led_offset(struct tm1628 *s, + unsigned int grid, unsigned int seg, int *poffset, int *pbit) +{ + int offset, bit; + + if (grid == 0 || grid > 7 || seg == 0 || seg > 16) + return -EINVAL; + + offset = (grid - 1) * 2; + bit = seg - 1; + if (bit >= 8) { + bit -= 8; + offset++; + } + + *poffset = offset; + if (pbit) + *pbit = bit; + + return 0; +} + +static int tm1628_get_led(struct tm1628 *s, + unsigned int grid, unsigned int seg, bool *on) +{ + int offset, bit; + int ret; + + ret = tm1628_get_led_offset(s, grid, seg, &offset, &bit); + if (ret) + return ret; + + *on = !!(s->data[offset] & BIT(bit)); + + return 0; +} + +static int tm1628_set_led(struct tm1628 *s, + unsigned int grid, unsigned int seg, bool on) +{ + int offset, bit; + int ret; + + ret = tm1628_get_led_offset(s, grid, seg, &offset, &bit); + if (ret) + return ret; + + if (on) + s->data[offset] |= BIT(bit); + else + s->data[offset] &= ~BIT(bit); + + return 0; +} + +static int tm1628_led_set_brightness(struct led_classdev *led_cdev, + enum led_brightness brightness) +{ + struct tm1628_led *led = container_of(led_cdev, struct tm1628_led, leddev); + struct tm1628 *s = led->ctrl; + int ret, offset; + + ret = tm1628_set_led(s, led->grid, led->seg, brightness != LED_OFF); + if (ret) + return ret; + + ret = tm1628_get_led_offset(s, led->grid, led->seg, &offset, NULL); + if (unlikely(ret)) + return ret; + + ret = tm1628_set_address(s->spi, offset); + if (ret) + return ret; + + return tm1628_write_data(s->spi, s->data + offset, 1); +} + +static enum led_brightness tm1628_led_get_brightness(struct led_classdev *led_cdev) +{ + struct tm1628_led *led = container_of(led_cdev, struct tm1628_led, leddev); + struct tm1628 *s = led->ctrl; + bool on; + int ret; + + ret = tm1628_get_led(s, led->grid, led->seg, &on); + if (ret) + return ret; + + return on ? LED_ON : LED_OFF; +} + +static int tm1628_register_led(struct tm1628 *s, + struct fwnode_handle *node, u32 grid, u32 seg, struct tm1628_led *led) +{ + struct device *dev = &s->spi->dev; + struct led_init_data init_data = {0}; + + if (!tm1628_is_valid_grid(s, grid) || !tm1628_is_valid_seg(s, seg)) { + dev_warn(dev, "%s reg out of range\n", fwnode_get_name(node)); + return -EINVAL; + } + + led->ctrl = s; + led->grid = grid; + led->seg = seg; + led->leddev.max_brightness = LED_ON; + led->leddev.brightness_set_blocking = tm1628_led_set_brightness; + led->leddev.brightness_get = tm1628_led_get_brightness; + + fwnode_property_read_string(node, "linux,default-trigger", &led->leddev.default_trigger); + + init_data.fwnode = node; + init_data.devicename = "tm1628"; + + return devm_led_classdev_register_ext(dev, &led->leddev, &init_data); +} + +/* Work around __builtin_popcount() */ +static u32 tm1628_grid_popcount(u8 grid_mask) +{ + int i, n = 0; + + while (grid_mask) { + i = __ffs(grid_mask); + grid_mask &= ~BIT(i); + n++; + } + + return n; +} + +static int tm1628_spi_probe(struct spi_device *spi) +{ + struct tm1628 *s; + struct fwnode_handle *child; + u32 grids; + u32 reg[2]; + size_t leds; + int ret, i; + + leds = device_get_child_node_count(&spi->dev); + + s = devm_kzalloc(&spi->dev, struct_size(s, leds, leds), GFP_KERNEL); + if (!s) + return -ENOMEM; + + s->spi = spi; + + s->info = device_get_match_data(&spi->dev); + if (!s->info) + return -EINVAL; + + s->pwm_index = s->info->default_pwm; + + ret = tm1628_set_display_ctrl(spi, false, s->pwm_index); + if (ret) { + dev_err(&spi->dev, "Turning display off failed (%d)\n", ret); + return ret; + } + + ret = device_property_read_u32(&spi->dev, "#grids", &grids); + if (ret && ret != -EINVAL) { + dev_err(&spi->dev, "Error reading #grids property (%d)\n", ret); + return ret; + } + + s->mode_index = -1; + for (i = 0; i < 4; i++) { + if (tm1628_grid_popcount(s->info->modes[i].grid_mask) != grids) + continue; + s->mode_index = i; + break; + } + if (s->mode_index == -1) { + dev_err(&spi->dev, "#grids out of range (%u)\n", grids); + return -EINVAL; + } + + spi_set_drvdata(spi, s); + + device_for_each_child_node(&spi->dev, child) { + ret = fwnode_property_read_u32_array(child, "reg", reg, 2); + if (ret) { + dev_err(&spi->dev, "Reading %s reg property failed (%d)\n", + fwnode_get_name(child), ret); + fwnode_handle_put(child); + return ret; + } + + if (fwnode_property_count_u32(child, "reg") == 2) { + ret = tm1628_register_led(s, child, reg[0], reg[1], &s->leds[i++]); + if (ret && ret != -EINVAL) { + dev_err(&spi->dev, "Failed to register LED %s (%d)\n", + fwnode_get_name(child), ret); + fwnode_handle_put(child); + return ret; + } + s->num_leds++; + } + } + + ret = tm1628_set_address(spi, 0x0); + if (ret) { + dev_err(&spi->dev, "Setting address failed (%d)\n", ret); + return ret; + } + + ret = tm1628_write_data(spi, s->data, sizeof(s->data)); + if (ret) { + dev_err(&spi->dev, "Writing data failed (%d)\n", ret); + return ret; + } + + ret = tm1628_set_display_mode(spi, s->mode_index); + if (ret) { + dev_err(&spi->dev, "Setting display mode failed (%d)\n", ret); + return ret; + } + + ret = tm1628_set_display_ctrl(spi, true, s->pwm_index); + if (ret) { + dev_err(&spi->dev, "Turning display on failed (%d)\n", ret); + return ret; + } + + return 0; +} + +static const struct pwm_capture tm1628_pwm_map[8] = { + { .duty_cycle = 1, .period = 16 }, + { .duty_cycle = 2, .period = 16 }, + { .duty_cycle = 4, .period = 16 }, + { .duty_cycle = 10, .period = 16 }, + { .duty_cycle = 11, .period = 16 }, + { .duty_cycle = 12, .period = 16 }, + { .duty_cycle = 13, .period = 16 }, + { .duty_cycle = 14, .period = 16 }, +}; + +static const struct tm1628_mode tm1628_modes[4] = { + { + .grid_mask = GENMASK(4, 1), + .seg_mask = GENMASK(14, 12) | GENMASK(10, 1), + }, + { + .grid_mask = GENMASK(5, 1), + .seg_mask = GENMASK(13, 12) | GENMASK(10, 1), + }, + { + .grid_mask = GENMASK(6, 1), + .seg_mask = BIT(12) | GENMASK(10, 1), + }, + { + .grid_mask = GENMASK(7, 1), + .seg_mask = GENMASK(10, 1), + }, +}; + +static const struct tm1628_info tm1628_info = { + .grid_mask = GENMASK(7, 1), + .seg_mask = GENMASK(14, 12) | GENMASK(10, 1), + .modes = tm1628_modes, + .default_mode = 3, + .pwm_map = tm1628_pwm_map, + .default_pwm = 0, +}; + +static const struct of_device_id tm1628_spi_of_matches[] = { + { .compatible = "titanmec,tm1628", .data = &tm1628_info }, + {} +}; +MODULE_DEVICE_TABLE(of, tm1628_spi_of_matches); + +static struct spi_driver tm1628_spi_driver = { + .probe = tm1628_spi_probe, + .driver = { + .name = "tm1628", + .of_match_table = tm1628_spi_of_matches, + }, +}; +module_spi_driver(tm1628_spi_driver); + +MODULE_DESCRIPTION("TM1628 LED controller driver"); +MODULE_AUTHOR("Andreas Färber"); +MODULE_LICENSE("GPL"); From patchwork Thu Dec 12 03:39:37 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Andreas_F=C3=A4rber?= X-Patchwork-Id: 181407 Delivered-To: patch@linaro.org Received: by 2002:a92:3001:0:0:0:0:0 with SMTP id x1csp372216ile; Wed, 11 Dec 2019 19:41:19 -0800 (PST) X-Google-Smtp-Source: APXvYqwOw3O0ZXE/IGendPQ0kU7UtKLO9mX2rGaKJQR96rrFTgUeg4C+D/lgCx5AIM96x4VVajs6 X-Received: by 2002:a9d:7ccc:: with SMTP id r12mr5998612otn.22.1576122079232; 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Cc: sales@fdhisi.com Signed-off-by: Andreas Färber --- Documentation/devicetree/bindings/vendor-prefixes.yaml | 2 ++ 1 file changed, 2 insertions(+) -- 2.16.4 Acked-by: Rob Herring diff --git a/Documentation/devicetree/bindings/vendor-prefixes.yaml b/Documentation/devicetree/bindings/vendor-prefixes.yaml index 31d0c4772b96..34b6c298c9bd 100644 --- a/Documentation/devicetree/bindings/vendor-prefixes.yaml +++ b/Documentation/devicetree/bindings/vendor-prefixes.yaml @@ -331,6 +331,8 @@ patternProperties: description: Fastrax Oy "^fcs,.*": description: Fairchild Semiconductor + "^fdhisi,.*": + description: Fuzhou Fuda Hisi Microelectronics Co., Ltd. "^feiyang,.*": description: Shenzhen Fly Young Technology Co.,LTD. "^firefly,.*": From patchwork Thu Dec 12 03:39:38 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Andreas_F=C3=A4rber?= X-Patchwork-Id: 181397 Delivered-To: patch@linaro.org Received: by 2002:a92:3001:0:0:0:0:0 with SMTP id x1csp371669ile; Wed, 11 Dec 2019 19:40:38 -0800 (PST) X-Google-Smtp-Source: APXvYqzEKvsK0Plz5Tdb8KoFAUuJ7VW6NFOknskpfrfeJBZEAewc2IuZ3rn8Irt4jvasv59eEfa5 X-Received: by 2002:a9d:6d81:: with SMTP id x1mr6020210otp.9.1576122037776; Wed, 11 Dec 2019 19:40:37 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1576122037; cv=none; d=google.com; s=arc-20160816; b=VfkM/zzub57ihmLh/iiYErZcLairKP9qEDvURJeXhjIwK6/72e+gcYlfP0i0p+ITOE 6DYYWzauDhD8z6VoA0aDP5ZBEduwG2uRhS8zhKOlEjqIsi2vYKhsR6hPVVonTAkWDmuO iCmLJQI1qy1kjTILARZQDlR7Bvh+yTNZ5TVMaIpST0qBVFd0AwHP3LROAa1/ywKSjgQ7 ehRhrGUSSZA6xh6dVtD4QOzbR1HibOTMlEuf3JZs4i3GS1PZ0F9MFZYMyxr/C+0yeXUi JDoJ1RTbKL3e1ROxJaMiH65JtR5TscJ5SYYkIXXqyyjBiLZ0YCzaKDrPqdJr5BNAM41J IMaQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from; bh=GXWCjxb+WIed0YE6ntxcFzJgd+CW7zFqiMs1cKFoL4k=; b=FaAx2b+rJzpWIwNcGbkkrt+mlQ0yCPEGP0BjcyXtH56i5OPgk1pVjunzi6+vaSvUm7 Oo0R5LTJhtn+2bZuu5kVfLmBaplzrYJvkCxY7LjmyhtBgbXPmJoL4DU9V8FOmuwfasST DCGD+P4Xe2U14N9VW7GZ25B9WXeTl34zsEK87XXC08vmrwSJQeg0rwkQdRQwSFf7rWjG aF8xOzjlvlOstpTBParCvB6aq8Mq1dAnPFFoO6lzfBhnyEEaLh0Dp3INdlI0NPPvlu91 LhP3ltp4Yi44Dft6m+jItrXrwhBMUY6PcY47xC1FEhhM1U2iQ0QkFrYk8inbSwL1cfwS wGvQ== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id k8si2823909otf.76.2019.12.11.19.40.37; Wed, 11 Dec 2019 19:40:37 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727843AbfLLDkM (ORCPT + 27 others); Wed, 11 Dec 2019 22:40:12 -0500 Received: from mx2.suse.de ([195.135.220.15]:58556 "EHLO mx1.suse.de" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S1727641AbfLLDkD (ORCPT ); Wed, 11 Dec 2019 22:40:03 -0500 X-Virus-Scanned: by amavisd-new at test-mx.suse.de Received: from relay2.suse.de (unknown [195.135.220.254]) by mx1.suse.de (Postfix) with ESMTP id EADCCAE40; Thu, 12 Dec 2019 03:40:01 +0000 (UTC) From: =?utf-8?q?Andreas_F=C3=A4rber?= To: linux-realtek-soc@lists.infradead.org, linux-leds@vger.kernel.org Cc: Jacek Anaszewski , Pavel Machek , Dan Murphy , linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, =?utf-8?q?Andreas_F=C3=A4rber?= , sales@fdhisi.com, Rob Herring , Mark Rutland , devicetree@vger.kernel.org Subject: [RFC 11/25] dt-bindings: leds: tm1628: Add Fuda Hisi Microelectronics FD628 Date: Thu, 12 Dec 2019 04:39:38 +0100 Message-Id: <20191212033952.5967-12-afaerber@suse.de> X-Mailer: git-send-email 2.16.4 In-Reply-To: <20191212033952.5967-1-afaerber@suse.de> References: <20191212033952.5967-1-afaerber@suse.de> MIME-Version: 1.0 Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Add a compatible string for FD628. Cc: sales@fdhisi.com Signed-off-by: Andreas Färber --- Documentation/devicetree/bindings/leds/titanmec,tm1628.yaml | 1 + 1 file changed, 1 insertion(+) -- 2.16.4 Acked-by: Rob Herring diff --git a/Documentation/devicetree/bindings/leds/titanmec,tm1628.yaml b/Documentation/devicetree/bindings/leds/titanmec,tm1628.yaml index 024875656e79..3f2cc4cec04d 100644 --- a/Documentation/devicetree/bindings/leds/titanmec,tm1628.yaml +++ b/Documentation/devicetree/bindings/leds/titanmec,tm1628.yaml @@ -12,6 +12,7 @@ maintainers: properties: compatible: enum: + - fdhisi,fd628 - titanmec,tm1628 reg: From patchwork Thu Dec 12 03:39:39 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Andreas_F=C3=A4rber?= X-Patchwork-Id: 181396 Delivered-To: patch@linaro.org Received: by 2002:a92:3001:0:0:0:0:0 with SMTP id x1csp371658ile; Wed, 11 Dec 2019 19:40:36 -0800 (PST) X-Google-Smtp-Source: APXvYqwEuUyvGJ4qfh31s9RfiLFx24xo0HzYEGosj4/Ts1oZnIJTAjgHnDXGmSsxnEuZg4ajMqfB X-Received: by 2002:a05:6830:2116:: with SMTP id i22mr6030550otc.0.1576122035558; Wed, 11 Dec 2019 19:40:35 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1576122035; cv=none; d=google.com; s=arc-20160816; b=TK/Xod/aP25dGvwAoac7/LW1e8PL+K0RMDir1oDpcJ8xxcpO2gJzIZfpWarXCjpuTJ hcJMnXu5qHyknEFmg6Fpdq1r2HuM+Pq+zubwufNN+J0xcgo2NO/qpf2ftVLWca3Pq6D3 lelpQKm93JsEijrRjrL3xO7nJDs00jmIfV48Nv8TirDR12BaSA0fOZTWSbmymubTYU2W b2Cnju11WFlcZGSdK9nVv2mrDLacASVNdaWAMZ8oqyEvAPbxwKMGc9m0PMlaB3Ddll9C R2yA6tPrN3/t/7QAK4GXkr1iJsCIIDnYeTJgGvF/I9KP4bmqGK2JxJM8Ud4TBxdni+CZ L9Zg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from; bh=kSBo4rCMB5pyRR1RTyOQ2brIaksCdCCe6RXgRPU0J+k=; b=c6m5yzioCBWvvjnndYVTJDEpXSMZOwu2/2KtAcrrfOHO5EeZtOZQBF20+Mydpv9cOu X8S83FePZElam17CAiVzx5IhAp5k0WSiWkSNstoUBTQwC55w8TP1oifwVrh5N6coE93J SrPcwOAgnlcQy/VRlX15ZSBDlowsUcEyGlpMn+ekwbeVxw1h7WkojbsIWhLeb/Q0/rLw bditEYSTTIT5HRoLtBBaW3UNcBpMviab59ogL8Ys5tvNFYuHBb11yuEvGMrelx4woanI HttKGEd2OV1b+YK1BBy21FhLVhzaMVa6/DHbfbsCLET6sfH5TiL1wpPESSsw0kepzxcl xN3Q== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id k8si2823909otf.76.2019.12.11.19.40.35; Wed, 11 Dec 2019 19:40:35 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727864AbfLLDkO (ORCPT + 27 others); Wed, 11 Dec 2019 22:40:14 -0500 Received: from mx2.suse.de ([195.135.220.15]:58596 "EHLO mx1.suse.de" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S1727658AbfLLDkE (ORCPT ); Wed, 11 Dec 2019 22:40:04 -0500 X-Virus-Scanned: by amavisd-new at test-mx.suse.de Received: from relay2.suse.de (unknown [195.135.220.254]) by mx1.suse.de (Postfix) with ESMTP id 60525AD6F; Thu, 12 Dec 2019 03:40:02 +0000 (UTC) From: =?utf-8?q?Andreas_F=C3=A4rber?= To: linux-realtek-soc@lists.infradead.org, linux-leds@vger.kernel.org Cc: Jacek Anaszewski , Pavel Machek , Dan Murphy , linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, =?utf-8?q?Andreas_F=C3=A4rber?= , sales@fdhisi.com Subject: [RFC 12/25] leds: tm1628: Add Fuda Hisi Microelectronics FD628 Date: Thu, 12 Dec 2019 04:39:39 +0100 Message-Id: <20191212033952.5967-13-afaerber@suse.de> X-Mailer: git-send-email 2.16.4 In-Reply-To: <20191212033952.5967-1-afaerber@suse.de> References: <20191212033952.5967-1-afaerber@suse.de> MIME-Version: 1.0 Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Add definition for FD628 chipset. Cc: sales@fdhisi.com Signed-off-by: Andreas Färber --- drivers/leds/Kconfig | 4 ++-- drivers/leds/leds-tm1628.c | 12 ++++++++++++ 2 files changed, 14 insertions(+), 2 deletions(-) -- 2.16.4 diff --git a/drivers/leds/Kconfig b/drivers/leds/Kconfig index f3afb419a9a1..a7695d961d9c 100644 --- a/drivers/leds/Kconfig +++ b/drivers/leds/Kconfig @@ -842,8 +842,8 @@ config LEDS_TM1628 depends on SPI depends on OF || COMPILE_TEST help - Say Y to enable support for Titan Micro Electronics TM1628 - LED controllers. + Say Y to enable support for Titan Micro Electronics TM1628 and + Fuda Hisi Microelectronics FD628 LED controllers. They are 3-wire SPI devices controlling a two-dimensional grid of LEDs. Dimming is applied to all outputs through an internal PWM. diff --git a/drivers/leds/leds-tm1628.c b/drivers/leds/leds-tm1628.c index 319bf34ce835..ef85712a84f2 100644 --- a/drivers/leds/leds-tm1628.c +++ b/drivers/leds/leds-tm1628.c @@ -1,6 +1,8 @@ // SPDX-License-Identifier: GPL-2.0-or-later /* * Titan Micro Electronics TM1628 LED controller + * Also compatible: + * Fuda Hisi Microelectronics FD628 * * Copyright (c) 2019 Andreas Färber */ @@ -400,8 +402,18 @@ static const struct tm1628_info tm1628_info = { .default_pwm = 0, }; +static const struct tm1628_info fd628_info = { + .grid_mask = GENMASK(7, 1), + .seg_mask = GENMASK(14, 12) | GENMASK(10, 1), + .modes = tm1628_modes, + .default_mode = 3, + .pwm_map = tm1628_pwm_map, + .default_pwm = 0, +}; + static const struct of_device_id tm1628_spi_of_matches[] = { { .compatible = "titanmec,tm1628", .data = &tm1628_info }, + { .compatible = "fdhisi,fd628", .data = &fd628_info }, {} }; MODULE_DEVICE_TABLE(of, tm1628_spi_of_matches); From patchwork Thu Dec 12 03:39:40 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Andreas_F=C3=A4rber?= X-Patchwork-Id: 181395 Delivered-To: patch@linaro.org Received: by 2002:a92:3001:0:0:0:0:0 with SMTP id x1csp371634ile; Wed, 11 Dec 2019 19:40:33 -0800 (PST) X-Google-Smtp-Source: APXvYqw0lB6MgxbQW54aJWVB6O+J/JlakVmBkuWcN+QcAxbj0EUxQ+5/MmP5wdFKF6Z+geFjy4da X-Received: by 2002:a05:6830:2116:: with SMTP id i22mr6030409otc.0.1576122033466; Wed, 11 Dec 2019 19:40:33 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1576122033; cv=none; d=google.com; s=arc-20160816; b=cW+MXaha95AJ5nM2N9+7E4bZs+0syr+8vSIKvzDfLAgh8j9UcBqaExcydHHY2I33xH XjY8MwVeXtLPtByrMmJv2jh9B66d7ZgmkfsN9UDcehgVDU6bpulDPaeXaDfk1nHICALU PuWARUCTmw7vwsUSMjctvYiV53Mk18AhKUZYt6tgjGTNPBYYnjdI7i04KpSk6jWpbwrs ZF3pmf+a0dvjsATTGpVJAa9Wi+RnB7MUGHTDzSQ4vEhty0LWWqGOwB+stKDfqESY65HB OnSUSUjPt+3bcE+kxqny45zhEH4buVF+xJ/J2nfm81dji4gS931oc9atM5g3VwEaTsT9 +6Fw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from; bh=OOK0MPRDvJhNF0hDIpvLArjZzB3MclDSSTgAgp6o4js=; b=PXMu/Voh2bUHbKajtpe2uAtvDVw4K5ssDHGaeN76RuWjzxzlq88eYAaiSZic8jRvgI +UIWAAN5oumKhm+EALeSdkS6j4qZAVnFwbjlsQcHvB5RJOVL73YWXNm853wY6x6nQ2wy jUgK3oStv3QwlyVj3GZ5Tz+tc0EHTfWLuevaLMWc4t8u0FPvJUjpXYB/SP22K2k6Dt+U GVpxfB2M43Twu0rubQOnT42MF9F6sCNnzfZ106SP4OvJH7le2zHvaL0y2azfjqAjiEb/ XXMoZ7DFVsC93wlNaN0YrI6+3bnOL0GUVcyBeCuGql8MF5/Cj28zLhhcyGENl6TcR9JV 85OQ== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id k8si2823909otf.76.2019.12.11.19.40.33; Wed, 11 Dec 2019 19:40:33 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727876AbfLLDkP (ORCPT + 27 others); Wed, 11 Dec 2019 22:40:15 -0500 Received: from mx2.suse.de ([195.135.220.15]:58692 "EHLO mx1.suse.de" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S1727685AbfLLDkE (ORCPT ); Wed, 11 Dec 2019 22:40:04 -0500 X-Virus-Scanned: by amavisd-new at test-mx.suse.de Received: from relay2.suse.de (unknown [195.135.220.254]) by mx1.suse.de (Postfix) with ESMTP id D71ADAF37; Thu, 12 Dec 2019 03:40:02 +0000 (UTC) From: =?utf-8?q?Andreas_F=C3=A4rber?= To: linux-realtek-soc@lists.infradead.org, linux-leds@vger.kernel.org Cc: Jacek Anaszewski , Pavel Machek , Dan Murphy , linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, =?utf-8?q?Andreas_F=C3=A4rber?= , Rob Herring , Mark Rutland , devicetree@vger.kernel.org Subject: [RFC 13/25] arm64: dts: realtek: rtd1295-xnano-x5: Add FD628 LED controller Date: Thu, 12 Dec 2019 04:39:40 +0100 Message-Id: <20191212033952.5967-14-afaerber@suse.de> X-Mailer: git-send-email 2.16.4 In-Reply-To: <20191212033952.5967-1-afaerber@suse.de> References: <20191212033952.5967-1-afaerber@suse.de> MIME-Version: 1.0 Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Add a spi-gpio node and LED controller slave node. Signed-off-by: Andreas Färber --- arch/arm64/boot/dts/realtek/rtd1295-xnano-x5.dts | 22 ++++++++++++++++++++++ 1 file changed, 22 insertions(+) -- 2.16.4 diff --git a/arch/arm64/boot/dts/realtek/rtd1295-xnano-x5.dts b/arch/arm64/boot/dts/realtek/rtd1295-xnano-x5.dts index d7878ff942e6..ea9e9a96f1d3 100644 --- a/arch/arm64/boot/dts/realtek/rtd1295-xnano-x5.dts +++ b/arch/arm64/boot/dts/realtek/rtd1295-xnano-x5.dts @@ -5,6 +5,8 @@ /dts-v1/; +#include + #include "rtd1295.dtsi" / { @@ -23,6 +25,26 @@ chosen { stdout-path = "serial0:115200n8"; }; + + spi { + compatible = "spi-gpio"; + sck-gpios = <&iso_gpio 4 GPIO_ACTIVE_HIGH>; + mosi-gpios = <&iso_gpio 3 GPIO_ACTIVE_HIGH>; + cs-gpios = <&iso_gpio 2 GPIO_ACTIVE_LOW>; + num-chipselects = <1>; + #address-cells = <1>; + #size-cells = <0>; + + fd628: led-controller@0 { + compatible = "fdhisi,fd628"; + reg = <0>; + spi-3wire; + spi-lsb-first; + spi-rx-delay-us = <1>; + spi-max-frequency = <500000>; + #grids = <7>; + }; + }; }; &uart0 { From patchwork Thu Dec 12 03:39:41 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Andreas_F=C3=A4rber?= X-Patchwork-Id: 181404 Delivered-To: patch@linaro.org Received: by 2002:a92:3001:0:0:0:0:0 with SMTP id x1csp372104ile; Wed, 11 Dec 2019 19:41:10 -0800 (PST) X-Google-Smtp-Source: APXvYqwa2Tv8RosWvG5iKWm6DzFzpwLHf1NUxiezKZb6chiXrcub/B5kL714VBO+wqcEXntq+q2x X-Received: by 2002:a05:6830:579:: with SMTP id f25mr5890130otc.248.1576122070206; Wed, 11 Dec 2019 19:41:10 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1576122070; cv=none; d=google.com; s=arc-20160816; b=Z7ZrKCyFPQ1W0o9uSy891cZF64m/Qeo97xhOvj6MuD7kpAQZzB3gzgKQcR9h+/0S52 Oqm0vmBAM56OtdpcX41ny8mrEWBmt7OZL92MG99ATHD7sGZsEIRhJB1/jsYuUcpOD9r4 p4QqLatgfuJnBsS74bPrLPLWx2tL4HjGUXxWHsUo625O/zGTUcY6chpfegEVLoxfS09P gs8C9pN50drOidHQxKfr2lwnbH7sZakeJ+hyVe8QTMOcbWz313VpdiItAwbyC1+DuKb3 FKNwErD5N98asivfOyhiaQeJSUQ+Uj2gKKc7HQAPhGViTRDP+qnuzSTORTvxp9REtFdJ SdKw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from; bh=boC7E+aNdTRZ9vAg9X9lsb43fNwd5mZP7KCkoDnpcHw=; b=VVSsQM/jONk9drbl8NVJVbVkhw+QHoritowFVGWK9n5KCP6ALnezVBw+TmQgYtV1iT uNO3ELY8I9gKirXhY+VdGCpaoTxqJLfHiD14kHv2vJpORSsDaVmyY3KlGlm9IKVmRu7W ngaqrveX6XXyCVR6Eqmqo8bFo8kpcxt2mKWT02ksoNOCnUnq8qSWDctCfbNTW8UFek5p rWQEqKiYJN9P+ZPbFt4lWVNaaC6pw9YecqGzvBzJF2JNAf3FFc//IAe5FkgPBSGkV8l5 jz1ejdx5yD8WQz2cJQXIdJ+YJkw7fL34PATsegbiEfOp1aCujk6554Jc8PBI91Jr3RWp /KcQ== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id r65si2395195oig.69.2019.12.11.19.41.09; Wed, 11 Dec 2019 19:41:10 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1728022AbfLLDlI (ORCPT + 27 others); Wed, 11 Dec 2019 22:41:08 -0500 Received: from mx2.suse.de ([195.135.220.15]:58618 "EHLO mx1.suse.de" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S1727698AbfLLDkF (ORCPT ); Wed, 11 Dec 2019 22:40:05 -0500 X-Virus-Scanned: by amavisd-new at test-mx.suse.de Received: from relay2.suse.de (unknown [195.135.220.254]) by mx1.suse.de (Postfix) with ESMTP id 601BDAD5F; Thu, 12 Dec 2019 03:40:03 +0000 (UTC) From: =?utf-8?q?Andreas_F=C3=A4rber?= To: linux-realtek-soc@lists.infradead.org, linux-leds@vger.kernel.org Cc: Jacek Anaszewski , Pavel Machek , Dan Murphy , linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, =?utf-8?q?Andreas_F=C3=A4rber?= , Rob Herring , Mark Rutland , devicetree@vger.kernel.org Subject: [RFC 14/25] arm64: dts: realtek: rtd1295-xnano-x5: Add regular LEDs to FD628 Date: Thu, 12 Dec 2019 04:39:41 +0100 Message-Id: <20191212033952.5967-15-afaerber@suse.de> X-Mailer: git-send-email 2.16.4 In-Reply-To: <20191212033952.5967-1-afaerber@suse.de> References: <20191212033952.5967-1-afaerber@suse.de> MIME-Version: 1.0 Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Add child nodes for individual LED indicators plus the half-second colon. Signed-off-by: Andreas Färber --- arch/arm64/boot/dts/realtek/rtd1295-xnano-x5.dts | 52 ++++++++++++++++++++++++ 1 file changed, 52 insertions(+) -- 2.16.4 diff --git a/arch/arm64/boot/dts/realtek/rtd1295-xnano-x5.dts b/arch/arm64/boot/dts/realtek/rtd1295-xnano-x5.dts index ea9e9a96f1d3..9d678b300c7b 100644 --- a/arch/arm64/boot/dts/realtek/rtd1295-xnano-x5.dts +++ b/arch/arm64/boot/dts/realtek/rtd1295-xnano-x5.dts @@ -6,6 +6,7 @@ /dts-v1/; #include +#include #include "rtd1295.dtsi" @@ -43,6 +44,57 @@ spi-rx-delay-us = <1>; spi-max-frequency = <500000>; #grids = <7>; + #address-cells = <2>; + #size-cells = <0>; + + apps@1,4 { + reg = <1 4>; + color = ; + function = LED_FUNCTION_INDICATOR; + function-enumerator = <1>; + }; + + setup@2,4 { + reg = <2 4>; + color = ; + function = LED_FUNCTION_INDICATOR; + function-enumerator = <2>; + }; + + usb@3,4 { + reg = <3 4>; + color = ; + function = LED_FUNCTION_INDICATOR; + function-enumerator = <3>; + }; + + card@4,4 { + reg = <4 4>; + color = ; + function = LED_FUNCTION_INDICATOR; + function-enumerator = <4>; + }; + + colon@5,4 { + reg = <5 4>; + color = ; + function = LED_FUNCTION_STATUS; + function-enumerator = <5>; + }; + + hdmi@6,4 { + reg = <6 4>; + color = ; + function = LED_FUNCTION_INDICATOR; + function-enumerator = <6>; + }; + + cvbs@7,4 { + reg = <7 4>; + color = ; + function = LED_FUNCTION_INDICATOR; + function-enumerator = <7>; + }; }; }; }; From patchwork Thu Dec 12 03:39:42 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Andreas_F=C3=A4rber?= X-Patchwork-Id: 181403 Delivered-To: patch@linaro.org Received: by 2002:a92:3001:0:0:0:0:0 with SMTP id x1csp372038ile; Wed, 11 Dec 2019 19:41:05 -0800 (PST) X-Google-Smtp-Source: APXvYqxt70pmdLkBiFEn1fjlRCpPTNJDd/N62f+JjLijKxsxVifdsPwfoq9ADD0K58E61Zuzox9Q X-Received: by 2002:a9d:6a98:: with SMTP id l24mr5844025otq.160.1576122065009; Wed, 11 Dec 2019 19:41:05 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1576122065; cv=none; d=google.com; s=arc-20160816; b=tq8AP1Hp3XI0gO4cm2gzE313XjAj9Of27O/yvwO0RPWmc4CJ2h6Qha+SZ3euQ5kWOE RMVyI726oJuxcavdnBmoXk6AfDWI4OtAkAdRuoJ7byruYjZvnQK336Kon78bCl1KcLB2 qKbesCcbZSUisiDDAyVm6KfUjrezTIHnvz92YD8Y782z31KKFP+LQ48Rh9Xs//9x0YZ4 Ew+JdYPX03Z1Oba4J0vnhokonVsp5GyvaXk4jjH6Q5YPmzVJhkfZWbO4fPaU1rQMvPx2 NSbv25dFou5+xTJFTnD0cPBRdmljCToGJFb26OqH4nMq1zMJ3tc7XDOcbBPc4soDwEOz hwrA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from; bh=Mbwf89tWOWHi4mvm13O3AwgG0i41KT9FxskBFbaxHg4=; b=QLGehHNlZO0SerguCgG2sn6Dz0UCeE4SqRfAcCSzZatxCStwmLGadxk3167gbhYxoS ZuBgBq60RXsyFBfyGtZ0gUOKozDLox12HBfs/EG4Day/ad5QSubzbJj2ze1YPUgDkDl/ s8mMnMeBLjQvdKV1xB1irm0FZPcsfKLLN19fbfHMP6/8qeps0zJnJEpMlwCGqCwkLVZk zC5SdyOrsEcVKgqDnpIcyIuTFUM6s3IQ8KKlIkU61uWDdsf0JyBMfGZs203Ou1CuptH9 30lX/WOjNOzP88xgnlq3Ghd1Jcb0aXoq/y2PUK9Ppv46TszMyCoiba/vyIFIFl7MGgHS lJYg== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id v1si2358532otq.141.2019.12.11.19.41.04; Wed, 11 Dec 2019 19:41:04 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1728012AbfLLDlD (ORCPT + 27 others); Wed, 11 Dec 2019 22:41:03 -0500 Received: from mx2.suse.de ([195.135.220.15]:58768 "EHLO mx1.suse.de" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S1727710AbfLLDkF (ORCPT ); Wed, 11 Dec 2019 22:40:05 -0500 X-Virus-Scanned: by amavisd-new at test-mx.suse.de Received: from relay2.suse.de (unknown [195.135.220.254]) by mx1.suse.de (Postfix) with ESMTP id D356DAF93; Thu, 12 Dec 2019 03:40:03 +0000 (UTC) From: =?utf-8?q?Andreas_F=C3=A4rber?= To: linux-realtek-soc@lists.infradead.org, linux-leds@vger.kernel.org Cc: Jacek Anaszewski , Pavel Machek , Dan Murphy , linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, =?utf-8?q?Andreas_F=C3=A4rber?= , Rob Herring , Mark Rutland , devicetree@vger.kernel.org Subject: [RFC 15/25] dt-bindings: vendor-prefixes: Add Fude Microelectronics Date: Thu, 12 Dec 2019 04:39:42 +0100 Message-Id: <20191212033952.5967-16-afaerber@suse.de> X-Mailer: git-send-email 2.16.4 In-Reply-To: <20191212033952.5967-1-afaerber@suse.de> References: <20191212033952.5967-1-afaerber@suse.de> MIME-Version: 1.0 Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Assign vendor prefix "szfdwdz", based on their domain name. Signed-off-by: Andreas Färber --- Documentation/devicetree/bindings/vendor-prefixes.yaml | 2 ++ 1 file changed, 2 insertions(+) -- 2.16.4 diff --git a/Documentation/devicetree/bindings/vendor-prefixes.yaml b/Documentation/devicetree/bindings/vendor-prefixes.yaml index 34b6c298c9bd..1f44e45971ab 100644 --- a/Documentation/devicetree/bindings/vendor-prefixes.yaml +++ b/Documentation/devicetree/bindings/vendor-prefixes.yaml @@ -927,6 +927,8 @@ patternProperties: description: Synaptics Inc. "^synology,.*": description: Synology, Inc. + "^szfdwdz,.*": + description: Shenzhen Fude Microelectronics Co., Ltd. "^tbs,.*": description: TBS Technologies "^tbs-biometrics,.*": From patchwork Thu Dec 12 03:39:43 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Andreas_F=C3=A4rber?= X-Patchwork-Id: 181402 Delivered-To: patch@linaro.org Received: by 2002:a92:3001:0:0:0:0:0 with SMTP id x1csp371949ile; Wed, 11 Dec 2019 19:41:00 -0800 (PST) X-Google-Smtp-Source: APXvYqw/DtwLRKGr7/EMxxG+PVl+IcCxeYL4UU6hX5+LTX8z1gpzm2gflErUwva6joPV9udM3WJ2 X-Received: by 2002:a05:6830:1b71:: with SMTP id d17mr5340423ote.42.1576122060329; Wed, 11 Dec 2019 19:41:00 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1576122060; cv=none; d=google.com; s=arc-20160816; b=plVGPGf+N4LFwJTLSkhIo0AT9/7qWVNpcxWuUwsE1fu4FV2L0HqdRrqdjfeLgIJFbZ ePM99zQJ96AcrIHi0qm73+/0DB5G7jn0RzgO/vkCmjGzW9dB72Pf9LQVZvgC/YEViidt XFETctPQ59MF8Pd/25pRkeu9606uQ6Y66ULRqJcr1ohMha9jDZTOu/akPuWYlJs7dh+E da4SHWbFDoBVBje8TFp+7netgeAlYEISlVabIoV/rkDlKZNsdavwkaQepDB79wGmTOP5 i7ciPRm7O9F0PAJ4Mwydp7Y3ZSfGEWrhUFXSnIgleV30jIGWj9yGdNgTO5oSZ1MMhF05 E0wA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from; bh=KkYfY420ZrrjUNiW72zofNe3oftHk67bGXgbRNU7+r0=; b=zmZ+UKGWcmBQ6HMmYJAY3CmNZtEINSF0tE0rxJgxT5xlZ+foBb55XNgW7SVxbF6f/h Z9jrFJgGY7bpmrpSeQOVd6p4LCtD8//Cmxc/IbAeMp/mBi8mOQU/bnN/SxSEqcAlZwXz wLkMRcsnA3GQrwA4/WtR38n5jF4GonnmVGCj2/CZUbIY+VDgDyd90VXJXt2QO2jGmnTr pJOyqT/wzQP69FFDklfpbmlfZtIrw0OwsG60tPWBos9WPlJLraiigzvRRqNma8vFwM40 YrjaMVTx4AmBBaIbGJVZXgL9qvK7jUmVl6A0UpoqFcqEpsINDWTCZN0HIpkJQ4Qo0rSX J+yQ== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id j16si2347443otq.23.2019.12.11.19.41.00; Wed, 11 Dec 2019 19:41:00 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1728000AbfLLDk6 (ORCPT + 27 others); Wed, 11 Dec 2019 22:40:58 -0500 Received: from mx2.suse.de ([195.135.220.15]:58662 "EHLO mx1.suse.de" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S1727551AbfLLDkF (ORCPT ); Wed, 11 Dec 2019 22:40:05 -0500 X-Virus-Scanned: by amavisd-new at test-mx.suse.de Received: from relay2.suse.de (unknown [195.135.220.254]) by mx1.suse.de (Postfix) with ESMTP id 50BA0AECA; Thu, 12 Dec 2019 03:40:04 +0000 (UTC) From: =?utf-8?q?Andreas_F=C3=A4rber?= To: linux-realtek-soc@lists.infradead.org, linux-leds@vger.kernel.org Cc: Jacek Anaszewski , Pavel Machek , Dan Murphy , linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, =?utf-8?q?Andreas_F=C3=A4rber?= , Rob Herring , Mark Rutland , devicetree@vger.kernel.org Subject: [RFC 16/25] dt-bindings: leds: tm1628: Add Fude Microelectronics AiP1618 Date: Thu, 12 Dec 2019 04:39:43 +0100 Message-Id: <20191212033952.5967-17-afaerber@suse.de> X-Mailer: git-send-email 2.16.4 In-Reply-To: <20191212033952.5967-1-afaerber@suse.de> References: <20191212033952.5967-1-afaerber@suse.de> MIME-Version: 1.0 Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Define a compatible string for AiP1618 chipset. Signed-off-by: Andreas Färber --- @Rob: This one would conditionally need to further restrict reg ranges then. Documentation/devicetree/bindings/leds/titanmec,tm1628.yaml | 1 + 1 file changed, 1 insertion(+) -- 2.16.4 diff --git a/Documentation/devicetree/bindings/leds/titanmec,tm1628.yaml b/Documentation/devicetree/bindings/leds/titanmec,tm1628.yaml index 3f2cc4cec04d..50205e3c3624 100644 --- a/Documentation/devicetree/bindings/leds/titanmec,tm1628.yaml +++ b/Documentation/devicetree/bindings/leds/titanmec,tm1628.yaml @@ -13,6 +13,7 @@ properties: compatible: enum: - fdhisi,fd628 + - szfdwdz,aip1618 - titanmec,tm1628 reg: From patchwork Thu Dec 12 03:39:44 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Andreas_F=C3=A4rber?= X-Patchwork-Id: 181392 Delivered-To: patch@linaro.org Received: by 2002:a92:3001:0:0:0:0:0 with SMTP id x1csp371455ile; Wed, 11 Dec 2019 19:40:18 -0800 (PST) X-Google-Smtp-Source: APXvYqw6AYvgzZ9whP1LSxsCpMYzBfZpOSPsfhXrQzfiPMctrgZSoY8iEzjMqPrHwbcWfz2WRh8X X-Received: by 2002:a9d:7393:: with SMTP id j19mr5501944otk.336.1576122018189; Wed, 11 Dec 2019 19:40:18 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1576122018; cv=none; d=google.com; s=arc-20160816; b=jtBrRIJARSc5bla6dqtOfznjqrnjFkguORtSnvesN5R5kqIrUY2uhUl1OYUZz7PNhB LqsUSgVonulkLg17tqMAJaiJWzs7YE1Sj3PzxJ3ZzNbttoitqUMHgyeENBPkes/odwT+ RwhyQy18C1Pn9W7vjkUImNGudkJNjr5zOvpCtPpBNyYpUmVcOi+ZNVf+dPEmZo/ebU3Y cmQmHyVKwqY1xAvO+3Dx7LiFB8VFUiQQyVzcqWd6eM4LZhIGpZarISGmUvDxwNYZDleU 3mblyYVSrgo85bHKaHYNjRC5J5AWzhuvg5nakJjtp7tJRapX7qA5xaSyvrDl8uQydIr0 NtUQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from; bh=aP5K95S21ITCYz0Mbl5YtF5Je5aV6lnsxYMAlCR4OSI=; b=ZhoxBbE+7CB9yBMBTnntd/7TThYXourViVAJWFlfOriM5QhwIoemp8q44+bz0OkAOW o66Rz+0SxzOEOU8NaSj+1akXmUx/r1eHDkqIqzy2Qj0i1wYW++J00JkHdxnbpWPv6i3j LNY69u6IL+mTY0r0U6JffiUxJ9oZaWQLf7drgmXzbqKjenBtoPnXcJtcB18WgXXY7UB2 jk3iAnOPx9zSn+kkOJ3fHEDXPGbeEXnAhQymPpfwAjN/LvJ+ne8G94gx8Q+V4TrpKDmn iEgQo0qwucrallnMpyy3UTMMPTvfDBT+n3SYW4wOlpjcxdcmJ4rorBnlLt1eH2dB/pUw B0iw== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id u18si2420033oia.80.2019.12.11.19.40.17; Wed, 11 Dec 2019 19:40:18 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727893AbfLLDkR (ORCPT + 27 others); Wed, 11 Dec 2019 22:40:17 -0500 Received: from mx2.suse.de ([195.135.220.15]:58556 "EHLO mx1.suse.de" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S1727730AbfLLDkG (ORCPT ); Wed, 11 Dec 2019 22:40:06 -0500 X-Virus-Scanned: by amavisd-new at test-mx.suse.de Received: from relay2.suse.de (unknown [195.135.220.254]) by mx1.suse.de (Postfix) with ESMTP id D8415AF63; Thu, 12 Dec 2019 03:40:04 +0000 (UTC) From: =?utf-8?q?Andreas_F=C3=A4rber?= To: linux-realtek-soc@lists.infradead.org, linux-leds@vger.kernel.org Cc: Jacek Anaszewski , Pavel Machek , Dan Murphy , linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, =?utf-8?q?Andreas_F=C3=A4rber?= Subject: [RFC 17/25] leds: tm1628: Prepare Fude Microelectronics AiP1618 Date: Thu, 12 Dec 2019 04:39:44 +0100 Message-Id: <20191212033952.5967-18-afaerber@suse.de> X-Mailer: git-send-email 2.16.4 In-Reply-To: <20191212033952.5967-1-afaerber@suse.de> References: <20191212033952.5967-1-afaerber@suse.de> MIME-Version: 1.0 Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Add definition for AiP1618 chipset. Signed-off-by: Andreas Färber --- drivers/leds/Kconfig | 5 +++-- drivers/leds/leds-tm1628.c | 30 ++++++++++++++++++++++++++++++ 2 files changed, 33 insertions(+), 2 deletions(-) -- 2.16.4 diff --git a/drivers/leds/Kconfig b/drivers/leds/Kconfig index a7695d961d9c..3a7e6028ae80 100644 --- a/drivers/leds/Kconfig +++ b/drivers/leds/Kconfig @@ -842,8 +842,9 @@ config LEDS_TM1628 depends on SPI depends on OF || COMPILE_TEST help - Say Y to enable support for Titan Micro Electronics TM1628 and - Fuda Hisi Microelectronics FD628 LED controllers. + Say Y to enable support for Titan Micro Electronics TM1628, + Fuda Hisi Microelectronics FD628 and Fude Microelectronics AiP1618 + LED controllers. They are 3-wire SPI devices controlling a two-dimensional grid of LEDs. Dimming is applied to all outputs through an internal PWM. diff --git a/drivers/leds/leds-tm1628.c b/drivers/leds/leds-tm1628.c index ef85712a84f2..8a8fd1562853 100644 --- a/drivers/leds/leds-tm1628.c +++ b/drivers/leds/leds-tm1628.c @@ -3,6 +3,7 @@ * Titan Micro Electronics TM1628 LED controller * Also compatible: * Fuda Hisi Microelectronics FD628 + * Fude Microelectronics AiP1618 * * Copyright (c) 2019 Andreas Färber */ @@ -411,9 +412,38 @@ static const struct tm1628_info fd628_info = { .default_pwm = 0, }; +static const struct tm1628_mode aip1618_modes[4] = { + { + .grid_mask = GENMASK(4, 1), + .seg_mask = GENMASK(8, 1), + }, + { + .grid_mask = GENMASK(5, 1), + .seg_mask = GENMASK(7, 1), + }, + { + .grid_mask = GENMASK(6, 1), + .seg_mask = GENMASK(6, 1), + }, + { + .grid_mask = GENMASK(7, 1), + .seg_mask = GENMASK(5, 1), + }, +}; + +static const struct tm1628_info aip1618_info = { + .grid_mask = GENMASK(7, 1), + .seg_mask = GENMASK(14, 12) | GENMASK(5, 1), + .modes = aip1618_modes, + .default_mode = 3, + .pwm_map = tm1628_pwm_map, + .default_pwm = 0, +}; + static const struct of_device_id tm1628_spi_of_matches[] = { { .compatible = "titanmec,tm1628", .data = &tm1628_info }, { .compatible = "fdhisi,fd628", .data = &fd628_info }, + { .compatible = "szfdwdz,aip1618", .data = &aip1618_info }, {} }; MODULE_DEVICE_TABLE(of, tm1628_spi_of_matches); From patchwork Thu Dec 12 03:39:45 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Andreas_F=C3=A4rber?= X-Patchwork-Id: 181401 Delivered-To: patch@linaro.org Received: by 2002:a92:3001:0:0:0:0:0 with SMTP id x1csp371859ile; Wed, 11 Dec 2019 19:40:53 -0800 (PST) X-Google-Smtp-Source: APXvYqxX6ePy0MdN+5qFElIp+H3eF4Ux5+rGL6EBpIX5/x18pLOy9bb5YEqyL5ojOcr5IgpPTf/z X-Received: by 2002:a9d:6f11:: with SMTP id n17mr5598650otq.126.1576122053139; Wed, 11 Dec 2019 19:40:53 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1576122053; cv=none; d=google.com; s=arc-20160816; b=fl4vV2VGKJdU5yodTcsiWZbU2QKOMReuTkcALFcj+JnYkHiA437GwihffXGzeB+imD G9rxjivkCbaN6iJ+oAKLt4Xs2YFs+5BrceL9tM6dJJNkmsBu+FUDnMt4wcMjGa0tRAvo YecHFoOIJ1NSgJUY2qKCEwWherutpOGEEGjtq0MgUTkSsEm1mAN2MLkoqBKxmwekcwh+ jvbwJcqlY+uorrbPecruaxGFfGOBQH6ray4FR6po8QAJmRNUMKDZLCn/SGZ1KTm51/mR epU+zr3dxUxVUkR3PerLFZwHNY1zVhiAdWJdUh19YqRvFNqGKag5sMssnO7gbZYwrt/t zTMw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from; bh=992+52dYziSsyavXwh9d5wtxg7DokaFQ8LFxiCKL75A=; b=ueRmbeajB3ik8Z92AHBxPH0wga3e1oRkMsAwoamlqDkxB1/ldZWQsUfw1/GA77TlFj /SKb/pvctN5cK+vloDWePBKkZNshHtKqo/Urusr7UQHokkpvhptIOwTdjvHzl5lxf/tL zVrOvE7tj+cgUVHMeCA+Ykxj+eRd8ALpZ42nrla5dd5vfHFZJGIv3445nBxqh0jLvUgA VMeNedV06UsRhTl/wR0zmXI49otZ9CSmxwlAf8xRCdgYucHILLmwpX/36r+5JPR9aBg5 Tg7LgCZRoiSbzat5YVUA8HalepZN8J2EpZ8C9BHdqfuHD093l91lk8V8QVTQCSVYE4GT f64Q== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id w129si2440339oig.83.2019.12.11.19.40.52; Wed, 11 Dec 2019 19:40:53 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727987AbfLLDkv (ORCPT + 27 others); Wed, 11 Dec 2019 22:40:51 -0500 Received: from mx2.suse.de ([195.135.220.15]:58596 "EHLO mx1.suse.de" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S1727743AbfLLDkH (ORCPT ); Wed, 11 Dec 2019 22:40:07 -0500 X-Virus-Scanned: by amavisd-new at test-mx.suse.de Received: from relay2.suse.de (unknown [195.135.220.254]) by mx1.suse.de (Postfix) with ESMTP id 5E564AFA8; Thu, 12 Dec 2019 03:40:05 +0000 (UTC) From: =?utf-8?q?Andreas_F=C3=A4rber?= To: linux-realtek-soc@lists.infradead.org, linux-leds@vger.kernel.org Cc: Jacek Anaszewski , Pavel Machek , Dan Murphy , linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, =?utf-8?q?Andreas_F=C3=A4rber?= , Rob Herring , Mark Rutland , devicetree@vger.kernel.org Subject: [RFC 18/25] dt-bindings: leds: tm1628: Define display child nodes Date: Thu, 12 Dec 2019 04:39:45 +0100 Message-Id: <20191212033952.5967-19-afaerber@suse.de> X-Mailer: git-send-email 2.16.4 In-Reply-To: <20191212033952.5967-1-afaerber@suse.de> References: <20191212033952.5967-1-afaerber@suse.de> MIME-Version: 1.0 Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Amend the individual LEDs by allowing to specify one special child node with more than one reg entry, with value zero having wildcard meaning. Signed-off-by: Andreas Färber --- Read the cover letter for further discussion of concept and alternatives. .../devicetree/bindings/leds/titanmec,tm1628.yaml | 52 ++++++++++++++++++++++ 1 file changed, 52 insertions(+) -- 2.16.4 diff --git a/Documentation/devicetree/bindings/leds/titanmec,tm1628.yaml b/Documentation/devicetree/bindings/leds/titanmec,tm1628.yaml index 50205e3c3624..cf6c8d81e68c 100644 --- a/Documentation/devicetree/bindings/leds/titanmec,tm1628.yaml +++ b/Documentation/devicetree/bindings/leds/titanmec,tm1628.yaml @@ -53,6 +53,24 @@ patternProperties: required: - reg + "^display@([1-7],0|0,([1-9]|1[02-4]))$": + type: object + description: | + Properties for a sequence of 7-segment digits composed of multiple LEDs. + + properties: + reg: + description: | + One or more tuples of grid number and segment number in visual order. + A segment of zero indicates that the corresponding grid output lines + represent the individual segments; a grid of zero indicates that the + corresponding segment output lines represent the individual segments. + minItems: 1 + maxItems: 7 + + required: + - reg + examples: - | #include @@ -71,6 +89,40 @@ examples: #address-cells = <2>; #size-cells = <0>; + display@0,8 { + reg = <0 8>, <0 7>, <0 6>, <0 5>; + }; + + colon@5,4 { + reg = <5 4>; + color = ; + function = LED_FUNCTION_INDICATOR; + linux,default-trigger = "heartbeat"; + }; + }; + }; + + - | + #include + + spi { + #address-cells = <1>; + #size-cells = <0>; + + led-controller@0 { + compatible = "titanmec,tm1628"; + reg = <0>; + spi-3-wire; + spi-lsb-first; + spi-max-frequency = <500000>; + #grids = <6>; + #address-cells = <2>; + #size-cells = <0>; + + display@1,0 { + reg = <1 0>, <2 0>, <3 0>, <4 0>; + }; + colon@5,4 { reg = <5 4>; color = ; From patchwork Thu Dec 12 03:39:46 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Andreas_F=C3=A4rber?= X-Patchwork-Id: 181400 Delivered-To: patch@linaro.org Received: by 2002:a92:3001:0:0:0:0:0 with SMTP id x1csp371837ile; Wed, 11 Dec 2019 19:40:51 -0800 (PST) X-Google-Smtp-Source: APXvYqx718YQa6K/3L9NXQRglc7KyXuu8sOHrduqJnev6spfvxNEbjQIoOOs7w7qc63GFRjA8Mwl X-Received: by 2002:a9d:6652:: with SMTP id q18mr5778908otm.321.1576122051148; Wed, 11 Dec 2019 19:40:51 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1576122051; cv=none; d=google.com; s=arc-20160816; b=u9/drL8v6upRGSyU/4AS4yVgghtTnXXCDtvM+el4FDWlOgEUOg5EvnLo9404+Oqe03 qSvQuJ/QkwMsUQHQJ4SwcWeiU/h1IeHZ/QoelcR2dvoxQ0QFG5QODocF62rbJIMQ6cKp tVXPqr+zh7dpFb6sGL3Ir845KiAxO9JD3imGIPyOS3+mYjpNnopgUc7sjjayhhZlLv1A W2MWQjKFudyoymleh8kfJdJhE7VRS3xTfD1/r5xrV0IY5hpk8ZB/g6I4dDjXxRzstWVP /uP9oG9NkXnweDMlRWkhs4rdTHSXNh858p6LRJA7dRHD5UTlHnbc+QORlBLVEnILwlJV qn6Q== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from; bh=Au78KvjFc1NjOXBdWVSdh0EKdMeYoo+b+9AxZx8Z2Os=; b=FUGis4gZAB3D9Z85WXoxw9LEWm9xeYSHyLCeYq+EklAN9ZjpONkcrtQi9982GSGq5e 7sum96obw2mLczXQM6BvmkFMQ8+ZUCK38DNEK33o2Dtxirk/qJnZXgZY/76B3eNE8jpy 1Iw6cHqWuxEK9HbyMjNahma96tHnSaWrV1nSkvoh16ovs+5z/oxtmYxwsH6YPY/dYnWs JCMUHVFo8VvtwPKGyP1qVHFIlodDMaea/6LVVxT3CbdB/605vQcmWb3qU5oDGDwjUkeP OInkIMRK8FJemIZ8Tl/+PAsZMQkhl92W8KszxbHn5ys0oSJ0fCY4apVBPakriAnTH6+0 P1og== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id k8si2823909otf.76.2019.12.11.19.40.50; Wed, 11 Dec 2019 19:40:51 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727977AbfLLDkt (ORCPT + 27 others); Wed, 11 Dec 2019 22:40:49 -0500 Received: from mx2.suse.de ([195.135.220.15]:58618 "EHLO mx1.suse.de" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S1727764AbfLLDkH (ORCPT ); Wed, 11 Dec 2019 22:40:07 -0500 X-Virus-Scanned: by amavisd-new at test-mx.suse.de Received: from relay2.suse.de (unknown [195.135.220.254]) by mx1.suse.de (Postfix) with ESMTP id E4A2AADA8; Thu, 12 Dec 2019 03:40:05 +0000 (UTC) From: =?utf-8?q?Andreas_F=C3=A4rber?= To: linux-realtek-soc@lists.infradead.org, linux-leds@vger.kernel.org Cc: Jacek Anaszewski , Pavel Machek , Dan Murphy , linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, =?utf-8?q?Andreas_F=C3=A4rber?= Subject: [RFC 19/25] leds: tm1628: Add 7-segment display support Date: Thu, 12 Dec 2019 04:39:46 +0100 Message-Id: <20191212033952.5967-20-afaerber@suse.de> X-Mailer: git-send-email 2.16.4 In-Reply-To: <20191212033952.5967-1-afaerber@suse.de> References: <20191212033952.5967-1-afaerber@suse.de> MIME-Version: 1.0 Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Detect DT child nodes covering more than one LED component and implement a text to 7-segment display mapping. Signed-off-by: Andreas Färber --- drivers/leds/leds-tm1628.c | 230 ++++++++++++++++++++++++++++++++++++++++++++- 1 file changed, 229 insertions(+), 1 deletion(-) -- 2.16.4 diff --git a/drivers/leds/leds-tm1628.c b/drivers/leds/leds-tm1628.c index 8a8fd1562853..e2c2a5d91596 100644 --- a/drivers/leds/leds-tm1628.c +++ b/drivers/leds/leds-tm1628.c @@ -47,6 +47,15 @@ struct tm1628_info { int default_pwm; }; +struct tm1628_segment { + u32 grid; + u32 seg; +}; + +struct tm1628_display { + struct tm1628_segment segments[8]; +}; + struct tm1628_led { struct led_classdev leddev; struct tm1628 *ctrl; @@ -62,6 +71,8 @@ struct tm1628 { int mode_index; int pwm_index; u8 data[14]; + unsigned int num_displays; + struct tm1628_display *displays; unsigned int num_leds; struct tm1628_led leds[]; }; @@ -253,6 +264,215 @@ static int tm1628_register_led(struct tm1628 *s, return devm_led_classdev_register_ext(dev, &led->leddev, &init_data); } +#define SSD_TOP BIT(0) +#define SSD_TOP_RIGHT BIT(1) +#define SSD_BOTTOM_RIGHT BIT(2) +#define SSD_BOTTOM BIT(3) +#define SSD_BOTTOM_LEFT BIT(4) +#define SSD_TOP_LEFT BIT(5) +#define SSD_MIDDLE BIT(6) +#define SSD_DOT BIT(7) + +struct tm1628_ssd_char { + char ch; + u8 segs; +}; + +static const struct tm1628_ssd_char tm1628_char_ssd_map[] = { + { '0', SSD_TOP | SSD_TOP_LEFT | SSD_TOP_RIGHT | + SSD_BOTTOM_LEFT | SSD_BOTTOM_RIGHT | SSD_BOTTOM }, + { '1', SSD_TOP_RIGHT | SSD_BOTTOM_RIGHT }, + { '2', SSD_TOP | SSD_TOP_RIGHT | SSD_MIDDLE | SSD_BOTTOM_LEFT | SSD_BOTTOM }, + { '3', SSD_TOP | SSD_TOP_RIGHT | SSD_MIDDLE | SSD_BOTTOM_RIGHT | SSD_BOTTOM }, + { '4', SSD_TOP_LEFT | SSD_TOP_RIGHT | SSD_MIDDLE | SSD_BOTTOM_RIGHT }, + { '5', SSD_TOP | SSD_TOP_LEFT | SSD_MIDDLE | SSD_BOTTOM_RIGHT | SSD_BOTTOM }, + { '6', SSD_TOP | SSD_TOP_LEFT | SSD_MIDDLE | SSD_BOTTOM_LEFT | SSD_BOTTOM_RIGHT | SSD_BOTTOM }, + { '7', SSD_TOP | SSD_TOP_RIGHT | SSD_BOTTOM_RIGHT }, + { '8', SSD_TOP | SSD_TOP_LEFT | SSD_TOP_RIGHT | SSD_MIDDLE | + SSD_BOTTOM_LEFT | SSD_BOTTOM_RIGHT | SSD_BOTTOM }, + { '9', SSD_TOP | SSD_TOP_LEFT | SSD_TOP_RIGHT | SSD_MIDDLE | + SSD_BOTTOM_RIGHT | SSD_BOTTOM }, + { 'A', SSD_TOP | SSD_TOP_LEFT | SSD_TOP_RIGHT | SSD_MIDDLE | + SSD_BOTTOM_LEFT | SSD_BOTTOM_RIGHT }, + { 'B', SSD_TOP | SSD_TOP_LEFT | SSD_TOP_RIGHT | SSD_MIDDLE | + SSD_BOTTOM_LEFT | SSD_BOTTOM_RIGHT | SSD_BOTTOM }, + { 'C', SSD_TOP | SSD_TOP_LEFT | SSD_BOTTOM_LEFT | SSD_BOTTOM }, + { 'D', SSD_TOP | SSD_TOP_LEFT | SSD_TOP_RIGHT | + SSD_BOTTOM_LEFT | SSD_BOTTOM_RIGHT | SSD_BOTTOM }, + { 'E', SSD_TOP | SSD_TOP_LEFT | SSD_MIDDLE | SSD_BOTTOM_LEFT | SSD_BOTTOM }, + { 'F', SSD_TOP | SSD_TOP_LEFT | SSD_MIDDLE | SSD_BOTTOM_LEFT }, + { 'G', SSD_TOP | SSD_TOP_LEFT | SSD_BOTTOM_LEFT | SSD_BOTTOM | SSD_BOTTOM_RIGHT }, + { 'H', SSD_TOP_LEFT | SSD_TOP_RIGHT | SSD_MIDDLE | + SSD_BOTTOM_LEFT | SSD_BOTTOM_RIGHT }, + { 'I', SSD_TOP_LEFT | SSD_BOTTOM_LEFT }, + { 'J', SSD_TOP | SSD_TOP_RIGHT | SSD_BOTTOM_RIGHT | SSD_BOTTOM }, + { 'K', SSD_TOP_LEFT | SSD_TOP_RIGHT | SSD_MIDDLE | + SSD_BOTTOM_LEFT | SSD_BOTTOM_RIGHT }, + { 'L', SSD_TOP_LEFT | SSD_BOTTOM_LEFT | SSD_BOTTOM }, + { 'O', SSD_TOP | SSD_TOP_LEFT | SSD_TOP_RIGHT | + SSD_BOTTOM_LEFT | SSD_BOTTOM_RIGHT | SSD_BOTTOM }, + { 'P', SSD_TOP | SSD_TOP_LEFT | SSD_TOP_RIGHT | SSD_MIDDLE | + SSD_BOTTOM_LEFT }, + { 'Q', SSD_TOP | SSD_TOP_LEFT | SSD_TOP_RIGHT | + SSD_BOTTOM_LEFT | SSD_BOTTOM_RIGHT | SSD_BOTTOM }, + { 'R', SSD_TOP | SSD_TOP_LEFT | SSD_TOP_RIGHT | SSD_MIDDLE | + SSD_BOTTOM_LEFT | SSD_BOTTOM_RIGHT }, + { 'S', SSD_TOP | SSD_TOP_LEFT | SSD_MIDDLE | SSD_BOTTOM_RIGHT | SSD_BOTTOM }, + { 'T', SSD_TOP | SSD_TOP_LEFT | SSD_BOTTOM_LEFT }, + { 'U', SSD_TOP_LEFT | SSD_BOTTOM_LEFT | SSD_BOTTOM | SSD_BOTTOM_RIGHT | SSD_TOP_RIGHT }, + { 'V', SSD_TOP_LEFT | SSD_BOTTOM_LEFT | SSD_BOTTOM | SSD_BOTTOM_RIGHT | SSD_TOP_RIGHT }, + { 'W', SSD_TOP_LEFT | SSD_BOTTOM_LEFT | SSD_BOTTOM | SSD_BOTTOM_RIGHT | SSD_TOP_RIGHT }, + { 'Z', SSD_TOP | SSD_TOP_RIGHT | SSD_MIDDLE | SSD_BOTTOM_LEFT | SSD_BOTTOM }, + { 'b', SSD_TOP_LEFT | SSD_MIDDLE | SSD_BOTTOM_LEFT | SSD_BOTTOM | SSD_BOTTOM_RIGHT }, + { 'l', SSD_TOP_LEFT | SSD_BOTTOM_LEFT }, + { 'o', SSD_MIDDLE | SSD_BOTTOM_LEFT | SSD_BOTTOM | SSD_BOTTOM_RIGHT }, + { 't', SSD_TOP_LEFT | SSD_MIDDLE | SSD_BOTTOM_LEFT | SSD_BOTTOM }, + { 'u', SSD_BOTTOM_LEFT | SSD_BOTTOM | SSD_BOTTOM_RIGHT }, + { 'v', SSD_BOTTOM_LEFT | SSD_BOTTOM | SSD_BOTTOM_RIGHT }, + { 'w', SSD_BOTTOM_LEFT | SSD_BOTTOM | SSD_BOTTOM_RIGHT }, + { '-', SSD_MIDDLE }, + { '_', SSD_BOTTOM }, + { '.', SSD_DOT }, +}; + +static u8 tm1628_get_char_ssd_map(char ch) +{ + int i; + + for (i = 0; i < ARRAY_SIZE(tm1628_char_ssd_map); i++) { + if (tm1628_char_ssd_map[i].ch == ch) + return tm1628_char_ssd_map[i].segs; + } + + return 0x0; +} + +static int tm1628_display_apply_map(struct tm1628 *s, + struct tm1628_display *display, u8 map) +{ + struct tm1628_segment *segment; + int i; + + for (i = 0; i < 8; i++) { + segment = &display->segments[i]; + tm1628_set_led(s, segment->grid, segment->seg, map & BIT(i)); + } + + return 0; +} + +static ssize_t text_store(struct device *dev, + struct device_attribute *attr, const char *buf, size_t count) +{ + struct tm1628 *s = dev_get_drvdata(dev); + size_t offset, len = count; + u8 map; + int i, ret; + + if (len > 0 && buf[len - 1] == '\n') + len--; + + for (i = 0, offset = 0; i < s->num_displays; i++) { + if (offset < len) { + map = tm1628_get_char_ssd_map(buf[offset]); + offset++; + } else + map = 0x0; + + tm1628_display_apply_map(s, &s->displays[i], map); + } + + ret = tm1628_set_address(s->spi, 0x0); + if (ret) + return ret; + + ret = tm1628_write_data(s->spi, s->data, 14); + if (ret) + return ret; + + return count; +} + +static struct device_attribute tm1628_attr = + __ATTR_WO(text); + +static int tm1628_register_display(struct tm1628 *s, + struct fwnode_handle *node) +{ + struct device *dev = &s->spi->dev; + struct tm1628_display *display; + u32 *reg; + u32 grid, seg; + int i, j, ret, reg_count; + + reg_count = fwnode_property_count_u32(node, "reg"); + if (reg_count < 0) + return reg_count; + + if (reg_count % 2) { + dev_warn(dev, "Ignoring extra cell in %s reg property\n", + fwnode_get_name(node)); + reg_count--; + } + + if (s->displays) { + dev_warn(dev, "Only one display supported\n"); + return -EINVAL; + } + + s->num_displays = reg_count >> 1; + + reg = devm_kzalloc(dev, reg_count * sizeof(*reg), GFP_KERNEL); + if (!reg) + return -ENOMEM; + + ret = fwnode_property_read_u32_array(node, "reg", reg, reg_count); + if (ret) { + dev_err(dev, "Reading %s reg property failed (%d)\n", + fwnode_get_name(node), ret); + return ret; + } + + s->displays = devm_kzalloc(dev, s->num_displays * sizeof(*s->displays), GFP_KERNEL); + if (!s->displays) + return -ENOMEM; + + for (i = 0; i < s->num_displays; i++) { + display = &s->displays[i]; + grid = reg[i * 2]; + seg = reg[i * 2 + 1]; + if (grid == 0 && seg != 0) { + if (!tm1628_is_valid_seg(s, seg)) { + dev_warn(dev, "%s reg out of range\n", fwnode_get_name(node)); + return -EINVAL; + } + grid = s->info->modes[s->mode_index].grid_mask; + for (j = 0; grid && j < 7; j++) { + display->segments[j].seg = seg; + display->segments[j].grid = __ffs(grid); + grid &= ~BIT(display->segments[j].grid); + } + } else if (grid != 0 && seg == 0) { + if (!tm1628_is_valid_grid(s, grid)) { + dev_warn(dev, "%s reg out of range\n", fwnode_get_name(node)); + return -EINVAL; + } + seg = s->info->modes[s->mode_index].seg_mask; + for (j = 0; seg && j < 8; j++) { + display->segments[j].grid = grid; + display->segments[j].seg = __ffs(seg); + seg &= ~BIT(display->segments[j].seg); + } + } + } + + devm_kfree(dev, reg); + + device_create_file(dev, &tm1628_attr); + + return 0; +} + /* Work around __builtin_popcount() */ static u32 tm1628_grid_popcount(u8 grid_mask) { @@ -325,7 +545,7 @@ static int tm1628_spi_probe(struct spi_device *spi) return ret; } - if (fwnode_property_count_u32(child, "reg") == 2) { + if (reg[0] != 0 && reg[1] != 0 && fwnode_property_count_u32(child, "reg") == 2) { ret = tm1628_register_led(s, child, reg[0], reg[1], &s->leds[i++]); if (ret && ret != -EINVAL) { dev_err(&spi->dev, "Failed to register LED %s (%d)\n", @@ -334,6 +554,14 @@ static int tm1628_spi_probe(struct spi_device *spi) return ret; } s->num_leds++; + } else { + ret = tm1628_register_display(s, child); + if (ret) { + dev_err(&spi->dev, "Failed to register display %s (%d)\n", + fwnode_get_name(child), ret); + fwnode_handle_put(child); + return ret; + } } } From patchwork Thu Dec 12 03:39:48 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Andreas_F=C3=A4rber?= X-Patchwork-Id: 181394 Delivered-To: patch@linaro.org Received: by 2002:a92:3001:0:0:0:0:0 with SMTP id x1csp371587ile; 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[209.132.180.67]) by mx.google.com with ESMTP id d20si2431845otq.157.2019.12.11.19.40.28; Wed, 11 Dec 2019 19:40:28 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727916AbfLLDkU (ORCPT + 27 others); Wed, 11 Dec 2019 22:40:20 -0500 Received: from mx2.suse.de ([195.135.220.15]:58662 "EHLO mx1.suse.de" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S1727783AbfLLDkI (ORCPT ); Wed, 11 Dec 2019 22:40:08 -0500 X-Virus-Scanned: by amavisd-new at test-mx.suse.de Received: from relay2.suse.de (unknown [195.135.220.254]) by mx1.suse.de (Postfix) with ESMTP id E4FFBAD7B; Thu, 12 Dec 2019 03:40:06 +0000 (UTC) From: =?utf-8?q?Andreas_F=C3=A4rber?= To: linux-realtek-soc@lists.infradead.org, linux-leds@vger.kernel.org Cc: Jacek Anaszewski , Pavel Machek , Dan Murphy , linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, =?utf-8?q?Andreas_F=C3=A4rber?= , Rob Herring , Mark Rutland , devicetree@vger.kernel.org Subject: [RFC 21/25] arm64: dts: realtek: rtd1295-xnano-x5: Add display to FD628 Date: Thu, 12 Dec 2019 04:39:48 +0100 Message-Id: <20191212033952.5967-22-afaerber@suse.de> X-Mailer: git-send-email 2.16.4 In-Reply-To: <20191212033952.5967-1-afaerber@suse.de> References: <20191212033952.5967-1-afaerber@suse.de> MIME-Version: 1.0 Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Add a child node for 4-digit 7-segment display. Signed-off-by: Andreas Färber --- arch/arm64/boot/dts/realtek/rtd1295-xnano-x5.dts | 4 ++++ 1 file changed, 4 insertions(+) -- 2.16.4 diff --git a/arch/arm64/boot/dts/realtek/rtd1295-xnano-x5.dts b/arch/arm64/boot/dts/realtek/rtd1295-xnano-x5.dts index 9d678b300c7b..07de95427874 100644 --- a/arch/arm64/boot/dts/realtek/rtd1295-xnano-x5.dts +++ b/arch/arm64/boot/dts/realtek/rtd1295-xnano-x5.dts @@ -47,6 +47,10 @@ #address-cells = <2>; #size-cells = <0>; + display@0,8 { + reg = <0 8>, <0 7>, <0 6>, <0 5>; + }; + apps@1,4 { reg = <1 4>; color = ; From patchwork Thu Dec 12 03:39:50 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Andreas_F=C3=A4rber?= X-Patchwork-Id: 181393 Delivered-To: patch@linaro.org Received: by 2002:a92:3001:0:0:0:0:0 with SMTP id x1csp371507ile; Wed, 11 Dec 2019 19:40:22 -0800 (PST) X-Google-Smtp-Source: APXvYqyUT8xW4ga8MwN//khp9Gcb1WWKqenmwr0R/EvssjZYBGEGMSGDmD/eweUCuEnkA4Bgnfjz X-Received: by 2002:a9d:6285:: with SMTP id x5mr5832856otk.144.1576122022129; Wed, 11 Dec 2019 19:40:22 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1576122022; cv=none; d=google.com; s=arc-20160816; b=Vq0naiouE8Y5iPxQtFCcBa6FaJoeTmK6nBqr45MhF3VINKPx2DDWGzWUKBzUALq8kV XdN4nIKWK/FikW1J7a5eKTuiaE4qvyvnhe9oUwH7w1prjSH95SEee6eZRaayyLzL1S3r BdTHMWcAxcXmIOISATqUORJh3+3fwW8q3TrrwlavIYQoklj6U+2DLkRIjNA+Sjv9J0eJ BrO/L62DSHGYHlK2z3y1UYAfv8ywCGMfyEKm2y7azuj18o5KJWnSYaWWInZYe2rgNzR6 5VdtbCjv7LpJUYfQ7UUCobU1Sk2VdtoTjG7UC8GdLLa7hxRJENcS1dmXqtcQjW8Ycevc VwWg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from; bh=w3bk21B9ZhHCNWhMsct4Id8M08Tb7Q0xfBdV7VzeShc=; b=rKiW25ziK6YYO5hwSahNV844R22H9mU9V5fQSZfDv/1ITurT2jKGiDLkjnIXxjHaGO H3MO4ruPd4k0xYvmzfbRG0lpcKRuENERc+0OoXMSH8jKg8p6M/BvtUSLDj/6GqGtjLpn sR5fDKckQJuYoLyefjfKBRAMfr7TLdr8U2VYDtqtBPpu+ZWhtlkA9Cov5XoL/rTBo2dh eiBI2YBwN4vX3lHJFTvdICylW7w45pc0oBuEGrPFGS/3Qu0IScnZy4CNL+2D23ZQsXIU 8vzqx599gf/wD0zJWVfexZT83LJso5aK4HsrbrAZjs4yLT1LJtYORQBTuDHT6dCEVECD Qgqg== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id d20si2431845otq.157.2019.12.11.19.40.21; Wed, 11 Dec 2019 19:40:22 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727927AbfLLDkU (ORCPT + 27 others); Wed, 11 Dec 2019 22:40:20 -0500 Received: from mx2.suse.de ([195.135.220.15]:59168 "EHLO mx1.suse.de" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S1727749AbfLLDkJ (ORCPT ); Wed, 11 Dec 2019 22:40:09 -0500 X-Virus-Scanned: by amavisd-new at test-mx.suse.de Received: from relay2.suse.de (unknown [195.135.220.254]) by mx1.suse.de (Postfix) with ESMTP id CD6E8AF27; Thu, 12 Dec 2019 03:40:07 +0000 (UTC) From: =?utf-8?q?Andreas_F=C3=A4rber?= To: linux-realtek-soc@lists.infradead.org, linux-leds@vger.kernel.org Cc: Jacek Anaszewski , Pavel Machek , Dan Murphy , linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, =?utf-8?q?Andreas_F=C3=A4rber?= , zypeng@titanmec.com Subject: [RFC 23/25] WIP: leds: tm1628: Prepare TM1628 keys Date: Thu, 12 Dec 2019 04:39:50 +0100 Message-Id: <20191212033952.5967-24-afaerber@suse.de> X-Mailer: git-send-email 2.16.4 In-Reply-To: <20191212033952.5967-1-afaerber@suse.de> References: <20191212033952.5967-1-afaerber@suse.de> MIME-Version: 1.0 Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Extend TM1628 definition with key input lines. Cc: zypeng@titanmec.com Signed-off-by: Andreas Färber --- drivers/leds/leds-tm1628.c | 4 ++++ 1 file changed, 4 insertions(+) -- 2.16.4 diff --git a/drivers/leds/leds-tm1628.c b/drivers/leds/leds-tm1628.c index 0c0d099de8b0..410f34234811 100644 --- a/drivers/leds/leds-tm1628.c +++ b/drivers/leds/leds-tm1628.c @@ -43,6 +43,8 @@ struct tm1628_info { u16 seg_mask; const struct tm1628_mode *modes; int default_mode; + u8 k_mask; + u16 ks_mask; const struct pwm_capture *pwm_map; int default_pwm; }; @@ -656,6 +658,8 @@ static const struct tm1628_info tm1628_info = { .seg_mask = GENMASK(14, 12) | GENMASK(10, 1), .modes = tm1628_modes, .default_mode = 3, + .k_mask = GENMASK(2, 1), + .ks_mask = GENMASK(10, 1), .pwm_map = tm1628_pwm_map, .default_pwm = 0, }; From patchwork Thu Dec 12 03:39:52 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Andreas_F=C3=A4rber?= X-Patchwork-Id: 181398 Delivered-To: patch@linaro.org Received: by 2002:a92:3001:0:0:0:0:0 with SMTP id x1csp371711ile; Wed, 11 Dec 2019 19:40:42 -0800 (PST) X-Google-Smtp-Source: APXvYqyUGLJEN41e7UkGkAfaR9EnSEG6hDgztz1AaZyG/5caNeAOxQ/9WtbR8XbnLYPPeL6VSQe/ X-Received: by 2002:a9d:c29:: with SMTP id 38mr5336949otr.1.1576122042210; Wed, 11 Dec 2019 19:40:42 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1576122042; cv=none; d=google.com; s=arc-20160816; b=TLt7r5mmS6s2uFoPm2pOqlXLmffHy4p/hVKjvHkktZ47jRk99oNzNTTlB5l8ozxh4C ayH5pvlFgzA7i8MWYsKe/z1y6v9zyaQZIJ4XglQ499BJuNxC2yYeZut78LKdtPtXyCdj nZCGp78SX2pzOkon9vK3p3Tz9k5hQ9+0Fsh8RenuvoGqNFnd9Ow0r1lDQHcfK/1cFqGg l1XKln/uYp/L2QqNqMFNN3uodgO6G0LGplqLjNt3ybjbC4PI60Fk6E+UBVOjGvmkQKIt XlLG2WL0avPXp0m5FLL2XCYfFnfQPJN3vMcaF+KTX7G8FRBKkxTBbsNTv7PkUxngmEXl ql9w== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from; bh=XIN/qtbe0sgV17fx7vCISdgVqEloOxvucS4OeOEg8tc=; b=0U1Uw4Dr4+rVx55U3ub21+xS0bsXWhKy129ULlMLOjM58J4gybh/eggIkVFwdqLX5L oIQzKyXA9f84tW9ak1Id54CPqC/Jn1L/YvzdG6AFBGZpQnly2K7PlKcB3NvhFyzDfBzO O8EKDaL3TdFws83HoxYObdfF96Mm6UHuct+MZP1VJmI0di+Al9BbKFTAXd9LjBKPHmZF agZUSTT2FZ3wspTypySR9xSzcziq87Cq005XQNKWxcmJ0pgtieZ8WgSi/Xeyi5X9iflQ wL3lKp3TUSqeoBIrWrs7tl+Yty6e1qqaoanb/h3IBcemtTjeQn8dNBr8Zc6OCyGTD3k4 HOXg== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id k8si2823909otf.76.2019.12.11.19.40.41; Wed, 11 Dec 2019 19:40:42 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727953AbfLLDkk (ORCPT + 27 others); Wed, 11 Dec 2019 22:40:40 -0500 Received: from mx2.suse.de ([195.135.220.15]:58768 "EHLO mx1.suse.de" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S1727802AbfLLDkK (ORCPT ); Wed, 11 Dec 2019 22:40:10 -0500 X-Virus-Scanned: by amavisd-new at test-mx.suse.de Received: from relay2.suse.de (unknown [195.135.220.254]) by mx1.suse.de (Postfix) with ESMTP id CDFB0ADE1; Thu, 12 Dec 2019 03:40:08 +0000 (UTC) From: =?utf-8?q?Andreas_F=C3=A4rber?= To: linux-realtek-soc@lists.infradead.org, linux-leds@vger.kernel.org Cc: Jacek Anaszewski , Pavel Machek , Dan Murphy , linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, =?utf-8?q?Andreas_F=C3=A4rber?= Subject: [RFC 25/25] WIP: leds: tm1628: Prepare AiP1618 keys Date: Thu, 12 Dec 2019 04:39:52 +0100 Message-Id: <20191212033952.5967-26-afaerber@suse.de> X-Mailer: git-send-email 2.16.4 In-Reply-To: <20191212033952.5967-1-afaerber@suse.de> References: <20191212033952.5967-1-afaerber@suse.de> MIME-Version: 1.0 Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Extend definition with key input lines. Signed-off-by: Andreas Färber --- drivers/leds/leds-tm1628.c | 2 ++ 1 file changed, 2 insertions(+) -- 2.16.4 diff --git a/drivers/leds/leds-tm1628.c b/drivers/leds/leds-tm1628.c index 2caf1e63fc90..e28809d9a700 100644 --- a/drivers/leds/leds-tm1628.c +++ b/drivers/leds/leds-tm1628.c @@ -699,6 +699,8 @@ static const struct tm1628_info aip1618_info = { .seg_mask = GENMASK(14, 12) | GENMASK(5, 1), .modes = aip1618_modes, .default_mode = 3, + .k_mask = BIT(2), + .ks_mask = GENMASK(5, 1), .pwm_map = tm1628_pwm_map, .default_pwm = 0, };