From patchwork Tue Dec 17 18:33:56 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Suzuki K Poulose X-Patchwork-Id: 181899 Delivered-To: patch@linaro.org Received: by 2002:ac9:44c4:0:0:0:0:0 with SMTP id t4csp6068871och; Tue, 17 Dec 2019 10:34:21 -0800 (PST) X-Google-Smtp-Source: APXvYqxTEYrHf9E7H5/3fruMh9jGnkRaCjcG+BS8TDs6yBLMFOCQfYZcIti7a2C2T/4ppl0C3XWi X-Received: by 2002:a9d:7cd9:: with SMTP id r25mr36715149otn.326.1576607661676; Tue, 17 Dec 2019 10:34:21 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1576607661; cv=none; d=google.com; s=arc-20160816; b=B1GZ31UhPOlfttc7U/2H/eIoYHtB1+/RZLoR+yFKty/V9UE7ZE1+/IYg1jpG7POcRS g5mKNh2G3uFfXumOUKuaA8bOKKZC2BnrZrc40YR0bUnhv5Q5wmZ9VyrqJxQXqaf1wT+G cjnSmi9BO02GYt3AJJKgVnagWmybsYewrnWk4Sd/QzZoq+RPRVD01DmCtFvS+XrYEiqh DDecZFTZmaowY5DjKG8Rr63h94/7cS0Lbr1zLH7YCzACOWv2VChob2T7pdPW0J6awWdu cIaRPLsQcPCH/uiV4XrMV+xXqXLMYqi7i83s2PEgCLmwRpFzzex1CvQJguzZFfWixo/2 IUqA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from; bh=sMVPJwg28NQr+9Sc6WWo4JmwE+W6ERIa0CPC7IX+VOQ=; b=PFOUF5Ih07c5pdjiInkL4xLAXGB7g87Ozs7VhptjQ7J0ZtsoBIxZXKdkn/8uY33QUl 3dQkhOkxNkTxxewcl6Nr/Oqx+EMkwBg4QnHhyL6UzO8kDkgr07usnArUsn56vOcmZAVK 32Yn4cJMvlM/LO2FI+id1pyMDYMrTuDRF3/N/eyAdP1PvgUStnBbitbuenTg5Nz8+Gy0 yyZPlGz58QjOxg6CvccR+t1maJuxla/qo+y9sNWkJA7KqmMyCbE+CWCHVt9vluwtvMLr 5G18TSUBH5Ffa3/Nr3uKoKc+H+05fuUAEXTE6yAPtkYBD9M8ozrRAuZlmniwSNhAvqiT yiOA== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id t1si1639859otq.322.2019.12.17.10.34.21; Tue, 17 Dec 2019 10:34:21 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1728196AbfLQSeU (ORCPT + 27 others); Tue, 17 Dec 2019 13:34:20 -0500 Received: from foss.arm.com ([217.140.110.172]:44758 "EHLO foss.arm.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726874AbfLQSeS (ORCPT ); Tue, 17 Dec 2019 13:34:18 -0500 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 5A17D1063; Tue, 17 Dec 2019 10:34:18 -0800 (PST) Received: from ewhatever.cambridge.arm.com (ewhatever.cambridge.arm.com [10.1.197.1]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPA id E25D43F67D; Tue, 17 Dec 2019 10:34:16 -0800 (PST) From: Suzuki K Poulose To: linux-arm-kernel@lists.infradead.org Cc: linux-kernel@vger.kernel.org, will@kernel.org, maz@kernel.org, mark.rutland@arm.com, dave.martin@arm.com, catalin.marinas@arm.com, ard.biesheuvel@linaro.org, christoffer.dall@arm.com, Suzuki K Poulose , Will Deacon Subject: [PATCH v2 1/7] arm64: Introduce system_capabilities_finalized() marker Date: Tue, 17 Dec 2019 18:33:56 +0000 Message-Id: <20191217183402.2259904-2-suzuki.poulose@arm.com> X-Mailer: git-send-email 2.23.0 In-Reply-To: <20191217183402.2259904-1-suzuki.poulose@arm.com> References: <20191217183402.2259904-1-suzuki.poulose@arm.com> MIME-Version: 1.0 Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org We finalize the system wide capabilities after the SMP CPUs are booted by the kernel. This is used as a marker for deciding various checks in the kernel. e.g, sanity check the hotplugged CPUs for missing mandatory features. However there is no explicit helper available for this in the kernel. There is sys_caps_initialised, which is not exposed. The other closest one we have is the jump_label arm64_const_caps_ready which denotes that the capabilities are set and the capability checks could use the individual jump_labels for fast path. This is performed before setting the ELF Hwcaps, which must be checked against the new CPUs. We also perform some of the other initialization e.g, SVE setup, which is important for the use of FP/SIMD where SVE is supported. Normally userspace doesn't get to run before we finish this. However the in-kernel users may potentially start using the neon mode. So, we need to reject uses of neon mode before we are set. Instead of defining a new marker for the completion of SVE setup, we could simply reuse the arm64_const_caps_ready and enable it once we have finished all the setup. Also we could expose this to the various users as "system_capabilities_finalized()" to make it more meaningful than "const_caps_ready". Cc: Ard Biesheuvel Cc: Will Deacon Cc: Catalin Marinas Cc: Mark Rutland Signed-off-by: Suzuki K Poulose --- arch/arm64/include/asm/cpufeature.h | 5 +++++ arch/arm64/include/asm/kvm_host.h | 2 +- arch/arm64/include/asm/mmu.h | 2 +- arch/arm64/kernel/cpufeature.c | 26 +++++++++----------------- arch/arm64/kernel/process.c | 2 +- 5 files changed, 17 insertions(+), 20 deletions(-) -- 2.23.0 diff --git a/arch/arm64/include/asm/cpufeature.h b/arch/arm64/include/asm/cpufeature.h index 4261d55e8506..92ef9539874a 100644 --- a/arch/arm64/include/asm/cpufeature.h +++ b/arch/arm64/include/asm/cpufeature.h @@ -613,6 +613,11 @@ static inline bool system_has_prio_mask_debugging(void) system_uses_irq_prio_masking(); } +static inline bool system_capabilities_finalized(void) +{ + return static_branch_likely(&arm64_const_caps_ready); +} + #define ARM64_BP_HARDEN_UNKNOWN -1 #define ARM64_BP_HARDEN_WA_NEEDED 0 #define ARM64_BP_HARDEN_NOT_REQUIRED 1 diff --git a/arch/arm64/include/asm/kvm_host.h b/arch/arm64/include/asm/kvm_host.h index c61260cf63c5..48ce54639eb5 100644 --- a/arch/arm64/include/asm/kvm_host.h +++ b/arch/arm64/include/asm/kvm_host.h @@ -547,7 +547,7 @@ static inline void __cpu_init_hyp_mode(phys_addr_t pgd_ptr, * wrong, and hyp will crash and burn when it uses any * cpus_have_const_cap() wrapper. */ - BUG_ON(!static_branch_likely(&arm64_const_caps_ready)); + BUG_ON(!system_capabilities_finalized()); __kvm_call_hyp((void *)pgd_ptr, hyp_stack_ptr, vector_ptr, tpidr_el2); /* diff --git a/arch/arm64/include/asm/mmu.h b/arch/arm64/include/asm/mmu.h index f217e3292919..691ee7cfd521 100644 --- a/arch/arm64/include/asm/mmu.h +++ b/arch/arm64/include/asm/mmu.h @@ -64,7 +64,7 @@ static inline bool arm64_kernel_use_ng_mappings(void) if (!IS_ENABLED(CONFIG_CAVIUM_ERRATUM_27456)) { tx1_bug = false; #ifndef MODULE - } else if (!static_branch_likely(&arm64_const_caps_ready)) { + } else if (!system_capabilities_finalized()) { extern const struct midr_range cavium_erratum_27456_cpus[]; tx1_bug = is_midr_in_range_list(read_cpuid_id(), diff --git a/arch/arm64/kernel/cpufeature.c b/arch/arm64/kernel/cpufeature.c index 04cf64e9f0c9..d25ad65bfac2 100644 --- a/arch/arm64/kernel/cpufeature.c +++ b/arch/arm64/kernel/cpufeature.c @@ -53,13 +53,14 @@ DECLARE_BITMAP(boot_capabilities, ARM64_NPATCHABLE); * will be used to determine if a new booting CPU should * go through the verification process to make sure that it * supports the system capabilities, without using a hotplug - * notifier. + * notifier. This is also used to decide if we could use + * the fast path for checking constant CPU caps. */ -static bool sys_caps_initialised; - -static inline void set_sys_caps_initialised(void) +DEFINE_STATIC_KEY_FALSE(arm64_const_caps_ready); +EXPORT_SYMBOL(arm64_const_caps_ready); +static inline void finalize_system_capabilities(void) { - sys_caps_initialised = true; + static_branch_enable(&arm64_const_caps_ready); } static int dump_cpu_hwcaps(struct notifier_block *self, unsigned long v, void *p) @@ -785,7 +786,7 @@ void update_cpu_features(int cpu, /* Probe vector lengths, unless we already gave up on SVE */ if (id_aa64pfr0_sve(read_sanitised_ftr_reg(SYS_ID_AA64PFR0_EL1)) && - !sys_caps_initialised) + !system_capabilities_finalized()) sve_update_vq_map(); } @@ -1974,7 +1975,7 @@ void check_local_cpu_capabilities(void) * Otherwise, this CPU should verify that it has all the system * advertised capabilities. */ - if (!sys_caps_initialised) + if (!system_capabilities_finalized()) update_cpu_capabilities(SCOPE_LOCAL_CPU); else verify_local_cpu_capabilities(); @@ -1988,14 +1989,6 @@ static void __init setup_boot_cpu_capabilities(void) enable_cpu_capabilities(SCOPE_BOOT_CPU); } -DEFINE_STATIC_KEY_FALSE(arm64_const_caps_ready); -EXPORT_SYMBOL(arm64_const_caps_ready); - -static void __init mark_const_caps_ready(void) -{ - static_branch_enable(&arm64_const_caps_ready); -} - bool this_cpu_has_cap(unsigned int n) { if (!WARN_ON(preemptible()) && n < ARM64_NCAPS) { @@ -2054,7 +2047,6 @@ void __init setup_cpu_features(void) u32 cwg; setup_system_capabilities(); - mark_const_caps_ready(); setup_elf_hwcaps(arm64_elf_hwcaps); if (system_supports_32bit_el0()) @@ -2067,7 +2059,7 @@ void __init setup_cpu_features(void) minsigstksz_setup(); /* Advertise that we have computed the system capabilities */ - set_sys_caps_initialised(); + finalize_system_capabilities(); /* * Check for sane CTR_EL0.CWG value. diff --git a/arch/arm64/kernel/process.c b/arch/arm64/kernel/process.c index 71f788cd2b18..48a38144ea7b 100644 --- a/arch/arm64/kernel/process.c +++ b/arch/arm64/kernel/process.c @@ -646,6 +646,6 @@ asmlinkage void __sched arm64_preempt_schedule_irq(void) * Only allow a task to be preempted once cpufeatures have been * enabled. */ - if (static_branch_likely(&arm64_const_caps_ready)) + if (system_capabilities_finalized()) preempt_schedule_irq(); } From patchwork Tue Dec 17 18:33:57 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Suzuki K Poulose X-Patchwork-Id: 181900 Delivered-To: patch@linaro.org Received: by 2002:ac9:44c4:0:0:0:0:0 with SMTP id t4csp6068947och; Tue, 17 Dec 2019 10:34:25 -0800 (PST) X-Google-Smtp-Source: APXvYqxArQReia5RVJLeCeNap5dso98yROFSESpcI8+hgZYY2IyVGPdRbVD5y2ilaq6fLtEu9V3Q X-Received: by 2002:a9d:4c88:: with SMTP id m8mr38413051otf.12.1576607665863; Tue, 17 Dec 2019 10:34:25 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1576607665; cv=none; d=google.com; s=arc-20160816; b=bnGkeJyPKEvYKemfY4r5L4v7fCwXtA+dPAKjwBZe6fa7nmysQ99lW+kUlPZLOqCZHN hURlEuhChaLDwLtDUl0vk2P/QSL8kTHMN0JHqzMJOQRsmv3jUch2/lXK+EiJqnk+IXeL f3doXeHrRmLNnzlldTc8898TvLRPjaTGhJA0oMlDhVsoVvlgRr08EdPxkcHlhJqwBGkY E0hzkEIXnqFnpapISRvnP6CR+QaBHteJi9WivvAz9CURnG5inLm4asbQ9RFPmAipu5jw MBn+YkGsf5bvlLJgDytGhxYbBh8Iit2HLdv/Th+yLbohLt1HTVS8fGi+X92XMelUYzre 94GA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from; bh=z8p3TCNHWLurQKBMbuTIJ0Ly3grFmdC1W7NGYx5hYtQ=; b=h2RS9YPxhQkcSz0J6aqWl3s8tcsUAk29t74V0q0mZR/fleJl+f46J9ZyWF9LGHRqt5 rcV57enUZ1Zs5/wDjcx1rqrCBRwNg28hxtHnDiO/0x2cMcncaDnh5Ow6V/1AAiUzURwz T5rEOQOav46ZRz6QU3+v6LSFhK7r7Lnd0j0Cp6e4dPlJCv7lAQXIxKs/sr2K7GQ4IEp/ /JxOXj/d9G4CleuKofoIknxfC6XRRYz6eHEJSYaSm7yKMbmq1UVyV3/5tdFPzFlfLBFW GK1L9pLoxLO4GkJydddxl9KVIKlvV1+Ci3xPsalE+tqDUB3jJ3ZCUZIiWRzMZAWIAzMF 9PSA== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id t1si1639859otq.322.2019.12.17.10.34.25; Tue, 17 Dec 2019 10:34:25 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1728281AbfLQSeY (ORCPT + 27 others); Tue, 17 Dec 2019 13:34:24 -0500 Received: from foss.arm.com ([217.140.110.172]:44770 "EHLO foss.arm.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1728181AbfLQSeU (ORCPT ); Tue, 17 Dec 2019 13:34:20 -0500 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id F384330E; Tue, 17 Dec 2019 10:34:19 -0800 (PST) Received: from ewhatever.cambridge.arm.com (ewhatever.cambridge.arm.com [10.1.197.1]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPA id 8A6283F67D; Tue, 17 Dec 2019 10:34:18 -0800 (PST) From: Suzuki K Poulose To: linux-arm-kernel@lists.infradead.org Cc: linux-kernel@vger.kernel.org, will@kernel.org, maz@kernel.org, mark.rutland@arm.com, dave.martin@arm.com, catalin.marinas@arm.com, ard.biesheuvel@linaro.org, christoffer.dall@arm.com, Suzuki K Poulose , Will Deacon Subject: [PATCH v2 2/7] arm64: fpsimd: Make sure SVE setup is complete before SIMD is used Date: Tue, 17 Dec 2019 18:33:57 +0000 Message-Id: <20191217183402.2259904-3-suzuki.poulose@arm.com> X-Mailer: git-send-email 2.23.0 In-Reply-To: <20191217183402.2259904-1-suzuki.poulose@arm.com> References: <20191217183402.2259904-1-suzuki.poulose@arm.com> MIME-Version: 1.0 Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org In-kernel users of NEON rely on may_use_simd() to check if the SIMD can be used. However, we must initialize the SVE before SIMD can be used. Add a sanity check to make sure that we have completed the SVE setup before anyone uses the SIMD. Cc: Ard Biesheuvel Cc: Mark Rutland Cc: Will Deacon Cc: Catalin Marinas Signed-off-by: Suzuki K Poulose --- Discussion here : https://lkml.kernel.org/r/20191014145204.GS27757@arm.com --- arch/arm64/include/asm/simd.h | 8 ++++++-- 1 file changed, 6 insertions(+), 2 deletions(-) -- 2.23.0 diff --git a/arch/arm64/include/asm/simd.h b/arch/arm64/include/asm/simd.h index 7434844036d3..afce6409be51 100644 --- a/arch/arm64/include/asm/simd.h +++ b/arch/arm64/include/asm/simd.h @@ -26,6 +26,8 @@ DECLARE_PER_CPU(bool, fpsimd_context_busy); static __must_check inline bool may_use_simd(void) { /* + * We must make sure that the SVE has been initialized properly + * before using the SIMD in kernel. * fpsimd_context_busy is only set while preemption is disabled, * and is clear whenever preemption is enabled. Since * this_cpu_read() is atomic w.r.t. preemption, fpsimd_context_busy @@ -33,8 +35,10 @@ static __must_check inline bool may_use_simd(void) * migrated, and if it's clear we cannot be migrated to a CPU * where it is set. */ - return !in_irq() && !irqs_disabled() && !in_nmi() && - !this_cpu_read(fpsimd_context_busy); + return system_capabilities_finalized() && + system_supports_fpsimd() && + !in_irq() && !irqs_disabled() && !in_nmi() && + !this_cpu_read(fpsimd_context_busy); } #else /* ! CONFIG_KERNEL_MODE_NEON */ From patchwork Tue Dec 17 18:33:58 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Suzuki K Poulose X-Patchwork-Id: 181904 Delivered-To: patch@linaro.org Received: by 2002:ac9:44c4:0:0:0:0:0 with SMTP id t4csp6069212och; Tue, 17 Dec 2019 10:34:41 -0800 (PST) X-Google-Smtp-Source: APXvYqxXZHFhkw1Bk1Iv56jwu9zKeoR5vaU2WJXErigwd7CEO8sdipzUkofpK5qoFkmgJsoErhqh X-Received: by 2002:a05:6830:9:: with SMTP id c9mr39824934otp.94.1576607681055; Tue, 17 Dec 2019 10:34:41 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1576607681; cv=none; d=google.com; s=arc-20160816; b=za8tHBysQnPogwtd1yd24/FfW1lObKLZqsXpmQ39xhP5sag9JigJWB7DQUYnTsWQ8D lPDJYXGNSybzZ+Pu6Ff83dF6clAYarZDCDvs0Hl+S40IDBl1buYXwq/irAi1tzJTPxoT sRWvUOcZb4y4QAuVYdJxdtU/1frN81LyaWawlxOpfGiOcVDvbCiXUEEdi8lOQalKNpHH US/fFYAbgRF/fIBHnstwStDf6XBpeYZUz43Nwsz13qRgBIf20Jbx2eRHSV4vl9QfufrX oevJKub/3Ctzz8MZKrMlWEqasi8xM2ErVpGrLxID3c9p8hvsxB/by9GwuInxkrimUYKQ LQvA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from; bh=IjcXQ0qPSFYMMoa7H49yoChHa5oMGkcbvXxPo8MW2GU=; b=XvH3BcQbmsQakNJArm1zv8hUiRQYvCoq+5IV0X0LV/KcUshNv+B1a7tiaEuHr5AKZt R0+mKbEnoaJEY61RTZcB+8cEKMnVAgv/vlaAqXWeP75PokdwMGWcUCFuTqGzvZQtJiao s/slS30RzTkjZoORJ6kKm5c0zvio3j9kiXGBR/kKDImGrSyTc3ZmXBAMsxK4BJ1HXNtm +mlUW06W3OSvOmWhe0RJyD3v5mpmO8Y2FGEDERqIAbND/v8os6IZAS8TJ9N6w1AfGl1c TdwCs0N4F9WG8s9mEVIsiGgIOavq1wV68kvGG7WeNzmRQfkVGhqbMKiZ8DPgTL0ndn/O adAQ== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id h9si13890337otb.49.2019.12.17.10.34.40; Tue, 17 Dec 2019 10:34:41 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1728229AbfLQSeX (ORCPT + 27 others); Tue, 17 Dec 2019 13:34:23 -0500 Received: from foss.arm.com ([217.140.110.172]:44780 "EHLO foss.arm.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1728006AbfLQSeW (ORCPT ); Tue, 17 Dec 2019 13:34:22 -0500 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 81C7331B; Tue, 17 Dec 2019 10:34:21 -0800 (PST) Received: from ewhatever.cambridge.arm.com (ewhatever.cambridge.arm.com [10.1.197.1]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPA id 321A53F67D; Tue, 17 Dec 2019 10:34:20 -0800 (PST) From: Suzuki K Poulose To: linux-arm-kernel@lists.infradead.org Cc: linux-kernel@vger.kernel.org, will@kernel.org, maz@kernel.org, mark.rutland@arm.com, dave.martin@arm.com, catalin.marinas@arm.com, ard.biesheuvel@linaro.org, christoffer.dall@arm.com, Suzuki K Poulose Subject: [PATCH v2 3/7] arm64: cpufeature: Fix the type of no FP/SIMD capability Date: Tue, 17 Dec 2019 18:33:58 +0000 Message-Id: <20191217183402.2259904-4-suzuki.poulose@arm.com> X-Mailer: git-send-email 2.23.0 In-Reply-To: <20191217183402.2259904-1-suzuki.poulose@arm.com> References: <20191217183402.2259904-1-suzuki.poulose@arm.com> MIME-Version: 1.0 Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org The NO_FPSIMD capability is defined with scope SYSTEM, which implies that the "absence" of FP/SIMD on at least one CPU is detected only after all the SMP CPUs are brought up. However, we use the status of this capability for every context switch. So, let us change the scope to LOCAL_CPU to allow the detection of this capability as and when the first CPU without FP is brought up. Also, the current type allows hotplugged CPU to be brought up without FP/SIMD when all the current CPUs have FP/SIMD and we have the userspace up. Fix both of these issues by changing the capability to BOOT_RESTRICTED_LOCAL_CPU_FEATURE. Fixes: 82e0191a1aa11abf ("arm64: Support systems without FP/ASIMD") Cc: Will Deacon Cc: Mark Rutland Cc: Catalin Marinas Signed-off-by: Suzuki K Poulose --- arch/arm64/kernel/cpufeature.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) -- 2.23.0 diff --git a/arch/arm64/kernel/cpufeature.c b/arch/arm64/kernel/cpufeature.c index d25ad65bfac2..2fc9f18e2d2d 100644 --- a/arch/arm64/kernel/cpufeature.c +++ b/arch/arm64/kernel/cpufeature.c @@ -1369,7 +1369,7 @@ static const struct arm64_cpu_capabilities arm64_features[] = { { /* FP/SIMD is not implemented */ .capability = ARM64_HAS_NO_FPSIMD, - .type = ARM64_CPUCAP_SYSTEM_FEATURE, + .type = ARM64_CPUCAP_BOOT_RESTRICTED_CPU_LOCAL_FEATURE, .min_field_value = 0, .matches = has_no_fpsimd, }, From patchwork Tue Dec 17 18:33:59 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Suzuki K Poulose X-Patchwork-Id: 181905 Delivered-To: patch@linaro.org Received: by 2002:ac9:44c4:0:0:0:0:0 with SMTP id t4csp6069271och; Tue, 17 Dec 2019 10:34:45 -0800 (PST) X-Google-Smtp-Source: APXvYqwU/tkoHycqDQuG09JefoxTPbwNqQ9QtgclgH1Ma6fYDXWcgdE1ZCMdmEDAD/yypF5VrXDn X-Received: by 2002:a9d:4e99:: with SMTP id v25mr40175400otk.363.1576607685786; Tue, 17 Dec 2019 10:34:45 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1576607685; cv=none; d=google.com; s=arc-20160816; b=mvV+4XVB+ImSts1cuvIPdCRK392hkSPEKMYlmpK7fH+BwIQxbgm43Y8ehijIOicZrL GHTI+xkNzM1ExXilQz3EXQfWKlnUd1Vo/KCbGqlvbT98AqfyX7lyfbTpxiIWX3OC2J1f jNfLAmviGnkwsSoWGkVRgLkRvypRsrsam92UvyOCnmaNI9Ui5/8ZKzSpo4lYoY2l3TzZ ubMiIbR9uoa0xBWuf62Clkj5mdc4b/BZCxVKEkBVN5vNz95uWzE9HJ9H3+dG+bW3o4rw u+N3cvuXQJZ0rhZUMrU9ROIUGte2KoMel1WGA5ONUCujsWucfv/0WYIvtRUYhucSackH Lm/A== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from; bh=lDNBKOtlgiZZ4jrEP/4xLhgo6ubYyZL0B3a/yt9RgJg=; b=FWExE4srCmgz0f1CeFuGNbWBVwj/TjOoFCrYvpaYD84Iy1xbyPQiWg/IBNvlVOQU6r 01rlX2NEsSeORjIXzpkN4RNAfiM0/DmygownU2VJN0rd+Eat6FGjobsFD7SNA+mYCMH/ E9WBJPM5XCZSuHsTixD/Ce3nh+VFad2cAyq2eTqoT1SqiJOxuHGndAdTgoOJUWQiCvV5 SqFtHIigRwKRZT5W2SXLa+NHHckti3Qh/XvNQwr5EnB3oMoZdJE6lBSsKy3KrQFeICzh wiK1NhJT1PGbAh7SYophUKiU/3ASWP8HAClevRCINpsB+II4oP0KcBH0eh52i5d7OZfr B/aA== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id h9si13890337otb.49.2019.12.17.10.34.45; Tue, 17 Dec 2019 10:34:45 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1728380AbfLQSeo (ORCPT + 27 others); Tue, 17 Dec 2019 13:34:44 -0500 Received: from foss.arm.com ([217.140.110.172]:44788 "EHLO foss.arm.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1728215AbfLQSeX (ORCPT ); Tue, 17 Dec 2019 13:34:23 -0500 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 0F13030E; Tue, 17 Dec 2019 10:34:23 -0800 (PST) Received: from ewhatever.cambridge.arm.com (ewhatever.cambridge.arm.com [10.1.197.1]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPA id B49693F67D; Tue, 17 Dec 2019 10:34:21 -0800 (PST) From: Suzuki K Poulose To: linux-arm-kernel@lists.infradead.org Cc: linux-kernel@vger.kernel.org, will@kernel.org, maz@kernel.org, mark.rutland@arm.com, dave.martin@arm.com, catalin.marinas@arm.com, ard.biesheuvel@linaro.org, christoffer.dall@arm.com, Suzuki K Poulose Subject: [PATCH v2 4/7] arm64: cpufeature: Set the FP/SIMD compat HWCAP bits properly Date: Tue, 17 Dec 2019 18:33:59 +0000 Message-Id: <20191217183402.2259904-5-suzuki.poulose@arm.com> X-Mailer: git-send-email 2.23.0 In-Reply-To: <20191217183402.2259904-1-suzuki.poulose@arm.com> References: <20191217183402.2259904-1-suzuki.poulose@arm.com> MIME-Version: 1.0 Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org We set the compat_elf_hwcap bits unconditionally on arm64 to include the VFP and NEON support. However, the FP/SIMD unit is optional on Arm v8 and thus could be missing. We already handle this properly in the kernel, but still advertise to the COMPAT applications that the VFP is available. Fix this to make sure we only advertise when we really have them. Fixes: 82e0191a1aa11abf ("arm64: Support systems without FP/ASIMD") Cc: Will Deacon Cc: Catalin Marinas Cc: Mark Rutland Signed-off-by: Suzuki K Poulose --- Changes since v1: - Switch to using cpuid_feature_extract_unsigned_field() rather than hard coding field extraction. --- arch/arm64/kernel/cpufeature.c | 37 +++++++++++++++++++++++++++++++--- 1 file changed, 34 insertions(+), 3 deletions(-) -- 2.23.0 diff --git a/arch/arm64/kernel/cpufeature.c b/arch/arm64/kernel/cpufeature.c index 2fc9f18e2d2d..c008164b0848 100644 --- a/arch/arm64/kernel/cpufeature.c +++ b/arch/arm64/kernel/cpufeature.c @@ -32,9 +32,7 @@ static unsigned long elf_hwcap __read_mostly; #define COMPAT_ELF_HWCAP_DEFAULT \ (COMPAT_HWCAP_HALF|COMPAT_HWCAP_THUMB|\ COMPAT_HWCAP_FAST_MULT|COMPAT_HWCAP_EDSP|\ - COMPAT_HWCAP_TLS|COMPAT_HWCAP_VFP|\ - COMPAT_HWCAP_VFPv3|COMPAT_HWCAP_VFPv4|\ - COMPAT_HWCAP_NEON|COMPAT_HWCAP_IDIV|\ + COMPAT_HWCAP_TLS|COMPAT_HWCAP_IDIV|\ COMPAT_HWCAP_LPAE) unsigned int compat_elf_hwcap __read_mostly = COMPAT_ELF_HWCAP_DEFAULT; unsigned int compat_elf_hwcap2 __read_mostly; @@ -1597,6 +1595,12 @@ static const struct arm64_cpu_capabilities arm64_features[] = { .match_list = list, \ } +#define HWCAP_CAP_MATCH(match, cap_type, cap) \ + { \ + __HWCAP_CAP(#cap, cap_type, cap) \ + .matches = match, \ + } + #ifdef CONFIG_ARM64_PTR_AUTH static const struct arm64_cpu_capabilities ptr_auth_hwcap_addr_matches[] = { { @@ -1670,8 +1674,35 @@ static const struct arm64_cpu_capabilities arm64_elf_hwcaps[] = { {}, }; +#ifdef CONFIG_COMPAT +static bool compat_has_neon(const struct arm64_cpu_capabilities *cap, int scope) +{ + /* + * Check that all of MVFR1_EL1.{SIMDSP, SIMDInt, SIMDLS} are available, + * in line with that of arm32 as in vfp_init(). We make sure that the + * check is future proof, by making sure value is non-zero. + */ + u32 mvfr1; + + WARN_ON(scope == SCOPE_LOCAL_CPU && preemptible()); + if (scope == SCOPE_SYSTEM) + mvfr1 = read_sanitised_ftr_reg(SYS_MVFR1_EL1); + else + mvfr1 = read_sysreg_s(SYS_MVFR1_EL1); + + return cpuid_feature_extract_unsigned_field(mvfr1, MVFR1_SIMDSP_SHIFT) && + cpuid_feature_extract_unsigned_field(mvfr1, MVFR1_SIMDINT_SHIFT) && + cpuid_feature_extract_unsigned_field(mvfr1, MVFR1_SIMDLS_SHIFT); +} +#endif + static const struct arm64_cpu_capabilities compat_elf_hwcaps[] = { #ifdef CONFIG_COMPAT + HWCAP_CAP_MATCH(compat_has_neon, CAP_COMPAT_HWCAP, COMPAT_HWCAP_NEON), + HWCAP_CAP(SYS_MVFR1_EL1, MVFR1_SIMDFMAC_SHIFT, FTR_UNSIGNED, 1, CAP_COMPAT_HWCAP, COMPAT_HWCAP_VFPv4), + /* Arm v8 mandates MVFR0.FPDP == {0, 2}. So, piggy back on this for the presence of VFP support */ + HWCAP_CAP(SYS_MVFR0_EL1, MVFR0_FPDP_SHIFT, FTR_UNSIGNED, 2, CAP_COMPAT_HWCAP, COMPAT_HWCAP_VFP), + HWCAP_CAP(SYS_MVFR0_EL1, MVFR0_FPDP_SHIFT, FTR_UNSIGNED, 2, CAP_COMPAT_HWCAP, COMPAT_HWCAP_VFPv3), HWCAP_CAP(SYS_ID_ISAR5_EL1, ID_ISAR5_AES_SHIFT, FTR_UNSIGNED, 2, CAP_COMPAT_HWCAP2, COMPAT_HWCAP2_PMULL), HWCAP_CAP(SYS_ID_ISAR5_EL1, ID_ISAR5_AES_SHIFT, FTR_UNSIGNED, 1, CAP_COMPAT_HWCAP2, COMPAT_HWCAP2_AES), HWCAP_CAP(SYS_ID_ISAR5_EL1, ID_ISAR5_SHA1_SHIFT, FTR_UNSIGNED, 1, CAP_COMPAT_HWCAP2, COMPAT_HWCAP2_SHA1), From patchwork Tue Dec 17 18:34:00 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Suzuki K Poulose X-Patchwork-Id: 181901 Delivered-To: patch@linaro.org Received: by 2002:ac9:44c4:0:0:0:0:0 with SMTP id t4csp6069016och; Tue, 17 Dec 2019 10:34:29 -0800 (PST) X-Google-Smtp-Source: APXvYqzw4mb2RDc0lqwpgVg16QtDWLEOm2JtzYfLToq6ZB0pvKQjbh3IlZllWdVM9CLQveqPG106 X-Received: by 2002:a9d:1b4e:: with SMTP id l72mr40115408otl.345.1576607669381; Tue, 17 Dec 2019 10:34:29 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1576607669; cv=none; d=google.com; s=arc-20160816; b=xXbd49DMcKQbGWnzvc62JGWDed6mtMzIeyQs9dvx9q+SEEifcKagMiyDyXueUdB5mb Kgah5fS6w5I8doFgTiI6KF2vISx7yDo9p2OqJbeY+y1QrFEGbNNNoL/lgz98SEMNlCaE /idOc7xcVxF9rFN7lDKsfqZs4L8qoVQiR0Z8wSBqspcnfou+A/BQzCjrZv5aR6AQRFvz Qy+Mtg4HH3vz84zKrKcXRAeOS+8ZOGzkevNuuFZaeniiYO0N5Mi3JZUDY9TvkUVr/4EG ASQXKj2JZycEd4DI3c2aD6qEHRY+eMf7C/2BgVEE3tweXfkUaiIRiqzg9TyHDgXgeeRf 3+bg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from; bh=7ykdnpEiQPDyoIqAUXNxAJG7YZNsyMsc2IKIJMM67dM=; b=vo9YQ+GP8DRZEvRqQdqrzgeFFLr1Rl52BvKL0VMZLj6mGQc2nD2KYls8pSBM7RXiGi aLOvuTCmtaHXjcE/yrpjkghtzaGacj855UhPMCYJAAPQO8cih05bRp1//+BUSPT6p1de KxOWBQCdfnrecZcO2ikFHlE532NYLj7CPab3lE7gWdjishKnr3jeqkN+YIB+El1NYuod Gu9LiRA9Aj9e5e9a6UyeJVixSqeZEJOZ6L8ZS/b/87J2U3YGmaFQdOUEE4eX1RAnUqT1 wJygRaJXWtRt9Zol+JJjNNk7Eu24RmFE2Wqo2DQQbq/cnIr6CBiaQbzTvDlPNSFP8klH I4wQ== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id t195si12900691oih.209.2019.12.17.10.34.29; Tue, 17 Dec 2019 10:34:29 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1728309AbfLQSe2 (ORCPT + 27 others); Tue, 17 Dec 2019 13:34:28 -0500 Received: from foss.arm.com ([217.140.110.172]:44800 "EHLO foss.arm.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1728181AbfLQSeZ (ORCPT ); Tue, 17 Dec 2019 13:34:25 -0500 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id AC20131B; Tue, 17 Dec 2019 10:34:24 -0800 (PST) Received: from ewhatever.cambridge.arm.com (ewhatever.cambridge.arm.com [10.1.197.1]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPA id 41E893F67D; Tue, 17 Dec 2019 10:34:23 -0800 (PST) From: Suzuki K Poulose To: linux-arm-kernel@lists.infradead.org Cc: linux-kernel@vger.kernel.org, will@kernel.org, maz@kernel.org, mark.rutland@arm.com, dave.martin@arm.com, catalin.marinas@arm.com, ard.biesheuvel@linaro.org, christoffer.dall@arm.com, Suzuki K Poulose , Will Deacon Subject: [PATCH v2 5/7] arm64: ptrace: nofpsimd: Fail FP/SIMD regset operations Date: Tue, 17 Dec 2019 18:34:00 +0000 Message-Id: <20191217183402.2259904-6-suzuki.poulose@arm.com> X-Mailer: git-send-email 2.23.0 In-Reply-To: <20191217183402.2259904-1-suzuki.poulose@arm.com> References: <20191217183402.2259904-1-suzuki.poulose@arm.com> MIME-Version: 1.0 Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org When fp/simd is not supported on the system, fail the operations of FP/SIMD regsets. Fixes: 82e0191a1aa11abf ("arm64: Support systems without FP/ASIMD") Cc: Will Deacon Cc: Mark Rutland Cc: Catalin Marinas Signed-off-by: Suzuki K Poulose --- arch/arm64/kernel/ptrace.c | 12 ++++++++++++ 1 file changed, 12 insertions(+) -- 2.23.0 diff --git a/arch/arm64/kernel/ptrace.c b/arch/arm64/kernel/ptrace.c index 6771c399d40c..0135b944b8db 100644 --- a/arch/arm64/kernel/ptrace.c +++ b/arch/arm64/kernel/ptrace.c @@ -637,6 +637,9 @@ static int fpr_get(struct task_struct *target, const struct user_regset *regset, unsigned int pos, unsigned int count, void *kbuf, void __user *ubuf) { + if (!system_supports_fpsimd()) + return -EINVAL; + if (target == current) fpsimd_preserve_current_state(); @@ -676,6 +679,9 @@ static int fpr_set(struct task_struct *target, const struct user_regset *regset, { int ret; + if (!system_supports_fpsimd()) + return -EINVAL; + ret = __fpr_set(target, regset, pos, count, kbuf, ubuf, 0); if (ret) return ret; @@ -1348,6 +1354,9 @@ static int compat_vfp_get(struct task_struct *target, compat_ulong_t fpscr; int ret, vregs_end_pos; + if (!system_supports_fpsimd()) + return -EINVAL; + uregs = &target->thread.uw.fpsimd_state; if (target == current) @@ -1381,6 +1390,9 @@ static int compat_vfp_set(struct task_struct *target, compat_ulong_t fpscr; int ret, vregs_end_pos; + if (!system_supports_fpsimd()) + return -EINVAL; + uregs = &target->thread.uw.fpsimd_state; vregs_end_pos = VFP_STATE_SIZE - sizeof(compat_ulong_t); From patchwork Tue Dec 17 18:34:01 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Suzuki K Poulose X-Patchwork-Id: 181903 Delivered-To: patch@linaro.org Received: by 2002:ac9:44c4:0:0:0:0:0 with SMTP id t4csp6069137och; Tue, 17 Dec 2019 10:34:35 -0800 (PST) X-Google-Smtp-Source: APXvYqzZm5fIfk5VXO7unrAw8r1LCgVAhQDrDVu1GU0yQOb7UYWPpJ02IfyDAwBNsc0Un2V6qa12 X-Received: by 2002:a9d:578a:: with SMTP id q10mr37834309oth.215.1576607675388; Tue, 17 Dec 2019 10:34:35 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1576607675; cv=none; d=google.com; s=arc-20160816; b=0FTSVCsdQDsY1eeFTAd1a01Bws3sbVswByGXxq+h4Iimc84egtWphz09roWrB7QYN6 sQkGyRpuVIIcYiboOUZax2YG+FwHrTfsv9UD7n6yTF936oPyiA5oYdcKLgHwtJauziVy HpEj61tNM0ibwGftvq5tyAMUh4JlgEFC0eY7QqNc9LDzZeE4eOcL+POuzycfEQpv4unn kJnQx+43mjtbBASAPK3Tmu/VpfsspkzOgy0N5oKozXaHNyec2IQwI2XecJbDVRvF3HUf PR0NsAAGvRWpr/+N3BRNz9+rnCxpG7m40+GE+lIotC1CR7dx3g3JWLXH76f/RnIJ60oh sFRA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from; bh=3v2bzBg2S48ZkV0XUIbdjgeQ+6WyY64YkhBG63bKdZM=; b=XHYZLF09lIZLSFgItbU61p1tFiYGXH5+OPlMBPSS+pxWckB/2ulqYlQHywEOzCsTnk SMtp9de1C3qYjJ5mxwlDH0dgdZKBFaE/aucYpzo+uyXy0iZBUFePcCJlqVQGt9XU7JFq Lk8nmLxFnGLIYodaKGnstIm5X7vC8jMchZjBVtT1P/AL6U6xGwvNdZ4DKxDf1yG7iodo izp+KUNKRoml4KrRIrIAlBdL8laXesdqrtKeyLvecPCK8/QLCLNRRO6aAjf/wI1w2VZ1 bZQznoKo/ueemELyvbDos5MBp5C3vI8foKsQxKWS2vft5cqFpRbXA4MwPdCNt+DPfm8K 4flA== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id h9si13890337otb.49.2019.12.17.10.34.35; Tue, 17 Dec 2019 10:34:35 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1728362AbfLQSee (ORCPT + 27 others); Tue, 17 Dec 2019 13:34:34 -0500 Received: from foss.arm.com ([217.140.110.172]:44814 "EHLO foss.arm.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1728299AbfLQSe1 (ORCPT ); Tue, 17 Dec 2019 13:34:27 -0500 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 5426D30E; Tue, 17 Dec 2019 10:34:26 -0800 (PST) Received: from ewhatever.cambridge.arm.com (ewhatever.cambridge.arm.com [10.1.197.1]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPA id DF1B43F67D; Tue, 17 Dec 2019 10:34:24 -0800 (PST) From: Suzuki K Poulose To: linux-arm-kernel@lists.infradead.org Cc: linux-kernel@vger.kernel.org, will@kernel.org, maz@kernel.org, mark.rutland@arm.com, dave.martin@arm.com, catalin.marinas@arm.com, ard.biesheuvel@linaro.org, christoffer.dall@arm.com, Suzuki K Poulose , Will Deacon Subject: [PATCH v2 6/7] arm64: signal: nofpsimd: Handle fp/simd context for signal frames Date: Tue, 17 Dec 2019 18:34:01 +0000 Message-Id: <20191217183402.2259904-7-suzuki.poulose@arm.com> X-Mailer: git-send-email 2.23.0 In-Reply-To: <20191217183402.2259904-1-suzuki.poulose@arm.com> References: <20191217183402.2259904-1-suzuki.poulose@arm.com> MIME-Version: 1.0 Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Make sure we try to save/restore the vfp/fpsimd context for signal handling only when the fp/simd support is available. Otherwise, skip the frames. Cc: Will Deacon Cc: Mark Rutland Cc: Catalin Marinas Signed-off-by: Suzuki K Poulose --- arch/arm64/kernel/signal.c | 17 +++++++++++++++-- arch/arm64/kernel/signal32.c | 11 +++++++++-- 2 files changed, 24 insertions(+), 4 deletions(-) -- 2.23.0 diff --git a/arch/arm64/kernel/signal.c b/arch/arm64/kernel/signal.c index dd2cdc0d5be2..c648f7627035 100644 --- a/arch/arm64/kernel/signal.c +++ b/arch/arm64/kernel/signal.c @@ -173,6 +173,10 @@ static int preserve_fpsimd_context(struct fpsimd_context __user *ctx) ¤t->thread.uw.fpsimd_state; int err; + /* This must not be called when FP/SIMD support is missing */ + if (WARN_ON(!system_supports_fpsimd())) + return -EINVAL; + /* copy the FP and status/control registers */ err = __copy_to_user(ctx->vregs, fpsimd->vregs, sizeof(fpsimd->vregs)); __put_user_error(fpsimd->fpsr, &ctx->fpsr, err); @@ -191,6 +195,10 @@ static int restore_fpsimd_context(struct fpsimd_context __user *ctx) __u32 magic, size; int err = 0; + /* This must not be called when FP/SIMD support is missing */ + if (WARN_ON(!system_supports_fpsimd())) + return -EINVAL; + /* check the magic/size information */ __get_user_error(magic, &ctx->head.magic, err); __get_user_error(size, &ctx->head.size, err); @@ -261,6 +269,9 @@ static int restore_sve_fpsimd_context(struct user_ctxs *user) struct user_fpsimd_state fpsimd; struct sve_context sve; + if (WARN_ON(!system_supports_fpsimd())) + return -EINVAL; + if (__copy_from_user(&sve, user->sve, sizeof(sve))) return -EFAULT; @@ -371,6 +382,8 @@ static int parse_user_sigframe(struct user_ctxs *user, goto done; case FPSIMD_MAGIC: + if (!system_supports_fpsimd()) + goto invalid; if (user->fpsimd) goto invalid; @@ -506,7 +519,7 @@ static int restore_sigframe(struct pt_regs *regs, if (err == 0) err = parse_user_sigframe(&user, sf); - if (err == 0) { + if (err == 0 && system_supports_fpsimd()) { if (!user.fpsimd) return -EINVAL; @@ -623,7 +636,7 @@ static int setup_sigframe(struct rt_sigframe_user_layout *user, err |= __copy_to_user(&sf->uc.uc_sigmask, set, sizeof(*set)); - if (err == 0) { + if (err == 0 && system_supports_fpsimd()) { struct fpsimd_context __user *fpsimd_ctx = apply_user_offset(user, user->fpsimd_offset); err |= preserve_fpsimd_context(fpsimd_ctx); diff --git a/arch/arm64/kernel/signal32.c b/arch/arm64/kernel/signal32.c index 12a585386c2f..97ace6919bc2 100644 --- a/arch/arm64/kernel/signal32.c +++ b/arch/arm64/kernel/signal32.c @@ -100,6 +100,9 @@ static int compat_preserve_vfp_context(struct compat_vfp_sigframe __user *frame) compat_ulong_t fpscr, fpexc; int i, err = 0; + /* This must not be called when the FP/SIMD is missing */ + if (WARN_ON(!system_supports_fpsimd())) + return -EINVAL; /* * Save the hardware registers to the fpsimd_state structure. * Note that this also saves V16-31, which aren't visible @@ -149,6 +152,10 @@ static int compat_restore_vfp_context(struct compat_vfp_sigframe __user *frame) compat_ulong_t fpscr; int i, err = 0; + /* This must not be called when the FP/SIMD is missing */ + if (WARN_ON(!system_supports_fpsimd())) + return -EINVAL; + __get_user_error(magic, &frame->magic, err); __get_user_error(size, &frame->size, err); @@ -223,7 +230,7 @@ static int compat_restore_sigframe(struct pt_regs *regs, err |= !valid_user_regs(®s->user_regs, current); aux = (struct compat_aux_sigframe __user *) sf->uc.uc_regspace; - if (err == 0) + if (err == 0 && system_supports_fpsimd()) err |= compat_restore_vfp_context(&aux->vfp); return err; @@ -419,7 +426,7 @@ static int compat_setup_sigframe(struct compat_sigframe __user *sf, aux = (struct compat_aux_sigframe __user *) sf->uc.uc_regspace; - if (err == 0) + if (err == 0 && system_supports_fpsimd()) err |= compat_preserve_vfp_context(&aux->vfp); __put_user_error(0, &aux->end_magic, err); From patchwork Tue Dec 17 18:34:02 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Suzuki K Poulose X-Patchwork-Id: 181902 Delivered-To: patch@linaro.org Received: by 2002:ac9:44c4:0:0:0:0:0 with SMTP id t4csp6069082och; Tue, 17 Dec 2019 10:34:31 -0800 (PST) X-Google-Smtp-Source: APXvYqzbhsKJBlRHLRoRztgVi3oqk0TmdXrsMXiC3z213YJ8BNxmWF4jkH80j8N2/DmlISCY3ZWV X-Received: by 2002:a54:4e8d:: with SMTP id c13mr2325272oiy.27.1576607671675; Tue, 17 Dec 2019 10:34:31 -0800 (PST) ARC-Seal: i=1; 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mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id t195si12900691oih.209.2019.12.17.10.34.31; Tue, 17 Dec 2019 10:34:31 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727613AbfLQSea (ORCPT + 27 others); Tue, 17 Dec 2019 13:34:30 -0500 Received: from foss.arm.com ([217.140.110.172]:44820 "EHLO foss.arm.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1728311AbfLQSe2 (ORCPT ); Tue, 17 Dec 2019 13:34:28 -0500 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id F0DB331B; Tue, 17 Dec 2019 10:34:27 -0800 (PST) Received: from ewhatever.cambridge.arm.com (ewhatever.cambridge.arm.com [10.1.197.1]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPA id 875223F67D; Tue, 17 Dec 2019 10:34:26 -0800 (PST) From: Suzuki K Poulose To: linux-arm-kernel@lists.infradead.org Cc: linux-kernel@vger.kernel.org, will@kernel.org, maz@kernel.org, mark.rutland@arm.com, dave.martin@arm.com, catalin.marinas@arm.com, ard.biesheuvel@linaro.org, christoffer.dall@arm.com, Suzuki K Poulose , Marc Zyngier Subject: [PATCH v2 7/7] arm64: nofpsmid: Handle TIF_FOREIGN_FPSTATE flag cleanly Date: Tue, 17 Dec 2019 18:34:02 +0000 Message-Id: <20191217183402.2259904-8-suzuki.poulose@arm.com> X-Mailer: git-send-email 2.23.0 In-Reply-To: <20191217183402.2259904-1-suzuki.poulose@arm.com> References: <20191217183402.2259904-1-suzuki.poulose@arm.com> MIME-Version: 1.0 Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org We detect the absence of FP/SIMD after an incapable CPU is brought up, and by then we have kernel threads running already with TIF_FOREIGN_FPSTATE set which could be set for early userspace applications (e.g, modprobe triggered from initramfs) and init. This could cause the applications to loop forever in do_nofity_resume() as we never clear the TIF flag, once we now know that we don't support FP. Fix this by making sure that we clear the TIF_FOREIGN_FPSTATE flag for tasks which may have them set, as we would have done in the normal case, but avoiding touching the hardware state (since we don't support any). Also to make sure we handle the cases seemlessly we categorise the helper functions to two : 1) Helpers for common core code, which calls into take appropriate actions without knowing the current FPSIMD state of the CPU/task. e.g fpsimd_restore_current_state(), fpsimd_flush_task_state(), fpsimd_save_and_flush_cpu_state(). We bail out early for these functions, taking any appropriate actions (e.g, clearing the TIF flag) where necessary to hide the handling from core code. 2) Helpers used when the presence of FP/SIMD is apparent. i.e, save/restore the FP/SIMD register state, modify the CPU/task FP/SIMD state. e.g, fpsimd_save(), task_fpsimd_load() - save/restore task FP/SIMD registers fpsimd_bind_task_to_cpu() \ - Update the "state" metadata for CPU/task. fpsimd_bind_state_to_cpu() / fpsimd_update_current_state() - Update the fp/simd state for the current task from memory. These must not be called in the absence of FP/SIMD. Put in a WARNING to make sure they are not invoked in the absence of FP/SIMD. KVM also uses the TIF_FOREIGN_FPSTATE flag to manage the FP/SIMD state on the CPU. However, without FP/SIMD support we trap all accesses and inject undefined instruction. Thus we should never "load" guest state. Add a sanity check to make sure this is valid. Fixes: 82e0191a1aa11abf ("arm64: Support systems without FP/ASIMD") Cc: Will Deacon Cc: Mark Rutland Cc: Catalin Marinas Cc: Marc Zyngier Signed-off-by: Suzuki K Poulose --- arch/arm64/kernel/fpsimd.c | 31 +++++++++++++++++++++++++++---- arch/arm64/kvm/hyp/switch.c | 9 +++++++++ 2 files changed, 36 insertions(+), 4 deletions(-) -- 2.23.0 diff --git a/arch/arm64/kernel/fpsimd.c b/arch/arm64/kernel/fpsimd.c index 3eb338f14386..240c52b71cda 100644 --- a/arch/arm64/kernel/fpsimd.c +++ b/arch/arm64/kernel/fpsimd.c @@ -269,7 +269,7 @@ static void sve_free(struct task_struct *task) */ static void task_fpsimd_load(void) { - WARN_ON(!have_cpu_fpsimd_context()); + WARN_ON(!system_supports_fpsimd() || !have_cpu_fpsimd_context()); if (system_supports_sve() && test_thread_flag(TIF_SVE)) sve_load_state(sve_pffr(¤t->thread), @@ -289,6 +289,7 @@ static void fpsimd_save(void) this_cpu_ptr(&fpsimd_last_state); /* set by fpsimd_bind_task_to_cpu() or fpsimd_bind_state_to_cpu() */ + WARN_ON(!system_supports_fpsimd()); WARN_ON(!have_cpu_fpsimd_context()); if (!test_thread_flag(TIF_FOREIGN_FPSTATE)) { @@ -1092,6 +1093,7 @@ void fpsimd_bind_task_to_cpu(void) struct fpsimd_last_state_struct *last = this_cpu_ptr(&fpsimd_last_state); + WARN_ON(!system_supports_fpsimd()); last->st = ¤t->thread.uw.fpsimd_state; last->sve_state = current->thread.sve_state; last->sve_vl = current->thread.sve_vl; @@ -1114,6 +1116,7 @@ void fpsimd_bind_state_to_cpu(struct user_fpsimd_state *st, void *sve_state, struct fpsimd_last_state_struct *last = this_cpu_ptr(&fpsimd_last_state); + WARN_ON(!system_supports_fpsimd()); WARN_ON(!in_softirq() && !irqs_disabled()); last->st = st; @@ -1128,8 +1131,19 @@ void fpsimd_bind_state_to_cpu(struct user_fpsimd_state *st, void *sve_state, */ void fpsimd_restore_current_state(void) { - if (!system_supports_fpsimd()) + /* + * For the tasks that were created before we detected the absence of + * FP/SIMD, the TIF_FOREIGN_FPSTATE could be set via fpsimd_thread_switch(), + * e.g, init. This could be then inherited by the children processes. + * If we later detect that the system doesn't support FP/SIMD, + * we must clear the flag for all the tasks to indicate that the + * FPSTATE is clean (as we can't have one) to avoid looping for ever in + * do_notify_resume(). + */ + if (!system_supports_fpsimd()) { + clear_thread_flag(TIF_FOREIGN_FPSTATE); return; + } get_cpu_fpsimd_context(); @@ -1148,7 +1162,7 @@ void fpsimd_restore_current_state(void) */ void fpsimd_update_current_state(struct user_fpsimd_state const *state) { - if (!system_supports_fpsimd()) + if (WARN_ON(!system_supports_fpsimd())) return; get_cpu_fpsimd_context(); @@ -1179,7 +1193,13 @@ void fpsimd_update_current_state(struct user_fpsimd_state const *state) void fpsimd_flush_task_state(struct task_struct *t) { t->thread.fpsimd_cpu = NR_CPUS; - + /* + * If we don't support fpsimd, bail out after we have + * reset the fpsimd_cpu for this task and clear the + * FPSTATE. + */ + if (!system_supports_fpsimd()) + return; barrier(); set_tsk_thread_flag(t, TIF_FOREIGN_FPSTATE); @@ -1193,6 +1213,7 @@ void fpsimd_flush_task_state(struct task_struct *t) */ static void fpsimd_flush_cpu_state(void) { + WARN_ON(!system_supports_fpsimd()); __this_cpu_write(fpsimd_last_state.st, NULL); set_thread_flag(TIF_FOREIGN_FPSTATE); } @@ -1203,6 +1224,8 @@ static void fpsimd_flush_cpu_state(void) */ void fpsimd_save_and_flush_cpu_state(void) { + if (!system_supports_fpsimd()) + return; WARN_ON(preemptible()); __get_cpu_fpsimd_context(); fpsimd_save(); diff --git a/arch/arm64/kvm/hyp/switch.c b/arch/arm64/kvm/hyp/switch.c index 72fbbd86eb5e..9696ebb5c13a 100644 --- a/arch/arm64/kvm/hyp/switch.c +++ b/arch/arm64/kvm/hyp/switch.c @@ -28,10 +28,19 @@ /* Check whether the FP regs were dirtied while in the host-side run loop: */ static bool __hyp_text update_fp_enabled(struct kvm_vcpu *vcpu) { + /* + * When the system doesn't support FP/SIMD, we cannot rely on + * the state of _TIF_FOREIGN_FPSTATE. However, we will never + * set the KVM_ARM64_FP_ENABLED, as the FP/SIMD accesses always + * inject an abort into the guest. Thus we always trap the + * accesses. + */ if (vcpu->arch.host_thread_info->flags & _TIF_FOREIGN_FPSTATE) vcpu->arch.flags &= ~(KVM_ARM64_FP_ENABLED | KVM_ARM64_FP_HOST); + WARN_ON(!system_supports_fpsimd() && + (vcpu->arch.flags & KVM_ARM64_FP_ENABLED)); return !!(vcpu->arch.flags & KVM_ARM64_FP_ENABLED); }