From patchwork Sat Dec 21 10:49:48 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Daniel Wagner X-Patchwork-Id: 182349 Delivered-To: patch@linaro.org Received: by 2002:a92:1f98:0:0:0:0:0 with SMTP id f24csp1667706ilf; Sat, 21 Dec 2019 02:49:54 -0800 (PST) X-Google-Smtp-Source: APXvYqw8VGuXw/EzD9xLFA9tTw4S5rMsDBHTdEj4aSX/7OSSfcmegb7Js+58vp/vfedJLxtG/Mf2 X-Received: by 2002:a9d:367:: with SMTP id 94mr19169554otv.329.1576925393947; Sat, 21 Dec 2019 02:49:53 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1576925393; cv=none; d=google.com; s=arc-20160816; b=t2gxCxXxdw8RWS0uKgHq0yOMBlmHMbM36UAdl/YDdUblQ01T2IxBlUGFHoChR6X/4L GFs6824s0ZmtMUSbnnzIxm2lyhxsXi2SelgtNbSpc+qLW3bS7RzO+CKWUDnhKPa78Tle /PyW6ws5LTifoQum/YcMgPbj40gwfIC8CZVDqaeXHR9DBdaFgyS1sZeorRA7Auwp4WOk 5Eiv+50psWkqAetcmMGWaO7ghaLfXOZPfgMMquybayp1x/4j3osXLGA39432+JIMRvIb UmqEAwgXIG261WHUD7pbyW6JroJxmuZxJcmYEwjTmppb1xOYX4lVBRCusZUqnqAuVDU2 Jciw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:content-transfer-encoding:mime-version :message-id:date:subject:cc:to:from; bh=QJnmtua6OtH/4efFTYt6h0t7AHLRELNcnbXfha8FZrs=; b=C72722RT8sFF0QDbpbFqffBNcgvZP6pnoq9nemWgQCmZ/y3M4zqLxu1m0usektHeq8 hJONKHbu2rA45m0kUJssz50PB2pkeddBXIX9Km2dAcA0nGv9/B0ZMhIqFCFSPZx/WS0B JzfVAG/jLrNlnjFvuZcUEVqk6GlxIGANuT5sQ3WA7mObqdaQGJFZ/EgCY5jbw3/dPgTX ftwBgnnFdcIksZYn/8tZn9+l9vx0DtOugMllgAULDeniZThjxM+DVbuPMDiUcak2TydE yrA2y7AjlkLkmzgwjyFH9F+M9kiALbbSXCo8SIlNXgS2KBWeUIswitCtw4KH8aF+Ch/g kRBg== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: best guess record for domain of stable-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=stable-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id j18si6749513otq.275.2019.12.21.02.49.53; Sat, 21 Dec 2019 02:49:53 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of stable-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of stable-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=stable-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726736AbfLUKtx (ORCPT + 14 others); Sat, 21 Dec 2019 05:49:53 -0500 Received: from mx2.suse.de ([195.135.220.15]:43116 "EHLO mx2.suse.de" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726189AbfLUKtx (ORCPT ); Sat, 21 Dec 2019 05:49:53 -0500 X-Virus-Scanned: by amavisd-new at test-mx.suse.de Received: from relay2.suse.de (unknown [195.135.220.254]) by mx2.suse.de (Postfix) with ESMTP id B691AAAC2; Sat, 21 Dec 2019 10:49:50 +0000 (UTC) From: Daniel Wagner To: stable@vger.kernel.org Cc: Pavel Machek , Arnd Bergmann , "David S . Miller" , Daniel Wagner Subject: [PATCH v4.4] net: davinci_cpdma: use dma_addr_t for DMA address Date: Sat, 21 Dec 2019 11:49:48 +0100 Message-Id: <20191221104948.10233-1-dwagner@suse.de> X-Mailer: git-send-email 2.24.0 MIME-Version: 1.0 Sender: stable-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: stable@vger.kernel.org From: Arnd Bergmann [ Upstream commit 84092996673211f16ef3b942a191d7952e9dfea9 ] The davinci_cpdma mixes up physical addresses as seen from the CPU and DMA addresses as seen from a DMA master, since it can operate on both normal memory or an on-chip buffer. If dma_addr_t is different from phys_addr_t, this means we get a compile-time warning about the type mismatch: ethernet/ti/davinci_cpdma.c: In function 'cpdma_desc_pool_create': ethernet/ti/davinci_cpdma.c:182:48: error: passing argument 3 of 'dma_alloc_coherent' from incompatible pointer type [-Werror=incompatible-pointer-types] pool->cpumap = dma_alloc_coherent(dev, size, &pool->phys, In file included from ethernet/ti/davinci_cpdma.c:21:0: dma-mapping.h:398:21: note: expected 'dma_addr_t * {aka long long unsigned int *}' but argument is of type 'phys_addr_t * {aka unsigned int *}' static inline void *dma_alloc_coherent(struct device *dev, size_t size, This slightly restructures the code so the address we use for mapping RAM into a DMA address is always a dma_addr_t, avoiding the warning. The code is correct even if both types are 32-bit because the DMA master in this device only supports 32-bit addressing anyway, independent of the types that are used. We still assign this value to pool->phys, and that is wrong if the driver is ever used with an IOMMU, but that value appears to be never used, so there is no problem really. I've added a couple of comments about where we do things that are slightly violating the API. Signed-off-by: Arnd Bergmann Signed-off-by: David S. Miller Signed-off-by: Daniel Wagner --- Hi, Pavel reported this fix is needed for the CIP kernel. Since this patch was added to v4.5, we only need to backport to v4.4. Thanks, Daniel drivers/net/ethernet/ti/davinci_cpdma.c | 12 ++++++------ 1 file changed, 6 insertions(+), 6 deletions(-) -- 2.24.0 diff --git a/drivers/net/ethernet/ti/davinci_cpdma.c b/drivers/net/ethernet/ti/davinci_cpdma.c index 657b65bf5cac..18bf3a8fdc50 100644 --- a/drivers/net/ethernet/ti/davinci_cpdma.c +++ b/drivers/net/ethernet/ti/davinci_cpdma.c @@ -82,7 +82,7 @@ struct cpdma_desc { struct cpdma_desc_pool { phys_addr_t phys; - u32 hw_addr; + dma_addr_t hw_addr; void __iomem *iomap; /* ioremap map */ void *cpumap; /* dma_alloc map */ int desc_size, mem_size; @@ -152,7 +152,7 @@ struct cpdma_chan { * abstract out these details */ static struct cpdma_desc_pool * -cpdma_desc_pool_create(struct device *dev, u32 phys, u32 hw_addr, +cpdma_desc_pool_create(struct device *dev, u32 phys, dma_addr_t hw_addr, int size, int align) { int bitmap_size; @@ -176,13 +176,13 @@ cpdma_desc_pool_create(struct device *dev, u32 phys, u32 hw_addr, if (phys) { pool->phys = phys; - pool->iomap = ioremap(phys, size); + pool->iomap = ioremap(phys, size); /* should be memremap? */ pool->hw_addr = hw_addr; } else { - pool->cpumap = dma_alloc_coherent(dev, size, &pool->phys, + pool->cpumap = dma_alloc_coherent(dev, size, &pool->hw_addr, GFP_KERNEL); - pool->iomap = pool->cpumap; - pool->hw_addr = pool->phys; + pool->iomap = (void __iomem __force *)pool->cpumap; + pool->phys = pool->hw_addr; /* assumes no IOMMU, don't use this value */ } if (pool->iomap)