From patchwork Mon Feb 17 02:59:54 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Richard Henderson X-Patchwork-Id: 183572 Delivered-To: patch@linaro.org Received: by 2002:a92:1f12:0:0:0:0:0 with SMTP id i18csp4454796ile; Sun, 16 Feb 2020 19:03:31 -0800 (PST) X-Google-Smtp-Source: APXvYqxZNV9BmAFvzAXD9CmNdr7rD/LDBtA5f75UhJcCEkKCN8sdPMuV5j+aO7BAw821NY2hadBv X-Received: by 2002:a37:8683:: with SMTP id i125mr12725689qkd.491.1581908611489; Sun, 16 Feb 2020 19:03:31 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1581908611; cv=none; d=google.com; s=arc-20160816; b=UfOvhspmdfrwMD+/0oYfFoBdqrClUHX1wRULl+PkUKKWVutF7tDoXGJXOEglHSQA5S e9mwpXz9DwJ4bWOESYr+1Pl+hjjPHlFfbxGuBTnPnr6vRcbCDVjDjTMBy7CcNf5UDdCs uTSUH3Z6XX1hQG0sQBaRCu5ljP4TSSnjOqa6wGaAPvYgIXDOfg9gCv2xARgWO1IZ76JP CbWsTP/UHNvmdX+ct4+SarIhWltVc94fRHAMAqs1acXi/XfhYaYKoE8Sgsv7vEiDx108 rDkzMLZqCnaeBHGdGN7xv2bU+16T60TW6QUB36xF64CzWF754sjFB+1UAj2Y1EzsNiQy feww== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:to:from :dkim-signature; bh=GfGZz+uTpdMIZZzSAMPcmTLg6XJzkWWciXxWC3zVUN4=; b=zAqJLkuwvSJ7AzSOsDURVgRzY5dkynJpMQH9E7yxXsCyJO08hmUR9b86AMFB/hsYdf AxNDOaoUoHdKhHzWjWYLWErTyT29QOYJc39+lPyg5J2aIE+6CDujM1kXA81mq7iArbQG M6/Fx0jZARRX76G3HomucTr0yeE3CBYB32OXmPbF1IMiEMTJTLvbOgAwQqUQsKKjQU1q Y4FscTGgtgKsvoyPveW9SDEnYkIBIkK7QU4WxxXJz9fm/8KB3tsXFsHLRVPofTAsVKPW KwU39NZI68iM+NbQnsjR3kcKXqXAfQoNqemq1dM482V1uuVwUPbJnnMiRhYGUDD0ecXO eoHA== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=wgtd5Mly; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. [209.51.188.17]) by mx.google.com with ESMTPS id cs6si5476204qvb.125.2020.02.16.19.03.31 for (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Sun, 16 Feb 2020 19:03:31 -0800 (PST) Received-SPF: pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=wgtd5Mly; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from localhost ([::1]:39588 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1j3Wh0-0007bq-Uw for patch@linaro.org; Sun, 16 Feb 2020 22:03:30 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]:44803) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1j3Wdf-00036R-S9 for qemu-devel@nongnu.org; Sun, 16 Feb 2020 22:00:05 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1j3Wde-0003Nl-4I for qemu-devel@nongnu.org; Sun, 16 Feb 2020 22:00:03 -0500 Received: from mail-pg1-x534.google.com ([2607:f8b0:4864:20::534]:38750) by eggs.gnu.org with esmtps (TLS1.0:RSA_AES_128_CBC_SHA1:16) (Exim 4.71) (envelope-from ) id 1j3Wdd-0003MV-TG for qemu-devel@nongnu.org; Sun, 16 Feb 2020 22:00:02 -0500 Received: by mail-pg1-x534.google.com with SMTP id d6so8272510pgn.5 for ; Sun, 16 Feb 2020 19:00:01 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:subject:date:message-id:in-reply-to:references:mime-version :content-transfer-encoding; bh=GfGZz+uTpdMIZZzSAMPcmTLg6XJzkWWciXxWC3zVUN4=; b=wgtd5Mlyysj7TC3FI4UE1BhAdvRxva1PIYnThRppnJxMiUgjwLcX/8FYppUrWhRJu8 ERJmHJZDn0Cu37Pb8VTNVfPrFVWnEy1Ol+6lPGvDko02o9Fjg2bl2ZBF3ncb1FtbTOmr Uhc0PIpijgEdCFfUuPtot7RaLXIXg2o+6y5CXFApHkNSEixrXQiUOcqfLNz1QCqpc8gh VonAi+F6462Z5E1W7cqk7tgT9uFATE8KlZ7jhjh8iB5+F1IGH+NUMP/gwNYRt38tsgON fgMx1kOpT2JvwLHffpwfqiRaBw/lxBnXk5o+P9RsnkxwTk3kmOGgB6q86wIjfSdIrkbL W99w== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=GfGZz+uTpdMIZZzSAMPcmTLg6XJzkWWciXxWC3zVUN4=; b=Nns7Vpaw1e8TGDXV6825Wk44Nn1I8YdeGxzeP2UKt7fx4v0gNF70qkEkO5+7CmOBj+ sr9qAIrSE8TP+u7wVXJ0/RtA/Tp+fKWo4avlmVIbnC7XzN34DmVYUo5qp5XS1KELSfOF GJ+zUWMpV7XXvZUuqmw+1v6QTPKDU+WUTs6qYCh6N+FQcyyw12kZMdTCUyEYlCYZiNE9 5MMiacBxsP1KZEP2fp/EGnRsQdf8/dUel21uPcy82Jxyf/9sj2A9GzWDXZkTDQegv8B/ MyPwbvbG5E7njlAarypuZf/qV+c2fDW3BXBy1iU+psRfxb8eypsh+2E2j/SkU/xxuBKE NN+g== X-Gm-Message-State: APjAAAWa989eUXBoTrgDfAuK6TQcWFW9NsRaBOqlBz6bs6r3wJ02WcVe +sPONi4rTxllVCgnk9bzoF9GpCg+Zis= X-Received: by 2002:a63:cc4a:: with SMTP id q10mr15387615pgi.241.1581908400224; Sun, 16 Feb 2020 19:00:00 -0800 (PST) Received: from localhost.localdomain (97-126-123-70.tukw.qwest.net. [97.126.123.70]) by smtp.gmail.com with ESMTPSA id u2sm14741060pgj.7.2020.02.16.18.59.59 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sun, 16 Feb 2020 18:59:59 -0800 (PST) From: Richard Henderson To: qemu-devel@nongnu.org Subject: [PATCH 1/4] tcg: Remove CONFIG_VECTOR16 Date: Sun, 16 Feb 2020 18:59:54 -0800 Message-Id: <20200217025957.12031-2-richard.henderson@linaro.org> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20200217025957.12031-1-richard.henderson@linaro.org> References: <20200217025957.12031-1-richard.henderson@linaro.org> MIME-Version: 1.0 X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2607:f8b0:4864:20::534 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" The comment in tcg-runtime-gvec.c about CONFIG_VECTOR16 says that tcg-op-gvec.c has eliminated size 8 vectors, and only passes on multiples of 16. This may have been true of the first few operations, but is not true of all operations. In particular, multiply, shift by scalar, and compare of 8- and 16-bit elements are not expanded inline if host vector operations are not supported. For an x86_64 host that does not support AVX, this means that we will fall back to the helper, which will attempt to use SSE instructions, which will SEGV on an invalid 8-byte aligned memory operation. This patch simply removes the CONFIG_VECTOR16 code and configuration without further simplification. Buglink: https://bugs.launchpad.net/bugs/1863508 Signed-off-by: Richard Henderson --- configure | 56 ------------------------------------ accel/tcg/tcg-runtime-gvec.c | 35 +--------------------- 2 files changed, 1 insertion(+), 90 deletions(-) -- 2.20.1 diff --git a/configure b/configure index 16f94cd96b..bccb979aaf 100755 --- a/configure +++ b/configure @@ -5618,58 +5618,6 @@ if test "$plugins" = "yes" && "for this purpose. You can't build with --static." fi -######################################## -# See if 16-byte vector operations are supported. -# Even without a vector unit the compiler may expand these. -# There is a bug in old GCC for PPC that crashes here. -# Unfortunately it's the system compiler for Centos 7. - -cat > $TMPC << EOF -typedef unsigned char U1 __attribute__((vector_size(16))); -typedef unsigned short U2 __attribute__((vector_size(16))); -typedef unsigned int U4 __attribute__((vector_size(16))); -typedef unsigned long long U8 __attribute__((vector_size(16))); -typedef signed char S1 __attribute__((vector_size(16))); -typedef signed short S2 __attribute__((vector_size(16))); -typedef signed int S4 __attribute__((vector_size(16))); -typedef signed long long S8 __attribute__((vector_size(16))); -static U1 a1, b1; -static U2 a2, b2; -static U4 a4, b4; -static U8 a8, b8; -static S1 c1; -static S2 c2; -static S4 c4; -static S8 c8; -static int i; -void helper(void *d, void *a, int shift, int i); -void helper(void *d, void *a, int shift, int i) -{ - *(U1 *)(d + i) = *(U1 *)(a + i) << shift; - *(U2 *)(d + i) = *(U2 *)(a + i) << shift; - *(U4 *)(d + i) = *(U4 *)(a + i) << shift; - *(U8 *)(d + i) = *(U8 *)(a + i) << shift; -} -int main(void) -{ - a1 += b1; a2 += b2; a4 += b4; a8 += b8; - a1 -= b1; a2 -= b2; a4 -= b4; a8 -= b8; - a1 *= b1; a2 *= b2; a4 *= b4; a8 *= b8; - a1 &= b1; a2 &= b2; a4 &= b4; a8 &= b8; - a1 |= b1; a2 |= b2; a4 |= b4; a8 |= b8; - a1 ^= b1; a2 ^= b2; a4 ^= b4; a8 ^= b8; - a1 <<= i; a2 <<= i; a4 <<= i; a8 <<= i; - a1 >>= i; a2 >>= i; a4 >>= i; a8 >>= i; - c1 >>= i; c2 >>= i; c4 >>= i; c8 >>= i; - return 0; -} -EOF - -vector16=no -if compile_prog "" "" ; then - vector16=yes -fi - ######################################## # See if __attribute__((alias)) is supported. # This false for Xcode 9, but has been remedied for Xcode 10. @@ -7266,10 +7214,6 @@ if test "$atomic64" = "yes" ; then echo "CONFIG_ATOMIC64=y" >> $config_host_mak fi -if test "$vector16" = "yes" ; then - echo "CONFIG_VECTOR16=y" >> $config_host_mak -fi - if test "$attralias" = "yes" ; then echo "CONFIG_ATTRIBUTE_ALIAS=y" >> $config_host_mak fi diff --git a/accel/tcg/tcg-runtime-gvec.c b/accel/tcg/tcg-runtime-gvec.c index 5b1902d591..00da0938a5 100644 --- a/accel/tcg/tcg-runtime-gvec.c +++ b/accel/tcg/tcg-runtime-gvec.c @@ -24,32 +24,6 @@ #include "tcg/tcg-gvec-desc.h" -/* Virtually all hosts support 16-byte vectors. Those that don't can emulate - * them via GCC's generic vector extension. This turns out to be simpler and - * more reliable than getting the compiler to autovectorize. - * - * In tcg-op-gvec.c, we asserted that both the size and alignment of the data - * are multiples of 16. - * - * When the compiler does not support all of the operations we require, the - * loops are written so that we can always fall back on the base types. - */ -#ifdef CONFIG_VECTOR16 -typedef uint8_t vec8 __attribute__((vector_size(16))); -typedef uint16_t vec16 __attribute__((vector_size(16))); -typedef uint32_t vec32 __attribute__((vector_size(16))); -typedef uint64_t vec64 __attribute__((vector_size(16))); - -typedef int8_t svec8 __attribute__((vector_size(16))); -typedef int16_t svec16 __attribute__((vector_size(16))); -typedef int32_t svec32 __attribute__((vector_size(16))); -typedef int64_t svec64 __attribute__((vector_size(16))); - -#define DUP16(X) { X, X, X, X, X, X, X, X, X, X, X, X, X, X, X, X } -#define DUP8(X) { X, X, X, X, X, X, X, X } -#define DUP4(X) { X, X, X, X } -#define DUP2(X) { X, X } -#else typedef uint8_t vec8; typedef uint16_t vec16; typedef uint32_t vec32; @@ -64,7 +38,6 @@ typedef int64_t svec64; #define DUP8(X) X #define DUP4(X) X #define DUP2(X) X -#endif /* CONFIG_VECTOR16 */ static inline void clear_high(void *d, intptr_t oprsz, uint32_t desc) { @@ -917,13 +890,7 @@ void HELPER(gvec_sar64v)(void *d, void *a, void *b, uint32_t desc) clear_high(d, oprsz, desc); } -/* If vectors are enabled, the compiler fills in -1 for true. - Otherwise, we must take care of this by hand. */ -#ifdef CONFIG_VECTOR16 -# define DO_CMP0(X) X -#else -# define DO_CMP0(X) -(X) -#endif +#define DO_CMP0(X) -(X) #define DO_CMP1(NAME, TYPE, OP) \ void HELPER(NAME)(void *d, void *a, void *b, uint32_t desc) \ From patchwork Mon Feb 17 02:59:55 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Richard Henderson X-Patchwork-Id: 183574 Delivered-To: patch@linaro.org Received: by 2002:a92:1f12:0:0:0:0:0 with SMTP id i18csp4454930ile; Sun, 16 Feb 2020 19:03:42 -0800 (PST) X-Google-Smtp-Source: APXvYqxLu3KlNDVG2wuDufEvBJBFdOS9DuRmxBxu2gz3ctG5Q9uchOM4A3KBCa6zmt4uYV2m1IsX X-Received: by 2002:a05:620a:13da:: with SMTP id g26mr12818227qkl.410.1581908622702; Sun, 16 Feb 2020 19:03:42 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1581908622; cv=none; d=google.com; s=arc-20160816; b=oCUl5oNvYc9VDKxafVADP7kFTyC/Od1gVeBprz3Yo3WRXeZ7GzTsQbekgSg2EdagWm QplTwuKSuukQV2TBoVZ9DuuYKUyavk3VDZuVLSSLTIO0MmaBXLCWHfxAHqKl3O8SnZpx lAK6cCAD/X+C86C1nG5cLxpAPZw+lP1aoZ0ugbMPHZUBO+nXXiXZcNPF4YSmf0eZuA1u DSkncnhQIFrZ8ZW34vVn34eEZgQOJYll1LkiNVzQBsrq9Xdq1QdMRv1j8V6VzK2HE2dd zrxJjGdGOcpChs4jdY3lzJM2H8rtp7D8lpooa4yTRJv57PYza+HNEXbwg8yxOGCm6QC0 y+2Q== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:to:from :dkim-signature; bh=slYUgw5gvBDRKGCuyZOigEVgx2Xl8RvJ6zvwjAt2VLY=; b=Sje3jMrjZIyHG+SK+lvhKCd9l1qipLjg44Lfi083LwKSqS+gVGJe6Bwd6cXysxzGb/ 75tymFsp9N0kuaLNdGFFsMRZA0Q1/Vqdh0Z4YVxm1ubrXsZOZqjhhCqg7h+s833w2FSM 6ZXvVG+EySeyonBeRj5bb1XvOB6ZlyEeVVQVFDrzgl6WcGfR2ZYyug5Ion4R2o/G0fx+ rSv91tDwjfMoHywulMtXhyDvdORE2EWHGjj5Srgcr7UksXymQsu7vRBrREW4sG01vxY1 HdVtIVgvD63eOtJEFNaPDr8FSjEOXuzLcSOu4yGrjSqFFWztoiZb9PQAXwyWkPDeDnKX cY/A== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=ajgkmnt3; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. [209.51.188.17]) by mx.google.com with ESMTPS id m20si6307232qkh.40.2020.02.16.19.03.42 for (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Sun, 16 Feb 2020 19:03:42 -0800 (PST) Received-SPF: pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=ajgkmnt3; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from localhost ([::1]:39596 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1j3WhC-0007sF-4n for patch@linaro.org; Sun, 16 Feb 2020 22:03:42 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]:44856) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1j3Wdj-0003B5-Eo for qemu-devel@nongnu.org; Sun, 16 Feb 2020 22:00:10 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1j3Wdg-0003S7-33 for qemu-devel@nongnu.org; Sun, 16 Feb 2020 22:00:07 -0500 Received: from mail-pg1-x542.google.com ([2607:f8b0:4864:20::542]:39872) by eggs.gnu.org with esmtps (TLS1.0:RSA_AES_128_CBC_SHA1:16) (Exim 4.71) (envelope-from ) id 1j3Wdf-0003Qx-Pi for qemu-devel@nongnu.org; Sun, 16 Feb 2020 22:00:04 -0500 Received: by mail-pg1-x542.google.com with SMTP id j15so8280390pgm.6 for ; Sun, 16 Feb 2020 19:00:03 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:subject:date:message-id:in-reply-to:references:mime-version :content-transfer-encoding; bh=slYUgw5gvBDRKGCuyZOigEVgx2Xl8RvJ6zvwjAt2VLY=; b=ajgkmnt3mQUAKGaaAe2wUZrVznhszWwda8Z903duI61Yb3MF62S8WPvF/21ly5cGyT USWfDGYgW8nxEDeIhLFdY6weTsQBkN/FgAN9RmbLRNDFbm3lqM/h437if79wGd6ZU+Xh abrQ+8VbT6GGkBK+HBY6KYPQexjCY0HnoWiQpeTMGsxUSNZ07PoOsgQkhoOmnD+mMI9w nRhFOF1p22zZsc5N0EY+PJTv+qvkUpGlv/JRFA/KOKkhhiFvTu5hT4YLxi+ufLoHU8FW JJdzRQqvqUqoOFNCudVl8dVR4+KciHGYGk9+/c9uJgeqtrYjMjtoL2wzg/Dg4T+fC9xM yVKg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=slYUgw5gvBDRKGCuyZOigEVgx2Xl8RvJ6zvwjAt2VLY=; b=rYofCOhEAsleAcY84BY3RT8glOjgL+RSNIW9RJdYrCzP5ERxgX9o17XEMFdw+t7ohF r1x90Gb5mJ25Pxq/Mp+3BWds/BNFhaigj6kwMLE9rfEBePm9GSi6BGtticwpjvSF0ZQd AaALO2adkwZ5mqP+TyQuVMcQAqxAWsYFkctZFmqKW34yZnnllx5j+nuJ16/U29PD2Li5 mpTcBOoiueYQ2r0qihmSwWjHCIYA+8WM94hmNI619nPSGD7WqZqhMHjletpsN3dJUzLO U0w9rTSoi3NQe9Zn5BO9dT9nt1UcCn4IqbHqHAO6P4wnPeop+NRQFhdx+szfoeTcYr8x BeCw== X-Gm-Message-State: APjAAAWxoTL8n/yA3wiZ91H4rUTzHqfwB2GBTRwP7WG+nE9M2upyK8+m aML1zEamOH0R8RPIn2wz0t3cHKCKlGA= X-Received: by 2002:aa7:87d5:: with SMTP id i21mr14771915pfo.143.1581908401524; Sun, 16 Feb 2020 19:00:01 -0800 (PST) Received: from localhost.localdomain (97-126-123-70.tukw.qwest.net. [97.126.123.70]) by smtp.gmail.com with ESMTPSA id u2sm14741060pgj.7.2020.02.16.19.00.00 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sun, 16 Feb 2020 19:00:00 -0800 (PST) From: Richard Henderson To: qemu-devel@nongnu.org Subject: [PATCH 2/4] tcg: Tidy tcg-runtime-gvec.c types Date: Sun, 16 Feb 2020 18:59:55 -0800 Message-Id: <20200217025957.12031-3-richard.henderson@linaro.org> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20200217025957.12031-1-richard.henderson@linaro.org> References: <20200217025957.12031-1-richard.henderson@linaro.org> MIME-Version: 1.0 X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2607:f8b0:4864:20::542 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" Partial cleanup from the CONFIG_VECTOR16 removal. Replace the vec* types with their scalar expansions. Signed-off-by: Richard Henderson --- accel/tcg/tcg-runtime-gvec.c | 270 +++++++++++++++++------------------ 1 file changed, 130 insertions(+), 140 deletions(-) -- 2.20.1 Reviewed-by: Philippe Mathieu-Daudé diff --git a/accel/tcg/tcg-runtime-gvec.c b/accel/tcg/tcg-runtime-gvec.c index 00da0938a5..97852b515b 100644 --- a/accel/tcg/tcg-runtime-gvec.c +++ b/accel/tcg/tcg-runtime-gvec.c @@ -24,16 +24,6 @@ #include "tcg/tcg-gvec-desc.h" -typedef uint8_t vec8; -typedef uint16_t vec16; -typedef uint32_t vec32; -typedef uint64_t vec64; - -typedef int8_t svec8; -typedef int16_t svec16; -typedef int32_t svec32; -typedef int64_t svec64; - #define DUP16(X) X #define DUP8(X) X #define DUP4(X) X @@ -56,8 +46,8 @@ void HELPER(gvec_add8)(void *d, void *a, void *b, uint32_t desc) intptr_t oprsz = simd_oprsz(desc); intptr_t i; - for (i = 0; i < oprsz; i += sizeof(vec8)) { - *(vec8 *)(d + i) = *(vec8 *)(a + i) + *(vec8 *)(b + i); + for (i = 0; i < oprsz; i += sizeof(uint8_t)) { + *(uint8_t *)(d + i) = *(uint8_t *)(a + i) + *(uint8_t *)(b + i); } clear_high(d, oprsz, desc); } @@ -67,8 +57,8 @@ void HELPER(gvec_add16)(void *d, void *a, void *b, uint32_t desc) intptr_t oprsz = simd_oprsz(desc); intptr_t i; - for (i = 0; i < oprsz; i += sizeof(vec16)) { - *(vec16 *)(d + i) = *(vec16 *)(a + i) + *(vec16 *)(b + i); + for (i = 0; i < oprsz; i += sizeof(uint16_t)) { + *(uint16_t *)(d + i) = *(uint16_t *)(a + i) + *(uint16_t *)(b + i); } clear_high(d, oprsz, desc); } @@ -78,8 +68,8 @@ void HELPER(gvec_add32)(void *d, void *a, void *b, uint32_t desc) intptr_t oprsz = simd_oprsz(desc); intptr_t i; - for (i = 0; i < oprsz; i += sizeof(vec32)) { - *(vec32 *)(d + i) = *(vec32 *)(a + i) + *(vec32 *)(b + i); + for (i = 0; i < oprsz; i += sizeof(uint32_t)) { + *(uint32_t *)(d + i) = *(uint32_t *)(a + i) + *(uint32_t *)(b + i); } clear_high(d, oprsz, desc); } @@ -89,8 +79,8 @@ void HELPER(gvec_add64)(void *d, void *a, void *b, uint32_t desc) intptr_t oprsz = simd_oprsz(desc); intptr_t i; - for (i = 0; i < oprsz; i += sizeof(vec64)) { - *(vec64 *)(d + i) = *(vec64 *)(a + i) + *(vec64 *)(b + i); + for (i = 0; i < oprsz; i += sizeof(uint64_t)) { + *(uint64_t *)(d + i) = *(uint64_t *)(a + i) + *(uint64_t *)(b + i); } clear_high(d, oprsz, desc); } @@ -98,11 +88,11 @@ void HELPER(gvec_add64)(void *d, void *a, void *b, uint32_t desc) void HELPER(gvec_adds8)(void *d, void *a, uint64_t b, uint32_t desc) { intptr_t oprsz = simd_oprsz(desc); - vec8 vecb = (vec8)DUP16(b); + uint8_t vecb = (uint8_t)DUP16(b); intptr_t i; - for (i = 0; i < oprsz; i += sizeof(vec8)) { - *(vec8 *)(d + i) = *(vec8 *)(a + i) + vecb; + for (i = 0; i < oprsz; i += sizeof(uint8_t)) { + *(uint8_t *)(d + i) = *(uint8_t *)(a + i) + vecb; } clear_high(d, oprsz, desc); } @@ -110,11 +100,11 @@ void HELPER(gvec_adds8)(void *d, void *a, uint64_t b, uint32_t desc) void HELPER(gvec_adds16)(void *d, void *a, uint64_t b, uint32_t desc) { intptr_t oprsz = simd_oprsz(desc); - vec16 vecb = (vec16)DUP8(b); + uint16_t vecb = (uint16_t)DUP8(b); intptr_t i; - for (i = 0; i < oprsz; i += sizeof(vec16)) { - *(vec16 *)(d + i) = *(vec16 *)(a + i) + vecb; + for (i = 0; i < oprsz; i += sizeof(uint16_t)) { + *(uint16_t *)(d + i) = *(uint16_t *)(a + i) + vecb; } clear_high(d, oprsz, desc); } @@ -122,11 +112,11 @@ void HELPER(gvec_adds16)(void *d, void *a, uint64_t b, uint32_t desc) void HELPER(gvec_adds32)(void *d, void *a, uint64_t b, uint32_t desc) { intptr_t oprsz = simd_oprsz(desc); - vec32 vecb = (vec32)DUP4(b); + uint32_t vecb = (uint32_t)DUP4(b); intptr_t i; - for (i = 0; i < oprsz; i += sizeof(vec32)) { - *(vec32 *)(d + i) = *(vec32 *)(a + i) + vecb; + for (i = 0; i < oprsz; i += sizeof(uint32_t)) { + *(uint32_t *)(d + i) = *(uint32_t *)(a + i) + vecb; } clear_high(d, oprsz, desc); } @@ -134,11 +124,11 @@ void HELPER(gvec_adds32)(void *d, void *a, uint64_t b, uint32_t desc) void HELPER(gvec_adds64)(void *d, void *a, uint64_t b, uint32_t desc) { intptr_t oprsz = simd_oprsz(desc); - vec64 vecb = (vec64)DUP2(b); + uint64_t vecb = (uint64_t)DUP2(b); intptr_t i; - for (i = 0; i < oprsz; i += sizeof(vec64)) { - *(vec64 *)(d + i) = *(vec64 *)(a + i) + vecb; + for (i = 0; i < oprsz; i += sizeof(uint64_t)) { + *(uint64_t *)(d + i) = *(uint64_t *)(a + i) + vecb; } clear_high(d, oprsz, desc); } @@ -148,8 +138,8 @@ void HELPER(gvec_sub8)(void *d, void *a, void *b, uint32_t desc) intptr_t oprsz = simd_oprsz(desc); intptr_t i; - for (i = 0; i < oprsz; i += sizeof(vec8)) { - *(vec8 *)(d + i) = *(vec8 *)(a + i) - *(vec8 *)(b + i); + for (i = 0; i < oprsz; i += sizeof(uint8_t)) { + *(uint8_t *)(d + i) = *(uint8_t *)(a + i) - *(uint8_t *)(b + i); } clear_high(d, oprsz, desc); } @@ -159,8 +149,8 @@ void HELPER(gvec_sub16)(void *d, void *a, void *b, uint32_t desc) intptr_t oprsz = simd_oprsz(desc); intptr_t i; - for (i = 0; i < oprsz; i += sizeof(vec16)) { - *(vec16 *)(d + i) = *(vec16 *)(a + i) - *(vec16 *)(b + i); + for (i = 0; i < oprsz; i += sizeof(uint16_t)) { + *(uint16_t *)(d + i) = *(uint16_t *)(a + i) - *(uint16_t *)(b + i); } clear_high(d, oprsz, desc); } @@ -170,8 +160,8 @@ void HELPER(gvec_sub32)(void *d, void *a, void *b, uint32_t desc) intptr_t oprsz = simd_oprsz(desc); intptr_t i; - for (i = 0; i < oprsz; i += sizeof(vec32)) { - *(vec32 *)(d + i) = *(vec32 *)(a + i) - *(vec32 *)(b + i); + for (i = 0; i < oprsz; i += sizeof(uint32_t)) { + *(uint32_t *)(d + i) = *(uint32_t *)(a + i) - *(uint32_t *)(b + i); } clear_high(d, oprsz, desc); } @@ -181,8 +171,8 @@ void HELPER(gvec_sub64)(void *d, void *a, void *b, uint32_t desc) intptr_t oprsz = simd_oprsz(desc); intptr_t i; - for (i = 0; i < oprsz; i += sizeof(vec64)) { - *(vec64 *)(d + i) = *(vec64 *)(a + i) - *(vec64 *)(b + i); + for (i = 0; i < oprsz; i += sizeof(uint64_t)) { + *(uint64_t *)(d + i) = *(uint64_t *)(a + i) - *(uint64_t *)(b + i); } clear_high(d, oprsz, desc); } @@ -190,11 +180,11 @@ void HELPER(gvec_sub64)(void *d, void *a, void *b, uint32_t desc) void HELPER(gvec_subs8)(void *d, void *a, uint64_t b, uint32_t desc) { intptr_t oprsz = simd_oprsz(desc); - vec8 vecb = (vec8)DUP16(b); + uint8_t vecb = (uint8_t)DUP16(b); intptr_t i; - for (i = 0; i < oprsz; i += sizeof(vec8)) { - *(vec8 *)(d + i) = *(vec8 *)(a + i) - vecb; + for (i = 0; i < oprsz; i += sizeof(uint8_t)) { + *(uint8_t *)(d + i) = *(uint8_t *)(a + i) - vecb; } clear_high(d, oprsz, desc); } @@ -202,11 +192,11 @@ void HELPER(gvec_subs8)(void *d, void *a, uint64_t b, uint32_t desc) void HELPER(gvec_subs16)(void *d, void *a, uint64_t b, uint32_t desc) { intptr_t oprsz = simd_oprsz(desc); - vec16 vecb = (vec16)DUP8(b); + uint16_t vecb = (uint16_t)DUP8(b); intptr_t i; - for (i = 0; i < oprsz; i += sizeof(vec16)) { - *(vec16 *)(d + i) = *(vec16 *)(a + i) - vecb; + for (i = 0; i < oprsz; i += sizeof(uint16_t)) { + *(uint16_t *)(d + i) = *(uint16_t *)(a + i) - vecb; } clear_high(d, oprsz, desc); } @@ -214,11 +204,11 @@ void HELPER(gvec_subs16)(void *d, void *a, uint64_t b, uint32_t desc) void HELPER(gvec_subs32)(void *d, void *a, uint64_t b, uint32_t desc) { intptr_t oprsz = simd_oprsz(desc); - vec32 vecb = (vec32)DUP4(b); + uint32_t vecb = (uint32_t)DUP4(b); intptr_t i; - for (i = 0; i < oprsz; i += sizeof(vec32)) { - *(vec32 *)(d + i) = *(vec32 *)(a + i) - vecb; + for (i = 0; i < oprsz; i += sizeof(uint32_t)) { + *(uint32_t *)(d + i) = *(uint32_t *)(a + i) - vecb; } clear_high(d, oprsz, desc); } @@ -226,11 +216,11 @@ void HELPER(gvec_subs32)(void *d, void *a, uint64_t b, uint32_t desc) void HELPER(gvec_subs64)(void *d, void *a, uint64_t b, uint32_t desc) { intptr_t oprsz = simd_oprsz(desc); - vec64 vecb = (vec64)DUP2(b); + uint64_t vecb = (uint64_t)DUP2(b); intptr_t i; - for (i = 0; i < oprsz; i += sizeof(vec64)) { - *(vec64 *)(d + i) = *(vec64 *)(a + i) - vecb; + for (i = 0; i < oprsz; i += sizeof(uint64_t)) { + *(uint64_t *)(d + i) = *(uint64_t *)(a + i) - vecb; } clear_high(d, oprsz, desc); } @@ -240,8 +230,8 @@ void HELPER(gvec_mul8)(void *d, void *a, void *b, uint32_t desc) intptr_t oprsz = simd_oprsz(desc); intptr_t i; - for (i = 0; i < oprsz; i += sizeof(vec8)) { - *(vec8 *)(d + i) = *(vec8 *)(a + i) * *(vec8 *)(b + i); + for (i = 0; i < oprsz; i += sizeof(uint8_t)) { + *(uint8_t *)(d + i) = *(uint8_t *)(a + i) * *(uint8_t *)(b + i); } clear_high(d, oprsz, desc); } @@ -251,8 +241,8 @@ void HELPER(gvec_mul16)(void *d, void *a, void *b, uint32_t desc) intptr_t oprsz = simd_oprsz(desc); intptr_t i; - for (i = 0; i < oprsz; i += sizeof(vec16)) { - *(vec16 *)(d + i) = *(vec16 *)(a + i) * *(vec16 *)(b + i); + for (i = 0; i < oprsz; i += sizeof(uint16_t)) { + *(uint16_t *)(d + i) = *(uint16_t *)(a + i) * *(uint16_t *)(b + i); } clear_high(d, oprsz, desc); } @@ -262,8 +252,8 @@ void HELPER(gvec_mul32)(void *d, void *a, void *b, uint32_t desc) intptr_t oprsz = simd_oprsz(desc); intptr_t i; - for (i = 0; i < oprsz; i += sizeof(vec32)) { - *(vec32 *)(d + i) = *(vec32 *)(a + i) * *(vec32 *)(b + i); + for (i = 0; i < oprsz; i += sizeof(uint32_t)) { + *(uint32_t *)(d + i) = *(uint32_t *)(a + i) * *(uint32_t *)(b + i); } clear_high(d, oprsz, desc); } @@ -273,8 +263,8 @@ void HELPER(gvec_mul64)(void *d, void *a, void *b, uint32_t desc) intptr_t oprsz = simd_oprsz(desc); intptr_t i; - for (i = 0; i < oprsz; i += sizeof(vec64)) { - *(vec64 *)(d + i) = *(vec64 *)(a + i) * *(vec64 *)(b + i); + for (i = 0; i < oprsz; i += sizeof(uint64_t)) { + *(uint64_t *)(d + i) = *(uint64_t *)(a + i) * *(uint64_t *)(b + i); } clear_high(d, oprsz, desc); } @@ -282,11 +272,11 @@ void HELPER(gvec_mul64)(void *d, void *a, void *b, uint32_t desc) void HELPER(gvec_muls8)(void *d, void *a, uint64_t b, uint32_t desc) { intptr_t oprsz = simd_oprsz(desc); - vec8 vecb = (vec8)DUP16(b); + uint8_t vecb = (uint8_t)DUP16(b); intptr_t i; - for (i = 0; i < oprsz; i += sizeof(vec8)) { - *(vec8 *)(d + i) = *(vec8 *)(a + i) * vecb; + for (i = 0; i < oprsz; i += sizeof(uint8_t)) { + *(uint8_t *)(d + i) = *(uint8_t *)(a + i) * vecb; } clear_high(d, oprsz, desc); } @@ -294,11 +284,11 @@ void HELPER(gvec_muls8)(void *d, void *a, uint64_t b, uint32_t desc) void HELPER(gvec_muls16)(void *d, void *a, uint64_t b, uint32_t desc) { intptr_t oprsz = simd_oprsz(desc); - vec16 vecb = (vec16)DUP8(b); + uint16_t vecb = (uint16_t)DUP8(b); intptr_t i; - for (i = 0; i < oprsz; i += sizeof(vec16)) { - *(vec16 *)(d + i) = *(vec16 *)(a + i) * vecb; + for (i = 0; i < oprsz; i += sizeof(uint16_t)) { + *(uint16_t *)(d + i) = *(uint16_t *)(a + i) * vecb; } clear_high(d, oprsz, desc); } @@ -306,11 +296,11 @@ void HELPER(gvec_muls16)(void *d, void *a, uint64_t b, uint32_t desc) void HELPER(gvec_muls32)(void *d, void *a, uint64_t b, uint32_t desc) { intptr_t oprsz = simd_oprsz(desc); - vec32 vecb = (vec32)DUP4(b); + uint32_t vecb = (uint32_t)DUP4(b); intptr_t i; - for (i = 0; i < oprsz; i += sizeof(vec32)) { - *(vec32 *)(d + i) = *(vec32 *)(a + i) * vecb; + for (i = 0; i < oprsz; i += sizeof(uint32_t)) { + *(uint32_t *)(d + i) = *(uint32_t *)(a + i) * vecb; } clear_high(d, oprsz, desc); } @@ -318,11 +308,11 @@ void HELPER(gvec_muls32)(void *d, void *a, uint64_t b, uint32_t desc) void HELPER(gvec_muls64)(void *d, void *a, uint64_t b, uint32_t desc) { intptr_t oprsz = simd_oprsz(desc); - vec64 vecb = (vec64)DUP2(b); + uint64_t vecb = (uint64_t)DUP2(b); intptr_t i; - for (i = 0; i < oprsz; i += sizeof(vec64)) { - *(vec64 *)(d + i) = *(vec64 *)(a + i) * vecb; + for (i = 0; i < oprsz; i += sizeof(uint64_t)) { + *(uint64_t *)(d + i) = *(uint64_t *)(a + i) * vecb; } clear_high(d, oprsz, desc); } @@ -332,8 +322,8 @@ void HELPER(gvec_neg8)(void *d, void *a, uint32_t desc) intptr_t oprsz = simd_oprsz(desc); intptr_t i; - for (i = 0; i < oprsz; i += sizeof(vec8)) { - *(vec8 *)(d + i) = -*(vec8 *)(a + i); + for (i = 0; i < oprsz; i += sizeof(uint8_t)) { + *(uint8_t *)(d + i) = -*(uint8_t *)(a + i); } clear_high(d, oprsz, desc); } @@ -343,8 +333,8 @@ void HELPER(gvec_neg16)(void *d, void *a, uint32_t desc) intptr_t oprsz = simd_oprsz(desc); intptr_t i; - for (i = 0; i < oprsz; i += sizeof(vec16)) { - *(vec16 *)(d + i) = -*(vec16 *)(a + i); + for (i = 0; i < oprsz; i += sizeof(uint16_t)) { + *(uint16_t *)(d + i) = -*(uint16_t *)(a + i); } clear_high(d, oprsz, desc); } @@ -354,8 +344,8 @@ void HELPER(gvec_neg32)(void *d, void *a, uint32_t desc) intptr_t oprsz = simd_oprsz(desc); intptr_t i; - for (i = 0; i < oprsz; i += sizeof(vec32)) { - *(vec32 *)(d + i) = -*(vec32 *)(a + i); + for (i = 0; i < oprsz; i += sizeof(uint32_t)) { + *(uint32_t *)(d + i) = -*(uint32_t *)(a + i); } clear_high(d, oprsz, desc); } @@ -365,8 +355,8 @@ void HELPER(gvec_neg64)(void *d, void *a, uint32_t desc) intptr_t oprsz = simd_oprsz(desc); intptr_t i; - for (i = 0; i < oprsz; i += sizeof(vec64)) { - *(vec64 *)(d + i) = -*(vec64 *)(a + i); + for (i = 0; i < oprsz; i += sizeof(uint64_t)) { + *(uint64_t *)(d + i) = -*(uint64_t *)(a + i); } clear_high(d, oprsz, desc); } @@ -472,8 +462,8 @@ void HELPER(gvec_not)(void *d, void *a, uint32_t desc) intptr_t oprsz = simd_oprsz(desc); intptr_t i; - for (i = 0; i < oprsz; i += sizeof(vec64)) { - *(vec64 *)(d + i) = ~*(vec64 *)(a + i); + for (i = 0; i < oprsz; i += sizeof(uint64_t)) { + *(uint64_t *)(d + i) = ~*(uint64_t *)(a + i); } clear_high(d, oprsz, desc); } @@ -483,8 +473,8 @@ void HELPER(gvec_and)(void *d, void *a, void *b, uint32_t desc) intptr_t oprsz = simd_oprsz(desc); intptr_t i; - for (i = 0; i < oprsz; i += sizeof(vec64)) { - *(vec64 *)(d + i) = *(vec64 *)(a + i) & *(vec64 *)(b + i); + for (i = 0; i < oprsz; i += sizeof(uint64_t)) { + *(uint64_t *)(d + i) = *(uint64_t *)(a + i) & *(uint64_t *)(b + i); } clear_high(d, oprsz, desc); } @@ -494,8 +484,8 @@ void HELPER(gvec_or)(void *d, void *a, void *b, uint32_t desc) intptr_t oprsz = simd_oprsz(desc); intptr_t i; - for (i = 0; i < oprsz; i += sizeof(vec64)) { - *(vec64 *)(d + i) = *(vec64 *)(a + i) | *(vec64 *)(b + i); + for (i = 0; i < oprsz; i += sizeof(uint64_t)) { + *(uint64_t *)(d + i) = *(uint64_t *)(a + i) | *(uint64_t *)(b + i); } clear_high(d, oprsz, desc); } @@ -505,8 +495,8 @@ void HELPER(gvec_xor)(void *d, void *a, void *b, uint32_t desc) intptr_t oprsz = simd_oprsz(desc); intptr_t i; - for (i = 0; i < oprsz; i += sizeof(vec64)) { - *(vec64 *)(d + i) = *(vec64 *)(a + i) ^ *(vec64 *)(b + i); + for (i = 0; i < oprsz; i += sizeof(uint64_t)) { + *(uint64_t *)(d + i) = *(uint64_t *)(a + i) ^ *(uint64_t *)(b + i); } clear_high(d, oprsz, desc); } @@ -516,8 +506,8 @@ void HELPER(gvec_andc)(void *d, void *a, void *b, uint32_t desc) intptr_t oprsz = simd_oprsz(desc); intptr_t i; - for (i = 0; i < oprsz; i += sizeof(vec64)) { - *(vec64 *)(d + i) = *(vec64 *)(a + i) &~ *(vec64 *)(b + i); + for (i = 0; i < oprsz; i += sizeof(uint64_t)) { + *(uint64_t *)(d + i) = *(uint64_t *)(a + i) &~ *(uint64_t *)(b + i); } clear_high(d, oprsz, desc); } @@ -527,8 +517,8 @@ void HELPER(gvec_orc)(void *d, void *a, void *b, uint32_t desc) intptr_t oprsz = simd_oprsz(desc); intptr_t i; - for (i = 0; i < oprsz; i += sizeof(vec64)) { - *(vec64 *)(d + i) = *(vec64 *)(a + i) |~ *(vec64 *)(b + i); + for (i = 0; i < oprsz; i += sizeof(uint64_t)) { + *(uint64_t *)(d + i) = *(uint64_t *)(a + i) |~ *(uint64_t *)(b + i); } clear_high(d, oprsz, desc); } @@ -538,8 +528,8 @@ void HELPER(gvec_nand)(void *d, void *a, void *b, uint32_t desc) intptr_t oprsz = simd_oprsz(desc); intptr_t i; - for (i = 0; i < oprsz; i += sizeof(vec64)) { - *(vec64 *)(d + i) = ~(*(vec64 *)(a + i) & *(vec64 *)(b + i)); + for (i = 0; i < oprsz; i += sizeof(uint64_t)) { + *(uint64_t *)(d + i) = ~(*(uint64_t *)(a + i) & *(uint64_t *)(b + i)); } clear_high(d, oprsz, desc); } @@ -549,8 +539,8 @@ void HELPER(gvec_nor)(void *d, void *a, void *b, uint32_t desc) intptr_t oprsz = simd_oprsz(desc); intptr_t i; - for (i = 0; i < oprsz; i += sizeof(vec64)) { - *(vec64 *)(d + i) = ~(*(vec64 *)(a + i) | *(vec64 *)(b + i)); + for (i = 0; i < oprsz; i += sizeof(uint64_t)) { + *(uint64_t *)(d + i) = ~(*(uint64_t *)(a + i) | *(uint64_t *)(b + i)); } clear_high(d, oprsz, desc); } @@ -560,8 +550,8 @@ void HELPER(gvec_eqv)(void *d, void *a, void *b, uint32_t desc) intptr_t oprsz = simd_oprsz(desc); intptr_t i; - for (i = 0; i < oprsz; i += sizeof(vec64)) { - *(vec64 *)(d + i) = ~(*(vec64 *)(a + i) ^ *(vec64 *)(b + i)); + for (i = 0; i < oprsz; i += sizeof(uint64_t)) { + *(uint64_t *)(d + i) = ~(*(uint64_t *)(a + i) ^ *(uint64_t *)(b + i)); } clear_high(d, oprsz, desc); } @@ -569,11 +559,11 @@ void HELPER(gvec_eqv)(void *d, void *a, void *b, uint32_t desc) void HELPER(gvec_ands)(void *d, void *a, uint64_t b, uint32_t desc) { intptr_t oprsz = simd_oprsz(desc); - vec64 vecb = (vec64)DUP2(b); + uint64_t vecb = (uint64_t)DUP2(b); intptr_t i; - for (i = 0; i < oprsz; i += sizeof(vec64)) { - *(vec64 *)(d + i) = *(vec64 *)(a + i) & vecb; + for (i = 0; i < oprsz; i += sizeof(uint64_t)) { + *(uint64_t *)(d + i) = *(uint64_t *)(a + i) & vecb; } clear_high(d, oprsz, desc); } @@ -581,11 +571,11 @@ void HELPER(gvec_ands)(void *d, void *a, uint64_t b, uint32_t desc) void HELPER(gvec_xors)(void *d, void *a, uint64_t b, uint32_t desc) { intptr_t oprsz = simd_oprsz(desc); - vec64 vecb = (vec64)DUP2(b); + uint64_t vecb = (uint64_t)DUP2(b); intptr_t i; - for (i = 0; i < oprsz; i += sizeof(vec64)) { - *(vec64 *)(d + i) = *(vec64 *)(a + i) ^ vecb; + for (i = 0; i < oprsz; i += sizeof(uint64_t)) { + *(uint64_t *)(d + i) = *(uint64_t *)(a + i) ^ vecb; } clear_high(d, oprsz, desc); } @@ -593,11 +583,11 @@ void HELPER(gvec_xors)(void *d, void *a, uint64_t b, uint32_t desc) void HELPER(gvec_ors)(void *d, void *a, uint64_t b, uint32_t desc) { intptr_t oprsz = simd_oprsz(desc); - vec64 vecb = (vec64)DUP2(b); + uint64_t vecb = (uint64_t)DUP2(b); intptr_t i; - for (i = 0; i < oprsz; i += sizeof(vec64)) { - *(vec64 *)(d + i) = *(vec64 *)(a + i) | vecb; + for (i = 0; i < oprsz; i += sizeof(uint64_t)) { + *(uint64_t *)(d + i) = *(uint64_t *)(a + i) | vecb; } clear_high(d, oprsz, desc); } @@ -608,8 +598,8 @@ void HELPER(gvec_shl8i)(void *d, void *a, uint32_t desc) int shift = simd_data(desc); intptr_t i; - for (i = 0; i < oprsz; i += sizeof(vec8)) { - *(vec8 *)(d + i) = *(vec8 *)(a + i) << shift; + for (i = 0; i < oprsz; i += sizeof(uint8_t)) { + *(uint8_t *)(d + i) = *(uint8_t *)(a + i) << shift; } clear_high(d, oprsz, desc); } @@ -620,8 +610,8 @@ void HELPER(gvec_shl16i)(void *d, void *a, uint32_t desc) int shift = simd_data(desc); intptr_t i; - for (i = 0; i < oprsz; i += sizeof(vec16)) { - *(vec16 *)(d + i) = *(vec16 *)(a + i) << shift; + for (i = 0; i < oprsz; i += sizeof(uint16_t)) { + *(uint16_t *)(d + i) = *(uint16_t *)(a + i) << shift; } clear_high(d, oprsz, desc); } @@ -632,8 +622,8 @@ void HELPER(gvec_shl32i)(void *d, void *a, uint32_t desc) int shift = simd_data(desc); intptr_t i; - for (i = 0; i < oprsz; i += sizeof(vec32)) { - *(vec32 *)(d + i) = *(vec32 *)(a + i) << shift; + for (i = 0; i < oprsz; i += sizeof(uint32_t)) { + *(uint32_t *)(d + i) = *(uint32_t *)(a + i) << shift; } clear_high(d, oprsz, desc); } @@ -644,8 +634,8 @@ void HELPER(gvec_shl64i)(void *d, void *a, uint32_t desc) int shift = simd_data(desc); intptr_t i; - for (i = 0; i < oprsz; i += sizeof(vec64)) { - *(vec64 *)(d + i) = *(vec64 *)(a + i) << shift; + for (i = 0; i < oprsz; i += sizeof(uint64_t)) { + *(uint64_t *)(d + i) = *(uint64_t *)(a + i) << shift; } clear_high(d, oprsz, desc); } @@ -656,8 +646,8 @@ void HELPER(gvec_shr8i)(void *d, void *a, uint32_t desc) int shift = simd_data(desc); intptr_t i; - for (i = 0; i < oprsz; i += sizeof(vec8)) { - *(vec8 *)(d + i) = *(vec8 *)(a + i) >> shift; + for (i = 0; i < oprsz; i += sizeof(uint8_t)) { + *(uint8_t *)(d + i) = *(uint8_t *)(a + i) >> shift; } clear_high(d, oprsz, desc); } @@ -668,8 +658,8 @@ void HELPER(gvec_shr16i)(void *d, void *a, uint32_t desc) int shift = simd_data(desc); intptr_t i; - for (i = 0; i < oprsz; i += sizeof(vec16)) { - *(vec16 *)(d + i) = *(vec16 *)(a + i) >> shift; + for (i = 0; i < oprsz; i += sizeof(uint16_t)) { + *(uint16_t *)(d + i) = *(uint16_t *)(a + i) >> shift; } clear_high(d, oprsz, desc); } @@ -680,8 +670,8 @@ void HELPER(gvec_shr32i)(void *d, void *a, uint32_t desc) int shift = simd_data(desc); intptr_t i; - for (i = 0; i < oprsz; i += sizeof(vec32)) { - *(vec32 *)(d + i) = *(vec32 *)(a + i) >> shift; + for (i = 0; i < oprsz; i += sizeof(uint32_t)) { + *(uint32_t *)(d + i) = *(uint32_t *)(a + i) >> shift; } clear_high(d, oprsz, desc); } @@ -692,8 +682,8 @@ void HELPER(gvec_shr64i)(void *d, void *a, uint32_t desc) int shift = simd_data(desc); intptr_t i; - for (i = 0; i < oprsz; i += sizeof(vec64)) { - *(vec64 *)(d + i) = *(vec64 *)(a + i) >> shift; + for (i = 0; i < oprsz; i += sizeof(uint64_t)) { + *(uint64_t *)(d + i) = *(uint64_t *)(a + i) >> shift; } clear_high(d, oprsz, desc); } @@ -704,8 +694,8 @@ void HELPER(gvec_sar8i)(void *d, void *a, uint32_t desc) int shift = simd_data(desc); intptr_t i; - for (i = 0; i < oprsz; i += sizeof(vec8)) { - *(svec8 *)(d + i) = *(svec8 *)(a + i) >> shift; + for (i = 0; i < oprsz; i += sizeof(uint8_t)) { + *(int8_t *)(d + i) = *(int8_t *)(a + i) >> shift; } clear_high(d, oprsz, desc); } @@ -716,8 +706,8 @@ void HELPER(gvec_sar16i)(void *d, void *a, uint32_t desc) int shift = simd_data(desc); intptr_t i; - for (i = 0; i < oprsz; i += sizeof(vec16)) { - *(svec16 *)(d + i) = *(svec16 *)(a + i) >> shift; + for (i = 0; i < oprsz; i += sizeof(uint16_t)) { + *(int16_t *)(d + i) = *(int16_t *)(a + i) >> shift; } clear_high(d, oprsz, desc); } @@ -728,8 +718,8 @@ void HELPER(gvec_sar32i)(void *d, void *a, uint32_t desc) int shift = simd_data(desc); intptr_t i; - for (i = 0; i < oprsz; i += sizeof(vec32)) { - *(svec32 *)(d + i) = *(svec32 *)(a + i) >> shift; + for (i = 0; i < oprsz; i += sizeof(uint32_t)) { + *(int32_t *)(d + i) = *(int32_t *)(a + i) >> shift; } clear_high(d, oprsz, desc); } @@ -740,8 +730,8 @@ void HELPER(gvec_sar64i)(void *d, void *a, uint32_t desc) int shift = simd_data(desc); intptr_t i; - for (i = 0; i < oprsz; i += sizeof(vec64)) { - *(svec64 *)(d + i) = *(svec64 *)(a + i) >> shift; + for (i = 0; i < oprsz; i += sizeof(uint64_t)) { + *(int64_t *)(d + i) = *(int64_t *)(a + i) >> shift; } clear_high(d, oprsz, desc); } @@ -904,12 +894,12 @@ void HELPER(NAME)(void *d, void *a, void *b, uint32_t desc) \ } #define DO_CMP2(SZ) \ - DO_CMP1(gvec_eq##SZ, vec##SZ, ==) \ - DO_CMP1(gvec_ne##SZ, vec##SZ, !=) \ - DO_CMP1(gvec_lt##SZ, svec##SZ, <) \ - DO_CMP1(gvec_le##SZ, svec##SZ, <=) \ - DO_CMP1(gvec_ltu##SZ, vec##SZ, <) \ - DO_CMP1(gvec_leu##SZ, vec##SZ, <=) + DO_CMP1(gvec_eq##SZ, uint##SZ##_t, ==) \ + DO_CMP1(gvec_ne##SZ, uint##SZ##_t, !=) \ + DO_CMP1(gvec_lt##SZ, int##SZ##_t, <) \ + DO_CMP1(gvec_le##SZ, int##SZ##_t, <=) \ + DO_CMP1(gvec_ltu##SZ, uint##SZ##_t, <) \ + DO_CMP1(gvec_leu##SZ, uint##SZ##_t, <=) DO_CMP2(8) DO_CMP2(16) @@ -1417,11 +1407,11 @@ void HELPER(gvec_bitsel)(void *d, void *a, void *b, void *c, uint32_t desc) intptr_t oprsz = simd_oprsz(desc); intptr_t i; - for (i = 0; i < oprsz; i += sizeof(vec64)) { - vec64 aa = *(vec64 *)(a + i); - vec64 bb = *(vec64 *)(b + i); - vec64 cc = *(vec64 *)(c + i); - *(vec64 *)(d + i) = (bb & aa) | (cc & ~aa); + for (i = 0; i < oprsz; i += sizeof(uint64_t)) { + uint64_t aa = *(uint64_t *)(a + i); + uint64_t bb = *(uint64_t *)(b + i); + uint64_t cc = *(uint64_t *)(c + i); + *(uint64_t *)(d + i) = (bb & aa) | (cc & ~aa); } clear_high(d, oprsz, desc); } From patchwork Mon Feb 17 02:59:56 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Richard Henderson X-Patchwork-Id: 183573 Delivered-To: patch@linaro.org Received: by 2002:a92:1f12:0:0:0:0:0 with SMTP id i18csp4454928ile; Sun, 16 Feb 2020 19:03:42 -0800 (PST) X-Google-Smtp-Source: APXvYqwxY9VzWVeCtDMWtTdjmsqnPd+8jffXNswRZY6mJ21HrDrUsx/kF8MF7dd4TyvJ5nISPlko X-Received: by 2002:ac8:38e6:: with SMTP id g35mr11784956qtc.120.1581908622406; Sun, 16 Feb 2020 19:03:42 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1581908622; cv=none; d=google.com; s=arc-20160816; b=DdXdfuDzyAMps5y6fzx9yO8JkzRSKlxjQRXtbem7r00b6IjIRa/DIbulpQ5SD224pL ErhVjyn2JRGOfH6Xzh3T1028zBs3328qWz1mzj/qYIeciYLTrH5ufdOzZokUmnTIL5g9 8TfbOiMjd8Jh+xZdE4bsJRoN4QTTjZ/9YxJMg5DQB3/U/K1+2yZlxAvCo/3C33Hr9p44 6epIaWvCPlntxOm9fbrJmncz4wq18FCPLoPU4ykpKThQKyylBRW/q8D6JHK62UZ5pqZ2 yfD2XcjONdLFi/DQg0njsi4YCBKfv9MAl//+Vface7/G7MkR5gG1H6jBA8fFRhGy44sO j8og== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:to:from :dkim-signature; bh=qammuU2FWPQWuEwjhKHMcn2oQH2Te4EPi/n89dl8dB0=; b=HalrrqeovgPK2kYw3LSsyXw9ZH3bUTYJvAOGz9rwmIeak7CgcwjfoZ8Aea4zHgYzWF ctaF93uUzjXo7IQBagaowkYosDDII5DzGE6Mi2A7ofqzXG0tlC69VTaw6dYQrtBABhAM lpKzqvnkKt7WYCUZO09FuiXHWmbLjPeVX5yNLGuXcT2YC0JMFhIk749aF6OPI/eNZj3B gVm18T0/dMbxuYAUMBUqTXuQGPyNuMKZAJMjLNUffogTcLU3T13k5q1jed2b/f5dhrme CUCIt1GsJgoJ3OcX4dtr1KKWXetOXaCPRbsuB0I4T0vrdAkxJwmOI0PV8s8k47BlGLYm v8Hw== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=VdZt+kZU; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. [209.51.188.17]) by mx.google.com with ESMTPS id d12si5692575qvj.178.2020.02.16.19.03.42 for (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Sun, 16 Feb 2020 19:03:42 -0800 (PST) Received-SPF: pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=VdZt+kZU; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from localhost ([::1]:39592 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1j3WhB-0007g6-SS for patch@linaro.org; Sun, 16 Feb 2020 22:03:41 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]:44830) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1j3Wdh-00038Z-Ov for qemu-devel@nongnu.org; Sun, 16 Feb 2020 22:00:07 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1j3Wdg-0003SG-7Z for qemu-devel@nongnu.org; Sun, 16 Feb 2020 22:00:05 -0500 Received: from mail-pl1-x644.google.com ([2607:f8b0:4864:20::644]:42772) by eggs.gnu.org with esmtps (TLS1.0:RSA_AES_128_CBC_SHA1:16) (Exim 4.71) (envelope-from ) id 1j3Wdf-0003RA-W2 for qemu-devel@nongnu.org; Sun, 16 Feb 2020 22:00:04 -0500 Received: by mail-pl1-x644.google.com with SMTP id e8so6111167plt.9 for ; Sun, 16 Feb 2020 19:00:03 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:subject:date:message-id:in-reply-to:references:mime-version :content-transfer-encoding; bh=qammuU2FWPQWuEwjhKHMcn2oQH2Te4EPi/n89dl8dB0=; b=VdZt+kZUoxWVvxjEOnK9PaPmOscEKcNmD6OYD93c/BHk9IjO0I5zPO8BxXGOxRrqBf hrK8p4YD0ucfN/buM4NndsS6oAzgo66JcHC5VDvxtW85d9ZadKqLFWDfoYI2A3mkUZGY p2Fy7COlLA9AWwuMHWQguPh+qBjhUZrqDpOHYxuYHziCXnsAXHoKVctBPmWkP6/y4ZQ9 YDuw74XBsz+iYa/zVmRpCyqUaNwpxHlgW1WyHMytN3PxCvUxKjLTSUc7RnFoPN9cMxd+ KCjFMxmnAGcKFPOMRo8uWd5l/c/LD1cBjGFCdrzh2hAqEpKxDiUEI53gRQsb10cuSURb 8M2w== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=qammuU2FWPQWuEwjhKHMcn2oQH2Te4EPi/n89dl8dB0=; b=GPEattUXzgUpIsBEjJSSWy/z78U5VifvZ4uf2JhCL7y1yQRuv0CnIeS0Fi2gnjGOfF cbWcJZUlUeorxX8HLx3arWa2z9NmmODqfrbdYRNX5DWWSzGspAv1FokMZ1TuvVJU5MFl O3biLWoYmzLz8+HWiNSkjVHAyaxQcYMkEu7FAIz8mfb++IEwbFC7ZSANT5B8w84BcCkA Xv2x/870vTICVSrOpkbQAKKi9U3MVgqtQM55rZepOunTtd3JYeBJxvWzmjHJ8s+HmsWZ ELksiaisdief48syQBGiuiZmcuDp/WLck8NKu32E6cbgU8NN94T4Xfs2zNQakQnZDJGO 37GQ== X-Gm-Message-State: APjAAAUs5RZpBGJJJzJkkCJ3Tb0e/xulNBMGBYHu6N2G0t9AjAo+eT1A b0B8MH58FZDRaMp//ISd5eGeA/L+VxU= X-Received: by 2002:a17:902:760e:: with SMTP id k14mr13448579pll.119.1581908402487; Sun, 16 Feb 2020 19:00:02 -0800 (PST) Received: from localhost.localdomain (97-126-123-70.tukw.qwest.net. [97.126.123.70]) by smtp.gmail.com with ESMTPSA id u2sm14741060pgj.7.2020.02.16.19.00.01 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sun, 16 Feb 2020 19:00:01 -0800 (PST) From: Richard Henderson To: qemu-devel@nongnu.org Subject: [PATCH 3/4] tcg: Tidy tcg-runtime-gvec.c DUP* Date: Sun, 16 Feb 2020 18:59:56 -0800 Message-Id: <20200217025957.12031-4-richard.henderson@linaro.org> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20200217025957.12031-1-richard.henderson@linaro.org> References: <20200217025957.12031-1-richard.henderson@linaro.org> MIME-Version: 1.0 X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2607:f8b0:4864:20::644 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" Partial cleanup from the CONFIG_VECTOR16 removal. Replace the DUP* expansions with the scalar argument. Signed-off-by: Richard Henderson --- accel/tcg/tcg-runtime-gvec.c | 50 +++++++++++------------------------- 1 file changed, 15 insertions(+), 35 deletions(-) -- 2.20.1 Reviewed-by: Philippe Mathieu-Daudé diff --git a/accel/tcg/tcg-runtime-gvec.c b/accel/tcg/tcg-runtime-gvec.c index 97852b515b..f2199f14b4 100644 --- a/accel/tcg/tcg-runtime-gvec.c +++ b/accel/tcg/tcg-runtime-gvec.c @@ -24,11 +24,6 @@ #include "tcg/tcg-gvec-desc.h" -#define DUP16(X) X -#define DUP8(X) X -#define DUP4(X) X -#define DUP2(X) X - static inline void clear_high(void *d, intptr_t oprsz, uint32_t desc) { intptr_t maxsz = simd_maxsz(desc); @@ -88,11 +83,10 @@ void HELPER(gvec_add64)(void *d, void *a, void *b, uint32_t desc) void HELPER(gvec_adds8)(void *d, void *a, uint64_t b, uint32_t desc) { intptr_t oprsz = simd_oprsz(desc); - uint8_t vecb = (uint8_t)DUP16(b); intptr_t i; for (i = 0; i < oprsz; i += sizeof(uint8_t)) { - *(uint8_t *)(d + i) = *(uint8_t *)(a + i) + vecb; + *(uint8_t *)(d + i) = *(uint8_t *)(a + i) + (uint8_t)b; } clear_high(d, oprsz, desc); } @@ -100,11 +94,10 @@ void HELPER(gvec_adds8)(void *d, void *a, uint64_t b, uint32_t desc) void HELPER(gvec_adds16)(void *d, void *a, uint64_t b, uint32_t desc) { intptr_t oprsz = simd_oprsz(desc); - uint16_t vecb = (uint16_t)DUP8(b); intptr_t i; for (i = 0; i < oprsz; i += sizeof(uint16_t)) { - *(uint16_t *)(d + i) = *(uint16_t *)(a + i) + vecb; + *(uint16_t *)(d + i) = *(uint16_t *)(a + i) + (uint16_t)b; } clear_high(d, oprsz, desc); } @@ -112,11 +105,10 @@ void HELPER(gvec_adds16)(void *d, void *a, uint64_t b, uint32_t desc) void HELPER(gvec_adds32)(void *d, void *a, uint64_t b, uint32_t desc) { intptr_t oprsz = simd_oprsz(desc); - uint32_t vecb = (uint32_t)DUP4(b); intptr_t i; for (i = 0; i < oprsz; i += sizeof(uint32_t)) { - *(uint32_t *)(d + i) = *(uint32_t *)(a + i) + vecb; + *(uint32_t *)(d + i) = *(uint32_t *)(a + i) + (uint32_t)b; } clear_high(d, oprsz, desc); } @@ -124,11 +116,10 @@ void HELPER(gvec_adds32)(void *d, void *a, uint64_t b, uint32_t desc) void HELPER(gvec_adds64)(void *d, void *a, uint64_t b, uint32_t desc) { intptr_t oprsz = simd_oprsz(desc); - uint64_t vecb = (uint64_t)DUP2(b); intptr_t i; for (i = 0; i < oprsz; i += sizeof(uint64_t)) { - *(uint64_t *)(d + i) = *(uint64_t *)(a + i) + vecb; + *(uint64_t *)(d + i) = *(uint64_t *)(a + i) + b; } clear_high(d, oprsz, desc); } @@ -180,11 +171,10 @@ void HELPER(gvec_sub64)(void *d, void *a, void *b, uint32_t desc) void HELPER(gvec_subs8)(void *d, void *a, uint64_t b, uint32_t desc) { intptr_t oprsz = simd_oprsz(desc); - uint8_t vecb = (uint8_t)DUP16(b); intptr_t i; for (i = 0; i < oprsz; i += sizeof(uint8_t)) { - *(uint8_t *)(d + i) = *(uint8_t *)(a + i) - vecb; + *(uint8_t *)(d + i) = *(uint8_t *)(a + i) - (uint8_t)b; } clear_high(d, oprsz, desc); } @@ -192,11 +182,10 @@ void HELPER(gvec_subs8)(void *d, void *a, uint64_t b, uint32_t desc) void HELPER(gvec_subs16)(void *d, void *a, uint64_t b, uint32_t desc) { intptr_t oprsz = simd_oprsz(desc); - uint16_t vecb = (uint16_t)DUP8(b); intptr_t i; for (i = 0; i < oprsz; i += sizeof(uint16_t)) { - *(uint16_t *)(d + i) = *(uint16_t *)(a + i) - vecb; + *(uint16_t *)(d + i) = *(uint16_t *)(a + i) - (uint16_t)b; } clear_high(d, oprsz, desc); } @@ -204,11 +193,10 @@ void HELPER(gvec_subs16)(void *d, void *a, uint64_t b, uint32_t desc) void HELPER(gvec_subs32)(void *d, void *a, uint64_t b, uint32_t desc) { intptr_t oprsz = simd_oprsz(desc); - uint32_t vecb = (uint32_t)DUP4(b); intptr_t i; for (i = 0; i < oprsz; i += sizeof(uint32_t)) { - *(uint32_t *)(d + i) = *(uint32_t *)(a + i) - vecb; + *(uint32_t *)(d + i) = *(uint32_t *)(a + i) - (uint32_t)b; } clear_high(d, oprsz, desc); } @@ -216,11 +204,10 @@ void HELPER(gvec_subs32)(void *d, void *a, uint64_t b, uint32_t desc) void HELPER(gvec_subs64)(void *d, void *a, uint64_t b, uint32_t desc) { intptr_t oprsz = simd_oprsz(desc); - uint64_t vecb = (uint64_t)DUP2(b); intptr_t i; for (i = 0; i < oprsz; i += sizeof(uint64_t)) { - *(uint64_t *)(d + i) = *(uint64_t *)(a + i) - vecb; + *(uint64_t *)(d + i) = *(uint64_t *)(a + i) - b; } clear_high(d, oprsz, desc); } @@ -272,11 +259,10 @@ void HELPER(gvec_mul64)(void *d, void *a, void *b, uint32_t desc) void HELPER(gvec_muls8)(void *d, void *a, uint64_t b, uint32_t desc) { intptr_t oprsz = simd_oprsz(desc); - uint8_t vecb = (uint8_t)DUP16(b); intptr_t i; for (i = 0; i < oprsz; i += sizeof(uint8_t)) { - *(uint8_t *)(d + i) = *(uint8_t *)(a + i) * vecb; + *(uint8_t *)(d + i) = *(uint8_t *)(a + i) * (uint8_t)b; } clear_high(d, oprsz, desc); } @@ -284,11 +270,10 @@ void HELPER(gvec_muls8)(void *d, void *a, uint64_t b, uint32_t desc) void HELPER(gvec_muls16)(void *d, void *a, uint64_t b, uint32_t desc) { intptr_t oprsz = simd_oprsz(desc); - uint16_t vecb = (uint16_t)DUP8(b); intptr_t i; for (i = 0; i < oprsz; i += sizeof(uint16_t)) { - *(uint16_t *)(d + i) = *(uint16_t *)(a + i) * vecb; + *(uint16_t *)(d + i) = *(uint16_t *)(a + i) * (uint16_t)b; } clear_high(d, oprsz, desc); } @@ -296,11 +281,10 @@ void HELPER(gvec_muls16)(void *d, void *a, uint64_t b, uint32_t desc) void HELPER(gvec_muls32)(void *d, void *a, uint64_t b, uint32_t desc) { intptr_t oprsz = simd_oprsz(desc); - uint32_t vecb = (uint32_t)DUP4(b); intptr_t i; for (i = 0; i < oprsz; i += sizeof(uint32_t)) { - *(uint32_t *)(d + i) = *(uint32_t *)(a + i) * vecb; + *(uint32_t *)(d + i) = *(uint32_t *)(a + i) * (uint32_t)b; } clear_high(d, oprsz, desc); } @@ -308,11 +292,10 @@ void HELPER(gvec_muls32)(void *d, void *a, uint64_t b, uint32_t desc) void HELPER(gvec_muls64)(void *d, void *a, uint64_t b, uint32_t desc) { intptr_t oprsz = simd_oprsz(desc); - uint64_t vecb = (uint64_t)DUP2(b); intptr_t i; for (i = 0; i < oprsz; i += sizeof(uint64_t)) { - *(uint64_t *)(d + i) = *(uint64_t *)(a + i) * vecb; + *(uint64_t *)(d + i) = *(uint64_t *)(a + i) * b; } clear_high(d, oprsz, desc); } @@ -559,11 +542,10 @@ void HELPER(gvec_eqv)(void *d, void *a, void *b, uint32_t desc) void HELPER(gvec_ands)(void *d, void *a, uint64_t b, uint32_t desc) { intptr_t oprsz = simd_oprsz(desc); - uint64_t vecb = (uint64_t)DUP2(b); intptr_t i; for (i = 0; i < oprsz; i += sizeof(uint64_t)) { - *(uint64_t *)(d + i) = *(uint64_t *)(a + i) & vecb; + *(uint64_t *)(d + i) = *(uint64_t *)(a + i) & b; } clear_high(d, oprsz, desc); } @@ -571,11 +553,10 @@ void HELPER(gvec_ands)(void *d, void *a, uint64_t b, uint32_t desc) void HELPER(gvec_xors)(void *d, void *a, uint64_t b, uint32_t desc) { intptr_t oprsz = simd_oprsz(desc); - uint64_t vecb = (uint64_t)DUP2(b); intptr_t i; for (i = 0; i < oprsz; i += sizeof(uint64_t)) { - *(uint64_t *)(d + i) = *(uint64_t *)(a + i) ^ vecb; + *(uint64_t *)(d + i) = *(uint64_t *)(a + i) ^ b; } clear_high(d, oprsz, desc); } @@ -583,11 +564,10 @@ void HELPER(gvec_xors)(void *d, void *a, uint64_t b, uint32_t desc) void HELPER(gvec_ors)(void *d, void *a, uint64_t b, uint32_t desc) { intptr_t oprsz = simd_oprsz(desc); - uint64_t vecb = (uint64_t)DUP2(b); intptr_t i; for (i = 0; i < oprsz; i += sizeof(uint64_t)) { - *(uint64_t *)(d + i) = *(uint64_t *)(a + i) | vecb; + *(uint64_t *)(d + i) = *(uint64_t *)(a + i) | b; } clear_high(d, oprsz, desc); } From patchwork Mon Feb 17 02:59:57 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Richard Henderson X-Patchwork-Id: 183571 Delivered-To: patch@linaro.org Received: by 2002:a92:1f12:0:0:0:0:0 with SMTP id i18csp4453538ile; Sun, 16 Feb 2020 19:01:47 -0800 (PST) X-Google-Smtp-Source: APXvYqwoQupPNxMmri7SIUArmjkck+uEn8SJRf58ILBmRxA2EKt4YkDaOXOUuRiffAwLn3s5Kqw1 X-Received: by 2002:ae9:eb03:: with SMTP id b3mr12633370qkg.473.1581908507796; Sun, 16 Feb 2020 19:01:47 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1581908507; cv=none; d=google.com; s=arc-20160816; b=W26IURlKEQmr9tWTLS7EyYzu3CUXWuM8mOHGFUX6KpVMK5U2d0kt68YbpEvBko9n13 IccCEH/XfwHMIX8cyrS0SAeatIG3PU6z7fezkTuN7SSGHpCPAoCU8LjXGlU+4aTCTv9T fd5ZHjfBeliFk7AEREKZgdHaA2Qp5jCi3miekwW5wSP9GVvxLcmJjPIcW2eRH8RleuNM bRVrspiHjxoz9nRmq+7778UOQuIbrAU7HgBZ6YZfXwZMu8u9U3J0oBb1PzYGEetvjm9I 7MJo55SEyJ1kvD889iSprpcAx6rZS8Mefa7OTPiOH0VIbH2scFGhI2USLbvsNE3H2FMB JSTg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:to:from :dkim-signature; bh=cjiEN6evoksJ22gJdgVrmGMglErN9l7nWJMK6r0f5rQ=; b=EBQK3URhmTvPAATbMVGAifW1pt+F2Sif32uaUobWE24/VUAh8H5Qva7VXgJW/CS30a NXCWPmKQ1VjOMccWlrg3dLvifqKzixLAsb5QqKRXvu+BAKkkbMXvjLlvIOHumQx9yyzd D5HidPOV2dV6GKghL3L45ZgrH0esydDLaPWCp1aTdqTULxMMYi43VUbQqAWc443sgASN /n93EH2wJ8B/+8eD5YYiZLvfUOwMiJE+clGKdkcCVKiFLnoo1jtg4uTyM0f2CwZ3wGCC i4GdQ7P0Gxkun9V6ZrSWIfkFXQQQZkFdP3TZ+9ApIvbKT7aLqKyqzlj6orH7kSDPV74w j/lA== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=i7i4Q4pZ; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. [209.51.188.17]) by mx.google.com with ESMTPS id y20si5969681qtn.3.2020.02.16.19.01.47 for (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Sun, 16 Feb 2020 19:01:47 -0800 (PST) Received-SPF: pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=i7i4Q4pZ; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from localhost ([::1]:39566 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1j3WfL-0005ws-4C for patch@linaro.org; Sun, 16 Feb 2020 22:01:47 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]:44840) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1j3Wdi-00039e-GP for qemu-devel@nongnu.org; Sun, 16 Feb 2020 22:00:07 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1j3Wdh-0003TN-Af for qemu-devel@nongnu.org; Sun, 16 Feb 2020 22:00:06 -0500 Received: from mail-pf1-x443.google.com ([2607:f8b0:4864:20::443]:41593) by eggs.gnu.org with esmtps (TLS1.0:RSA_AES_128_CBC_SHA1:16) (Exim 4.71) (envelope-from ) id 1j3Wdh-0003SX-4L for qemu-devel@nongnu.org; Sun, 16 Feb 2020 22:00:05 -0500 Received: by mail-pf1-x443.google.com with SMTP id j9so8056577pfa.8 for ; Sun, 16 Feb 2020 19:00:05 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:subject:date:message-id:in-reply-to:references:mime-version :content-transfer-encoding; bh=cjiEN6evoksJ22gJdgVrmGMglErN9l7nWJMK6r0f5rQ=; b=i7i4Q4pZA4H2J35Cy+dVfly48eWVsHZF+Rs8aiG031mgvOOcSKvQz7Wk/LYlH7ITRV uqKSf2zqmdGJNm3K9RClSeBVR+lkV8Aqa8PNHN5ryxpdJhrjutvj6vJ5ESM4Cc2YmO6q +pev00wULzQEqI6Aha04yo6qR9ywfPf0SerxKdLaL4EETeoEQ3RJzb8YAfs0JbPuvzn0 PVBM36DSCRocyGHuYO8EMhWapbQi14kspcVLsr8/9k/zdJc0FORg+hZI5Q2huVyzFMiB JUF15y9bENxdKvLq0DWHhI/Sbp/UdBG7qfzU6xJnwQRSHEi+jYr5z0/AZzpXjxvFQMeQ UeFw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=cjiEN6evoksJ22gJdgVrmGMglErN9l7nWJMK6r0f5rQ=; b=oJKoCkb9ZZvnXwld7+ZTfgN6kROpztw85kWjqnMdgrBjPLyu1KVTYod3ZCsr4q040q 6zBrthLb4E7TvxMM0sw08ivjK5FEIqop6yRFHPHKY6OfnpbK8O4GuQ0jtRh277mDU9Sp 3SwsJMJdQmgYv5zAKGG7IIHE8LXoum2k1fgD/vXaIJehDkF5vx0AGboNmZIoAGHvtDTr +HRwfklrj3JMhYn+iGxaY05Unm2OtyZiIP58bYpYMbHnONfmZuhVmjFPQU0uunHF4Pq+ CGhF0WV8xWQ0TXfCZhsBEImIzDtDxJPKeYd2y/Ma54o9JphcQYZrpS1SQJVV/29jTW6R /lOA== X-Gm-Message-State: APjAAAUEfCYG7JbXvzSYjVVLIcK0qJ6CIPnGlcwEdiVlAbppKfr41oj+ Fa7fuckK7u0Ps9MwC0ZbPm8dOQF1HyQ= X-Received: by 2002:aa7:9aa7:: with SMTP id x7mr14129890pfi.78.1581908403728; Sun, 16 Feb 2020 19:00:03 -0800 (PST) Received: from localhost.localdomain (97-126-123-70.tukw.qwest.net. [97.126.123.70]) by smtp.gmail.com with ESMTPSA id u2sm14741060pgj.7.2020.02.16.19.00.02 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sun, 16 Feb 2020 19:00:02 -0800 (PST) From: Richard Henderson To: qemu-devel@nongnu.org Subject: [PATCH 4/4] tcg: Remove tcg-runtime-gvec.c DO_CMP0 Date: Sun, 16 Feb 2020 18:59:57 -0800 Message-Id: <20200217025957.12031-5-richard.henderson@linaro.org> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20200217025957.12031-1-richard.henderson@linaro.org> References: <20200217025957.12031-1-richard.henderson@linaro.org> MIME-Version: 1.0 X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2607:f8b0:4864:20::443 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" Partial cleanup from the CONFIG_VECTOR16 removal. Replace DO_CMP0 with its scalar expansion, a simple negation. Signed-off-by: Richard Henderson --- accel/tcg/tcg-runtime-gvec.c | 5 +---- 1 file changed, 1 insertion(+), 4 deletions(-) -- 2.20.1 diff --git a/accel/tcg/tcg-runtime-gvec.c b/accel/tcg/tcg-runtime-gvec.c index f2199f14b4..ca449702e6 100644 --- a/accel/tcg/tcg-runtime-gvec.c +++ b/accel/tcg/tcg-runtime-gvec.c @@ -860,15 +860,13 @@ void HELPER(gvec_sar64v)(void *d, void *a, void *b, uint32_t desc) clear_high(d, oprsz, desc); } -#define DO_CMP0(X) -(X) - #define DO_CMP1(NAME, TYPE, OP) \ void HELPER(NAME)(void *d, void *a, void *b, uint32_t desc) \ { \ intptr_t oprsz = simd_oprsz(desc); \ intptr_t i; \ for (i = 0; i < oprsz; i += sizeof(TYPE)) { \ - *(TYPE *)(d + i) = DO_CMP0(*(TYPE *)(a + i) OP *(TYPE *)(b + i)); \ + *(TYPE *)(d + i) = -(*(TYPE *)(a + i) OP *(TYPE *)(b + i)); \ } \ clear_high(d, oprsz, desc); \ } @@ -886,7 +884,6 @@ DO_CMP2(16) DO_CMP2(32) DO_CMP2(64) -#undef DO_CMP0 #undef DO_CMP1 #undef DO_CMP2