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[81.2.115.148]) by smtp.gmail.com with ESMTPSA id f17sm42207068wrm.3.2020.03.09.14.58.21 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 09 Mar 2020 14:58:21 -0700 (PDT) From: Peter Maydell To: qemu-arm@nongnu.org, qemu-devel@nongnu.org Subject: [PATCH 1/5] Makefile: Allow for subdirectories in Sphinx manual dependencies Date: Mon, 9 Mar 2020 21:58:14 +0000 Message-Id: <20200309215818.2021-2-peter.maydell@linaro.org> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20200309215818.2021-1-peter.maydell@linaro.org> References: <20200309215818.2021-1-peter.maydell@linaro.org> MIME-Version: 1.0 X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2a00:1450:4864:20::330 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Niek Linnenbank Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" Currently we put 'docs/foo/*.rst' in the Make list of dependencies for the Sphinx 'foo' manual, which means all the files must be in the top level of that manual's directory. We'd like to be able to have subdirectories inside some of the manuals, so add 'docs/foo/*/*.rst' to the dependencies too. Signed-off-by: Peter Maydell --- Makefile | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) -- 2.20.1 Reviewed-by: Alex Bennée Reviewed-by: Niek Linnenbank Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Richard Henderson diff --git a/Makefile b/Makefile index 2e930688942..5dba949947a 100644 --- a/Makefile +++ b/Makefile @@ -1081,7 +1081,7 @@ sphinxdocs: $(MANUAL_BUILDDIR)/devel/index.html \ # a single doctree: https://github.com/sphinx-doc/sphinx/issues/2946 build-manual = $(call quiet-command,CONFDIR="$(qemu_confdir)" $(SPHINX_BUILD) $(if $(V),,-q) -W -b $2 -D version=$(VERSION) -D release="$(FULL_VERSION)" -d .doctrees/$1-$2 $(SRC_PATH)/docs/$1 $(MANUAL_BUILDDIR)/$1 ,"SPHINX","$(MANUAL_BUILDDIR)/$1") # We assume all RST files in the manual's directory are used in it -manual-deps = $(wildcard $(SRC_PATH)/docs/$1/*.rst) \ +manual-deps = $(wildcard $(SRC_PATH)/docs/$1/*.rst $(SRC_PATH)/docs/$1/*/*.rst) \ $(SRC_PATH)/docs/defs.rst.inc \ $(SRC_PATH)/docs/$1/conf.py $(SRC_PATH)/docs/conf.py # Macro to write out the rule and dependencies for building manpages From patchwork Mon Mar 9 21:58:15 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Peter Maydell X-Patchwork-Id: 184338 Delivered-To: patch@linaro.org Received: by 2002:a92:1f12:0:0:0:0:0 with SMTP id i18csp11098635ile; Mon, 9 Mar 2020 15:00:46 -0700 (PDT) X-Google-Smtp-Source: ADFU+vu6mROPyNewV7ax913IrrEdjIdp2c+d6szOMCxN0eP8afhypQBp2zrRQ4i7FV+tTXm8xqGp X-Received: by 2002:ac8:59:: with SMTP id i25mr16438107qtg.110.1583791245895; Mon, 09 Mar 2020 15:00:45 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1583791245; cv=none; d=google.com; s=arc-20160816; b=E+SwcDMqZabgpKeDwXvUsJB9fZmc79VuuIssBT20AROsoWyVwS+Kzx0vVUV3QBmq0v a0oa6BCXeH93YZ3Nmfgy8KT6R3dHtmKapdLF+A536a83r0HJ+iXou3zzCvPGkIyAf1AG cOKaFx5Q+yFdtFiI7eS8ew7xhqgcy/j6Fq0W1JEIU6wYPSmr5oN8S/4pcvBJDYA41c6R Oov89WCQ86F3hbar89gb4hbOesoEC7XGuefK6hVbzawz88sLQt0+UwIMgAWGO03pX3gA /XFJ6D51jNFZrj6RsrOdRzuNSC3fpAlcLoXYEUiNCY4yAWW6QgfbSs+BqT3FD4n80K3I txyg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:cc:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:to:from :dkim-signature; bh=+vjVmnqPRp7rL/1/5NOoN6gdhvO2Xo8IvhqKhP4WSw8=; b=ml3NC6K5zkXa8Er5XXGwRLyzn1dX7DTxJ79y8vV28wPtA0wfnkGGpbGY2Q5iSXuEc/ FXtpBIu150Qq33LYvoCKLt+NNbp+KfK+KbcpzdnCLw3RjzuGiAFGnyR14ms8nka38QuE o2RMVKObsIyU5HEnbWvxwFSxH/VUzW4RQUkakdhzgXK6oL1szx2CVGixEARDoCdxpykh YXm9zGBQ5bsvEIRuQEs9u7kBywhk2IAdRyJuUm1vQ1NAlMSlC2f2TQZ+VRzSZObsnej4 /JGU+G1IAehdOsgjKQOXD+WZn1brHBaAdXPg/UEeyDofQy4oCBFstLqKG3mK/ASBrrXR C1Jw== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b="My/OwpMu"; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. 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[81.2.115.148]) by smtp.gmail.com with ESMTPSA id f17sm42207068wrm.3.2020.03.09.14.58.22 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 09 Mar 2020 14:58:23 -0700 (PDT) From: Peter Maydell To: qemu-arm@nongnu.org, qemu-devel@nongnu.org Subject: [PATCH 2/5] docs/system: Split target-arm.rst into sub-documents Date: Mon, 9 Mar 2020 21:58:15 +0000 Message-Id: <20200309215818.2021-3-peter.maydell@linaro.org> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20200309215818.2021-1-peter.maydell@linaro.org> References: <20200309215818.2021-1-peter.maydell@linaro.org> MIME-Version: 1.0 X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2a00:1450:4864:20::42c X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Niek Linnenbank Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" Currently the documentation for Arm system emulator targets is in a single target-arm.rst. This describes only some of the boards and often in a fairly abbreviated fashion. Restructure it so that each board has its own documentation file in the docs/system/arm/ subdirectory. This will hopefully encourage us to write board documentation that describes the board in detail, rather than a few brief paragraphs in a single long page. The table of contents should also help users to find the board they care about faster. Once the structure is in place we'll be able to move microvm.rst from the top-level docs/ directory. All the text from the old page is retained, except for the final paragraph ("A Linux 2.6 test image is available on the QEMU web site. More information is available in the QEMU mailing-list archive."), which is deleted. The git history shows this was originally added in reference to the integratorcp board (at that time the only Arm board that was supported), and has subsequently gradually been further and further separated from the integratorcp documentation by the insertion of other board documentation sections. It's extremely out of date and no longer accurate, since AFAICT there isn't an integratorcp kernel on the website any more; so better deleted than retained. Signed-off-by: Peter Maydell --- A subsequent patch will add some text that at least gestures in the direction of some of the more obvious missing info, eg 64-bit boards. --- MAINTAINERS | 9 ++ docs/system/arm/integratorcp.rst | 16 +++ docs/system/arm/musicpal.rst | 19 +++ docs/system/arm/nseries.rst | 33 +++++ docs/system/arm/palm.rst | 23 ++++ docs/system/arm/realview.rst | 34 +++++ docs/system/arm/stellaris.rst | 26 ++++ docs/system/arm/sx1.rst | 18 +++ docs/system/arm/versatile.rst | 29 ++++ docs/system/arm/xscale.rst | 29 ++++ docs/system/target-arm.rst | 225 ++----------------------------- 11 files changed, 249 insertions(+), 212 deletions(-) create mode 100644 docs/system/arm/integratorcp.rst create mode 100644 docs/system/arm/musicpal.rst create mode 100644 docs/system/arm/nseries.rst create mode 100644 docs/system/arm/palm.rst create mode 100644 docs/system/arm/realview.rst create mode 100644 docs/system/arm/stellaris.rst create mode 100644 docs/system/arm/sx1.rst create mode 100644 docs/system/arm/versatile.rst create mode 100644 docs/system/arm/xscale.rst -- 2.20.1 Reviewed-by: Alex Bennée Reviewed-by: Niek Linnenbank Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
diff --git a/MAINTAINERS b/MAINTAINERS index 36d0c6887a9..31a1b423df1 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -155,6 +155,7 @@ F: include/hw/cpu/a*mpcore.h F: disas/arm.c F: disas/arm-a64.cc F: disas/libvixl/ +F: docs/system/target-arm.rst ARM SMMU M: Eric Auger @@ -615,6 +616,7 @@ F: hw/arm/integratorcp.c F: hw/misc/arm_integrator_debug.c F: include/hw/misc/arm_integrator_debug.h F: tests/acceptance/machine_arm_integratorcp.py +F: docs/system/arm/integratorcp.rst MCIMX6UL EVK / i.MX6ul M: Peter Maydell @@ -673,6 +675,7 @@ M: Peter Maydell L: qemu-arm@nongnu.org S: Odd Fixes F: hw/arm/musicpal.c +F: docs/system/arm/musicpal.rst nSeries M: Andrzej Zaborowski @@ -689,6 +692,7 @@ F: include/hw/display/blizzard.h F: include/hw/input/tsc2xxx.h F: include/hw/misc/cbus.h F: tests/acceptance/machine_arm_n8x0.py +F: docs/system/arm/nseries.rst Palm M: Andrzej Zaborowski @@ -698,6 +702,7 @@ S: Odd Fixes F: hw/arm/palm.c F: hw/input/tsc210x.c F: include/hw/input/tsc2xxx.h +F: docs/system/arm/palm.rst Raspberry Pi M: Peter Maydell @@ -719,6 +724,7 @@ F: hw/arm/realview* F: hw/cpu/realview_mpcore.c F: hw/intc/realview_gic.c F: include/hw/intc/realview_gic.h +F: docs/system/arm/realview.rst PXA2XX M: Andrzej Zaborowski @@ -738,6 +744,7 @@ F: hw/misc/max111x.c F: include/hw/arm/pxa.h F: include/hw/arm/sharpsl.h F: include/hw/display/tc6393xb.h +F: docs/system/arm/xscale.rst SABRELITE / i.MX6 M: Peter Maydell @@ -773,6 +780,7 @@ L: qemu-arm@nongnu.org S: Maintained F: hw/*/stellaris* F: include/hw/input/gamepad.h +F: docs/system/arm/stellaris.rst Versatile Express M: Peter Maydell @@ -786,6 +794,7 @@ L: qemu-arm@nongnu.org S: Maintained F: hw/*/versatile* F: hw/misc/arm_sysctl.c +F: docs/system/arm/versatile.rst Virt M: Peter Maydell diff --git a/docs/system/arm/integratorcp.rst b/docs/system/arm/integratorcp.rst new file mode 100644 index 00000000000..3232b43a08b --- /dev/null +++ b/docs/system/arm/integratorcp.rst @@ -0,0 +1,16 @@ +Integrator/CP (``integratorcp``) +================================ + +The ARM Integrator/CP board is emulated with the following devices: + +- ARM926E, ARM1026E, ARM946E, ARM1136 or Cortex-A8 CPU + +- Two PL011 UARTs + +- SMC 91c111 Ethernet adapter + +- PL110 LCD controller + +- PL050 KMI with PS/2 keyboard and mouse. + +- PL181 MultiMedia Card Interface with SD card. diff --git a/docs/system/arm/musicpal.rst b/docs/system/arm/musicpal.rst new file mode 100644 index 00000000000..35c22212486 --- /dev/null +++ b/docs/system/arm/musicpal.rst @@ -0,0 +1,19 @@ +Freecom MusicPal (``musicpal``) +=============================== + +The Freecom MusicPal internet radio emulation includes the following +elements: + +- Marvell MV88W8618 ARM core. + +- 32 MB RAM, 256 KB SRAM, 8 MB flash. + +- Up to 2 16550 UARTs + +- MV88W8xx8 Ethernet controller + +- MV88W8618 audio controller, WM8750 CODEC and mixer + +- 128x64 display with brightness control + +- 2 buttons, 2 navigation wheels with button function diff --git a/docs/system/arm/nseries.rst b/docs/system/arm/nseries.rst new file mode 100644 index 00000000000..b000b6d13bb --- /dev/null +++ b/docs/system/arm/nseries.rst @@ -0,0 +1,33 @@ +Nokia N800 and N810 tablets (``n800``, ``n810``) +================================================ + +Nokia N800 and N810 internet tablets (known also as RX-34 and RX-44 / +48) emulation supports the following elements: + +- Texas Instruments OMAP2420 System-on-chip (ARM 1136 core) + +- RAM and non-volatile OneNAND Flash memories + +- Display connected to EPSON remote framebuffer chip and OMAP on-chip + display controller and a LS041y3 MIPI DBI-C controller + +- TI TSC2301 (in N800) and TI TSC2005 (in N810) touchscreen + controllers driven through SPI bus + +- National Semiconductor LM8323-controlled qwerty keyboard driven + through |I2C| bus + +- Secure Digital card connected to OMAP MMC/SD host + +- Three OMAP on-chip UARTs and on-chip STI debugging console + +- Mentor Graphics \"Inventra\" dual-role USB controller embedded in a + TI TUSB6010 chip - only USB host mode is supported + +- TI TMP105 temperature sensor driven through |I2C| bus + +- TI TWL92230C power management companion with an RTC on + |I2C| bus + +- Nokia RETU and TAHVO multi-purpose chips with an RTC, connected + through CBUS diff --git a/docs/system/arm/palm.rst b/docs/system/arm/palm.rst new file mode 100644 index 00000000000..0eabf63e0e7 --- /dev/null +++ b/docs/system/arm/palm.rst @@ -0,0 +1,23 @@ +Palm Tungsten|E PDA (``cheetah``) +================================= + +The Palm Tungsten|E PDA (codename \"Cheetah\") emulation includes the +following elements: + +- Texas Instruments OMAP310 System-on-chip (ARM 925T core) + +- ROM and RAM memories (ROM firmware image can be loaded with + -option-rom) + +- On-chip LCD controller + +- On-chip Real Time Clock + +- TI TSC2102i touchscreen controller / analog-digital converter / + Audio CODEC, connected through MicroWire and |I2S| busses + +- GPIO-connected matrix keypad + +- Secure Digital card connected to OMAP MMC/SD host + +- Three on-chip UARTs diff --git a/docs/system/arm/realview.rst b/docs/system/arm/realview.rst new file mode 100644 index 00000000000..8e08eb5da16 --- /dev/null +++ b/docs/system/arm/realview.rst @@ -0,0 +1,34 @@ +Arm Realview boards (``realview-eb``, ``realview-eb-mpcore``, ``realview-pb-a8``, ``realview-pbx-a9``) +====================================================================================================== + +Several variants of the ARM RealView baseboard are emulated, including +the EB, PB-A8 and PBX-A9. Due to interactions with the bootloader, only +certain Linux kernel configurations work out of the box on these boards. + +Kernels for the PB-A8 board should have CONFIG_REALVIEW_HIGH_PHYS_OFFSET +enabled in the kernel, and expect 512M RAM. Kernels for The PBX-A9 board +should have CONFIG_SPARSEMEM enabled, CONFIG_REALVIEW_HIGH_PHYS_OFFSET +disabled and expect 1024M RAM. + +The following devices are emulated: + +- ARM926E, ARM1136, ARM11MPCore, Cortex-A8 or Cortex-A9 MPCore CPU + +- ARM AMBA Generic/Distributed Interrupt Controller + +- Four PL011 UARTs + +- SMC 91c111 or SMSC LAN9118 Ethernet adapter + +- PL110 LCD controller + +- PL050 KMI with PS/2 keyboard and mouse + +- PCI host bridge + +- PCI OHCI USB controller + +- LSI53C895A PCI SCSI Host Bus Adapter with hard disk and CD-ROM + devices + +- PL181 MultiMedia Card Interface with SD card. diff --git a/docs/system/arm/stellaris.rst b/docs/system/arm/stellaris.rst new file mode 100644 index 00000000000..8af4ad79c79 --- /dev/null +++ b/docs/system/arm/stellaris.rst @@ -0,0 +1,26 @@ +Stellaris boards (``lm3s6965evb``, ``lm3s811evb``) +================================================== + +The Luminary Micro Stellaris LM3S811EVB emulation includes the following +devices: + +- Cortex-M3 CPU core. + +- 64k Flash and 8k SRAM. + +- Timers, UARTs, ADC and |I2C| interface. + +- OSRAM Pictiva 96x16 OLED with SSD0303 controller on + |I2C| bus. + +The Luminary Micro Stellaris LM3S6965EVB emulation includes the +following devices: + +- Cortex-M3 CPU core. + +- 256k Flash and 64k SRAM. + +- Timers, UARTs, ADC, |I2C| and SSI interfaces. + +- OSRAM Pictiva 128x64 OLED with SSD0323 controller connected via + SSI. diff --git a/docs/system/arm/sx1.rst b/docs/system/arm/sx1.rst new file mode 100644 index 00000000000..321993bc098 --- /dev/null +++ b/docs/system/arm/sx1.rst @@ -0,0 +1,18 @@ +Siemens SX1 (``sx1``, ``sx1-v1``) +================================= + +The Siemens SX1 models v1 and v2 (default) basic emulation. The +emulation includes the following elements: + +- Texas Instruments OMAP310 System-on-chip (ARM 925T core) + +- ROM and RAM memories (ROM firmware image can be loaded with + -pflash) V1 1 Flash of 16MB and 1 Flash of 8MB V2 1 Flash of 32MB + +- On-chip LCD controller + +- On-chip Real Time Clock + +- Secure Digital card connected to OMAP MMC/SD host + +- Three on-chip UARTs diff --git a/docs/system/arm/versatile.rst b/docs/system/arm/versatile.rst new file mode 100644 index 00000000000..48b6ca0a020 --- /dev/null +++ b/docs/system/arm/versatile.rst @@ -0,0 +1,29 @@ +Arm Versatile boards (``versatileab``, ``versatilepb``) +======================================================= + +The ARM Versatile baseboard is emulated with the following devices: + +- ARM926E, ARM1136 or Cortex-A8 CPU + +- PL190 Vectored Interrupt Controller + +- Four PL011 UARTs + +- SMC 91c111 Ethernet adapter + +- PL110 LCD controller + +- PL050 KMI with PS/2 keyboard and mouse. + +- PCI host bridge. Note the emulated PCI bridge only provides access + to PCI memory space. It does not provide access to PCI IO space. This + means some devices (eg. ne2k_pci NIC) are not usable, and others (eg. + rtl8139 NIC) are only usable when the guest drivers use the memory + mapped control registers. + +- PCI OHCI USB controller. + +- LSI53C895A PCI SCSI Host Bus Adapter with hard disk and CD-ROM + devices. + +- PL181 MultiMedia Card Interface with SD card. diff --git a/docs/system/arm/xscale.rst b/docs/system/arm/xscale.rst new file mode 100644 index 00000000000..19da2eff352 --- /dev/null +++ b/docs/system/arm/xscale.rst @@ -0,0 +1,29 @@ +Sharp XScale-based PDA models (``akita``, ``borzoi``, ``spitz``, ``terrier``) +============================================================================= + +The XScale-based clamshell PDA models (\"Spitz\", \"Akita\", \"Borzoi\" +and \"Terrier\") emulation includes the following peripherals: + +- Intel PXA270 System-on-chip (ARM V5TE core) + +- NAND Flash memory + +- IBM/Hitachi DSCM microdrive in a PXA PCMCIA slot - not in \"Akita\" + +- On-chip OHCI USB controller + +- On-chip LCD controller + +- On-chip Real Time Clock + +- TI ADS7846 touchscreen controller on SSP bus + +- Maxim MAX1111 analog-digital converter on |I2C| bus + +- GPIO-connected keyboard controller and LEDs + +- Secure Digital card connected to PXA MMC/SD host + +- Three on-chip UARTs + +- WM8750 audio CODEC on |I2C| and |I2S| busses diff --git a/docs/system/target-arm.rst b/docs/system/target-arm.rst index d2a3b44ce88..c7df6fc1f97 100644 --- a/docs/system/target-arm.rst +++ b/docs/system/target-arm.rst @@ -3,215 +3,16 @@ ARM System emulator ------------------- -Use the executable ``qemu-system-arm`` to simulate a ARM machine. The -ARM Integrator/CP board is emulated with the following devices: - -- ARM926E, ARM1026E, ARM946E, ARM1136 or Cortex-A8 CPU - -- Two PL011 UARTs - -- SMC 91c111 Ethernet adapter - -- PL110 LCD controller - -- PL050 KMI with PS/2 keyboard and mouse. - -- PL181 MultiMedia Card Interface with SD card. - -The ARM Versatile baseboard is emulated with the following devices: - -- ARM926E, ARM1136 or Cortex-A8 CPU - -- PL190 Vectored Interrupt Controller - -- Four PL011 UARTs - -- SMC 91c111 Ethernet adapter - -- PL110 LCD controller - -- PL050 KMI with PS/2 keyboard and mouse. - -- PCI host bridge. Note the emulated PCI bridge only provides access - to PCI memory space. It does not provide access to PCI IO space. This - means some devices (eg. ne2k_pci NIC) are not usable, and others (eg. - rtl8139 NIC) are only usable when the guest drivers use the memory - mapped control registers. - -- PCI OHCI USB controller. - -- LSI53C895A PCI SCSI Host Bus Adapter with hard disk and CD-ROM - devices. - -- PL181 MultiMedia Card Interface with SD card. - -Several variants of the ARM RealView baseboard are emulated, including -the EB, PB-A8 and PBX-A9. Due to interactions with the bootloader, only -certain Linux kernel configurations work out of the box on these boards. - -Kernels for the PB-A8 board should have CONFIG_REALVIEW_HIGH_PHYS_OFFSET -enabled in the kernel, and expect 512M RAM. Kernels for The PBX-A9 board -should have CONFIG_SPARSEMEM enabled, CONFIG_REALVIEW_HIGH_PHYS_OFFSET -disabled and expect 1024M RAM. - -The following devices are emulated: - -- ARM926E, ARM1136, ARM11MPCore, Cortex-A8 or Cortex-A9 MPCore CPU - -- ARM AMBA Generic/Distributed Interrupt Controller - -- Four PL011 UARTs - -- SMC 91c111 or SMSC LAN9118 Ethernet adapter - -- PL110 LCD controller - -- PL050 KMI with PS/2 keyboard and mouse - -- PCI host bridge - -- PCI OHCI USB controller - -- LSI53C895A PCI SCSI Host Bus Adapter with hard disk and CD-ROM - devices - -- PL181 MultiMedia Card Interface with SD card. - -The XScale-based clamshell PDA models (\"Spitz\", \"Akita\", \"Borzoi\" -and \"Terrier\") emulation includes the following peripherals: - -- Intel PXA270 System-on-chip (ARM V5TE core) - -- NAND Flash memory - -- IBM/Hitachi DSCM microdrive in a PXA PCMCIA slot - not in \"Akita\" - -- On-chip OHCI USB controller - -- On-chip LCD controller - -- On-chip Real Time Clock - -- TI ADS7846 touchscreen controller on SSP bus - -- Maxim MAX1111 analog-digital converter on |I2C| bus - -- GPIO-connected keyboard controller and LEDs - -- Secure Digital card connected to PXA MMC/SD host - -- Three on-chip UARTs - -- WM8750 audio CODEC on |I2C| and |I2S| busses - -The Palm Tungsten|E PDA (codename \"Cheetah\") emulation includes the -following elements: - -- Texas Instruments OMAP310 System-on-chip (ARM 925T core) - -- ROM and RAM memories (ROM firmware image can be loaded with - -option-rom) - -- On-chip LCD controller - -- On-chip Real Time Clock - -- TI TSC2102i touchscreen controller / analog-digital converter / - Audio CODEC, connected through MicroWire and |I2S| busses - -- GPIO-connected matrix keypad - -- Secure Digital card connected to OMAP MMC/SD host - -- Three on-chip UARTs - -Nokia N800 and N810 internet tablets (known also as RX-34 and RX-44 / -48) emulation supports the following elements: - -- Texas Instruments OMAP2420 System-on-chip (ARM 1136 core) - -- RAM and non-volatile OneNAND Flash memories - -- Display connected to EPSON remote framebuffer chip and OMAP on-chip - display controller and a LS041y3 MIPI DBI-C controller - -- TI TSC2301 (in N800) and TI TSC2005 (in N810) touchscreen - controllers driven through SPI bus - -- National Semiconductor LM8323-controlled qwerty keyboard driven - through |I2C| bus - -- Secure Digital card connected to OMAP MMC/SD host - -- Three OMAP on-chip UARTs and on-chip STI debugging console - -- Mentor Graphics \"Inventra\" dual-role USB controller embedded in a - TI TUSB6010 chip - only USB host mode is supported - -- TI TMP105 temperature sensor driven through |I2C| bus - -- TI TWL92230C power management companion with an RTC on - |I2C| bus - -- Nokia RETU and TAHVO multi-purpose chips with an RTC, connected - through CBUS - -The Luminary Micro Stellaris LM3S811EVB emulation includes the following -devices: - -- Cortex-M3 CPU core. - -- 64k Flash and 8k SRAM. - -- Timers, UARTs, ADC and |I2C| interface. - -- OSRAM Pictiva 96x16 OLED with SSD0303 controller on - |I2C| bus. - -The Luminary Micro Stellaris LM3S6965EVB emulation includes the -following devices: - -- Cortex-M3 CPU core. - -- 256k Flash and 64k SRAM. - -- Timers, UARTs, ADC, |I2C| and SSI interfaces. - -- OSRAM Pictiva 128x64 OLED with SSD0323 controller connected via - SSI. - -The Freecom MusicPal internet radio emulation includes the following -elements: - -- Marvell MV88W8618 ARM core. - -- 32 MB RAM, 256 KB SRAM, 8 MB flash. - -- Up to 2 16550 UARTs - -- MV88W8xx8 Ethernet controller - -- MV88W8618 audio controller, WM8750 CODEC and mixer - -- 128x64 display with brightness control - -- 2 buttons, 2 navigation wheels with button function - -The Siemens SX1 models v1 and v2 (default) basic emulation. The -emulation includes the following elements: - -- Texas Instruments OMAP310 System-on-chip (ARM 925T core) - -- ROM and RAM memories (ROM firmware image can be loaded with - -pflash) V1 1 Flash of 16MB and 1 Flash of 8MB V2 1 Flash of 32MB - -- On-chip LCD controller - -- On-chip Real Time Clock - -- Secure Digital card connected to OMAP MMC/SD host - -- Three on-chip UARTs - -A Linux 2.6 test image is available on the QEMU web site. More -information is available in the QEMU mailing-list archive. +Use the executable ``qemu-system-arm`` to simulate a ARM machine. + +.. toctree:: + + arm/integratorcp + arm/versatile + arm/realview + arm/xscale + arm/palm + arm/nseries + arm/stellaris + arm/musicpal + arm/sx1 From patchwork Mon Mar 9 21:58:16 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Peter Maydell X-Patchwork-Id: 184337 Delivered-To: patch@linaro.org Received: by 2002:a92:1f12:0:0:0:0:0 with SMTP id i18csp11098296ile; Mon, 9 Mar 2020 15:00:26 -0700 (PDT) X-Google-Smtp-Source: ADFU+vuci0swQsqgB7vNva2Niox6OrU8CVaC7Mmtd/UmK0mnXMV1Vo1S68ImILlldehv8G6RujCD X-Received: by 2002:ac8:6756:: with SMTP id n22mr10205706qtp.312.1583791225878; Mon, 09 Mar 2020 15:00:25 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1583791225; cv=none; d=google.com; s=arc-20160816; b=AxpOp6j3xKiZclBtmhXv8WonRQFyeRGUG702uPQQ5QWB1glkp14+knrgZ4D6JvVgW8 efwCsY7e16nNfp+nVONFKrTz0hrkhC9/l9x6/XlB/SyprR9JnR1TzRPAn+FnkFkLC7sx ZtC7gHSS83ATFh2KF4HepMY/k7kAj60aCS7l2Tg4S4XtUdbV97dXaifomBP2vNBQDIvM YqBjxvwIPrF2wux3uBkbNF3xljLn7MhefdAr8WSTQnR5UjSdk42CL1gioHB+Ae0LqqO+ c7Wtv7MVGXuJiFTmwRJVFAwl9OYYdIzIWkFZtEPPbSyfguw2vAG/pQYWAWNt5M0cfiYx raMA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:cc:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:to:from :dkim-signature; bh=KVtpWgIwwzMF83+VNcjr1nSyeeNlCy4J0V0Nywm5kyY=; b=kek8hmv+oc5L7SycaOEk1eehaZhb+HgtGR+zmA+dsgGTlB9yrRA6SiNf7k5VWQpN12 JMZnqPOsgHRdsVR6YI0MUibmtpLqEhCK/hTI3CmO5V3M8bs+wPY6for9y8l1eE/twpj1 eZv+0aoo4QlCEbBYpAp4gBwtfPKzlY4iLFteHC0gv1SkYbdU9mLHMcRrFGLQieD4EGCj PQtF1cTAhAU4A1RjVlFKDryXzgLLavLws3gKd4Wi1I5ZM/DJDZrrxG+DxY6XhxbcIvod z9W2Uv8f3opH9IZ1Y7w13ikPeFQIG6CFWoM5VLhaf3IwyMcNwrheRT4XvjMtYeA9+8gO K0HA== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=dH1SrzP4; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. 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[81.2.115.148]) by smtp.gmail.com with ESMTPSA id f17sm42207068wrm.3.2020.03.09.14.58.23 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 09 Mar 2020 14:58:24 -0700 (PDT) From: Peter Maydell To: qemu-arm@nongnu.org, qemu-devel@nongnu.org Subject: [PATCH 3/5] docs/system/target-arm.rst: Add some introductory text Date: Mon, 9 Mar 2020 21:58:16 +0000 Message-Id: <20200309215818.2021-4-peter.maydell@linaro.org> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20200309215818.2021-1-peter.maydell@linaro.org> References: <20200309215818.2021-1-peter.maydell@linaro.org> MIME-Version: 1.0 X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2a00:1450:4864:20::444 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Niek Linnenbank Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" Now we've moved the various bits of per-board documentation into their own files, the top level document is a little bare. Add some introductory information, including a note that many of the board models we support are currently undocumented. (Most sections of this new text were originally written by me for the wiki page https://wiki.qemu.org/Documentation/Platforms/ARM) Signed-off-by: Peter Maydell --- --- docs/system/target-arm.rst | 66 ++++++++++++++++++++++++++++++++++++-- 1 file changed, 64 insertions(+), 2 deletions(-) -- 2.20.1 Reviewed-by: Alex Bennée Reviewed-by: Niek Linnenbank Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
diff --git a/docs/system/target-arm.rst b/docs/system/target-arm.rst index c7df6fc1f97..86ea6f2f568 100644 --- a/docs/system/target-arm.rst +++ b/docs/system/target-arm.rst @@ -1,9 +1,71 @@ .. _ARM-System-emulator: -ARM System emulator +Arm System emulator ------------------- -Use the executable ``qemu-system-arm`` to simulate a ARM machine. +QEMU can emulate both 32-bit and 64-bit Arm CPUs. Use the +``qemu-system-aarch64`` executable to simulate a 64-bit Arm machine. +You can use either ``qemu-system-arm`` or ``qemu-system-aarch64`` +to simulate a 32-bit Arm machine: in general, command lines that +work for ``qemu-system-arm`` will behave the same when used with +``qemu-system-aarch64``. + +QEMU has generally good support for Arm guests. It has support for +nearly fifty different machines. The reason we support so many is that +Arm hardware is much more widely varying than x86 hardware. Arm CPUs +are generally built into "system-on-chip" (SoC) designs created by +many different companies with different devices, and these SoCs are +then built into machines which can vary still further even if they use +the same SoC. Even with fifty boards QEMU does not cover more than a +small fraction of the Arm hardware ecosystem. + +The situation for 64-bit Arm is fairly similar, except that we don't +implement so many different machines. + +As well as the more common "A-profile" CPUs (which have MMUs and will +run Linux) QEMU also supports "M-profile" CPUs such as the Cortex-M0, +Cortex-M4 and Cortex-M33 (which are microcontrollers used in very +embedded boards). For most boards the CPU type is fixed (matching what +the hardware has), so typically you don't need to specify the CPU type +by hand, except for special cases like the ``virt`` board. + +Choosing a board model +====================== + +For QEMU's Arm system emulation, you must specify which board +model you want to use with the ``-M`` or ``--machine`` option; +there is no default. + +Because Arm systems differ so much and in fundamental ways, typically +operating system or firmware images intended to run on one machine +will not run at all on any other. This is often surprising for new +users who are used to the x86 world where every system looks like a +standard PC. (Once the kernel has booted, most userspace software +cares much less about the detail of the hardware.) + +If you already have a system image or a kernel that works on hardware +and you want to boot with QEMU, check whether QEMU lists that machine +in its ``-machine help`` output. If it is listed, then you can probably +use that board model. If it is not listed, then unfortunately your image +will almost certainly not boot on QEMU. (You might be able to +extract the filesystem and use that with a different kernel which +boots on a system that QEMU does emulate.) + +If you don't care about reproducing the idiosyncrasies of a particular +bit of hardware, such as small amount of RAM, no PCI or other hard +disk, etc., and just want to run Linux, the best option is to use the +``virt`` board. This is a platform which doesn't correspond to any +real hardware and is designed for use in virtual machines. You'll +need to compile Linux with a suitable configuration for running on +the ``virt`` board. ``virt`` supports PCI, virtio, recent CPUs and +large amounts of RAM. It also supports 64-bit CPUs. + +Board-specific documentation +============================ + +Unfortunately many of the Arm boards QEMU supports are currently +undocumented; you can get a complete list by running +``qemu-system-aarch64 --machine help``. .. toctree:: From patchwork Mon Mar 9 21:58:17 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Peter Maydell X-Patchwork-Id: 184335 Delivered-To: patch@linaro.org Received: by 2002:a92:1f12:0:0:0:0:0 with SMTP id i18csp11097249ile; Mon, 9 Mar 2020 14:58:56 -0700 (PDT) X-Google-Smtp-Source: ADFU+vsFU5aRmH/2cC2zdvJ0Qj82vyoveJEsYRV8pYV605wfS+u8NwmYeYqhZ5gpMxxpYlG83ug8 X-Received: by 2002:a37:a38b:: with SMTP id m133mr7696537qke.278.1583791136726; Mon, 09 Mar 2020 14:58:56 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1583791136; cv=none; d=google.com; s=arc-20160816; b=udx2o/uO/O0rB6suFKf9yyTBZ0L4CLY3KPellpVULis3wrr9a+EPhigDKk0xJ3vvGW SFwITbDWES98ZwYLJLrJYBxbnaJ7rMECI6Cx15Wz36D6J0XSGXxiHoL8EyzARLegP7ek J9NjfXvvLiLCvISfmzSnLzJSr+yERddfFusPJ71dnND9glFmfHLrnXD4z2wxMb9Q+fye jSKKm/j5VPu/a9vhqjRunQeNfkP+jiZHWqK128s6w/oNbzL2nHMSubAbSvKgH9TlHxmq 8QySzQAjAOL6kFWrNBuctoXVaVseT6N5BAzmAYPt3qq0eQVqYkUnDxIWdOcXEq8V+ace HIxA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:cc:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:to:from :dkim-signature; bh=2n3nGOj14Qa+RXY1pY3cDWtilSqrSMjx7cEnFu1bzAg=; b=ABKVjDnX7BSi9O/3OS21cqXtXHcKMwPTLeigGgMnyjG5FuqQu6koMCbysdaXibHYfi Kx8PH3fV2vr2+Mpbkgzz83OdRYcbRanWrP6a7fkSdSe663XYmJ5HTWv5ad+ICUTxjKbi lSRw5FGSur4YeSi5xEaCck2aggm9JMaLBz6OFLRi+gQnliA7ZutHhAfPYehPRC5ZllQc UfyOTCCMSVijV7267dgMkgfk5qBBIdIY5x1t85W1YLpQ3HnXDkUFhnvoNrLgnxIutqaY YZSmL5ShOnGKizzZVt0DsxBOfQIPmlvsuMLZYQd/tAO+m3fjtaNyOQQoEuH4K6bZpD5j wjAA== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=tI0y360I; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. 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[81.2.115.148]) by smtp.gmail.com with ESMTPSA id f17sm42207068wrm.3.2020.03.09.14.58.24 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 09 Mar 2020 14:58:25 -0700 (PDT) From: Peter Maydell To: qemu-arm@nongnu.org, qemu-devel@nongnu.org Subject: [PATCH 4/5] docs: Move arm-cpu-features.rst into the system manual Date: Mon, 9 Mar 2020 21:58:17 +0000 Message-Id: <20200309215818.2021-5-peter.maydell@linaro.org> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20200309215818.2021-1-peter.maydell@linaro.org> References: <20200309215818.2021-1-peter.maydell@linaro.org> MIME-Version: 1.0 X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2a00:1450:4864:20::430 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Niek Linnenbank Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" Now we have somewhere to put arm-specific rst documentation, we can move arm-cpu-features.rst from the docs/ top level directory into docs/system/arm/. Signed-off-by: Peter Maydell --- .../{arm-cpu-features.rst => system/arm/cpu-features.rst} | 8 +------- docs/system/target-arm.rst | 6 ++++++ 2 files changed, 7 insertions(+), 7 deletions(-) rename docs/{arm-cpu-features.rst => system/arm/cpu-features.rst} (99%) -- 2.20.1 Reviewed-by: Alex Bennée Reviewed-by: Niek Linnenbank Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
diff --git a/docs/arm-cpu-features.rst b/docs/system/arm/cpu-features.rst similarity index 99% rename from docs/arm-cpu-features.rst rename to docs/system/arm/cpu-features.rst index fc1623aeca5..7495b7b672b 100644 --- a/docs/arm-cpu-features.rst +++ b/docs/system/arm/cpu-features.rst @@ -1,11 +1,5 @@ +Arm CPU Features ================ -ARM CPU Features -================ - -Examples of probing and using ARM CPU features - -Introduction -============ CPU features are optional features that a CPU of supporting type may choose to implement or not. In QEMU, optional CPU features have diff --git a/docs/system/target-arm.rst b/docs/system/target-arm.rst index 86ea6f2f568..1425bd5303a 100644 --- a/docs/system/target-arm.rst +++ b/docs/system/target-arm.rst @@ -78,3 +78,9 @@ undocumented; you can get a complete list by running arm/stellaris arm/musicpal arm/sx1 + +Arm CPU features +================ + +.. toctree:: + arm/cpu-features From patchwork Mon Mar 9 21:58:18 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Peter Maydell X-Patchwork-Id: 184339 Delivered-To: patch@linaro.org Received: by 2002:a92:1f12:0:0:0:0:0 with SMTP id i18csp11099610ile; Mon, 9 Mar 2020 15:01:46 -0700 (PDT) X-Google-Smtp-Source: ADFU+vs5lG3sbZaMtZA49fbdZJrKBCqOReCmlo+uWmkMe/9UK/TMDYvBPJ00SulDifsZUcBoGFBN X-Received: by 2002:ac8:3247:: with SMTP id y7mr2539252qta.288.1583791306271; Mon, 09 Mar 2020 15:01:46 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1583791306; cv=none; d=google.com; s=arc-20160816; b=H2ikSlSEeZcOaHC0aeN4xDQ7SBRBcDSIGsWbRwWCug+BCnKinPZyEx+anLGS8jfd0T owz8xYkLJiHn3iYlycv9s+mgf+h2yqzPbnuxHYWfsSOFrp6ScTCgh6AhOuyc1a4gyxae z358/mIn4OqsuSDLggjLlTj+5TD6Vht4mpuZ3BHYFXydkgwBfkDq+3HvsahLQAjRx0mN cmDgCVaG1yGG1cNF9EIYiI6R0Y/ScpIHmU75wHOKUO6oriKie5tDJt5PIQCo+BLvcQXr d2Y4ILcKbGZz8NurTpDW1Cl3uRFpM3DET8Fj3cLFko6dHjlXPP6NpXAiUl3D7Bqm5mHM nilg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:cc:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:to:from :dkim-signature; bh=e/H6e6OnZYU3B9qqPIddUuN368JkSEB2cY7sQs/JKEU=; b=GAsW3xBDrOIQ+QIjkk7IWsUkzF4cnM8s9wJ7QbrEBF3+SZc8PP5HEdLM1HtH71R6Lf mgHkcSJluROHVA9BVgZvNuNMyhwgF7JqaotpupRSthr1rcjl4u1rMq/2A2uSbQDSvxOs /4tWMPGVtcnkT3A96ZE0VOg9sLObGOK0G52ZLIY+WLMF0AuXrdxMqnu0piHcBVZ7P0uZ XdEDwcvXfUz3DYxNULkjXrEjQNrLB8Ldc6ge8ch5M3KzZ3lOo7Wu1kr5hxbcwbCK6RET WrARWxZbACxZGwYIEQn+Z9Q/6/sVdbm2s7KqgDn2cvmbmINsWJSAklpPraJ16i0OybYU G7Aw== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=B2lvcL9m; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. 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[81.2.115.148]) by smtp.gmail.com with ESMTPSA id f17sm42207068wrm.3.2020.03.09.14.58.25 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 09 Mar 2020 14:58:26 -0700 (PDT) From: Peter Maydell To: qemu-arm@nongnu.org, qemu-devel@nongnu.org Subject: [PATCH 5/5] docs: Be consistent about capitalization of 'Arm' Date: Mon, 9 Mar 2020 21:58:18 +0000 Message-Id: <20200309215818.2021-6-peter.maydell@linaro.org> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20200309215818.2021-1-peter.maydell@linaro.org> References: <20200309215818.2021-1-peter.maydell@linaro.org> MIME-Version: 1.0 X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2a00:1450:4864:20::432 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Niek Linnenbank Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" The company 'Arm' went through a rebranding some years back involving a recapitalization from 'ARM' to 'Arm'. As a result our documentation is a bit inconsistent between the two forms. It's not worth trying to update everywhere in QEMU, but it's easy enough to make docs/ consistent. Note that "ARMv8" and similar architecture names, and older CPU names like "ARM926" still retain all-caps. Signed-off-by: Peter Maydell --- I don't feel very strongly about this change, but it looked a bit odd where earlier rearrangements in this series meant that some documents had a mix of both styles, so I thought I might as well fix all of docs/. --- docs/can.txt | 2 +- docs/devel/atomics.txt | 2 +- docs/devel/multi-thread-tcg.txt | 8 ++++---- docs/replay.txt | 2 +- docs/specs/fw_cfg.txt | 2 +- docs/devel/kconfig.rst | 2 +- docs/devel/loads-stores.rst | 2 +- docs/devel/tcg.rst | 2 +- docs/specs/tpm.rst | 6 +++--- docs/system/arm/cpu-features.rst | 4 ++-- docs/system/arm/integratorcp.rst | 2 +- docs/system/arm/musicpal.rst | 2 +- docs/system/arm/nseries.rst | 2 +- docs/system/arm/palm.rst | 2 +- docs/system/arm/realview.rst | 4 ++-- docs/system/arm/sx1.rst | 2 +- docs/system/arm/versatile.rst | 2 +- docs/system/arm/xscale.rst | 2 +- docs/user/main.rst | 8 ++++---- 19 files changed, 29 insertions(+), 29 deletions(-) -- 2.20.1 Reviewed-by: Alex Bennée Reviewed-by: Niek Linnenbank Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
diff --git a/docs/can.txt b/docs/can.txt index 9fa6ed51c82..11ed8f2d68b 100644 --- a/docs/can.txt +++ b/docs/can.txt @@ -13,7 +13,7 @@ controller is implemented. The PCI addon card hardware has been selected as the first CAN interface to implement because such device can be easily connected -to systems with different CPU architectures (x86, PowerPC, ARM, etc.). +to systems with different CPU architectures (x86, PowerPC, Arm, etc.). The project has been initially started in frame of RTEMS GSoC 2013 slot by Jin Yang under our mentoring The initial idea was to provide generic diff --git a/docs/devel/atomics.txt b/docs/devel/atomics.txt index a4db3a4aaad..67bdf826280 100644 --- a/docs/devel/atomics.txt +++ b/docs/devel/atomics.txt @@ -87,7 +87,7 @@ Sequentially consistent loads and stores can be done using: atomic_xchg(ptr, val) for stores However, they are quite expensive on some platforms, notably POWER and -ARM. Therefore, qemu/atomic.h provides two primitives with slightly +Arm. Therefore, qemu/atomic.h provides two primitives with slightly weaker constraints: typeof(*ptr) atomic_mb_read(ptr) diff --git a/docs/devel/multi-thread-tcg.txt b/docs/devel/multi-thread-tcg.txt index 782bebc28b4..3c85ac0eab9 100644 --- a/docs/devel/multi-thread-tcg.txt +++ b/docs/devel/multi-thread-tcg.txt @@ -227,7 +227,7 @@ minimise contention. (Current solution) MMIO access automatically serialises hardware emulation by way of the -BQL. Currently ARM targets serialise all ARM_CP_IO register accesses +BQL. Currently Arm targets serialise all ARM_CP_IO register accesses and also defer the reset/startup of vCPUs to the vCPU context by way of async_run_on_cpu(). @@ -268,7 +268,7 @@ ordered backends this could become a NOP. Aside from explicit standalone memory barrier instructions there are also implicit memory ordering semantics which comes with each guest memory access instruction. For example all x86 load/stores come with -fairly strong guarantees of sequential consistency where as ARM has +fairly strong guarantees of sequential consistency whereas Arm has special variants of load/store instructions that imply acquire/release semantics. @@ -317,7 +317,7 @@ x86 cmpxchg instruction. The second type offer a pair of load/store instructions which offer a guarantee that a region of memory has not been touched between the -load and store instructions. An example of this is ARM's ldrex/strex +load and store instructions. An example of this is Arm's ldrex/strex pair where the strex instruction will return a flag indicating a successful store only if no other CPU has accessed the memory region since the ldrex. @@ -339,7 +339,7 @@ CURRENT OPEN QUESTIONS: The TCG provides a number of atomic helpers (tcg_gen_atomic_*) which can be used directly or combined to emulate other instructions like -ARM's ldrex/strex instructions. While they are susceptible to the ABA +Arm's ldrex/strex instructions. While they are susceptible to the ABA problem so far common guests have not implemented patterns where this may be a problem - typically presenting a locking ABI which assumes cmpxchg like semantics. diff --git a/docs/replay.txt b/docs/replay.txt index f4619a62a3d..70c27edb362 100644 --- a/docs/replay.txt +++ b/docs/replay.txt @@ -19,7 +19,7 @@ Deterministic replay has the following features: the memory, state of the hardware devices, clocks, and screen of the VM. * Writes execution log into the file for later replaying for multiple times on different machines. - * Supports i386, x86_64, and ARM hardware platforms. + * Supports i386, x86_64, and Arm hardware platforms. * Performs deterministic replay of all operations with keyboard and mouse input devices. diff --git a/docs/specs/fw_cfg.txt b/docs/specs/fw_cfg.txt index 08c00bdf44a..8f1ebc66fa4 100644 --- a/docs/specs/fw_cfg.txt +++ b/docs/specs/fw_cfg.txt @@ -82,7 +82,7 @@ Selector Register IOport: 0x510 Data Register IOport: 0x511 DMA Address IOport: 0x514 -=== ARM Register Locations === +=== Arm Register Locations === Selector Register address: Base + 8 (2 bytes) Data Register address: Base + 0 (8 bytes) diff --git a/docs/devel/kconfig.rst b/docs/devel/kconfig.rst index b7bca447046..e5df72b3422 100644 --- a/docs/devel/kconfig.rst +++ b/docs/devel/kconfig.rst @@ -8,7 +8,7 @@ time different targets can share large amounts of code. For example, a POWER and an x86 board can run the same code to emulate a PCI network card, even though the boards use different PCI host bridges, and they can run the same code to emulate a SCSI disk while using different -SCSI adapters. ARM, s390 and x86 boards can all present a virtio-blk +SCSI adapters. Arm, s390 and x86 boards can all present a virtio-blk disk to their guests, but with three different virtio guest interfaces. Each QEMU target enables a subset of the boards, devices and buses that diff --git a/docs/devel/loads-stores.rst b/docs/devel/loads-stores.rst index 03aa9e7ff80..0d99eb24c1b 100644 --- a/docs/devel/loads-stores.rst +++ b/docs/devel/loads-stores.rst @@ -302,7 +302,7 @@ way QEMU defines the view of memory that a device or CPU has. or bus fabric.) Each CPU has an AddressSpace. Some kinds of CPU have more than -one AddressSpace (for instance ARM guest CPUs have an AddressSpace +one AddressSpace (for instance Arm guest CPUs have an AddressSpace for the Secure world and one for NonSecure if they implement TrustZone). Devices which can do DMA-type operations should generally have an AddressSpace. There is also a "system address space" which typically diff --git a/docs/devel/tcg.rst b/docs/devel/tcg.rst index 4956a30a4e6..4ebde44b9d7 100644 --- a/docs/devel/tcg.rst +++ b/docs/devel/tcg.rst @@ -83,7 +83,7 @@ memory until the end of the translation block. This is done for internal emulation state that is rarely accessed directly by the program and/or changes very often throughout the execution of a translation block---this includes condition codes on x86, delay slots on SPARC, conditional execution on -ARM, and so on. This state is stored for each target instruction, and +Arm, and so on. This state is stored for each target instruction, and looked up on exceptions. MMU emulation diff --git a/docs/specs/tpm.rst b/docs/specs/tpm.rst index da9eb39ca97..5e61238bc5f 100644 --- a/docs/specs/tpm.rst +++ b/docs/specs/tpm.rst @@ -25,7 +25,7 @@ QEMU files related to TPM TIS interface: Both an ISA device and a sysbus device are available. The former is used with pc/q35 machine while the latter can be instantiated in the -ARM virt machine. +Arm virt machine. CRB interface ------------- @@ -331,7 +331,7 @@ In case a pSeries machine is emulated, use the following command line: -device virtio-blk-pci,scsi=off,bus=pci.0,addr=0x3,drive=drive-virtio-disk0,id=virtio-disk0 \ -drive file=test.img,format=raw,if=none,id=drive-virtio-disk0 -In case an ARM virt machine is emulated, use the following command line: +In case an Arm virt machine is emulated, use the following command line: .. code-block:: console @@ -346,7 +346,7 @@ In case an ARM virt machine is emulated, use the following command line: -drive if=pflash,format=raw,file=flash0.img,readonly \ -drive if=pflash,format=raw,file=flash1.img - On ARM, ACPI boot with TPM is not yet supported. + On Arm, ACPI boot with TPM is not yet supported. In case SeaBIOS is used as firmware, it should show the TPM menu item after entering the menu with 'ESC'. diff --git a/docs/system/arm/cpu-features.rst b/docs/system/arm/cpu-features.rst index 7495b7b672b..2d5c06cd016 100644 --- a/docs/system/arm/cpu-features.rst +++ b/docs/system/arm/cpu-features.rst @@ -5,9 +5,9 @@ CPU features are optional features that a CPU of supporting type may choose to implement or not. In QEMU, optional CPU features have corresponding boolean CPU proprieties that, when enabled, indicate that the feature is implemented, and, conversely, when disabled, -indicate that it is not implemented. An example of an ARM CPU feature +indicate that it is not implemented. An example of an Arm CPU feature is the Performance Monitoring Unit (PMU). CPU types such as the -Cortex-A15 and the Cortex-A57, which respectively implement ARM +Cortex-A15 and the Cortex-A57, which respectively implement Arm architecture reference manuals ARMv7-A and ARMv8-A, may both optionally implement PMUs. For example, if a user wants to use a Cortex-A15 without a PMU, then the `-cpu` parameter should contain `pmu=off` on the QEMU diff --git a/docs/system/arm/integratorcp.rst b/docs/system/arm/integratorcp.rst index 3232b43a08b..e6f050f602b 100644 --- a/docs/system/arm/integratorcp.rst +++ b/docs/system/arm/integratorcp.rst @@ -1,7 +1,7 @@ Integrator/CP (``integratorcp``) ================================ -The ARM Integrator/CP board is emulated with the following devices: +The Arm Integrator/CP board is emulated with the following devices: - ARM926E, ARM1026E, ARM946E, ARM1136 or Cortex-A8 CPU diff --git a/docs/system/arm/musicpal.rst b/docs/system/arm/musicpal.rst index 35c22212486..9de380edf81 100644 --- a/docs/system/arm/musicpal.rst +++ b/docs/system/arm/musicpal.rst @@ -4,7 +4,7 @@ Freecom MusicPal (``musicpal``) The Freecom MusicPal internet radio emulation includes the following elements: -- Marvell MV88W8618 ARM core. +- Marvell MV88W8618 Arm core. - 32 MB RAM, 256 KB SRAM, 8 MB flash. diff --git a/docs/system/arm/nseries.rst b/docs/system/arm/nseries.rst index b000b6d13bb..cd9edf5d88b 100644 --- a/docs/system/arm/nseries.rst +++ b/docs/system/arm/nseries.rst @@ -4,7 +4,7 @@ Nokia N800 and N810 tablets (``n800``, ``n810``) Nokia N800 and N810 internet tablets (known also as RX-34 and RX-44 / 48) emulation supports the following elements: -- Texas Instruments OMAP2420 System-on-chip (ARM 1136 core) +- Texas Instruments OMAP2420 System-on-chip (ARM1136 core) - RAM and non-volatile OneNAND Flash memories diff --git a/docs/system/arm/palm.rst b/docs/system/arm/palm.rst index 0eabf63e0e7..47ff9b36d46 100644 --- a/docs/system/arm/palm.rst +++ b/docs/system/arm/palm.rst @@ -4,7 +4,7 @@ Palm Tungsten|E PDA (``cheetah``) The Palm Tungsten|E PDA (codename \"Cheetah\") emulation includes the following elements: -- Texas Instruments OMAP310 System-on-chip (ARM 925T core) +- Texas Instruments OMAP310 System-on-chip (ARM925T core) - ROM and RAM memories (ROM firmware image can be loaded with -option-rom) diff --git a/docs/system/arm/realview.rst b/docs/system/arm/realview.rst index 8e08eb5da16..65f5be346b1 100644 --- a/docs/system/arm/realview.rst +++ b/docs/system/arm/realview.rst @@ -1,7 +1,7 @@ Arm Realview boards (``realview-eb``, ``realview-eb-mpcore``, ``realview-pb-a8``, ``realview-pbx-a9``) ====================================================================================================== -Several variants of the ARM RealView baseboard are emulated, including +Several variants of the Arm RealView baseboard are emulated, including the EB, PB-A8 and PBX-A9. Due to interactions with the bootloader, only certain Linux kernel configurations work out of the box on these boards. @@ -14,7 +14,7 @@ The following devices are emulated: - ARM926E, ARM1136, ARM11MPCore, Cortex-A8 or Cortex-A9 MPCore CPU -- ARM AMBA Generic/Distributed Interrupt Controller +- Arm AMBA Generic/Distributed Interrupt Controller - Four PL011 UARTs diff --git a/docs/system/arm/sx1.rst b/docs/system/arm/sx1.rst index 321993bc098..8bce30d4b25 100644 --- a/docs/system/arm/sx1.rst +++ b/docs/system/arm/sx1.rst @@ -4,7 +4,7 @@ Siemens SX1 (``sx1``, ``sx1-v1``) The Siemens SX1 models v1 and v2 (default) basic emulation. The emulation includes the following elements: -- Texas Instruments OMAP310 System-on-chip (ARM 925T core) +- Texas Instruments OMAP310 System-on-chip (ARM925T core) - ROM and RAM memories (ROM firmware image can be loaded with -pflash) V1 1 Flash of 16MB and 1 Flash of 8MB V2 1 Flash of 32MB diff --git a/docs/system/arm/versatile.rst b/docs/system/arm/versatile.rst index 48b6ca0a020..51221c30a48 100644 --- a/docs/system/arm/versatile.rst +++ b/docs/system/arm/versatile.rst @@ -1,7 +1,7 @@ Arm Versatile boards (``versatileab``, ``versatilepb``) ======================================================= -The ARM Versatile baseboard is emulated with the following devices: +The Arm Versatile baseboard is emulated with the following devices: - ARM926E, ARM1136 or Cortex-A8 CPU diff --git a/docs/system/arm/xscale.rst b/docs/system/arm/xscale.rst index 19da2eff352..89ec93e904e 100644 --- a/docs/system/arm/xscale.rst +++ b/docs/system/arm/xscale.rst @@ -4,7 +4,7 @@ Sharp XScale-based PDA models (``akita``, ``borzoi``, ``spitz``, ``terrier``) The XScale-based clamshell PDA models (\"Spitz\", \"Akita\", \"Borzoi\" and \"Terrier\") emulation includes the following peripherals: -- Intel PXA270 System-on-chip (ARM V5TE core) +- Intel PXA270 System-on-chip (ARMv5TE core) - NAND Flash memory diff --git a/docs/user/main.rst b/docs/user/main.rst index ca69f7727d5..bd99b0fdbe9 100644 --- a/docs/user/main.rst +++ b/docs/user/main.rst @@ -35,7 +35,7 @@ QEMU user space emulation has the following notable features: On Linux, QEMU can emulate the ``clone`` syscall and create a real host thread (with a separate virtual CPU) for each emulated thread. Note that not all targets currently emulate atomic operations - correctly. x86 and ARM use a global lock in order to preserve their + correctly. x86 and Arm use a global lock in order to preserve their semantics. QEMU was conceived so that ultimately it can emulate itself. Although it @@ -173,11 +173,11 @@ Other binaries user mode (Alpha) ``qemu-alpha`` TODO. -user mode (ARM) +user mode (Arm) ``qemu-armeb`` TODO. -user mode (ARM) -``qemu-arm`` is also capable of running ARM \"Angel\" semihosted ELF +user mode (Arm) +``qemu-arm`` is also capable of running Arm \"Angel\" semihosted ELF binaries (as implemented by the arm-elf and arm-eabi Newlib/GDB configurations), and arm-uclinux bFLT format binaries.