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[174.21.149.226]) by smtp.gmail.com with ESMTPSA id i24sm11984059pgb.57.2020.04.06.20.09.39 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 06 Apr 2020 20:09:39 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Subject: [PATCH for-5.0?] target/xtensa: Statically allocate xtensa_insnbufs Date: Mon, 6 Apr 2020 20:09:38 -0700 Message-Id: <20200407030938.26537-1-richard.henderson@linaro.org> X-Mailer: git-send-email 2.20.1 MIME-Version: 1.0 X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2607:f8b0:4864:20::1043 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Max Filippov , alex.bennee@linaro.org Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" Rather than dynamically allocate, and risk failing to free when we longjmp out of the translator, allocate the maximum buffer size from any of the supported cpus, which is 8: core-dc232b/xtensa-modules.inc.c: 3 /* insn_size */, 0, core-dc233c/xtensa-modules.inc.c: 3 /* insn_size */, 0, core-de212/xtensa-modules.inc.c: 3 /* insn_size */, 0, core-fsf/xtensa-modules.inc.c: 3 /* insn_size */, 0, core-sample_controller/xtensa-modules.inc.c: 3 /* insn_size */, 0, core-test_kc705_be/xtensa-modules.inc.c: 8 /* insn_size */, 0, core-test_mmuhifi_c3/xtensa-modules.inc.c: 8 /* insn_size */, 0, Cc: Max Filippov Signed-off-by: Richard Henderson --- target/xtensa/translate.c | 21 ++++++++------------- 1 file changed, 8 insertions(+), 13 deletions(-) -- 2.20.1 Signed-off-by: Max Filippov diff --git a/target/xtensa/translate.c b/target/xtensa/translate.c index 37f65b1f03..86369aa623 100644 --- a/target/xtensa/translate.c +++ b/target/xtensa/translate.c @@ -72,8 +72,10 @@ struct DisasContext { unsigned cpenable; uint32_t op_flags; - xtensa_insnbuf insnbuf; - xtensa_insnbuf slotbuf; + + /* The maximum of all supported cpus is 8. */ + xtensa_insnbuf_word insnbuf[8]; + xtensa_insnbuf_word slotbuf[8]; }; static TCGv_i32 cpu_pc; @@ -1174,14 +1176,11 @@ static void xtensa_tr_init_disas_context(DisasContextBase *dcbase, dc->callinc = ((tb_flags & XTENSA_TBFLAG_CALLINC_MASK) >> XTENSA_TBFLAG_CALLINC_SHIFT); - /* - * FIXME: This will leak when a failed instruction load or similar - * event causes us to longjump out of the translation loop and - * hence not clean-up in xtensa_tr_tb_stop - */ if (dc->config->isa) { - dc->insnbuf = xtensa_insnbuf_alloc(dc->config->isa); - dc->slotbuf = xtensa_insnbuf_alloc(dc->config->isa); + size_t size = (xtensa_insnbuf_size(dc->config->isa) * + sizeof(xtensa_insnbuf_word)); + assert(sizeof(dc->insnbuf) >= size); + assert(sizeof(dc->slotbuf) >= size); } init_sar_tracker(dc); } @@ -1272,10 +1271,6 @@ static void xtensa_tr_tb_stop(DisasContextBase *dcbase, CPUState *cpu) DisasContext *dc = container_of(dcbase, DisasContext, base); reset_sar_tracker(dc); - if (dc->config->isa) { - xtensa_insnbuf_free(dc->config->isa, dc->insnbuf); - xtensa_insnbuf_free(dc->config->isa, dc->slotbuf); - } if (dc->icount) { tcg_temp_free(dc->next_icount); }