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[2001:19d0:306:5::1]) by mx.google.com with ESMTPS id y129si11547975pfg.102.2017.07.02.21.02.18 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Sun, 02 Jul 2017 21:02:18 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of edk2-devel-bounces@lists.01.org designates 2001:19d0:306:5::1 as permitted sender) client-ip=2001:19d0:306:5::1; Authentication-Results: mx.google.com; dkim=neutral (body hash did not verify) header.i=@linaro.org header.b=f6yhgLyr; spf=pass (google.com: best guess record for domain of edk2-devel-bounces@lists.01.org designates 2001:19d0:306:5::1 as permitted sender) smtp.mailfrom=edk2-devel-bounces@lists.01.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from [127.0.0.1] (localhost [IPv6:::1]) by ml01.01.org (Postfix) with ESMTP id 9492321CB57AB; Sun, 2 Jul 2017 21:00:41 -0700 (PDT) X-Original-To: edk2-devel@lists.01.org Delivered-To: edk2-devel@lists.01.org Received: from mail-pf0-x232.google.com (mail-pf0-x232.google.com [IPv6:2607:f8b0:400e:c00::232]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by ml01.01.org (Postfix) with ESMTPS id 37F7021CAD9B0 for ; Sun, 2 Jul 2017 21:00:40 -0700 (PDT) Received: by mail-pf0-x232.google.com with SMTP id s66so93478168pfs.1 for ; Sun, 02 Jul 2017 21:02:17 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=GO1BZ8maq5DQ5A2A/OVgyQrON8aXJuIpF1KBGfbM2xc=; b=f6yhgLyr+jaw4CcOfRYk5KpME7mQ9HGm8X98IE0IRl4FqzbovDKUcHl1LDjLG4r1X/ Ajts9yY5tSaWHr6EtSjuop9nzK0Kxm9D4Knzn/myCLUmbj6hJTsv2D59yZesyRde3i3V FkVEZLJXLjwphd19iqy32iZxh7+kcSjfm9WiE= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=GO1BZ8maq5DQ5A2A/OVgyQrON8aXJuIpF1KBGfbM2xc=; b=nvRwaGcJ5wYkO7u+HuKw+D3UwTqAHSymO8i9DuSLeTxrHYBt/W6Y3WmFd5TlXuIC5a H+gxUBLwvJ3oNEvtGMbe9z2usytjq30ugzkyZLGoBva/nc8ZMPyI10xWXz1b8MRrkwyH MMGZOI31PCUZMVEDJQPg0dDRFDuCEvJpzNtFYTI/UFpq9O/jArB24IN1Py5Mp46l8GF1 0o5E2qD30e/yJQU4ItGln0bIS1F6xEGP2oCyG9LKR8Tqnq7gAHVzFxbdMyEJJVlnL1IW e2ZLcfn2O0WrKGO2efZ+I2bQKQbf4gSVDWwR3Z2JZK0FK+2vzyJJM0gX57wsAKInuzOp 3jgg== X-Gm-Message-State: AIVw111dsMPB9ER7KNnRfrbcsnZN3cRSbW/KNWOAOaBTF+ZVKTUQluTZ 5pCBt0nt90CA6ljN X-Received: by 10.98.12.146 with SMTP id 18mr7846455pfm.167.1499054536676; Sun, 02 Jul 2017 21:02:16 -0700 (PDT) Received: from localhost.localdomain ([113.53.228.63]) by smtp.gmail.com with ESMTPSA id l85sm5761583pfi.53.2017.07.02.21.02.11 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Sun, 02 Jul 2017 21:02:16 -0700 (PDT) From: Jun Nie To: ard.biesheuvel@linaro.org, leif.lindholm@linaro.org, haojian.zhuang@linaro.org, edk2-devel@lists.01.org Date: Mon, 3 Jul 2017 12:01:57 +0800 Message-Id: <1499054517-22398-2-git-send-email-jun.nie@linaro.org> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1499054517-22398-1-git-send-email-jun.nie@linaro.org> References: <1499054517-22398-1-git-send-email-jun.nie@linaro.org> Subject: [edk2] [PATCH 2/2] EmbeddedPkg/DwEmmc: Adjust FIFO threshold X-BeenThere: edk2-devel@lists.01.org X-Mailman-Version: 2.1.22 Precedence: list List-Id: EDK II Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: jason.liu@linaro.org, shawn.guo@linaro.org MIME-Version: 1.0 Errors-To: edk2-devel-bounces@lists.01.org Sender: "edk2-devel" Adjust FIFO threshold according to FIFO depth. Skip the adjustment if we do not have FIFO depth info. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Jun Nie --- EmbeddedPkg/Drivers/DwEmmcDxe/DwEmmc.h | 6 ++++ EmbeddedPkg/Drivers/DwEmmcDxe/DwEmmcDxe.c | 54 +++++++++++++++++++++++++++++ EmbeddedPkg/Drivers/DwEmmcDxe/DwEmmcDxe.inf | 1 + EmbeddedPkg/EmbeddedPkg.dec | 1 + 4 files changed, 62 insertions(+) -- 1.9.1 _______________________________________________ edk2-devel mailing list edk2-devel@lists.01.org https://lists.01.org/mailman/listinfo/edk2-devel diff --git a/EmbeddedPkg/Drivers/DwEmmcDxe/DwEmmc.h b/EmbeddedPkg/Drivers/DwEmmcDxe/DwEmmc.h index 055f1e0..2b41539 100644 --- a/EmbeddedPkg/Drivers/DwEmmcDxe/DwEmmc.h +++ b/EmbeddedPkg/Drivers/DwEmmcDxe/DwEmmc.h @@ -38,7 +38,10 @@ #define DWEMMC_RINTSTS ((UINT32)PcdGet32 (PcdDwEmmcDxeBaseAddress) + 0x044) #define DWEMMC_STATUS ((UINT32)PcdGet32 (PcdDwEmmcDxeBaseAddress) + 0x048) #define DWEMMC_FIFOTH ((UINT32)PcdGet32 (PcdDwEmmcDxeBaseAddress) + 0x04c) +#define DWEMMC_TCBCNT ((UINT32)PcdGet32 (PcdDwEmmcDxeBaseAddress) + 0x05c) +#define DWEMMC_TBBCNT ((UINT32)PcdGet32 (PcdDwEmmcDxeBaseAddress) + 0x060) #define DWEMMC_DEBNCE ((UINT32)PcdGet32 (PcdDwEmmcDxeBaseAddress) + 0x064) +#define DWEMMC_HCON ((UINT32)PcdGet32 (PcdDwEmmcDxeBaseAddress) + 0x070) #define DWEMMC_UHSREG ((UINT32)PcdGet32 (PcdDwEmmcDxeBaseAddress) + 0x074) #define DWEMMC_BMOD ((UINT32)PcdGet32 (PcdDwEmmcDxeBaseAddress) + 0x080) #define DWEMMC_DBADDR ((UINT32)PcdGet32 (PcdDwEmmcDxeBaseAddress) + 0x088) @@ -47,6 +50,7 @@ #define DWEMMC_DSCADDR ((UINT32)PcdGet32 (PcdDwEmmcDxeBaseAddress) + 0x094) #define DWEMMC_BUFADDR ((UINT32)PcdGet32 (PcdDwEmmcDxeBaseAddress) + 0x098) #define DWEMMC_CARDTHRCTL ((UINT32)PcdGet32 (PcdDwEmmcDxeBaseAddress) + 0X100) +#define DWEMMC_DATA ((UINT32)PcdGet32 (PcdDwEmmcDxeBaseAddress) + 0X200) #define CMD_UPDATE_CLK 0x80202000 #define CMD_START_BIT (1 << 31) @@ -124,4 +128,6 @@ #define DWEMMC_CARD_RD_THR(x) ((x & 0xfff) << 16) #define DWEMMC_CARD_RD_THR_EN (1 << 0) +#define DWEMMC_GET_HDATA_WIDTH(x) (((x)>>7) & 0x7) + #endif // __DWEMMC_H__ diff --git a/EmbeddedPkg/Drivers/DwEmmcDxe/DwEmmcDxe.c b/EmbeddedPkg/Drivers/DwEmmcDxe/DwEmmcDxe.c index c67dd0d..cb32a7c 100644 --- a/EmbeddedPkg/Drivers/DwEmmcDxe/DwEmmcDxe.c +++ b/EmbeddedPkg/Drivers/DwEmmcDxe/DwEmmcDxe.c @@ -415,6 +415,59 @@ DwEmmcReceiveResponse ( return EFI_SUCCESS; } +VOID DwEmmcAdjustFifoth( + VOID + ) +{ + const UINT32 Mszs[] = {1, 4, 8, 16, 32, 64, 128, 256}; + UINT32 BlkSizeDepth, Fifoth, FifoWidth, FifoDepth; + UINT32 BlkSize = 512, Msize = 0, RxWmark = 1, TxWmark, TxWmarkInvers; + UINT32 Idx = ARRAY_SIZE(Mszs) - 1; + + /* Skip FIFO adjustment if we do not have platform FIFO depth info */ + FifoDepth = PcdGet32 (PcdDwEmmcDxeFifoDepth); + if (!FifoDepth) + return; + + TxWmark = FifoDepth / 2; + TxWmarkInvers = FifoDepth - TxWmark; + + FifoWidth = DWEMMC_GET_HDATA_WIDTH(MmioRead32 (DWEMMC_HCON)); + if (!FifoWidth) { + FifoWidth = 2; + } else if (FifoWidth == 2) { + FifoWidth = 8; + } else { + FifoWidth = 4; + } + + BlkSizeDepth = BlkSize / FifoWidth; + + /* + * MSIZE is '1', + * if BlkSize is not a multiple of the FIFO width + */ + if (BlkSize % FifoWidth) { + goto done; + } + + do { + if (!((BlkSizeDepth % Mszs[Idx]) || (TxWmarkInvers % Mszs[Idx]))) { + Msize = Idx; + RxWmark = Mszs[Idx] - 1; + break; + } + } while (--Idx > 0); + /* + * If Idx is '0', it won't be tried + * Thus, initial values are uesed + */ +done: + Fifoth = DWEMMC_DMA_BURST_SIZE(Msize) | DWEMMC_FIFO_TWMARK(TxWmark) + | DWEMMC_FIFO_RWMARK(RxWmark); + MmioWrite32 (DWEMMC_FIFOTH, Fifoth); +} + EFI_STATUS PrepareDmaData ( IN DWEMMC_IDMAC_DESCRIPTOR* IdmacDesc, @@ -632,6 +685,7 @@ DwEmmcDxeInitialize ( Handle = NULL; + DwEmmcAdjustFifoth(); gpIdmacDesc = (DWEMMC_IDMAC_DESCRIPTOR *)AllocatePages (DWEMMC_MAX_DESC_PAGES); if (gpIdmacDesc == NULL) { return EFI_BUFFER_TOO_SMALL; diff --git a/EmbeddedPkg/Drivers/DwEmmcDxe/DwEmmcDxe.inf b/EmbeddedPkg/Drivers/DwEmmcDxe/DwEmmcDxe.inf index 3582997..a3e10fe 100644 --- a/EmbeddedPkg/Drivers/DwEmmcDxe/DwEmmcDxe.inf +++ b/EmbeddedPkg/Drivers/DwEmmcDxe/DwEmmcDxe.inf @@ -49,6 +49,7 @@ gEmbeddedTokenSpaceGuid.PcdDwEmmcDxeBaseAddress gEmbeddedTokenSpaceGuid.PcdDwEmmcDxeClockFrequencyInHz gDwEmmcDxeTokenSpaceGuid.PcdDwEmmcDxeMaxClockFrequencyInHz + gDwEmmcDxeTokenSpaceGuid.PcdDwEmmcDxeFifoDepth [Depex] TRUE diff --git a/EmbeddedPkg/EmbeddedPkg.dec b/EmbeddedPkg/EmbeddedPkg.dec index aec8259..f28a5d2 100644 --- a/EmbeddedPkg/EmbeddedPkg.dec +++ b/EmbeddedPkg/EmbeddedPkg.dec @@ -168,6 +168,7 @@ gEmbeddedTokenSpaceGuid.PcdDwEmmcDxeBaseAddress|0x0|UINT32|0x00000035 gEmbeddedTokenSpaceGuid.PcdDwEmmcDxeClockFrequencyInHz|0x0|UINT32|0x00000036 gDwEmmcDxeTokenSpaceGuid.PcdDwEmmcDxeMaxClockFrequencyInHz|0x0|UINT32|400000000 + gDwEmmcDxeTokenSpaceGuid.PcdDwEmmcDxeFifoDepth|0x0|UINT32|0 # # Android FastBoot