From patchwork Fri Jul 7 14:42:47 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Peter Maydell X-Patchwork-Id: 107206 Delivered-To: patches@linaro.org Received: by 10.140.101.44 with SMTP id t41csp147304qge; Fri, 7 Jul 2017 07:43:04 -0700 (PDT) X-Received: by 10.99.104.74 with SMTP id d71mr1794417pgc.7.1499438584774; Fri, 07 Jul 2017 07:43:04 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1499438584; cv=none; d=google.com; s=arc-20160816; b=OIm93d6es6uLsPoh7KlVVDIpeEHr2JiqAJhBPXFs02s9fyIPduPl1RcvfjoQQaMbdW 0hN+rqgnXGN9ZjIsmdUAtJYAk16cFquh4ZJIc8nYN1MA+VLcXYAr5d4dJ/LA+cUMKJie Yt4NghiFYnXYaJYeR4bEsvt8wl5P6oc5ObIQo2PNKvsz7fKy9PyTN8eon6yi2FxNwtrp 1Vma9pJYY2MQv8DdS+v2tERsX8VnH30qgVTi/3M/TnziZ8PyBxtPrzF9Qp7Cnkf2/W5H nZSn/x1DU5TqspbRrxw3bUL+3APL+F28M9nRLxlRzZ/AOfxxH5SHTThVY1HYChYV425W e5DQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=references:in-reply-to:message-id:date:subject:cc:to:from :arc-authentication-results; bh=VymCl5hxYXkGwhkfxrPZEQpyjj0xTbDl7/calmC8i3Y=; b=wo5iU3HWk5QbOKfa6jGESjWRHZip2V+qxaVEGa68pDjf5rI2aoLtRQdxx2tMEBx3g+ P3pKSEq2AJeWNnKohRF4AWHwDubXYNspccu1EGCjOP0gwUnNl60WWscibaqXk6aaO8yR bbJ0+M1CMBXfxoc83LdCxEVf5NjfdGJK6eLCcqKGGW8prQNy3eZke4LHn/r6gYGjYdgu /aBaUX4gzoL27iou0tx2kMbbkuWvmXGcKLn6pQh2TejryZLfet/VbP+Ypy2kTJbhU+ws FLi12AVRsKCgPK+Daky+68lKPoq5WNlSo8ptLrtLGaOKQ9fDMRRmEFmxokt68qrAbq0k 1DoA== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: best guess record for domain of pm215@archaic.org.uk designates 2001:8b0:1d0::2 as permitted sender) smtp.mailfrom=pm215@archaic.org.uk; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from orth.archaic.org.uk (orth.archaic.org.uk. [2001:8b0:1d0::2]) by mx.google.com with ESMTPS id f73si2343467pff.143.2017.07.07.07.43.03 for (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Fri, 07 Jul 2017 07:43:04 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of pm215@archaic.org.uk designates 2001:8b0:1d0::2 as permitted sender) client-ip=2001:8b0:1d0::2; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of pm215@archaic.org.uk designates 2001:8b0:1d0::2 as permitted sender) smtp.mailfrom=pm215@archaic.org.uk; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from pm215 by orth.archaic.org.uk with local (Exim 4.84_2) (envelope-from ) id 1dTUTD-0005sK-6Y; Fri, 07 Jul 2017 15:42:59 +0100 From: Peter Maydell To: qemu-devel@nongnu.org Cc: patches@linaro.org, Paolo Bonzini , Eduardo Habkost , Marcel Apfelbaum , Igor Mammedov Subject: [PATCH 01/11] include/hw/boards.h: Document memory_region_allocate_system_memory() Date: Fri, 7 Jul 2017 15:42:47 +0100 Message-Id: <1499438577-7674-2-git-send-email-peter.maydell@linaro.org> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1499438577-7674-1-git-send-email-peter.maydell@linaro.org> References: <1499438577-7674-1-git-send-email-peter.maydell@linaro.org> Add a documentation comment for memory_region_allocate_system_memory(). In particular, the reason for this function's existence and the requirement on board code to call it exactly once are non-obvious. Signed-off-by: Peter Maydell --- include/hw/boards.h | 28 ++++++++++++++++++++++++++++ 1 file changed, 28 insertions(+) -- 2.7.4 diff --git a/include/hw/boards.h b/include/hw/boards.h index 76ce021..1bc5389 100644 --- a/include/hw/boards.h +++ b/include/hw/boards.h @@ -9,6 +9,34 @@ #include "qom/object.h" #include "qom/cpu.h" +/** + * memory_region_allocate_system_memory - Allocate a board's main memory + * @mr: the #MemoryRegion to be initialized + * @owner: the object that tracks the region's reference count + * @name: name of the memory region + * @ram_size: size of the region in bytes + * + * This function allocates the main memory for a board model, and + * initializes @mr appropriately. It also arranges for the memory + * to be migrated (by calling vmstate_register_ram_global()). + * + * Memory allocated via this function will be backed with the memory + * backend the user provided using -mem-path if appropriate; this + * is typically used to cause host huge pages to be used. + * This function should therefore be called by a board exactly once, + * for the primary or largest RAM area it implements. + * + * For boards where the major RAM is split into two parts in the memory + * map, you can deal with this by calling memory_region_allocate_system_memory() + * once to get a MemoryRegion with enough RAM for both parts, and then + * creating alias MemoryRegions via memory_region_init_alias() which + * alias into different parts of the RAM MemoryRegion and can be mapped + * into the memory map in the appropriate places. + * + * Smaller pieces of memory (display RAM, static RAMs, etc) don't need + * to be backed via the -mem-path memory backend and can simply + * be created via memory_region_init_ram(). + */ void memory_region_allocate_system_memory(MemoryRegion *mr, Object *owner, const char *name, uint64_t ram_size); From patchwork Fri Jul 7 14:42:48 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Peter Maydell X-Patchwork-Id: 107199 Delivered-To: patches@linaro.org Received: by 10.140.101.44 with SMTP id t41csp147233qge; Fri, 7 Jul 2017 07:43:00 -0700 (PDT) X-Received: by 10.223.176.164 with SMTP id i33mr980246wra.165.1499438580517; Fri, 07 Jul 2017 07:43:00 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1499438580; cv=none; d=google.com; s=arc-20160816; b=dEPFcTtmnJw/I0bybNMYkch0Pcdeoe7Z2l7twLV03VUErAXtx7pIaP/aQAYRjA+9KQ iCF3vgrJpI0/WHRY/bnf2P4PnxRjWSr9wSBLIfPCHIHHixAOK1z1hed0sVujM0bwq4bV 3OuX/FsrQoplPo3ZE1O2tV78nsnl1/CXUMLRwSUQtnRcDaVfR+MZs/wECAVc8haXi4wJ GsXsfRaVfOB1e/WermZT313n8AeZQ35a0hobdMdw3C4rraRKRDARmdRsMVaZY2lW9Ti1 +/islhot5BrwO6tGCx77SVTr0HZWqzUWSe+ElvUX4iYXRFx3PwsMRtSbomncCr/uY4LY opOA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=references:in-reply-to:message-id:date:subject:cc:to:from :arc-authentication-results; bh=iDxnxV/Svla33He33g9U67lsDWLkDYAoyGbboIrOl0o=; b=jEjeJTIIi05yDiykCXUx5m8O/YOYmTeh1s5uLypoqspzqWCVu4nsOiFvsidtD8D7iz cNCrvYevXC+/XBUSJUAqJ10wGa7NUIyL3CZzDGASmoT+9Nt1YLyPgI/F1gmEx2AdyoL1 gAaYbki2ti+3a9zCQSd/9YhEswC3TguVcXkgkRiRKLxv/tMaMmcVledQ0Ph1fCtfgwxH KOgirs7heckNbbHqErTioRYAUsY/3CAK01UZsVdwVvDOGAN7H8rfVS+i9u1+wfFA9MLX byUccLLL1Hq6axpl1PjmApldoFbD9plnIzOBDs2wjRHmJb+IQxUv6Sbx9ZQPuJG2b1HU RSag== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: best guess record for domain of pm215@archaic.org.uk designates 2001:8b0:1d0::2 as permitted sender) smtp.mailfrom=pm215@archaic.org.uk; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from orth.archaic.org.uk (orth.archaic.org.uk. [2001:8b0:1d0::2]) by mx.google.com with ESMTPS id d8si2374871wrc.28.2017.07.07.07.43.00 for (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Fri, 07 Jul 2017 07:43:00 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of pm215@archaic.org.uk designates 2001:8b0:1d0::2 as permitted sender) client-ip=2001:8b0:1d0::2; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of pm215@archaic.org.uk designates 2001:8b0:1d0::2 as permitted sender) smtp.mailfrom=pm215@archaic.org.uk; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from pm215 by orth.archaic.org.uk with local (Exim 4.84_2) (envelope-from ) id 1dTUTD-0005sV-Lw; Fri, 07 Jul 2017 15:42:59 +0100 From: Peter Maydell To: qemu-devel@nongnu.org Cc: patches@linaro.org, Paolo Bonzini , Eduardo Habkost , Marcel Apfelbaum , Igor Mammedov Subject: [PATCH 02/11] memory: Document that the RAM MR initializers do not handle migration Date: Fri, 7 Jul 2017 15:42:48 +0100 Message-Id: <1499438577-7674-3-git-send-email-peter.maydell@linaro.org> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1499438577-7674-1-git-send-email-peter.maydell@linaro.org> References: <1499438577-7674-1-git-send-email-peter.maydell@linaro.org> The various functions for initializing RAM MemoryRegions do not do anything to cause the data in the MemoryRegion to be migrated. Note in their documentation comments that this is the responsibility of the caller. (We will shortly add a new function that *does* do this for you.) Signed-off-by: Peter Maydell --- include/exec/memory.h | 18 ++++++++++++++++++ 1 file changed, 18 insertions(+) -- 2.7.4 diff --git a/include/exec/memory.h b/include/exec/memory.h index 8503685..55cb5e7 100644 --- a/include/exec/memory.h +++ b/include/exec/memory.h @@ -412,6 +412,9 @@ void memory_region_init_io(MemoryRegion *mr, * must be unique within any device * @size: size of the region. * @errp: pointer to Error*, to store an error if it happens. + * + * Note that this function does not do anything to cause the data in the + * RAM memory region to be migrated; that is the responsibility of the caller. */ void memory_region_init_ram(MemoryRegion *mr, struct Object *owner, @@ -434,6 +437,9 @@ void memory_region_init_ram(MemoryRegion *mr, * @max_size: max size of the region. * @resized: callback to notify owner about used size change. * @errp: pointer to Error*, to store an error if it happens. + * + * Note that this function does not do anything to cause the data in the + * RAM memory region to be migrated; that is the responsibility of the caller. */ void memory_region_init_resizeable_ram(MemoryRegion *mr, struct Object *owner, @@ -457,6 +463,9 @@ void memory_region_init_resizeable_ram(MemoryRegion *mr, * @share: %true if memory must be mmaped with the MAP_SHARED flag * @path: the path in which to allocate the RAM. * @errp: pointer to Error*, to store an error if it happens. + * + * Note that this function does not do anything to cause the data in the + * RAM memory region to be migrated; that is the responsibility of the caller. */ void memory_region_init_ram_from_file(MemoryRegion *mr, struct Object *owner, @@ -477,6 +486,9 @@ void memory_region_init_ram_from_file(MemoryRegion *mr, * @share: %true if memory must be mmaped with the MAP_SHARED flag * @fd: the fd to mmap. * @errp: pointer to Error*, to store an error if it happens. + * + * Note that this function does not do anything to cause the data in the + * RAM memory region to be migrated; that is the responsibility of the caller. */ void memory_region_init_ram_from_fd(MemoryRegion *mr, struct Object *owner, @@ -498,6 +510,9 @@ void memory_region_init_ram_from_fd(MemoryRegion *mr, * must be unique within any device * @size: size of the region. * @ptr: memory to be mapped; must contain at least @size bytes. + * + * Note that this function does not do anything to cause the data in the + * RAM memory region to be migrated; that is the responsibility of the caller. */ void memory_region_init_ram_ptr(MemoryRegion *mr, struct Object *owner, @@ -522,6 +537,9 @@ void memory_region_init_ram_ptr(MemoryRegion *mr, * @name: the name of the region. * @size: size of the region. * @ptr: memory to be mapped; must contain at least @size bytes. + * + * Note that this function does not do anything to cause the data in the + * RAM memory region to be migrated; that is the responsibility of the caller. */ void memory_region_init_ram_device_ptr(MemoryRegion *mr, struct Object *owner, From patchwork Fri Jul 7 14:42:49 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Peter Maydell X-Patchwork-Id: 107205 Delivered-To: patches@linaro.org Received: by 10.140.101.44 with SMTP id t41csp147275qge; Fri, 7 Jul 2017 07:43:03 -0700 (PDT) X-Received: by 10.84.177.131 with SMTP id x3mr3301621plb.83.1499438583121; Fri, 07 Jul 2017 07:43:03 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1499438583; cv=none; d=google.com; s=arc-20160816; b=fHD8BroChD2hzw1xUNTczZPT9t34jHDPKKFbHxIVobX5qOqaf307JzpQojn6WkhZWk WvP9xxXrYhIrHdQ4+meXypZLVVE8tYQFO51tRYW9bj2hcxhfuQgziXNt+yVmDO1E8tqZ nX1BHAsIAu7aH7035tAas5Kn7Uq/B1EDpGgbek0Kvo976YoJEI0CA63hEvgP6Dy35da3 kSVUe8pum/s909W11OZabloiSRVkesRNjfTyHAMdhpTphJpqTLN9mi4goowZ0QMlBhLf HM7zbHS1Hj5+RyN7w8mmvQhJBpNqICsKUZywgfPYTv5hN/JU1t83+1REm3qCwIRhU1gM 6MmA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=references:in-reply-to:message-id:date:subject:cc:to:from :arc-authentication-results; bh=vW8+nyvrY8h1k60Bk4f0/LLn4qEz9n1IxVbqB0KGJAc=; b=sXTC4RsIGpWDVPCAifmRIW1JZ9WP6nez6lKxTyGLo0MwIWKIpVYAV3x5aiyYEuI1ZJ rKD4r1fPW7MeoJ3uR0lxOclwk5M/V8wadH/3eFptHSfYi/Wg4s3YLYHChMu9VFioWLNb hG9JrMyK/9Ep+Tn9FZpyPwQRIyl9geHp2tyl1TNr94E+L1cLZ4qh43D8+rSYiWoQ3WLv lkvB8hI9jjsCG089bn04PFWr+QggPSyEINqKjvakYrNzZAjf6FUGDb83wYyxoNyzhCOV 6YxAEk2rry2rLgVA3jOa/rPL2L3mfcRxRvCwPorHGFHmhRj8Czgq81638E13WZOFS8PX rP8g== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: best guess record for domain of pm215@archaic.org.uk designates 2001:8b0:1d0::2 as permitted sender) smtp.mailfrom=pm215@archaic.org.uk; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from orth.archaic.org.uk (orth.archaic.org.uk. [2001:8b0:1d0::2]) by mx.google.com with ESMTPS id k3si2405162pga.244.2017.07.07.07.43.01 for (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Fri, 07 Jul 2017 07:43:02 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of pm215@archaic.org.uk designates 2001:8b0:1d0::2 as permitted sender) client-ip=2001:8b0:1d0::2; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of pm215@archaic.org.uk designates 2001:8b0:1d0::2 as permitted sender) smtp.mailfrom=pm215@archaic.org.uk; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from pm215 by orth.archaic.org.uk with local (Exim 4.84_2) (envelope-from ) id 1dTUTE-0005so-5W; Fri, 07 Jul 2017 15:43:00 +0100 From: Peter Maydell To: qemu-devel@nongnu.org Cc: patches@linaro.org, Paolo Bonzini , Eduardo Habkost , Marcel Apfelbaum , Igor Mammedov Subject: [PATCH 03/11] memory: Rename memory_region_init_ram() to memory_region_init_ram_nomigrate() Date: Fri, 7 Jul 2017 15:42:49 +0100 Message-Id: <1499438577-7674-4-git-send-email-peter.maydell@linaro.org> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1499438577-7674-1-git-send-email-peter.maydell@linaro.org> References: <1499438577-7674-1-git-send-email-peter.maydell@linaro.org> Rename memory_region_init_ram() to memory_region_init_ram_nomigrate(). This leaves the way clear for us to provide a memory_region_init_ram() which does handle migration. Signed-off-by: Peter Maydell --- include/exec/memory.h | 15 ++++++++------- backends/hostmem-ram.c | 2 +- hw/arm/aspeed_soc.c | 2 +- hw/arm/exynos4210.c | 4 ++-- hw/arm/exynos4_boards.c | 4 ++-- hw/arm/fsl-imx25.c | 2 +- hw/arm/fsl-imx31.c | 2 +- hw/arm/fsl-imx6.c | 2 +- hw/arm/highbank.c | 2 +- hw/arm/integratorcp.c | 2 +- hw/arm/mainstone.c | 2 +- hw/arm/musicpal.c | 2 +- hw/arm/omap1.c | 2 +- hw/arm/omap2.c | 2 +- hw/arm/omap_sx1.c | 4 ++-- hw/arm/palm.c | 2 +- hw/arm/pxa2xx.c | 8 ++++---- hw/arm/realview.c | 6 +++--- hw/arm/spitz.c | 2 +- hw/arm/stellaris.c | 4 ++-- hw/arm/stm32f205_soc.c | 4 ++-- hw/arm/tosa.c | 2 +- hw/arm/vexpress.c | 6 +++--- hw/arm/virt.c | 2 +- hw/arm/xilinx_zynq.c | 2 +- hw/arm/xlnx-zynqmp.c | 2 +- hw/block/onenand.c | 2 +- hw/cris/axis_dev88.c | 2 +- hw/display/cg3.c | 4 ++-- hw/display/qxl.c | 6 +++--- hw/display/sm501.c | 2 +- hw/display/tc6393xb.c | 2 +- hw/display/tcx.c | 4 ++-- hw/display/vga.c | 2 +- hw/display/vmware_vga.c | 2 +- hw/i386/pc.c | 2 +- hw/i386/pc_sysfw.c | 4 ++-- hw/i386/pci-assign-load-rom.c | 2 +- hw/i386/xen/xen-hvm.c | 2 +- hw/input/milkymist-softusb.c | 4 ++-- hw/m68k/an5206.c | 2 +- hw/m68k/mcf5208.c | 2 +- hw/microblaze/petalogix_ml605_mmu.c | 4 ++-- hw/microblaze/petalogix_s3adsp1800_mmu.c | 4 ++-- hw/mips/mips_fulong2e.c | 2 +- hw/mips/mips_jazz.c | 4 ++-- hw/mips/mips_malta.c | 2 +- hw/mips/mips_mipssim.c | 2 +- hw/mips/mips_r4k.c | 2 +- hw/moxie/moxiesim.c | 4 ++-- hw/net/dp8393x.c | 2 +- hw/net/milkymist-minimac2.c | 2 +- hw/nios2/10m50_devboard.c | 4 ++-- hw/openrisc/openrisc_sim.c | 2 +- hw/pci-host/prep.c | 2 +- hw/pci-host/xilinx-pcie.c | 2 +- hw/ppc/mac_newworld.c | 2 +- hw/ppc/mac_oldworld.c | 2 +- hw/ppc/ppc405_boards.c | 6 +++--- hw/ppc/ppc405_uc.c | 2 +- hw/s390x/sclp.c | 2 +- hw/sh4/r2d.c | 2 +- hw/sh4/shix.c | 6 +++--- hw/sparc/leon3.c | 2 +- hw/sparc/sun4m.c | 6 +++--- hw/sparc64/sun4u.c | 4 ++-- hw/tricore/tricore_testboard.c | 12 ++++++------ hw/unicore32/puv3.c | 2 +- hw/xtensa/sim.c | 2 +- hw/xtensa/xtfpga.c | 6 +++--- memory.c | 10 +++++----- numa.c | 4 ++-- 72 files changed, 121 insertions(+), 120 deletions(-) -- 2.7.4 diff --git a/include/exec/memory.h b/include/exec/memory.h index 55cb5e7..2ef3e4f 100644 --- a/include/exec/memory.h +++ b/include/exec/memory.h @@ -403,8 +403,9 @@ void memory_region_init_io(MemoryRegion *mr, uint64_t size); /** - * memory_region_init_ram: Initialize RAM memory region. Accesses into the - * region will modify memory directly. + * memory_region_init_ram_nomigrate: Initialize RAM memory region. Accesses + * into the region will modify memory + * directly. * * @mr: the #MemoryRegion to be initialized. * @owner: the object that tracks the region's reference count @@ -416,11 +417,11 @@ void memory_region_init_io(MemoryRegion *mr, * Note that this function does not do anything to cause the data in the * RAM memory region to be migrated; that is the responsibility of the caller. */ -void memory_region_init_ram(MemoryRegion *mr, - struct Object *owner, - const char *name, - uint64_t size, - Error **errp); +void memory_region_init_ram_nomigrate(MemoryRegion *mr, + struct Object *owner, + const char *name, + uint64_t size, + Error **errp); /** * memory_region_init_resizeable_ram: Initialize memory region with resizeable diff --git a/backends/hostmem-ram.c b/backends/hostmem-ram.c index 04a7ac3..38977be 100644 --- a/backends/hostmem-ram.c +++ b/backends/hostmem-ram.c @@ -28,7 +28,7 @@ ram_backend_memory_alloc(HostMemoryBackend *backend, Error **errp) } path = object_get_canonical_path_component(OBJECT(backend)); - memory_region_init_ram(&backend->mr, OBJECT(backend), path, + memory_region_init_ram_nomigrate(&backend->mr, OBJECT(backend), path, backend->size, errp); g_free(path); } diff --git a/hw/arm/aspeed_soc.c b/hw/arm/aspeed_soc.c index 4937e2b..e34a424 100644 --- a/hw/arm/aspeed_soc.c +++ b/hw/arm/aspeed_soc.c @@ -205,7 +205,7 @@ static void aspeed_soc_realize(DeviceState *dev, Error **errp) } /* SRAM */ - memory_region_init_ram(&s->sram, OBJECT(dev), "aspeed.sram", + memory_region_init_ram_nomigrate(&s->sram, OBJECT(dev), "aspeed.sram", sc->info->sram_size, &err); if (err) { error_propagate(errp, err); diff --git a/hw/arm/exynos4210.c b/hw/arm/exynos4210.c index 0050626..a12615c 100644 --- a/hw/arm/exynos4210.c +++ b/hw/arm/exynos4210.c @@ -276,7 +276,7 @@ Exynos4210State *exynos4210_init(MemoryRegion *system_mem) &s->chipid_mem); /* Internal ROM */ - memory_region_init_ram(&s->irom_mem, NULL, "exynos4210.irom", + memory_region_init_ram_nomigrate(&s->irom_mem, NULL, "exynos4210.irom", EXYNOS4210_IROM_SIZE, &error_fatal); vmstate_register_ram_global(&s->irom_mem); memory_region_set_readonly(&s->irom_mem, true); @@ -292,7 +292,7 @@ Exynos4210State *exynos4210_init(MemoryRegion *system_mem) &s->irom_alias_mem); /* Internal RAM */ - memory_region_init_ram(&s->iram_mem, NULL, "exynos4210.iram", + memory_region_init_ram_nomigrate(&s->iram_mem, NULL, "exynos4210.iram", EXYNOS4210_IRAM_SIZE, &error_fatal); vmstate_register_ram_global(&s->iram_mem); memory_region_add_subregion(system_mem, EXYNOS4210_IRAM_BASE_ADDR, diff --git a/hw/arm/exynos4_boards.c b/hw/arm/exynos4_boards.c index 6240b26..c3b0d2e 100644 --- a/hw/arm/exynos4_boards.c +++ b/hw/arm/exynos4_boards.c @@ -110,7 +110,7 @@ static void exynos4_boards_init_ram(Exynos4BoardState *s, unsigned long mem_size = ram_size; if (mem_size > EXYNOS4210_DRAM_MAX_SIZE) { - memory_region_init_ram(&s->dram1_mem, NULL, "exynos4210.dram1", + memory_region_init_ram_nomigrate(&s->dram1_mem, NULL, "exynos4210.dram1", mem_size - EXYNOS4210_DRAM_MAX_SIZE, &error_fatal); vmstate_register_ram_global(&s->dram1_mem); @@ -119,7 +119,7 @@ static void exynos4_boards_init_ram(Exynos4BoardState *s, mem_size = EXYNOS4210_DRAM_MAX_SIZE; } - memory_region_init_ram(&s->dram0_mem, NULL, "exynos4210.dram0", mem_size, + memory_region_init_ram_nomigrate(&s->dram0_mem, NULL, "exynos4210.dram0", mem_size, &error_fatal); vmstate_register_ram_global(&s->dram0_mem); memory_region_add_subregion(system_mem, EXYNOS4210_DRAM0_BASE_ADDR, diff --git a/hw/arm/fsl-imx25.c b/hw/arm/fsl-imx25.c index 40666b6..0455c2b 100644 --- a/hw/arm/fsl-imx25.c +++ b/hw/arm/fsl-imx25.c @@ -267,7 +267,7 @@ static void fsl_imx25_realize(DeviceState *dev, Error **errp) &s->rom[1]); /* initialize internal RAM (128 KB) */ - memory_region_init_ram(&s->iram, NULL, "imx25.iram", FSL_IMX25_IRAM_SIZE, + memory_region_init_ram_nomigrate(&s->iram, NULL, "imx25.iram", FSL_IMX25_IRAM_SIZE, &err); if (err) { error_propagate(errp, err); diff --git a/hw/arm/fsl-imx31.c b/hw/arm/fsl-imx31.c index c301306..35ad1e7 100644 --- a/hw/arm/fsl-imx31.c +++ b/hw/arm/fsl-imx31.c @@ -239,7 +239,7 @@ static void fsl_imx31_realize(DeviceState *dev, Error **errp) &s->rom); /* initialize internal RAM (16 KB) */ - memory_region_init_ram(&s->iram, NULL, "imx31.iram", FSL_IMX31_IRAM_SIZE, + memory_region_init_ram_nomigrate(&s->iram, NULL, "imx31.iram", FSL_IMX31_IRAM_SIZE, &err); if (err) { error_propagate(errp, err); diff --git a/hw/arm/fsl-imx6.c b/hw/arm/fsl-imx6.c index 27773c9..7234950 100644 --- a/hw/arm/fsl-imx6.c +++ b/hw/arm/fsl-imx6.c @@ -419,7 +419,7 @@ static void fsl_imx6_realize(DeviceState *dev, Error **errp) &s->caam); /* OCRAM memory */ - memory_region_init_ram(&s->ocram, NULL, "imx6.ocram", FSL_IMX6_OCRAM_SIZE, + memory_region_init_ram_nomigrate(&s->ocram, NULL, "imx6.ocram", FSL_IMX6_OCRAM_SIZE, &err); if (err) { error_propagate(errp, err); diff --git a/hw/arm/highbank.c b/hw/arm/highbank.c index d209b97..012bb64 100644 --- a/hw/arm/highbank.c +++ b/hw/arm/highbank.c @@ -276,7 +276,7 @@ static void calxeda_init(MachineState *machine, enum cxmachines machine_id) memory_region_add_subregion(sysmem, 0, dram); sysram = g_new(MemoryRegion, 1); - memory_region_init_ram(sysram, NULL, "highbank.sysram", 0x8000, + memory_region_init_ram_nomigrate(sysram, NULL, "highbank.sysram", 0x8000, &error_fatal); memory_region_add_subregion(sysmem, 0xfff88000, sysram); if (bios_name != NULL) { diff --git a/hw/arm/integratorcp.c b/hw/arm/integratorcp.c index ca3eca1..d79221d 100644 --- a/hw/arm/integratorcp.c +++ b/hw/arm/integratorcp.c @@ -276,7 +276,7 @@ static void integratorcm_init(Object *obj) s->cm_init = 0x00000112; s->cm_refcnt_offset = muldiv64(qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL), 24, 1000); - memory_region_init_ram(&s->flash, obj, "integrator.flash", 0x100000, + memory_region_init_ram_nomigrate(&s->flash, obj, "integrator.flash", 0x100000, &error_fatal); vmstate_register_ram_global(&s->flash); diff --git a/hw/arm/mainstone.c b/hw/arm/mainstone.c index f962236..4ade8a2 100644 --- a/hw/arm/mainstone.c +++ b/hw/arm/mainstone.c @@ -128,7 +128,7 @@ static void mainstone_common_init(MemoryRegion *address_space_mem, /* Setup CPU & memory */ mpu = pxa270_init(address_space_mem, mainstone_binfo.ram_size, cpu_model); - memory_region_init_ram(rom, NULL, "mainstone.rom", MAINSTONE_ROM, + memory_region_init_ram_nomigrate(rom, NULL, "mainstone.rom", MAINSTONE_ROM, &error_fatal); vmstate_register_ram_global(rom); memory_region_set_readonly(rom, true); diff --git a/hw/arm/musicpal.c b/hw/arm/musicpal.c index 9c710f7..ee5dfed 100644 --- a/hw/arm/musicpal.c +++ b/hw/arm/musicpal.c @@ -1604,7 +1604,7 @@ static void musicpal_init(MachineState *machine) MP_RAM_DEFAULT_SIZE); memory_region_add_subregion(address_space_mem, 0, ram); - memory_region_init_ram(sram, NULL, "musicpal.sram", MP_SRAM_SIZE, + memory_region_init_ram_nomigrate(sram, NULL, "musicpal.sram", MP_SRAM_SIZE, &error_fatal); vmstate_register_ram_global(sram); memory_region_add_subregion(address_space_mem, MP_SRAM_BASE, sram); diff --git a/hw/arm/omap1.c b/hw/arm/omap1.c index 54582bd..f4afb88 100644 --- a/hw/arm/omap1.c +++ b/hw/arm/omap1.c @@ -3880,7 +3880,7 @@ struct omap_mpu_state_s *omap310_mpu_init(MemoryRegion *system_memory, memory_region_allocate_system_memory(&s->emiff_ram, NULL, "omap1.dram", s->sdram_size); memory_region_add_subregion(system_memory, OMAP_EMIFF_BASE, &s->emiff_ram); - memory_region_init_ram(&s->imif_ram, NULL, "omap1.sram", s->sram_size, + memory_region_init_ram_nomigrate(&s->imif_ram, NULL, "omap1.sram", s->sram_size, &error_fatal); vmstate_register_ram_global(&s->imif_ram); memory_region_add_subregion(system_memory, OMAP_IMIF_BASE, &s->imif_ram); diff --git a/hw/arm/omap2.c b/hw/arm/omap2.c index 91f5733..504bfe1 100644 --- a/hw/arm/omap2.c +++ b/hw/arm/omap2.c @@ -2278,7 +2278,7 @@ struct omap_mpu_state_s *omap2420_mpu_init(MemoryRegion *sysmem, memory_region_allocate_system_memory(&s->sdram, NULL, "omap2.dram", s->sdram_size); memory_region_add_subregion(sysmem, OMAP2_Q2_BASE, &s->sdram); - memory_region_init_ram(&s->sram, NULL, "omap2.sram", s->sram_size, + memory_region_init_ram_nomigrate(&s->sram, NULL, "omap2.sram", s->sram_size, &error_fatal); vmstate_register_ram_global(&s->sram); memory_region_add_subregion(sysmem, OMAP2_SRAM_BASE, &s->sram); diff --git a/hw/arm/omap_sx1.c b/hw/arm/omap_sx1.c index 5d74026..d70c6b6 100644 --- a/hw/arm/omap_sx1.c +++ b/hw/arm/omap_sx1.c @@ -123,7 +123,7 @@ static void sx1_init(MachineState *machine, const int version) machine->cpu_model); /* External Flash (EMIFS) */ - memory_region_init_ram(flash, NULL, "omap_sx1.flash0-0", flash_size, + memory_region_init_ram_nomigrate(flash, NULL, "omap_sx1.flash0-0", flash_size, &error_fatal); vmstate_register_ram_global(flash); memory_region_set_readonly(flash, true); @@ -167,7 +167,7 @@ static void sx1_init(MachineState *machine, const int version) if ((version == 1) && (dinfo = drive_get(IF_PFLASH, 0, fl_idx)) != NULL) { MemoryRegion *flash_1 = g_new(MemoryRegion, 1); - memory_region_init_ram(flash_1, NULL, "omap_sx1.flash1-0", flash1_size, + memory_region_init_ram_nomigrate(flash_1, NULL, "omap_sx1.flash1-0", flash1_size, &error_fatal); vmstate_register_ram_global(flash_1); memory_region_set_readonly(flash_1, true); diff --git a/hw/arm/palm.c b/hw/arm/palm.c index 7f46073..abacdff 100644 --- a/hw/arm/palm.c +++ b/hw/arm/palm.c @@ -214,7 +214,7 @@ static void palmte_init(MachineState *machine) mpu = omap310_mpu_init(address_space_mem, sdram_size, cpu_model); /* External Flash (EMIFS) */ - memory_region_init_ram(flash, NULL, "palmte.flash", flash_size, + memory_region_init_ram_nomigrate(flash, NULL, "palmte.flash", flash_size, &error_fatal); vmstate_register_ram_global(flash); memory_region_set_readonly(flash, true); diff --git a/hw/arm/pxa2xx.c b/hw/arm/pxa2xx.c index 629e6c6..ae46659 100644 --- a/hw/arm/pxa2xx.c +++ b/hw/arm/pxa2xx.c @@ -2073,11 +2073,11 @@ PXA2xxState *pxa270_init(MemoryRegion *address_space, s->reset = qemu_allocate_irq(pxa2xx_reset, s, 0); /* SDRAM & Internal Memory Storage */ - memory_region_init_ram(&s->sdram, NULL, "pxa270.sdram", sdram_size, + memory_region_init_ram_nomigrate(&s->sdram, NULL, "pxa270.sdram", sdram_size, &error_fatal); vmstate_register_ram_global(&s->sdram); memory_region_add_subregion(address_space, PXA2XX_SDRAM_BASE, &s->sdram); - memory_region_init_ram(&s->internal, NULL, "pxa270.internal", 0x40000, + memory_region_init_ram_nomigrate(&s->internal, NULL, "pxa270.internal", 0x40000, &error_fatal); vmstate_register_ram_global(&s->internal); memory_region_add_subregion(address_space, PXA2XX_INTERNAL_BASE, @@ -2205,11 +2205,11 @@ PXA2xxState *pxa255_init(MemoryRegion *address_space, unsigned int sdram_size) s->reset = qemu_allocate_irq(pxa2xx_reset, s, 0); /* SDRAM & Internal Memory Storage */ - memory_region_init_ram(&s->sdram, NULL, "pxa255.sdram", sdram_size, + memory_region_init_ram_nomigrate(&s->sdram, NULL, "pxa255.sdram", sdram_size, &error_fatal); vmstate_register_ram_global(&s->sdram); memory_region_add_subregion(address_space, PXA2XX_SDRAM_BASE, &s->sdram); - memory_region_init_ram(&s->internal, NULL, "pxa255.internal", + memory_region_init_ram_nomigrate(&s->internal, NULL, "pxa255.internal", PXA2XX_INTERNAL_SIZE, &error_fatal); vmstate_register_ram_global(&s->internal); memory_region_add_subregion(address_space, PXA2XX_INTERNAL_BASE, diff --git a/hw/arm/realview.c b/hw/arm/realview.c index b7d4753..a5e8f86 100644 --- a/hw/arm/realview.c +++ b/hw/arm/realview.c @@ -143,13 +143,13 @@ static void realview_init(MachineState *machine, ram_lo = g_new(MemoryRegion, 1); low_ram_size = ram_size - 0x20000000; ram_size = 0x20000000; - memory_region_init_ram(ram_lo, NULL, "realview.lowmem", low_ram_size, + memory_region_init_ram_nomigrate(ram_lo, NULL, "realview.lowmem", low_ram_size, &error_fatal); vmstate_register_ram_global(ram_lo); memory_region_add_subregion(sysmem, 0x20000000, ram_lo); } - memory_region_init_ram(ram_hi, NULL, "realview.highmem", ram_size, + memory_region_init_ram_nomigrate(ram_hi, NULL, "realview.highmem", ram_size, &error_fatal); vmstate_register_ram_global(ram_hi); low_ram_size = ram_size; @@ -345,7 +345,7 @@ static void realview_init(MachineState *machine, startup code. I guess this works on real hardware because the BootROM happens to be in ROM/flash or in memory that isn't clobbered until after Linux boots the secondary CPUs. */ - memory_region_init_ram(ram_hack, NULL, "realview.hack", 0x1000, + memory_region_init_ram_nomigrate(ram_hack, NULL, "realview.hack", 0x1000, &error_fatal); vmstate_register_ram_global(ram_hack); memory_region_add_subregion(sysmem, SMP_BOOT_ADDR, ram_hack); diff --git a/hw/arm/spitz.c b/hw/arm/spitz.c index 93bde14..f89584c 100644 --- a/hw/arm/spitz.c +++ b/hw/arm/spitz.c @@ -919,7 +919,7 @@ static void spitz_common_init(MachineState *machine, sl_flash_register(mpu, (model == spitz) ? FLASH_128M : FLASH_1024M); - memory_region_init_ram(rom, NULL, "spitz.rom", SPITZ_ROM, &error_fatal); + memory_region_init_ram_nomigrate(rom, NULL, "spitz.rom", SPITZ_ROM, &error_fatal); vmstate_register_ram_global(rom); memory_region_set_readonly(rom, true); memory_region_add_subregion(address_space_mem, 0, rom); diff --git a/hw/arm/stellaris.c b/hw/arm/stellaris.c index cf6e7be..ce23f36 100644 --- a/hw/arm/stellaris.c +++ b/hw/arm/stellaris.c @@ -1288,13 +1288,13 @@ static void stellaris_init(const char *kernel_filename, const char *cpu_model, sram_size = ((board->dc0 >> 18) + 1) * 1024; /* Flash programming is done via the SCU, so pretend it is ROM. */ - memory_region_init_ram(flash, NULL, "stellaris.flash", flash_size, + memory_region_init_ram_nomigrate(flash, NULL, "stellaris.flash", flash_size, &error_fatal); vmstate_register_ram_global(flash); memory_region_set_readonly(flash, true); memory_region_add_subregion(system_memory, 0, flash); - memory_region_init_ram(sram, NULL, "stellaris.sram", sram_size, + memory_region_init_ram_nomigrate(sram, NULL, "stellaris.sram", sram_size, &error_fatal); vmstate_register_ram_global(sram); memory_region_add_subregion(system_memory, 0x20000000, sram); diff --git a/hw/arm/stm32f205_soc.c b/hw/arm/stm32f205_soc.c index 6e1260d..2e9dff1 100644 --- a/hw/arm/stm32f205_soc.c +++ b/hw/arm/stm32f205_soc.c @@ -95,7 +95,7 @@ static void stm32f205_soc_realize(DeviceState *dev_soc, Error **errp) MemoryRegion *flash = g_new(MemoryRegion, 1); MemoryRegion *flash_alias = g_new(MemoryRegion, 1); - memory_region_init_ram(flash, NULL, "STM32F205.flash", FLASH_SIZE, + memory_region_init_ram_nomigrate(flash, NULL, "STM32F205.flash", FLASH_SIZE, &error_fatal); memory_region_init_alias(flash_alias, NULL, "STM32F205.flash.alias", flash, 0, FLASH_SIZE); @@ -108,7 +108,7 @@ static void stm32f205_soc_realize(DeviceState *dev_soc, Error **errp) memory_region_add_subregion(system_memory, FLASH_BASE_ADDRESS, flash); memory_region_add_subregion(system_memory, 0, flash_alias); - memory_region_init_ram(sram, NULL, "STM32F205.sram", SRAM_SIZE, + memory_region_init_ram_nomigrate(sram, NULL, "STM32F205.sram", SRAM_SIZE, &error_fatal); vmstate_register_ram_global(sram); memory_region_add_subregion(system_memory, SRAM_BASE_ADDRESS, sram); diff --git a/hw/arm/tosa.c b/hw/arm/tosa.c index 2421b81..bfd1153 100644 --- a/hw/arm/tosa.c +++ b/hw/arm/tosa.c @@ -234,7 +234,7 @@ static void tosa_init(MachineState *machine) mpu = pxa255_init(address_space_mem, tosa_binfo.ram_size); - memory_region_init_ram(rom, NULL, "tosa.rom", TOSA_ROM, &error_fatal); + memory_region_init_ram_nomigrate(rom, NULL, "tosa.rom", TOSA_ROM, &error_fatal); vmstate_register_ram_global(rom); memory_region_set_readonly(rom, true); memory_region_add_subregion(address_space_mem, 0, rom); diff --git a/hw/arm/vexpress.c b/hw/arm/vexpress.c index c6b1e67..874d885 100644 --- a/hw/arm/vexpress.c +++ b/hw/arm/vexpress.c @@ -390,7 +390,7 @@ static void a15_daughterboard_init(const VexpressMachineState *vms, /* 0x2b060000: SP805 watchdog: not modelled */ /* 0x2b0a0000: PL341 dynamic memory controller: not modelled */ /* 0x2e000000: system SRAM */ - memory_region_init_ram(sram, NULL, "vexpress.a15sram", 0x10000, + memory_region_init_ram_nomigrate(sram, NULL, "vexpress.a15sram", 0x10000, &error_fatal); vmstate_register_ram_global(sram); memory_region_add_subregion(sysmem, 0x2e000000, sram); @@ -673,13 +673,13 @@ static void vexpress_common_init(MachineState *machine) } sram_size = 0x2000000; - memory_region_init_ram(sram, NULL, "vexpress.sram", sram_size, + memory_region_init_ram_nomigrate(sram, NULL, "vexpress.sram", sram_size, &error_fatal); vmstate_register_ram_global(sram); memory_region_add_subregion(sysmem, map[VE_SRAM], sram); vram_size = 0x800000; - memory_region_init_ram(vram, NULL, "vexpress.vram", vram_size, + memory_region_init_ram_nomigrate(vram, NULL, "vexpress.vram", vram_size, &error_fatal); vmstate_register_ram_global(vram); memory_region_add_subregion(sysmem, map[VE_VIDEORAM], vram); diff --git a/hw/arm/virt.c b/hw/arm/virt.c index 010f724..30f010a 100644 --- a/hw/arm/virt.c +++ b/hw/arm/virt.c @@ -1155,7 +1155,7 @@ static void create_secure_ram(VirtMachineState *vms, hwaddr base = vms->memmap[VIRT_SECURE_MEM].base; hwaddr size = vms->memmap[VIRT_SECURE_MEM].size; - memory_region_init_ram(secram, NULL, "virt.secure-ram", size, &error_fatal); + memory_region_init_ram_nomigrate(secram, NULL, "virt.secure-ram", size, &error_fatal); vmstate_register_ram_global(secram); memory_region_add_subregion(secure_sysmem, base, secram); diff --git a/hw/arm/xilinx_zynq.c b/hw/arm/xilinx_zynq.c index 3985356..8ae6535 100644 --- a/hw/arm/xilinx_zynq.c +++ b/hw/arm/xilinx_zynq.c @@ -204,7 +204,7 @@ static void zynq_init(MachineState *machine) memory_region_add_subregion(address_space_mem, 0, ext_ram); /* 256K of on-chip memory */ - memory_region_init_ram(ocm_ram, NULL, "zynq.ocm_ram", 256 << 10, + memory_region_init_ram_nomigrate(ocm_ram, NULL, "zynq.ocm_ram", 256 << 10, &error_fatal); vmstate_register_ram_global(ocm_ram); memory_region_add_subregion(address_space_mem, 0xFFFC0000, ocm_ram); diff --git a/hw/arm/xlnx-zynqmp.c b/hw/arm/xlnx-zynqmp.c index 64f52f8..d6f73d7 100644 --- a/hw/arm/xlnx-zynqmp.c +++ b/hw/arm/xlnx-zynqmp.c @@ -226,7 +226,7 @@ static void xlnx_zynqmp_realize(DeviceState *dev, Error **errp) for (i = 0; i < XLNX_ZYNQMP_NUM_OCM_BANKS; i++) { char *ocm_name = g_strdup_printf("zynqmp.ocm_ram_bank_%d", i); - memory_region_init_ram(&s->ocm_ram[i], NULL, ocm_name, + memory_region_init_ram_nomigrate(&s->ocm_ram[i], NULL, ocm_name, XLNX_ZYNQMP_OCM_RAM_SIZE, &error_fatal); vmstate_register_ram_global(&s->ocm_ram[i]); memory_region_add_subregion(get_system_memory(), diff --git a/hw/block/onenand.c b/hw/block/onenand.c index ddf5492..b742360 100644 --- a/hw/block/onenand.c +++ b/hw/block/onenand.c @@ -807,7 +807,7 @@ static int onenand_initfn(SysBusDevice *sbd) } s->otp = memset(g_malloc((64 + 2) << PAGE_SHIFT), 0xff, (64 + 2) << PAGE_SHIFT); - memory_region_init_ram(&s->ram, OBJECT(s), "onenand.ram", + memory_region_init_ram_nomigrate(&s->ram, OBJECT(s), "onenand.ram", 0xc000 << s->shift, &error_fatal); vmstate_register_ram_global(&s->ram); ram = memory_region_get_ram_ptr(&s->ram); diff --git a/hw/cris/axis_dev88.c b/hw/cris/axis_dev88.c index 60df887..8a2564d 100644 --- a/hw/cris/axis_dev88.c +++ b/hw/cris/axis_dev88.c @@ -281,7 +281,7 @@ void axisdev88_init(MachineState *machine) /* The ETRAX-FS has 128Kb on chip ram, the docs refer to it as the internal memory. */ - memory_region_init_ram(phys_intmem, NULL, "axisdev88.chipram", INTMEM_SIZE, + memory_region_init_ram_nomigrate(phys_intmem, NULL, "axisdev88.chipram", INTMEM_SIZE, &error_fatal); vmstate_register_ram_global(phys_intmem); memory_region_add_subregion(address_space_mem, 0x38000000, phys_intmem); diff --git a/hw/display/cg3.c b/hw/display/cg3.c index 1de15a1..54439b2 100644 --- a/hw/display/cg3.c +++ b/hw/display/cg3.c @@ -283,7 +283,7 @@ static void cg3_initfn(Object *obj) SysBusDevice *sbd = SYS_BUS_DEVICE(obj); CG3State *s = CG3(obj); - memory_region_init_ram(&s->rom, obj, "cg3.prom", FCODE_MAX_ROM_SIZE, + memory_region_init_ram_nomigrate(&s->rom, obj, "cg3.prom", FCODE_MAX_ROM_SIZE, &error_fatal); memory_region_set_readonly(&s->rom, true); sysbus_init_mmio(sbd, &s->rom); @@ -311,7 +311,7 @@ static void cg3_realizefn(DeviceState *dev, Error **errp) } } - memory_region_init_ram(&s->vram_mem, NULL, "cg3.vram", s->vram_size, + memory_region_init_ram_nomigrate(&s->vram_mem, NULL, "cg3.vram", s->vram_size, &error_fatal); memory_region_set_log(&s->vram_mem, true, DIRTY_MEMORY_VGA); vmstate_register_ram_global(&s->vram_mem); diff --git a/hw/display/qxl.c b/hw/display/qxl.c index 3c1688e..40e9372 100644 --- a/hw/display/qxl.c +++ b/hw/display/qxl.c @@ -2089,14 +2089,14 @@ static void qxl_realize_common(PCIQXLDevice *qxl, Error **errp) pci_set_byte(&config[PCI_INTERRUPT_PIN], 1); qxl->rom_size = qxl_rom_size(); - memory_region_init_ram(&qxl->rom_bar, OBJECT(qxl), "qxl.vrom", + memory_region_init_ram_nomigrate(&qxl->rom_bar, OBJECT(qxl), "qxl.vrom", qxl->rom_size, &error_fatal); vmstate_register_ram(&qxl->rom_bar, &qxl->pci.qdev); init_qxl_rom(qxl); init_qxl_ram(qxl); qxl->guest_surfaces.cmds = g_new0(QXLPHYSICAL, qxl->ssd.num_surfaces); - memory_region_init_ram(&qxl->vram_bar, OBJECT(qxl), "qxl.vram", + memory_region_init_ram_nomigrate(&qxl->vram_bar, OBJECT(qxl), "qxl.vram", qxl->vram_size, &error_fatal); vmstate_register_ram(&qxl->vram_bar, &qxl->pci.qdev); memory_region_init_alias(&qxl->vram32_bar, OBJECT(qxl), "qxl.vram32", @@ -2198,7 +2198,7 @@ static void qxl_realize_secondary(PCIDevice *dev, Error **errp) qxl->id = device_id++; qxl_init_ramsize(qxl); - memory_region_init_ram(&qxl->vga.vram, OBJECT(dev), "qxl.vgavram", + memory_region_init_ram_nomigrate(&qxl->vga.vram, OBJECT(dev), "qxl.vgavram", qxl->vga.vram_size, &error_fatal); vmstate_register_ram(&qxl->vga.vram, &qxl->pci.qdev); qxl->vga.vram_ptr = memory_region_get_ram_ptr(&qxl->vga.vram); diff --git a/hw/display/sm501.c b/hw/display/sm501.c index 9d254ef..af792c5 100644 --- a/hw/display/sm501.c +++ b/hw/display/sm501.c @@ -1578,7 +1578,7 @@ static void sm501_init(SM501State *s, DeviceState *dev, s->local_mem_size_index); /* local memory */ - memory_region_init_ram(&s->local_mem_region, OBJECT(dev), "sm501.local", + memory_region_init_ram_nomigrate(&s->local_mem_region, OBJECT(dev), "sm501.local", get_local_mem_size(s), &error_fatal); vmstate_register_ram_global(&s->local_mem_region); memory_region_set_log(&s->local_mem_region, true, DIRTY_MEMORY_VGA); diff --git a/hw/display/tc6393xb.c b/hw/display/tc6393xb.c index 92f7120..762e370 100644 --- a/hw/display/tc6393xb.c +++ b/hw/display/tc6393xb.c @@ -586,7 +586,7 @@ TC6393xbState *tc6393xb_init(MemoryRegion *sysmem, uint32_t base, qemu_irq irq) memory_region_init_io(&s->iomem, NULL, &tc6393xb_ops, s, "tc6393xb", 0x10000); memory_region_add_subregion(sysmem, base, &s->iomem); - memory_region_init_ram(&s->vram, NULL, "tc6393xb.vram", 0x100000, + memory_region_init_ram_nomigrate(&s->vram, NULL, "tc6393xb.vram", 0x100000, &error_fatal); vmstate_register_ram_global(&s->vram); s->vram_ptr = memory_region_get_ram_ptr(&s->vram); diff --git a/hw/display/tcx.c b/hw/display/tcx.c index 6593c1d..daa93e0 100644 --- a/hw/display/tcx.c +++ b/hw/display/tcx.c @@ -752,7 +752,7 @@ static void tcx_initfn(Object *obj) SysBusDevice *sbd = SYS_BUS_DEVICE(obj); TCXState *s = TCX(obj); - memory_region_init_ram(&s->rom, obj, "tcx.prom", FCODE_MAX_ROM_SIZE, + memory_region_init_ram_nomigrate(&s->rom, obj, "tcx.prom", FCODE_MAX_ROM_SIZE, &error_fatal); memory_region_set_readonly(&s->rom, true); sysbus_init_mmio(sbd, &s->rom); @@ -812,7 +812,7 @@ static void tcx_realizefn(DeviceState *dev, Error **errp) uint8_t *vram_base; char *fcode_filename; - memory_region_init_ram(&s->vram_mem, OBJECT(s), "tcx.vram", + memory_region_init_ram_nomigrate(&s->vram_mem, OBJECT(s), "tcx.vram", s->vram_size * (1 + 4 + 4), &error_fatal); vmstate_register_ram_global(&s->vram_mem); memory_region_set_log(&s->vram_mem, true, DIRTY_MEMORY_VGA); diff --git a/hw/display/vga.c b/hw/display/vga.c index 80508b8..63421f9 100644 --- a/hw/display/vga.c +++ b/hw/display/vga.c @@ -2166,7 +2166,7 @@ void vga_common_init(VGACommonState *s, Object *obj, bool global_vmstate) } s->is_vbe_vmstate = 1; - memory_region_init_ram(&s->vram, obj, "vga.vram", s->vram_size, + memory_region_init_ram_nomigrate(&s->vram, obj, "vga.vram", s->vram_size, &error_fatal); vmstate_register_ram(&s->vram, global_vmstate ? NULL : DEVICE(obj)); xen_register_framebuffer(&s->vram); diff --git a/hw/display/vmware_vga.c b/hw/display/vmware_vga.c index c989cef..120b0dd 100644 --- a/hw/display/vmware_vga.c +++ b/hw/display/vmware_vga.c @@ -1239,7 +1239,7 @@ static void vmsvga_init(DeviceState *dev, struct vmsvga_state_s *s, s->vga.con = graphic_console_init(dev, 0, &vmsvga_ops, s); s->fifo_size = SVGA_FIFO_SIZE; - memory_region_init_ram(&s->fifo_ram, NULL, "vmsvga.fifo", s->fifo_size, + memory_region_init_ram_nomigrate(&s->fifo_ram, NULL, "vmsvga.fifo", s->fifo_size, &error_fatal); vmstate_register_ram_global(&s->fifo_ram); s->fifo_ptr = memory_region_get_ram_ptr(&s->fifo_ram); diff --git a/hw/i386/pc.c b/hw/i386/pc.c index 224fe58..72c03ec 100644 --- a/hw/i386/pc.c +++ b/hw/i386/pc.c @@ -1442,7 +1442,7 @@ void pc_memory_init(PCMachineState *pcms, pc_system_firmware_init(rom_memory, !pcmc->pci_enabled); option_rom_mr = g_malloc(sizeof(*option_rom_mr)); - memory_region_init_ram(option_rom_mr, NULL, "pc.rom", PC_ROM_SIZE, + memory_region_init_ram_nomigrate(option_rom_mr, NULL, "pc.rom", PC_ROM_SIZE, &error_fatal); vmstate_register_ram_global(option_rom_mr); memory_region_add_subregion_overlap(rom_memory, diff --git a/hw/i386/pc_sysfw.c b/hw/i386/pc_sysfw.c index f915ad0..fbfd0c4 100644 --- a/hw/i386/pc_sysfw.c +++ b/hw/i386/pc_sysfw.c @@ -57,7 +57,7 @@ static void pc_isa_bios_init(MemoryRegion *rom_memory, /* map the last 128KB of the BIOS in ISA space */ isa_bios_size = MIN(flash_size, 128 * 1024); isa_bios = g_malloc(sizeof(*isa_bios)); - memory_region_init_ram(isa_bios, NULL, "isa-bios", isa_bios_size, + memory_region_init_ram_nomigrate(isa_bios, NULL, "isa-bios", isa_bios_size, &error_fatal); vmstate_register_ram_global(isa_bios); memory_region_add_subregion_overlap(rom_memory, @@ -195,7 +195,7 @@ static void old_pc_system_rom_init(MemoryRegion *rom_memory, bool isapc_ram_fw) goto bios_error; } bios = g_malloc(sizeof(*bios)); - memory_region_init_ram(bios, NULL, "pc.bios", bios_size, &error_fatal); + memory_region_init_ram_nomigrate(bios, NULL, "pc.bios", bios_size, &error_fatal); vmstate_register_ram_global(bios); if (!isapc_ram_fw) { memory_region_set_readonly(bios, true); diff --git a/hw/i386/pci-assign-load-rom.c b/hw/i386/pci-assign-load-rom.c index fd59076..43429b6 100644 --- a/hw/i386/pci-assign-load-rom.c +++ b/hw/i386/pci-assign-load-rom.c @@ -59,7 +59,7 @@ void *pci_assign_dev_load_option_rom(PCIDevice *dev, struct Object *owner, fseek(fp, 0, SEEK_SET); snprintf(name, sizeof(name), "%s.rom", object_get_typename(owner)); - memory_region_init_ram(&dev->rom, owner, name, st.st_size, &error_abort); + memory_region_init_ram_nomigrate(&dev->rom, owner, name, st.st_size, &error_abort); vmstate_register_ram(&dev->rom, &dev->qdev); ptr = memory_region_get_ram_ptr(&dev->rom); memset(ptr, 0xff, st.st_size); diff --git a/hw/i386/xen/xen-hvm.c b/hw/i386/xen/xen-hvm.c index cffa7e2..55ec96d 100644 --- a/hw/i386/xen/xen-hvm.c +++ b/hw/i386/xen/xen-hvm.c @@ -212,7 +212,7 @@ static void xen_ram_init(PCMachineState *pcms, */ block_len = (1ULL << 32) + pcms->above_4g_mem_size; } - memory_region_init_ram(&ram_memory, NULL, "xen.ram", block_len, + memory_region_init_ram_nomigrate(&ram_memory, NULL, "xen.ram", block_len, &error_fatal); *ram_memory_p = &ram_memory; vmstate_register_ram_global(&ram_memory); diff --git a/hw/input/milkymist-softusb.c b/hw/input/milkymist-softusb.c index 40dfca1..ef8f47c 100644 --- a/hw/input/milkymist-softusb.c +++ b/hw/input/milkymist-softusb.c @@ -256,12 +256,12 @@ static int milkymist_softusb_init(SysBusDevice *dev) sysbus_init_mmio(dev, &s->regs_region); /* register pmem and dmem */ - memory_region_init_ram(&s->pmem, OBJECT(s), "milkymist-softusb.pmem", + memory_region_init_ram_nomigrate(&s->pmem, OBJECT(s), "milkymist-softusb.pmem", s->pmem_size, &error_fatal); vmstate_register_ram_global(&s->pmem); s->pmem_ptr = memory_region_get_ram_ptr(&s->pmem); sysbus_init_mmio(dev, &s->pmem); - memory_region_init_ram(&s->dmem, OBJECT(s), "milkymist-softusb.dmem", + memory_region_init_ram_nomigrate(&s->dmem, OBJECT(s), "milkymist-softusb.dmem", s->dmem_size, &error_fatal); vmstate_register_ram_global(&s->dmem); s->dmem_ptr = memory_region_get_ram_ptr(&s->dmem); diff --git a/hw/m68k/an5206.c b/hw/m68k/an5206.c index 142bab9..6fd3c6f 100644 --- a/hw/m68k/an5206.c +++ b/hw/m68k/an5206.c @@ -60,7 +60,7 @@ static void an5206_init(MachineState *machine) memory_region_add_subregion(address_space_mem, 0, ram); /* Internal SRAM. */ - memory_region_init_ram(sram, NULL, "an5206.sram", 512, &error_fatal); + memory_region_init_ram_nomigrate(sram, NULL, "an5206.sram", 512, &error_fatal); vmstate_register_ram_global(sram); memory_region_add_subregion(address_space_mem, AN5206_RAMBAR_ADDR, sram); diff --git a/hw/m68k/mcf5208.c b/hw/m68k/mcf5208.c index 6563518..f4abe1d 100644 --- a/hw/m68k/mcf5208.c +++ b/hw/m68k/mcf5208.c @@ -248,7 +248,7 @@ static void mcf5208evb_init(MachineState *machine) memory_region_add_subregion(address_space_mem, 0x40000000, ram); /* Internal SRAM. */ - memory_region_init_ram(sram, NULL, "mcf5208.sram", 16384, &error_fatal); + memory_region_init_ram_nomigrate(sram, NULL, "mcf5208.sram", 16384, &error_fatal); vmstate_register_ram_global(sram); memory_region_add_subregion(address_space_mem, 0x80000000, sram); diff --git a/hw/microblaze/petalogix_ml605_mmu.c b/hw/microblaze/petalogix_ml605_mmu.c index 4968bdb..fb022cd 100644 --- a/hw/microblaze/petalogix_ml605_mmu.c +++ b/hw/microblaze/petalogix_ml605_mmu.c @@ -96,12 +96,12 @@ petalogix_ml605_init(MachineState *machine) object_property_set_bool(OBJECT(cpu), true, "realized", &error_abort); /* Attach emulated BRAM through the LMB. */ - memory_region_init_ram(phys_lmb_bram, NULL, "petalogix_ml605.lmb_bram", + memory_region_init_ram_nomigrate(phys_lmb_bram, NULL, "petalogix_ml605.lmb_bram", LMB_BRAM_SIZE, &error_fatal); vmstate_register_ram_global(phys_lmb_bram); memory_region_add_subregion(address_space_mem, 0x00000000, phys_lmb_bram); - memory_region_init_ram(phys_ram, NULL, "petalogix_ml605.ram", ram_size, + memory_region_init_ram_nomigrate(phys_ram, NULL, "petalogix_ml605.ram", ram_size, &error_fatal); vmstate_register_ram_global(phys_ram); memory_region_add_subregion(address_space_mem, MEMORY_BASEADDR, phys_ram); diff --git a/hw/microblaze/petalogix_s3adsp1800_mmu.c b/hw/microblaze/petalogix_s3adsp1800_mmu.c index 423bcd7..d71fcd5 100644 --- a/hw/microblaze/petalogix_s3adsp1800_mmu.c +++ b/hw/microblaze/petalogix_s3adsp1800_mmu.c @@ -75,13 +75,13 @@ petalogix_s3adsp1800_init(MachineState *machine) object_property_set_bool(OBJECT(cpu), true, "realized", &error_abort); /* Attach emulated BRAM through the LMB. */ - memory_region_init_ram(phys_lmb_bram, NULL, + memory_region_init_ram_nomigrate(phys_lmb_bram, NULL, "petalogix_s3adsp1800.lmb_bram", LMB_BRAM_SIZE, &error_fatal); vmstate_register_ram_global(phys_lmb_bram); memory_region_add_subregion(sysmem, 0x00000000, phys_lmb_bram); - memory_region_init_ram(phys_ram, NULL, "petalogix_s3adsp1800.ram", + memory_region_init_ram_nomigrate(phys_ram, NULL, "petalogix_s3adsp1800.ram", ram_size, &error_fatal); vmstate_register_ram_global(phys_ram); memory_region_add_subregion(sysmem, ddr_base, phys_ram); diff --git a/hw/mips/mips_fulong2e.c b/hw/mips/mips_fulong2e.c index dbe2805..def3717 100644 --- a/hw/mips/mips_fulong2e.c +++ b/hw/mips/mips_fulong2e.c @@ -294,7 +294,7 @@ static void mips_fulong2e_init(MachineState *machine) /* allocate RAM */ memory_region_allocate_system_memory(ram, NULL, "fulong2e.ram", ram_size); - memory_region_init_ram(bios, NULL, "fulong2e.bios", bios_size, + memory_region_init_ram_nomigrate(bios, NULL, "fulong2e.bios", bios_size, &error_fatal); vmstate_register_ram_global(bios); memory_region_set_readonly(bios, true); diff --git a/hw/mips/mips_jazz.c b/hw/mips/mips_jazz.c index 1cef581..fcf0529 100644 --- a/hw/mips/mips_jazz.c +++ b/hw/mips/mips_jazz.c @@ -175,7 +175,7 @@ static void mips_jazz_init(MachineState *machine, machine->ram_size); memory_region_add_subregion(address_space, 0, ram); - memory_region_init_ram(bios, NULL, "mips_jazz.bios", MAGNUM_BIOS_SIZE, + memory_region_init_ram_nomigrate(bios, NULL, "mips_jazz.bios", MAGNUM_BIOS_SIZE, &error_fatal); vmstate_register_ram_global(bios); memory_region_set_readonly(bios, true); @@ -242,7 +242,7 @@ static void mips_jazz_init(MachineState *machine, { /* Simple ROM, so user doesn't have to provide one */ MemoryRegion *rom_mr = g_new(MemoryRegion, 1); - memory_region_init_ram(rom_mr, NULL, "g364fb.rom", 0x80000, + memory_region_init_ram_nomigrate(rom_mr, NULL, "g364fb.rom", 0x80000, &error_fatal); vmstate_register_ram_global(rom_mr); memory_region_set_readonly(rom_mr, true); diff --git a/hw/mips/mips_malta.c b/hw/mips/mips_malta.c index 95cdabb..8b805dc 100644 --- a/hw/mips/mips_malta.c +++ b/hw/mips/mips_malta.c @@ -1177,7 +1177,7 @@ void mips_malta_init(MachineState *machine) * handled by an overlapping region as the resulting ROM code subpage * regions are not executable. */ - memory_region_init_ram(bios_copy, NULL, "bios.1fc", BIOS_SIZE, + memory_region_init_ram_nomigrate(bios_copy, NULL, "bios.1fc", BIOS_SIZE, &error_fatal); if (!rom_copy(memory_region_get_ram_ptr(bios_copy), FLASH_ADDRESS, BIOS_SIZE)) { diff --git a/hw/mips/mips_mipssim.c b/hw/mips/mips_mipssim.c index 1b91195..da8dd81 100644 --- a/hw/mips/mips_mipssim.c +++ b/hw/mips/mips_mipssim.c @@ -177,7 +177,7 @@ mips_mipssim_init(MachineState *machine) /* Allocate RAM. */ memory_region_allocate_system_memory(ram, NULL, "mips_mipssim.ram", ram_size); - memory_region_init_ram(bios, NULL, "mips_mipssim.bios", BIOS_SIZE, + memory_region_init_ram_nomigrate(bios, NULL, "mips_mipssim.bios", BIOS_SIZE, &error_fatal); vmstate_register_ram_global(bios); memory_region_set_readonly(bios, true); diff --git a/hw/mips/mips_r4k.c b/hw/mips/mips_r4k.c index f4de9fc..a2f790b 100644 --- a/hw/mips/mips_r4k.c +++ b/hw/mips/mips_r4k.c @@ -236,7 +236,7 @@ void mips_r4k_init(MachineState *machine) #endif if ((bios_size > 0) && (bios_size <= BIOS_SIZE)) { bios = g_new(MemoryRegion, 1); - memory_region_init_ram(bios, NULL, "mips_r4k.bios", BIOS_SIZE, + memory_region_init_ram_nomigrate(bios, NULL, "mips_r4k.bios", BIOS_SIZE, &error_fatal); vmstate_register_ram_global(bios); memory_region_set_readonly(bios, true); diff --git a/hw/moxie/moxiesim.c b/hw/moxie/moxiesim.c index 3069834..e18fb74 100644 --- a/hw/moxie/moxiesim.c +++ b/hw/moxie/moxiesim.c @@ -128,11 +128,11 @@ static void moxiesim_init(MachineState *machine) qemu_register_reset(main_cpu_reset, cpu); /* Allocate RAM. */ - memory_region_init_ram(ram, NULL, "moxiesim.ram", ram_size, &error_fatal); + memory_region_init_ram_nomigrate(ram, NULL, "moxiesim.ram", ram_size, &error_fatal); vmstate_register_ram_global(ram); memory_region_add_subregion(address_space_mem, ram_base, ram); - memory_region_init_ram(rom, NULL, "moxie.rom", 128*0x1000, &error_fatal); + memory_region_init_ram_nomigrate(rom, NULL, "moxie.rom", 128*0x1000, &error_fatal); vmstate_register_ram_global(rom); memory_region_add_subregion(get_system_memory(), 0x1000, rom); diff --git a/hw/net/dp8393x.c b/hw/net/dp8393x.c index b53fcaa..f2d2ce3 100644 --- a/hw/net/dp8393x.c +++ b/hw/net/dp8393x.c @@ -887,7 +887,7 @@ static void dp8393x_realize(DeviceState *dev, Error **errp) s->watchdog = timer_new_ns(QEMU_CLOCK_VIRTUAL, dp8393x_watchdog, s); s->regs[SONIC_SR] = 0x0004; /* only revision recognized by Linux */ - memory_region_init_ram(&s->prom, OBJECT(dev), + memory_region_init_ram_nomigrate(&s->prom, OBJECT(dev), "dp8393x-prom", SONIC_PROM_SIZE, &local_err); if (local_err) { error_propagate(errp, local_err); diff --git a/hw/net/milkymist-minimac2.c b/hw/net/milkymist-minimac2.c index c3a12e1..3eaa19d 100644 --- a/hw/net/milkymist-minimac2.c +++ b/hw/net/milkymist-minimac2.c @@ -466,7 +466,7 @@ static int milkymist_minimac2_init(SysBusDevice *sbd) sysbus_init_mmio(sbd, &s->regs_region); /* register buffers memory */ - memory_region_init_ram(&s->buffers, OBJECT(dev), "milkymist-minimac2.buffers", + memory_region_init_ram_nomigrate(&s->buffers, OBJECT(dev), "milkymist-minimac2.buffers", buffers_size, &error_fatal); vmstate_register_ram_global(&s->buffers); s->rx0_buf = memory_region_get_ram_ptr(&s->buffers); diff --git a/hw/nios2/10m50_devboard.c b/hw/nios2/10m50_devboard.c index 051be73..4f1ea2d 100644 --- a/hw/nios2/10m50_devboard.c +++ b/hw/nios2/10m50_devboard.c @@ -57,7 +57,7 @@ static void nios2_10m50_ghrd_init(MachineState *machine) int i; /* Physical TCM (tb_ram_1k) with alias at 0xc0000000 */ - memory_region_init_ram(phys_tcm, NULL, "nios2.tcm", tcm_size, &error_abort); + memory_region_init_ram_nomigrate(phys_tcm, NULL, "nios2.tcm", tcm_size, &error_abort); memory_region_init_alias(phys_tcm_alias, NULL, "nios2.tcm.alias", phys_tcm, 0, tcm_size); vmstate_register_ram_global(phys_tcm); @@ -66,7 +66,7 @@ static void nios2_10m50_ghrd_init(MachineState *machine) phys_tcm_alias); /* Physical DRAM with alias at 0xc0000000 */ - memory_region_init_ram(phys_ram, NULL, "nios2.ram", ram_size, &error_abort); + memory_region_init_ram_nomigrate(phys_ram, NULL, "nios2.ram", ram_size, &error_abort); memory_region_init_alias(phys_ram_alias, NULL, "nios2.ram.alias", phys_ram, 0, ram_size); vmstate_register_ram_global(phys_ram); diff --git a/hw/openrisc/openrisc_sim.c b/hw/openrisc/openrisc_sim.c index fc0d096..73d8d7a 100644 --- a/hw/openrisc/openrisc_sim.c +++ b/hw/openrisc/openrisc_sim.c @@ -119,7 +119,7 @@ static void openrisc_sim_init(MachineState *machine) } ram = g_malloc(sizeof(*ram)); - memory_region_init_ram(ram, NULL, "openrisc.ram", ram_size, &error_fatal); + memory_region_init_ram_nomigrate(ram, NULL, "openrisc.ram", ram_size, &error_fatal); vmstate_register_ram_global(ram); memory_region_add_subregion(get_system_memory(), 0, ram); diff --git a/hw/pci-host/prep.c b/hw/pci-host/prep.c index 900a6ed..8b293ba 100644 --- a/hw/pci-host/prep.c +++ b/hw/pci-host/prep.c @@ -304,7 +304,7 @@ static void raven_realize(PCIDevice *d, Error **errp) d->config[0x0D] = 0x10; // latency_timer d->config[0x34] = 0x00; // capabilities_pointer - memory_region_init_ram(&s->bios, OBJECT(s), "bios", BIOS_SIZE, + memory_region_init_ram_nomigrate(&s->bios, OBJECT(s), "bios", BIOS_SIZE, &error_fatal); memory_region_set_readonly(&s->bios, true); memory_region_add_subregion(get_system_memory(), (uint32_t)(-BIOS_SIZE), diff --git a/hw/pci-host/xilinx-pcie.c b/hw/pci-host/xilinx-pcie.c index 2c78dcf..4613dda 100644 --- a/hw/pci-host/xilinx-pcie.c +++ b/hw/pci-host/xilinx-pcie.c @@ -120,7 +120,7 @@ static void xilinx_pcie_host_realize(DeviceState *dev, Error **errp) memory_region_set_enabled(&s->mmio, false); /* dummy I/O region */ - memory_region_init_ram(&s->io, OBJECT(s), "io", 16, NULL); + memory_region_init_ram_nomigrate(&s->io, OBJECT(s), "io", 16, NULL); memory_region_set_enabled(&s->io, false); /* interrupt out */ diff --git a/hw/ppc/mac_newworld.c b/hw/ppc/mac_newworld.c index bae1c0a..0b35ef1 100644 --- a/hw/ppc/mac_newworld.c +++ b/hw/ppc/mac_newworld.c @@ -204,7 +204,7 @@ static void ppc_core99_init(MachineState *machine) memory_region_add_subregion(get_system_memory(), 0, ram); /* allocate and load BIOS */ - memory_region_init_ram(bios, NULL, "ppc_core99.bios", BIOS_SIZE, + memory_region_init_ram_nomigrate(bios, NULL, "ppc_core99.bios", BIOS_SIZE, &error_fatal); vmstate_register_ram_global(bios); diff --git a/hw/ppc/mac_oldworld.c b/hw/ppc/mac_oldworld.c index 97bb854..ac604cb 100644 --- a/hw/ppc/mac_oldworld.c +++ b/hw/ppc/mac_oldworld.c @@ -141,7 +141,7 @@ static void ppc_heathrow_init(MachineState *machine) memory_region_add_subregion(sysmem, 0, ram); /* allocate and load BIOS */ - memory_region_init_ram(bios, NULL, "ppc_heathrow.bios", BIOS_SIZE, + memory_region_init_ram_nomigrate(bios, NULL, "ppc_heathrow.bios", BIOS_SIZE, &error_fatal); vmstate_register_ram_global(bios); diff --git a/hw/ppc/ppc405_boards.c b/hw/ppc/ppc405_boards.c index d01798f..c0146e8 100644 --- a/hw/ppc/ppc405_boards.c +++ b/hw/ppc/ppc405_boards.c @@ -218,7 +218,7 @@ static void ref405ep_init(MachineState *machine) 33333333, &pic, kernel_filename == NULL ? 0 : 1); /* allocate SRAM */ sram_size = 512 * 1024; - memory_region_init_ram(sram, NULL, "ef405ep.sram", sram_size, + memory_region_init_ram_nomigrate(sram, NULL, "ef405ep.sram", sram_size, &error_fatal); vmstate_register_ram_global(sram); memory_region_add_subregion(sysmem, 0xFFF00000, sram); @@ -253,7 +253,7 @@ static void ref405ep_init(MachineState *machine) printf("Load BIOS from file\n"); #endif bios = g_new(MemoryRegion, 1); - memory_region_init_ram(bios, NULL, "ef405ep.bios", BIOS_SIZE, + memory_region_init_ram_nomigrate(bios, NULL, "ef405ep.bios", BIOS_SIZE, &error_fatal); vmstate_register_ram_global(bios); @@ -554,7 +554,7 @@ static void taihu_405ep_init(MachineState *machine) if (bios_name == NULL) bios_name = BIOS_FILENAME; bios = g_new(MemoryRegion, 1); - memory_region_init_ram(bios, NULL, "taihu_405ep.bios", BIOS_SIZE, + memory_region_init_ram_nomigrate(bios, NULL, "taihu_405ep.bios", BIOS_SIZE, &error_fatal); vmstate_register_ram_global(bios); filename = qemu_find_file(QEMU_FILE_TYPE_BIOS, bios_name); diff --git a/hw/ppc/ppc405_uc.c b/hw/ppc/ppc405_uc.c index fc32e96..d5cf07e 100644 --- a/hw/ppc/ppc405_uc.c +++ b/hw/ppc/ppc405_uc.c @@ -978,7 +978,7 @@ static void ppc405_ocm_init(CPUPPCState *env) ocm = g_malloc0(sizeof(ppc405_ocm_t)); /* XXX: Size is 4096 or 0x04000000 */ - memory_region_init_ram(&ocm->isarc_ram, NULL, "ppc405.ocm", 4096, + memory_region_init_ram_nomigrate(&ocm->isarc_ram, NULL, "ppc405.ocm", 4096, &error_fatal); vmstate_register_ram_global(&ocm->isarc_ram); memory_region_init_alias(&ocm->dsarc_ram, NULL, "ppc405.dsarc", &ocm->isarc_ram, diff --git a/hw/s390x/sclp.c b/hw/s390x/sclp.c index 83d6023..6e7c0ba 100644 --- a/hw/s390x/sclp.c +++ b/hw/s390x/sclp.c @@ -266,7 +266,7 @@ static void assign_storage(SCLPDevice *sclp, SCCB *sccb) this_subregion_size = mhd->standby_subregion_size; } - memory_region_init_ram(standby_ram, NULL, id, this_subregion_size, + memory_region_init_ram_nomigrate(standby_ram, NULL, id, this_subregion_size, &error_fatal); /* This is a hack to make memory hotunplug work again. Once we have * subdevices, we have to unparent them when unassigning memory, diff --git a/hw/sh4/r2d.c b/hw/sh4/r2d.c index e6fc74e..82e3b19 100644 --- a/hw/sh4/r2d.c +++ b/hw/sh4/r2d.c @@ -259,7 +259,7 @@ static void r2d_init(MachineState *machine) qemu_register_reset(main_cpu_reset, reset_info); /* Allocate memory space */ - memory_region_init_ram(sdram, NULL, "r2d.sdram", SDRAM_SIZE, &error_fatal); + memory_region_init_ram_nomigrate(sdram, NULL, "r2d.sdram", SDRAM_SIZE, &error_fatal); vmstate_register_ram_global(sdram); memory_region_add_subregion(address_space_mem, SDRAM_BASE, sdram); /* Register peripherals */ diff --git a/hw/sh4/shix.c b/hw/sh4/shix.c index fd00cc5..bf0d8c3 100644 --- a/hw/sh4/shix.c +++ b/hw/sh4/shix.c @@ -63,15 +63,15 @@ static void shix_init(MachineState *machine) } /* Allocate memory space */ - memory_region_init_ram(rom, NULL, "shix.rom", 0x4000, &error_fatal); + memory_region_init_ram_nomigrate(rom, NULL, "shix.rom", 0x4000, &error_fatal); vmstate_register_ram_global(rom); memory_region_set_readonly(rom, true); memory_region_add_subregion(sysmem, 0x00000000, rom); - memory_region_init_ram(&sdram[0], NULL, "shix.sdram1", 0x01000000, + memory_region_init_ram_nomigrate(&sdram[0], NULL, "shix.sdram1", 0x01000000, &error_fatal); vmstate_register_ram_global(&sdram[0]); memory_region_add_subregion(sysmem, 0x08000000, &sdram[0]); - memory_region_init_ram(&sdram[1], NULL, "shix.sdram2", 0x01000000, + memory_region_init_ram_nomigrate(&sdram[1], NULL, "shix.sdram2", 0x01000000, &error_fatal); vmstate_register_ram_global(&sdram[1]); memory_region_add_subregion(sysmem, 0x0c000000, &sdram[1]); diff --git a/hw/sparc/leon3.c b/hw/sparc/leon3.c index f415997..6758ba6 100644 --- a/hw/sparc/leon3.c +++ b/hw/sparc/leon3.c @@ -159,7 +159,7 @@ static void leon3_generic_hw_init(MachineState *machine) /* Allocate BIOS */ prom_size = 8 * 1024 * 1024; /* 8Mb */ - memory_region_init_ram(prom, NULL, "Leon3.bios", prom_size, &error_fatal); + memory_region_init_ram_nomigrate(prom, NULL, "Leon3.bios", prom_size, &error_fatal); vmstate_register_ram_global(prom); memory_region_set_readonly(prom, true); memory_region_add_subregion(address_space_mem, 0x00000000, prom); diff --git a/hw/sparc/sun4m.c b/hw/sparc/sun4m.c index 0faff46..89dd8a9 100644 --- a/hw/sparc/sun4m.c +++ b/hw/sparc/sun4m.c @@ -590,7 +590,7 @@ static void idreg_init1(Object *obj) IDRegState *s = MACIO_ID_REGISTER(obj); SysBusDevice *dev = SYS_BUS_DEVICE(obj); - memory_region_init_ram(&s->mem, obj, + memory_region_init_ram_nomigrate(&s->mem, obj, "sun4m.idreg", sizeof(idreg_data), &error_fatal); vmstate_register_ram_global(&s->mem); memory_region_set_readonly(&s->mem, true); @@ -631,7 +631,7 @@ static void afx_init1(Object *obj) AFXState *s = TCX_AFX(obj); SysBusDevice *dev = SYS_BUS_DEVICE(obj); - memory_region_init_ram(&s->mem, obj, "sun4m.afx", 4, &error_fatal); + memory_region_init_ram_nomigrate(&s->mem, obj, "sun4m.afx", 4, &error_fatal); vmstate_register_ram_global(&s->mem); sysbus_init_mmio(dev, &s->mem); } @@ -698,7 +698,7 @@ static void prom_init1(Object *obj) PROMState *s = OPENPROM(obj); SysBusDevice *dev = SYS_BUS_DEVICE(obj); - memory_region_init_ram(&s->prom, obj, "sun4m.prom", PROM_SIZE_MAX, + memory_region_init_ram_nomigrate(&s->prom, obj, "sun4m.prom", PROM_SIZE_MAX, &error_fatal); vmstate_register_ram_global(&s->prom); memory_region_set_readonly(&s->prom, true); diff --git a/hw/sparc64/sun4u.c b/hw/sparc64/sun4u.c index 69f565d..bbdb40c 100644 --- a/hw/sparc64/sun4u.c +++ b/hw/sparc64/sun4u.c @@ -334,7 +334,7 @@ static void prom_init1(Object *obj) PROMState *s = OPENPROM(obj); SysBusDevice *dev = SYS_BUS_DEVICE(obj); - memory_region_init_ram(&s->prom, obj, "sun4u.prom", PROM_SIZE_MAX, + memory_region_init_ram_nomigrate(&s->prom, obj, "sun4u.prom", PROM_SIZE_MAX, &error_fatal); vmstate_register_ram_global(&s->prom); memory_region_set_readonly(&s->prom, true); @@ -377,7 +377,7 @@ static void ram_realize(DeviceState *dev, Error **errp) RamDevice *d = SUN4U_RAM(dev); SysBusDevice *sbd = SYS_BUS_DEVICE(dev); - memory_region_init_ram(&d->ram, OBJECT(d), "sun4u.ram", d->size, + memory_region_init_ram_nomigrate(&d->ram, OBJECT(d), "sun4u.ram", d->size, &error_fatal); vmstate_register_ram_global(&d->ram); sysbus_init_mmio(sbd, &d->ram); diff --git a/hw/tricore/tricore_testboard.c b/hw/tricore/tricore_testboard.c index 8910bf0..94b185e 100644 --- a/hw/tricore/tricore_testboard.c +++ b/hw/tricore/tricore_testboard.c @@ -80,22 +80,22 @@ static void tricore_testboard_init(MachineState *machine, int board_id) exit(1); } env = &cpu->env; - memory_region_init_ram(ext_cram, NULL, "powerlink_ext_c.ram", 2*1024*1024, + memory_region_init_ram_nomigrate(ext_cram, NULL, "powerlink_ext_c.ram", 2*1024*1024, &error_fatal); vmstate_register_ram_global(ext_cram); - memory_region_init_ram(ext_dram, NULL, "powerlink_ext_d.ram", 4*1024*1024, + memory_region_init_ram_nomigrate(ext_dram, NULL, "powerlink_ext_d.ram", 4*1024*1024, &error_fatal); vmstate_register_ram_global(ext_dram); - memory_region_init_ram(int_cram, NULL, "powerlink_int_c.ram", 48*1024, + memory_region_init_ram_nomigrate(int_cram, NULL, "powerlink_int_c.ram", 48*1024, &error_fatal); vmstate_register_ram_global(int_cram); - memory_region_init_ram(int_dram, NULL, "powerlink_int_d.ram", 48*1024, + memory_region_init_ram_nomigrate(int_dram, NULL, "powerlink_int_d.ram", 48*1024, &error_fatal); vmstate_register_ram_global(int_dram); - memory_region_init_ram(pcp_data, NULL, "powerlink_pcp_data.ram", 16*1024, + memory_region_init_ram_nomigrate(pcp_data, NULL, "powerlink_pcp_data.ram", 16*1024, &error_fatal); vmstate_register_ram_global(pcp_data); - memory_region_init_ram(pcp_text, NULL, "powerlink_pcp_text.ram", 32*1024, + memory_region_init_ram_nomigrate(pcp_text, NULL, "powerlink_pcp_text.ram", 32*1024, &error_fatal); vmstate_register_ram_global(pcp_text); diff --git a/hw/unicore32/puv3.c b/hw/unicore32/puv3.c index 032078fd..291d75f 100644 --- a/hw/unicore32/puv3.c +++ b/hw/unicore32/puv3.c @@ -78,7 +78,7 @@ static void puv3_board_init(CPUUniCore32State *env, ram_addr_t ram_size) MemoryRegion *ram_memory = g_new(MemoryRegion, 1); /* SDRAM at address zero. */ - memory_region_init_ram(ram_memory, NULL, "puv3.ram", ram_size, + memory_region_init_ram_nomigrate(ram_memory, NULL, "puv3.ram", ram_size, &error_fatal); vmstate_register_ram_global(ram_memory); memory_region_add_subregion(get_system_memory(), 0, ram_memory); diff --git a/hw/xtensa/sim.c b/hw/xtensa/sim.c index 5521e91..3c6447b 100644 --- a/hw/xtensa/sim.c +++ b/hw/xtensa/sim.c @@ -48,7 +48,7 @@ static void xtensa_create_memory_regions(const XtensaMemory *memory, g_string_printf(num_name, "%s%u", name, i); m = g_new(MemoryRegion, 1); - memory_region_init_ram(m, NULL, num_name->str, + memory_region_init_ram_nomigrate(m, NULL, num_name->str, memory->location[i].size, &error_fatal); vmstate_register_ram_global(m); diff --git a/hw/xtensa/xtfpga.c b/hw/xtensa/xtfpga.c index d5ac080..0c91c37 100644 --- a/hw/xtensa/xtfpga.c +++ b/hw/xtensa/xtfpga.c @@ -147,7 +147,7 @@ static void lx60_net_init(MemoryRegion *address_space, sysbus_mmio_get_region(s, 1)); ram = g_malloc(sizeof(*ram)); - memory_region_init_ram(ram, OBJECT(s), "open_eth.ram", 16384, + memory_region_init_ram_nomigrate(ram, OBJECT(s), "open_eth.ram", 16384, &error_fatal); vmstate_register_ram_global(ram); memory_region_add_subregion(address_space, buffers, ram); @@ -249,7 +249,7 @@ static void lx_init(const LxBoardDesc *board, MachineState *machine) } ram = g_malloc(sizeof(*ram)); - memory_region_init_ram(ram, NULL, "lx60.dram", machine->ram_size, + memory_region_init_ram_nomigrate(ram, NULL, "lx60.dram", machine->ram_size, &error_fatal); vmstate_register_ram_global(ram); memory_region_add_subregion(system_memory, 0, ram); @@ -292,7 +292,7 @@ static void lx_init(const LxBoardDesc *board, MachineState *machine) uint32_t cur_lowmem = QEMU_ALIGN_UP(lowmem_end / 2, 4096); rom = g_malloc(sizeof(*rom)); - memory_region_init_ram(rom, NULL, "lx60.sram", board->sram_size, + memory_region_init_ram_nomigrate(rom, NULL, "lx60.sram", board->sram_size, &error_fatal); vmstate_register_ram_global(rom); memory_region_add_subregion(system_memory, 0xfe000000, rom); diff --git a/memory.c b/memory.c index 1044bba..9267745 100644 --- a/memory.c +++ b/memory.c @@ -1350,11 +1350,11 @@ void memory_region_init_io(MemoryRegion *mr, mr->terminates = true; } -void memory_region_init_ram(MemoryRegion *mr, - Object *owner, - const char *name, - uint64_t size, - Error **errp) +void memory_region_init_ram_nomigrate(MemoryRegion *mr, + Object *owner, + const char *name, + uint64_t size, + Error **errp) { memory_region_init(mr, owner, name, size); mr->ram = true; diff --git a/numa.c b/numa.c index b0e75f6..e32af04 100644 --- a/numa.c +++ b/numa.c @@ -542,14 +542,14 @@ static void allocate_system_memory_nonnuma(MemoryRegion *mr, Object *owner, /* Legacy behavior: if allocation failed, fall back to * regular RAM allocation. */ - memory_region_init_ram(mr, owner, name, ram_size, &error_fatal); + memory_region_init_ram_nomigrate(mr, owner, name, ram_size, &error_fatal); } #else fprintf(stderr, "-mem-path not supported on this host\n"); exit(1); #endif } else { - memory_region_init_ram(mr, owner, name, ram_size, &error_fatal); + memory_region_init_ram_nomigrate(mr, owner, name, ram_size, &error_fatal); } vmstate_register_ram_global(mr); } From patchwork Fri Jul 7 14:42:50 2017 Content-Type: text/plain; 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[2001:8b0:1d0::2]) by mx.google.com with ESMTPS id y127si3046693wmb.139.2017.07.07.07.43.00 for (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Fri, 07 Jul 2017 07:43:01 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of pm215@archaic.org.uk designates 2001:8b0:1d0::2 as permitted sender) client-ip=2001:8b0:1d0::2; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of pm215@archaic.org.uk designates 2001:8b0:1d0::2 as permitted sender) smtp.mailfrom=pm215@archaic.org.uk; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from pm215 by orth.archaic.org.uk with local (Exim 4.84_2) (envelope-from ) id 1dTUTE-0005t2-Mk; Fri, 07 Jul 2017 15:43:00 +0100 From: Peter Maydell To: qemu-devel@nongnu.org Cc: patches@linaro.org, Paolo Bonzini , Eduardo Habkost , Marcel Apfelbaum , Igor Mammedov Subject: [PATCH 04/11] memory: Rename memory_region_init_rom() and _rom_device() to _nomigrate() Date: Fri, 7 Jul 2017 15:42:50 +0100 Message-Id: <1499438577-7674-5-git-send-email-peter.maydell@linaro.org> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1499438577-7674-1-git-send-email-peter.maydell@linaro.org> References: <1499438577-7674-1-git-send-email-peter.maydell@linaro.org> Rename memory_region_init_rom() to memory_region_init_rom_nomigrate() and memory_region_init_rom_device() to memory_region_init_rom_device_nomigrate(). Signed-off-by: Peter Maydell --- include/exec/memory.h | 40 ++++++++++++++++++++++++---------------- hw/arm/aspeed.c | 2 +- hw/arm/fsl-imx25.c | 4 ++-- hw/arm/fsl-imx31.c | 4 ++-- hw/arm/fsl-imx6.c | 4 ++-- hw/block/pflash_cfi01.c | 2 +- hw/block/pflash_cfi02.c | 2 +- hw/mips/boston.c | 2 +- hw/pci/pci.c | 2 +- memory.c | 24 ++++++++++++------------ 10 files changed, 47 insertions(+), 39 deletions(-) -- 2.7.4 diff --git a/include/exec/memory.h b/include/exec/memory.h index 2ef3e4f..d1c6443 100644 --- a/include/exec/memory.h +++ b/include/exec/memory.h @@ -568,12 +568,16 @@ void memory_region_init_alias(MemoryRegion *mr, uint64_t size); /** - * memory_region_init_rom: Initialize a ROM memory region. + * memory_region_init_rom_nomigrate: Initialize a ROM memory region. * - * This has the same effect as calling memory_region_init_ram() + * This has the same effect as calling memory_region_init_ram_nomigrate() * and then marking the resulting region read-only with * memory_region_set_readonly(). * + * Note that this function does not do anything to cause the data in the + * RAM side of the memory region to be migrated; that is the responsibility + * of the caller. + * * @mr: the #MemoryRegion to be initialized. * @owner: the object that tracks the region's reference count * @name: Region name, becomes part of RAMBlock name used in migration stream @@ -581,15 +585,19 @@ void memory_region_init_alias(MemoryRegion *mr, * @size: size of the region. * @errp: pointer to Error*, to store an error if it happens. */ -void memory_region_init_rom(MemoryRegion *mr, - struct Object *owner, - const char *name, - uint64_t size, - Error **errp); +void memory_region_init_rom_nomigrate(MemoryRegion *mr, + struct Object *owner, + const char *name, + uint64_t size, + Error **errp); /** - * memory_region_init_rom_device: Initialize a ROM memory region. Writes are - * handled via callbacks. + * memory_region_init_rom_device_nomigrate: Initialize a ROM memory region. + * Writes are handled via callbacks. + * + * Note that this function does not do anything to cause the data in the + * RAM side of the memory region to be migrated; that is the responsibility + * of the caller. * * @mr: the #MemoryRegion to be initialized. * @owner: the object that tracks the region's reference count @@ -599,13 +607,13 @@ void memory_region_init_rom(MemoryRegion *mr, * @size: size of the region. * @errp: pointer to Error*, to store an error if it happens. */ -void memory_region_init_rom_device(MemoryRegion *mr, - struct Object *owner, - const MemoryRegionOps *ops, - void *opaque, - const char *name, - uint64_t size, - Error **errp); +void memory_region_init_rom_device_nomigrate(MemoryRegion *mr, + struct Object *owner, + const MemoryRegionOps *ops, + void *opaque, + const char *name, + uint64_t size, + Error **errp); /** * memory_region_init_reservation: Initialize a memory region that reserves diff --git a/hw/arm/aspeed.c b/hw/arm/aspeed.c index db3f6d2..0c5635f 100644 --- a/hw/arm/aspeed.c +++ b/hw/arm/aspeed.c @@ -216,7 +216,7 @@ static void aspeed_board_init(MachineState *machine, * SoC and 128MB for the AST2500 SoC, which is twice as big as * needed by the flash modules of the Aspeed machines. */ - memory_region_init_rom(boot_rom, OBJECT(bmc), "aspeed.boot_rom", + memory_region_init_rom_nomigrate(boot_rom, OBJECT(bmc), "aspeed.boot_rom", fl->size, &error_abort); memory_region_add_subregion(get_system_memory(), FIRMWARE_ADDR, boot_rom); diff --git a/hw/arm/fsl-imx25.c b/hw/arm/fsl-imx25.c index 0455c2b..cebe0ec 100644 --- a/hw/arm/fsl-imx25.c +++ b/hw/arm/fsl-imx25.c @@ -249,7 +249,7 @@ static void fsl_imx25_realize(DeviceState *dev, Error **errp) } /* initialize 2 x 16 KB ROM */ - memory_region_init_rom(&s->rom[0], NULL, + memory_region_init_rom_nomigrate(&s->rom[0], NULL, "imx25.rom0", FSL_IMX25_ROM0_SIZE, &err); if (err) { error_propagate(errp, err); @@ -257,7 +257,7 @@ static void fsl_imx25_realize(DeviceState *dev, Error **errp) } memory_region_add_subregion(get_system_memory(), FSL_IMX25_ROM0_ADDR, &s->rom[0]); - memory_region_init_rom(&s->rom[1], NULL, + memory_region_init_rom_nomigrate(&s->rom[1], NULL, "imx25.rom1", FSL_IMX25_ROM1_SIZE, &err); if (err) { error_propagate(errp, err); diff --git a/hw/arm/fsl-imx31.c b/hw/arm/fsl-imx31.c index 35ad1e7..6c2823a 100644 --- a/hw/arm/fsl-imx31.c +++ b/hw/arm/fsl-imx31.c @@ -219,7 +219,7 @@ static void fsl_imx31_realize(DeviceState *dev, Error **errp) } /* On a real system, the first 16k is a `secure boot rom' */ - memory_region_init_rom(&s->secure_rom, NULL, "imx31.secure_rom", + memory_region_init_rom_nomigrate(&s->secure_rom, NULL, "imx31.secure_rom", FSL_IMX31_SECURE_ROM_SIZE, &err); if (err) { error_propagate(errp, err); @@ -229,7 +229,7 @@ static void fsl_imx31_realize(DeviceState *dev, Error **errp) &s->secure_rom); /* There is also a 16k ROM */ - memory_region_init_rom(&s->rom, NULL, "imx31.rom", + memory_region_init_rom_nomigrate(&s->rom, NULL, "imx31.rom", FSL_IMX31_ROM_SIZE, &err); if (err) { error_propagate(errp, err); diff --git a/hw/arm/fsl-imx6.c b/hw/arm/fsl-imx6.c index 7234950..e00b2f9 100644 --- a/hw/arm/fsl-imx6.c +++ b/hw/arm/fsl-imx6.c @@ -399,7 +399,7 @@ static void fsl_imx6_realize(DeviceState *dev, Error **errp) FSL_IMX6_ENET_MAC_1588_IRQ)); /* ROM memory */ - memory_region_init_rom(&s->rom, NULL, "imx6.rom", + memory_region_init_rom_nomigrate(&s->rom, NULL, "imx6.rom", FSL_IMX6_ROM_SIZE, &err); if (err) { error_propagate(errp, err); @@ -409,7 +409,7 @@ static void fsl_imx6_realize(DeviceState *dev, Error **errp) &s->rom); /* CAAM memory */ - memory_region_init_rom(&s->caam, NULL, "imx6.caam", + memory_region_init_rom_nomigrate(&s->caam, NULL, "imx6.caam", FSL_IMX6_CAAM_MEM_SIZE, &err); if (err) { error_propagate(errp, err); diff --git a/hw/block/pflash_cfi01.c b/hw/block/pflash_cfi01.c index 594d4cf..c044b56 100644 --- a/hw/block/pflash_cfi01.c +++ b/hw/block/pflash_cfi01.c @@ -743,7 +743,7 @@ static void pflash_cfi01_realize(DeviceState *dev, Error **errp) return NULL; #endif - memory_region_init_rom_device( + memory_region_init_rom_device_nomigrate( &pfl->mem, OBJECT(dev), &pflash_cfi01_ops, pfl, diff --git a/hw/block/pflash_cfi02.c b/hw/block/pflash_cfi02.c index e6c5c6c..a08b09b 100644 --- a/hw/block/pflash_cfi02.c +++ b/hw/block/pflash_cfi02.c @@ -621,7 +621,7 @@ static void pflash_cfi02_realize(DeviceState *dev, Error **errp) return NULL; #endif - memory_region_init_rom_device(&pfl->orig_mem, OBJECT(pfl), pfl->be ? + memory_region_init_rom_device_nomigrate(&pfl->orig_mem, OBJECT(pfl), pfl->be ? &pflash_cfi02_ops_be : &pflash_cfi02_ops_le, pfl, pfl->name, chip_len, &local_err); if (local_err) { diff --git a/hw/mips/boston.c b/hw/mips/boston.c index a4677f7..5946174 100644 --- a/hw/mips/boston.c +++ b/hw/mips/boston.c @@ -484,7 +484,7 @@ static void boston_mach_init(MachineState *machine) sysbus_mmio_map_overlap(SYS_BUS_DEVICE(s->cps), 0, 0, 1); flash = g_new(MemoryRegion, 1); - memory_region_init_rom_device(flash, NULL, &boston_flash_ops, s, + memory_region_init_rom_device_nomigrate(flash, NULL, &boston_flash_ops, s, "boston.flash", 128 * M_BYTE, &err); memory_region_add_subregion_overlap(sys_mem, 0x18000000, flash, 0); diff --git a/hw/pci/pci.c b/hw/pci/pci.c index 0c6f74a..e73279a 100644 --- a/hw/pci/pci.c +++ b/hw/pci/pci.c @@ -2235,7 +2235,7 @@ static void pci_add_option_rom(PCIDevice *pdev, bool is_default_rom, snprintf(name, sizeof(name), "%s.rom", object_get_typename(OBJECT(pdev))); } pdev->has_rom = true; - memory_region_init_rom(&pdev->rom, OBJECT(pdev), name, size, &error_fatal); + memory_region_init_rom_nomigrate(&pdev->rom, OBJECT(pdev), name, size, &error_fatal); vmstate_register_ram(&pdev->rom, &pdev->qdev); ptr = memory_region_get_ram_ptr(&pdev->rom); load_image(path, ptr); diff --git a/memory.c b/memory.c index 9267745..5653d3c 100644 --- a/memory.c +++ b/memory.c @@ -1458,11 +1458,11 @@ void memory_region_init_alias(MemoryRegion *mr, mr->alias_offset = offset; } -void memory_region_init_rom(MemoryRegion *mr, - struct Object *owner, - const char *name, - uint64_t size, - Error **errp) +void memory_region_init_rom_nomigrate(MemoryRegion *mr, + struct Object *owner, + const char *name, + uint64_t size, + Error **errp) { memory_region_init(mr, owner, name, size); mr->ram = true; @@ -1473,13 +1473,13 @@ void memory_region_init_rom(MemoryRegion *mr, mr->dirty_log_mask = tcg_enabled() ? (1 << DIRTY_MEMORY_CODE) : 0; } -void memory_region_init_rom_device(MemoryRegion *mr, - Object *owner, - const MemoryRegionOps *ops, - void *opaque, - const char *name, - uint64_t size, - Error **errp) +void memory_region_init_rom_device_nomigrate(MemoryRegion *mr, + Object *owner, + const MemoryRegionOps *ops, + void *opaque, + const char *name, + uint64_t size, + Error **errp) { assert(ops); memory_region_init(mr, owner, name, size); From patchwork Fri Jul 7 14:42:51 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Peter Maydell X-Patchwork-Id: 107208 Delivered-To: patches@linaro.org Received: by 10.140.101.44 with SMTP id t41csp147305qge; Fri, 7 Jul 2017 07:43:04 -0700 (PDT) X-Received: by 10.98.69.219 with SMTP id n88mr32235474pfi.192.1499438584786; Fri, 07 Jul 2017 07:43:04 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1499438584; cv=none; d=google.com; s=arc-20160816; b=eLAr4s1x800/0Wa8843Kx8aR6cLH/Dh39Ct6NrvycY80oBWp+HY6ngKZK3i+A+YAUe 2jF1qQE2PYb4iOwtDlOuoTgSKKrotp6e+gEv5Ej4qt26gI0tM/gp1JbMRanV3xcHyv/O og4KLMsiZMl2mE+YWeR6iaZnj4/EVBUhMI1hhm/+05rve+UBIyIzfth9xP1cTBBKDC8A 7vJ5sxWnJNowwsrsq1kRnPausCwGa74Z1mBIxVTg1rgm4ZhBDQs4B6HCZnb20GTYfZ/w JBU7LYfAh0CN89hYNLVopgbbzKXZ3VXNJ83bi0gXvE8zwuE0ROmzEtB1ZD1tqCvZNYyN wQ8A== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=references:in-reply-to:message-id:date:subject:cc:to:from :arc-authentication-results; bh=3582pPherCGhdhf48U5pUjHXWNUmi/9ewznmRCJ0Bms=; b=r/R7F/DA54U/6Kl9yJC/jl7vKFNW5SMq/SyQPEsigyhD0vElxsTKCdZsOQzo8Wy1yO mDhiQCnUm6/dbn/CSCW2R5ISNE0KaUdTLPa+cj1O62Z+DuA+VBhZPLfC59mmptTpnlnn hqwEulJjGNMDG0cikIjfHt/VneQOm5srre3QEB+vZThmVqHI+r2pwdHr2qwNDZ0yOpab h43d1nw9MroRiAZF30JoLeat3K0wzM7TeB9MgeVWz5T9kcbyHJhnTjKijNsE5hSlbG7v SHSr0OjAsyfMcJDkp/M0ytxNGB18Ln2kcidR07p4l+XX1PqKlA4f7pOElOXiZ7zmUtYv FEmg== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: best guess record for domain of pm215@archaic.org.uk designates 2001:8b0:1d0::2 as permitted sender) smtp.mailfrom=pm215@archaic.org.uk; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from orth.archaic.org.uk (orth.archaic.org.uk. [2001:8b0:1d0::2]) by mx.google.com with ESMTPS id d71si2388293pgc.68.2017.07.07.07.43.04 for (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Fri, 07 Jul 2017 07:43:04 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of pm215@archaic.org.uk designates 2001:8b0:1d0::2 as permitted sender) client-ip=2001:8b0:1d0::2; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of pm215@archaic.org.uk designates 2001:8b0:1d0::2 as permitted sender) smtp.mailfrom=pm215@archaic.org.uk; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from pm215 by orth.archaic.org.uk with local (Exim 4.84_2) (envelope-from ) id 1dTUTF-0005tG-B3; Fri, 07 Jul 2017 15:43:01 +0100 From: Peter Maydell To: qemu-devel@nongnu.org Cc: patches@linaro.org, Paolo Bonzini , Eduardo Habkost , Marcel Apfelbaum , Igor Mammedov Subject: [PATCH 05/11] memory.h: Add memory_region_init_{ram, rom, rom_device}() handling migration Date: Fri, 7 Jul 2017 15:42:51 +0100 Message-Id: <1499438577-7674-6-git-send-email-peter.maydell@linaro.org> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1499438577-7674-1-git-send-email-peter.maydell@linaro.org> References: <1499438577-7674-1-git-send-email-peter.maydell@linaro.org> Add new utility functions which both initialize a RAM MemoryRegion and arrange for its contents to be migrated; we give thes the memory_region_init_ram(), memory_region_init_rom() and memory_region_init_rom_device() names that we just freed up by renaming the old implementations to _nomigrate(). Signed-off-by: Peter Maydell --- include/exec/memory.h | 88 +++++++++++++++++++++++++++++++++++++++++++++++++++ include/hw/boards.h | 3 +- memory.c | 76 ++++++++++++++++++++++++++++++++++++++++++++ 3 files changed, 166 insertions(+), 1 deletion(-) -- 2.7.4 diff --git a/include/exec/memory.h b/include/exec/memory.h index d1c6443..b49b81d 100644 --- a/include/exec/memory.h +++ b/include/exec/memory.h @@ -658,6 +658,94 @@ void memory_region_init_iommu(MemoryRegion *mr, uint64_t size); /** + * memory_region_init_ram - Initialize RAM memory region. Accesses into the + * region will modify memory directly. + * + * @mr: the #MemoryRegion to be initialized + * @owner: the object that tracks the region's reference count (must be + * TYPE_DEVICE or a subclass of TYPE_DEVICE, or NULL) + * @name: name of the memory region + * @size: size of the region in bytes + * @errp: pointer to Error*, to store an error if it happens. + * + * This function allocates RAM for a board model or device, and + * arranges for it to be migrated (by calling vmstate_register_ram() + * if @owner is a DeviceState, or vmstate_register_ram_global() if + * @owner is NULL). + * + * TODO: Currently we restrict @owner to being either NULL (for + * global RAM regions with no owner) or devices, so that we can + * give the RAM block a unique name for migration purposes. + * We should lift this restriction and allow arbitrary Objects. + * If you pass a non-NULL non-device @owner then we will assert. + */ +void memory_region_init_ram(MemoryRegion *mr, + struct Object *owner, + const char *name, + uint64_t size, + Error **errp); + +/** + * memory_region_init_rom: Initialize a ROM memory region. + * + * This has the same effect as calling memory_region_init_ram() + * and then marking the resulting region read-only with + * memory_region_set_readonly(). This includes arranging for the + * contents to be migrated. + * + * TODO: Currently we restrict @owner to being either NULL (for + * global RAM regions with no owner) or devices, so that we can + * give the RAM block a unique name for migration purposes. + * We should lift this restriction and allow arbitrary Objects. + * If you pass a non-NULL non-device @owner then we will assert. + * + * @mr: the #MemoryRegion to be initialized. + * @owner: the object that tracks the region's reference count + * @name: Region name, becomes part of RAMBlock name used in migration stream + * must be unique within any device + * @size: size of the region. + * @errp: pointer to Error*, to store an error if it happens. + */ +void memory_region_init_rom(MemoryRegion *mr, + struct Object *owner, + const char *name, + uint64_t size, + Error **errp); + +/** + * memory_region_init_rom_device: Initialize a ROM memory region. + * Writes are handled via callbacks. + * + * This function initializes a memory region backed by RAM for reads + * and callbacks for writes, and arranges for the RAM backing to + * be migrated (by calling vmstate_register_ram() + * if @owner is a DeviceState, or vmstate_register_ram_global() if + * @owner is NULL). + * + * TODO: Currently we restrict @owner to being either NULL (for + * global RAM regions with no owner) or devices, so that we can + * give the RAM block a unique name for migration purposes. + * We should lift this restriction and allow arbitrary Objects. + * If you pass a non-NULL non-device @owner then we will assert. + * + * @mr: the #MemoryRegion to be initialized. + * @owner: the object that tracks the region's reference count + * @ops: callbacks for write access handling (must not be NULL). + * @name: Region name, becomes part of RAMBlock name used in migration stream + * must be unique within any device + * @size: size of the region. + * @errp: pointer to Error*, to store an error if it happens. + */ +void memory_region_init_rom_device(MemoryRegion *mr, + struct Object *owner, + const MemoryRegionOps *ops, + void *opaque, + const char *name, + uint64_t size, + Error **errp); + + +/** * memory_region_owner: get a memory region's owner. * * @mr: the memory region being queried. diff --git a/include/hw/boards.h b/include/hw/boards.h index 1bc5389..a127a97 100644 --- a/include/hw/boards.h +++ b/include/hw/boards.h @@ -35,7 +35,8 @@ * * Smaller pieces of memory (display RAM, static RAMs, etc) don't need * to be backed via the -mem-path memory backend and can simply - * be created via memory_region_init_ram(). + * be created via memory_region_allocate_aux_memory() or + * memory_region_init_ram(). */ void memory_region_allocate_system_memory(MemoryRegion *mr, Object *owner, const char *name, diff --git a/memory.c b/memory.c index 5653d3c..17bca58 100644 --- a/memory.c +++ b/memory.c @@ -32,6 +32,7 @@ #include "sysemu/sysemu.h" #include "hw/misc/mmio_interface.h" #include "hw/qdev-properties.h" +#include "migration/vmstate.h" //#define DEBUG_UNASSIGNED @@ -2817,6 +2818,81 @@ void mtree_info(fprintf_function mon_printf, void *f, bool flatview) } } +void memory_region_init_ram(MemoryRegion *mr, + struct Object *owner, + const char *name, + uint64_t size, + Error **errp) +{ + DeviceState *owner_dev; + Error *err = NULL; + + memory_region_init_ram_nomigrate(mr, owner, name, size, &err); + if (err) { + error_propagate(errp, err); + return; + } + /* This will assert if owner is neither NULL nor a DeviceState. + * We only want the owner here for the purposes of defining a + * unique name for migration. TODO: Ideally we should implement + * a naming scheme for Objects which are not DeviceStates, in + * which case we can relax this restriction. + */ + owner_dev = DEVICE(owner); + vmstate_register_ram(mr, owner_dev); +} + +void memory_region_init_rom(MemoryRegion *mr, + struct Object *owner, + const char *name, + uint64_t size, + Error **errp) +{ + DeviceState *owner_dev; + Error *err = NULL; + + memory_region_init_rom_nomigrate(mr, owner, name, size, &err); + if (err) { + error_propagate(errp, err); + return; + } + /* This will assert if owner is neither NULL nor a DeviceState. + * We only want the owner here for the purposes of defining a + * unique name for migration. TODO: Ideally we should implement + * a naming scheme for Objects which are not DeviceStates, in + * which case we can relax this restriction. + */ + owner_dev = DEVICE(owner); + vmstate_register_ram(mr, owner_dev); +} + +void memory_region_init_rom_device(MemoryRegion *mr, + struct Object *owner, + const MemoryRegionOps *ops, + void *opaque, + const char *name, + uint64_t size, + Error **errp) +{ + DeviceState *owner_dev; + Error *err = NULL; + + memory_region_init_rom_device_nomigrate(mr, owner, ops, opaque, + name, size, &err); + if (err) { + error_propagate(errp, err); + return; + } + /* This will assert if owner is neither NULL nor a DeviceState. + * We only want the owner here for the purposes of defining a + * unique name for migration. TODO: Ideally we should implement + * a naming scheme for Objects which are not DeviceStates, in + * which case we can relax this restriction. + */ + owner_dev = DEVICE(owner); + vmstate_register_ram(mr, owner_dev); +} + static const TypeInfo memory_region_info = { .parent = TYPE_OBJECT, .name = TYPE_MEMORY_REGION, From patchwork Fri Jul 7 14:42:52 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Peter Maydell X-Patchwork-Id: 107202 Delivered-To: patches@linaro.org Received: by 10.140.101.44 with SMTP id t41csp147262qge; Fri, 7 Jul 2017 07:43:02 -0700 (PDT) X-Received: by 10.28.220.133 with SMTP id t127mr2552148wmg.29.1499438582258; Fri, 07 Jul 2017 07:43:02 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1499438582; cv=none; d=google.com; s=arc-20160816; b=GueVr11eZ89zRtBCHqHoNsL1SqHbXGCayaSURMbDD2xP1lX6KUi1vjdhuwBLpAjZgX ErhJyva35vTLPyK3Y5irvGwm3f5bhEL4y2vO5Sm/qhVLwM7It+WO9ZtYmJrzdtwUiuyJ a1EbRvbfvE5m2fwyIDauazjDPf63e82DULoWTsryLJwJSl55sItdKcU0Xq3pgHuxIb3r JxfwfbnPjYkT2NDV2eUvfPUZizDW4OoTrWGnSEteAo5LNa5oRHbW7Ud1zyl9gqKYwqJE dpUsSf7B641K57JliassffTanYehu1M6QVugWsOXt52QAszyw5DuUdYXmz7gbPxzUhLr VsQA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=references:in-reply-to:message-id:date:subject:cc:to:from :arc-authentication-results; bh=VM33rmFbJgP1PiIc60BT7hf9cUUsjh6i0c9iOEs451A=; b=cNSri9Mnhg+zQbcW2Pk+3gInr+lQZ7f+iuRR4ebndpnGAIhFMLwIFE0ki9Nt4o+0eZ ALw4z8LP1PehX8C7xi8pQ6vt+UKqEL8Z/i5SZa33h/5HXDazUCqu5AzyNEa06pU077ee uTH4OKg91NsiJiH7AP1d6qWv3yTKaZDDjcEGn71DQrbnM7tlHh8cmzvInf4fiKpXt2c0 mdHIl6u2nNwBicvbok87pVxT3XdN67PTqJWtKeSpGMvP0Rwy8d7FYA6C674D0bnBN/vG 7iTJSvAV7d0zr3zLDEvwEsEXFZRIGGMe22P2r7I28W8d6qx5wji5E1wviBm4ZXZUEwvF fh1w== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: best guess record for domain of pm215@archaic.org.uk designates 2001:8b0:1d0::2 as permitted sender) smtp.mailfrom=pm215@archaic.org.uk; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from orth.archaic.org.uk (orth.archaic.org.uk. [2001:8b0:1d0::2]) by mx.google.com with ESMTPS id e3si3119656wmd.89.2017.07.07.07.43.02 for (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Fri, 07 Jul 2017 07:43:02 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of pm215@archaic.org.uk designates 2001:8b0:1d0::2 as permitted sender) client-ip=2001:8b0:1d0::2; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of pm215@archaic.org.uk designates 2001:8b0:1d0::2 as permitted sender) smtp.mailfrom=pm215@archaic.org.uk; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from pm215 by orth.archaic.org.uk with local (Exim 4.84_2) (envelope-from ) id 1dTUTF-0005tf-Ph; Fri, 07 Jul 2017 15:43:01 +0100 From: Peter Maydell To: qemu-devel@nongnu.org Cc: patches@linaro.org, Paolo Bonzini , Eduardo Habkost , Marcel Apfelbaum , Igor Mammedov Subject: [PATCH 06/11] scripts/coccinelle/memory-region-init-ram.cocci: New script Date: Fri, 7 Jul 2017 15:42:52 +0100 Message-Id: <1499438577-7674-7-git-send-email-peter.maydell@linaro.org> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1499438577-7674-1-git-send-email-peter.maydell@linaro.org> References: <1499438577-7674-1-git-send-email-peter.maydell@linaro.org> Add a coccinelle script that can be used to automatically convert manual sequences of memory_region_init_ram_nomigrate() vmstate_register_ram{,_global}() to use the new memory_region_init_ram() Signed-off-by: Peter Maydell --- scripts/coccinelle/memory-region-init-ram.cocci | 38 +++++++++++++++++++++++++ 1 file changed, 38 insertions(+) create mode 100644 scripts/coccinelle/memory-region-init-ram.cocci -- 2.7.4 diff --git a/scripts/coccinelle/memory-region-init-ram.cocci b/scripts/coccinelle/memory-region-init-ram.cocci new file mode 100644 index 0000000..d290150 --- /dev/null +++ b/scripts/coccinelle/memory-region-init-ram.cocci @@ -0,0 +1,38 @@ +// Replace by-hand memory_region_init_ram_nomigrate/vmstate_register_ram +// code sequences with use of the new memory_region_init_ram function. +// Similarly for the _rom and _rom_device functions. +// We don't try to replace sequences with a non-NULL owner, because +// there are none in the tree that can be automatically converted +// (and only a handful that can be manually converted). +@@ +expression MR; +expression NAME; +expression SIZE; +expression ERRP; +@@ +-memory_region_init_ram_nomigrate(MR, NULL, NAME, SIZE, ERRP); ++memory_region_init_ram(MR, NULL, NAME, SIZE, ERRP); + ... +-vmstate_register_ram_global(MR); +@@ +expression MR; +expression NAME; +expression SIZE; +expression ERRP; +@@ +-memory_region_init_rom_nomigrate(MR, NULL, NAME, SIZE, ERRP); ++memory_region_init_rom(MR, NULL, NAME, SIZE, ERRP); + ... +-vmstate_register_ram_global(MR); +@@ +expression MR; +expression OPS; +expression OPAQUE; +expression NAME; +expression SIZE; +expression ERRP; +@@ +-memory_region_init_rom_device_nomigrate(MR, NULL, OPS, OPAQUE, NAME, SIZE, ERRP); ++memory_region_init_rom_device(MR, NULL, OPS, OPAQUE, NAME, SIZE, ERRP); + ... +-vmstate_register_ram_global(MR); From patchwork Fri Jul 7 14:42:53 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Peter Maydell X-Patchwork-Id: 107207 Delivered-To: patches@linaro.org Received: by 10.140.101.44 with SMTP id t41csp147284qge; Fri, 7 Jul 2017 07:43:03 -0700 (PDT) X-Received: by 10.223.142.202 with SMTP id q68mr968411wrb.13.1499438583671; Fri, 07 Jul 2017 07:43:03 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1499438583; cv=none; d=google.com; s=arc-20160816; b=j1WJjeAOv+6Wqe6O8ugshFmKmrUdLeR7agWMN2MUsH+T23HgFy+pBNUHj39bG9skzh ocgSNRt7TpsDxU1QursS/B/R8WSNGmRKjGVSOFrkc8Px5hhcYgvJHcVT0W9E3FojA7DD 31el+Qa7JOxfrvVeVmp9zRbRJhOi4UoH7KeLwewvCzr03Zq/yrVYfHPd8LIVpHPS/uzO wLJ1JWaKVoEzJODEPvNgrGAKl3bxuLBX32lc/z4vLieHfFhbEzB+fScpJBXD0pQNna2m hOa9o9rBPggN20GCB3mT45M5v1OTPrhIKbaGnG491BAQtcmqeDi6Vui+QdvL+gqGPgQK l+ug== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=references:in-reply-to:message-id:date:subject:cc:to:from :arc-authentication-results; bh=CllTxhvU0dHTeRPSPqxqMxkmfAXV5TWP5ZK6zHPGl9g=; b=wx4oDwSaobNoiTHKy/fQ4mD1iME9dwz6V+1zvPxIpreqI64wNtqJifomyO9aGDOujk x9uIo7QL6mU+UsxCTGx+/j3PmLQbx2f+5Y2ahF8YlktHUe4ezZgDouwUozHTvKMhZM6J VXsio9JzZlHMmoeHuKH88/xTc2A8iSkgvBh23lqKqsrpfkso1+68V6kh71soyAx35MLd 5g3dS3M/arucWy6tM1c5O1CBqSTFUJ2EX0zsO5uQ6JPiCABD/GJLC6t6dLekiO1wVnGf kugSyUQw8HR2sh9n8EN4OOTpahXO0L8aJK6gnZLmm6jb2icQsqDDw8zgd+5pxCGANe26 qwkg== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: best guess record for domain of pm215@archaic.org.uk designates 2001:8b0:1d0::2 as permitted sender) smtp.mailfrom=pm215@archaic.org.uk; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from orth.archaic.org.uk (orth.archaic.org.uk. [2001:8b0:1d0::2]) by mx.google.com with ESMTPS id p90si2411442wrb.39.2017.07.07.07.43.03 for (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Fri, 07 Jul 2017 07:43:03 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of pm215@archaic.org.uk designates 2001:8b0:1d0::2 as permitted sender) client-ip=2001:8b0:1d0::2; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of pm215@archaic.org.uk designates 2001:8b0:1d0::2 as permitted sender) smtp.mailfrom=pm215@archaic.org.uk; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from pm215 by orth.archaic.org.uk with local (Exim 4.84_2) (envelope-from ) id 1dTUTG-0005u5-NX; Fri, 07 Jul 2017 15:43:02 +0100 From: Peter Maydell To: qemu-devel@nongnu.org Cc: patches@linaro.org, Paolo Bonzini , Eduardo Habkost , Marcel Apfelbaum , Igor Mammedov Subject: [PATCH 07/11] hw: Use new memory_region_init_{ram, rom, rom_device}() functions Date: Fri, 7 Jul 2017 15:42:53 +0100 Message-Id: <1499438577-7674-8-git-send-email-peter.maydell@linaro.org> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1499438577-7674-1-git-send-email-peter.maydell@linaro.org> References: <1499438577-7674-1-git-send-email-peter.maydell@linaro.org> Use the new functions memory_region_init_{ram,rom,rom_device}() instead of manually calling the _nomigrate() version and then vmstate_register_ram_global(). Patch automatically created using coccinelle script: spatch --in-place -sp_file scripts/coccinelle/memory-region-init-ram.cocci -dir hw (As it turns out, there are no instances of the rom and rom_device functions that are caught by this script.) Signed-off-by: Peter Maydell --- hw/arm/exynos4210.c | 6 ++---- hw/arm/exynos4_boards.c | 6 ++---- hw/arm/fsl-imx25.c | 3 +-- hw/arm/fsl-imx31.c | 3 +-- hw/arm/fsl-imx6.c | 3 +-- hw/arm/mainstone.c | 3 +-- hw/arm/musicpal.c | 3 +-- hw/arm/omap1.c | 3 +-- hw/arm/omap2.c | 3 +-- hw/arm/omap_sx1.c | 8 +++----- hw/arm/palm.c | 3 +-- hw/arm/pxa2xx.c | 12 ++++-------- hw/arm/realview.c | 9 +++------ hw/arm/spitz.c | 3 +-- hw/arm/stellaris.c | 6 ++---- hw/arm/stm32f205_soc.c | 7 ++----- hw/arm/tosa.c | 3 +-- hw/arm/vexpress.c | 9 +++------ hw/arm/virt.c | 4 ++-- hw/arm/xilinx_zynq.c | 3 +-- hw/arm/xlnx-zynqmp.c | 3 +-- hw/cris/axis_dev88.c | 5 ++--- hw/display/cg3.c | 3 +-- hw/display/tc6393xb.c | 3 +-- hw/display/vmware_vga.c | 3 +-- hw/i386/pc.c | 3 +-- hw/i386/pc_sysfw.c | 6 ++---- hw/i386/xen/xen-hvm.c | 3 +-- hw/m68k/an5206.c | 3 +-- hw/m68k/mcf5208.c | 3 +-- hw/microblaze/petalogix_ml605_mmu.c | 6 ++---- hw/microblaze/petalogix_s3adsp1800_mmu.c | 6 ++---- hw/mips/mips_fulong2e.c | 3 +-- hw/mips/mips_jazz.c | 6 ++---- hw/mips/mips_mipssim.c | 3 +-- hw/mips/mips_r4k.c | 3 +-- hw/moxie/moxiesim.c | 6 ++---- hw/nios2/10m50_devboard.c | 8 ++++---- hw/openrisc/openrisc_sim.c | 3 +-- hw/ppc/mac_newworld.c | 3 +-- hw/ppc/mac_oldworld.c | 3 +-- hw/ppc/ppc405_boards.c | 9 +++------ hw/ppc/ppc405_uc.c | 3 +-- hw/s390x/sclp.c | 3 +-- hw/sh4/r2d.c | 3 +-- hw/sh4/shix.c | 9 +++------ hw/sparc/leon3.c | 3 +-- hw/tricore/tricore_testboard.c | 26 ++++++++++---------------- hw/unicore32/puv3.c | 3 +-- hw/xtensa/sim.c | 6 ++---- hw/xtensa/xtfpga.c | 6 ++---- 51 files changed, 89 insertions(+), 167 deletions(-) -- 2.7.4 diff --git a/hw/arm/exynos4210.c b/hw/arm/exynos4210.c index a12615c..0380360 100644 --- a/hw/arm/exynos4210.c +++ b/hw/arm/exynos4210.c @@ -276,9 +276,8 @@ Exynos4210State *exynos4210_init(MemoryRegion *system_mem) &s->chipid_mem); /* Internal ROM */ - memory_region_init_ram_nomigrate(&s->irom_mem, NULL, "exynos4210.irom", + memory_region_init_ram(&s->irom_mem, NULL, "exynos4210.irom", EXYNOS4210_IROM_SIZE, &error_fatal); - vmstate_register_ram_global(&s->irom_mem); memory_region_set_readonly(&s->irom_mem, true); memory_region_add_subregion(system_mem, EXYNOS4210_IROM_BASE_ADDR, &s->irom_mem); @@ -292,9 +291,8 @@ Exynos4210State *exynos4210_init(MemoryRegion *system_mem) &s->irom_alias_mem); /* Internal RAM */ - memory_region_init_ram_nomigrate(&s->iram_mem, NULL, "exynos4210.iram", + memory_region_init_ram(&s->iram_mem, NULL, "exynos4210.iram", EXYNOS4210_IRAM_SIZE, &error_fatal); - vmstate_register_ram_global(&s->iram_mem); memory_region_add_subregion(system_mem, EXYNOS4210_IRAM_BASE_ADDR, &s->iram_mem); diff --git a/hw/arm/exynos4_boards.c b/hw/arm/exynos4_boards.c index c3b0d2e..7c03ed3 100644 --- a/hw/arm/exynos4_boards.c +++ b/hw/arm/exynos4_boards.c @@ -110,18 +110,16 @@ static void exynos4_boards_init_ram(Exynos4BoardState *s, unsigned long mem_size = ram_size; if (mem_size > EXYNOS4210_DRAM_MAX_SIZE) { - memory_region_init_ram_nomigrate(&s->dram1_mem, NULL, "exynos4210.dram1", + memory_region_init_ram(&s->dram1_mem, NULL, "exynos4210.dram1", mem_size - EXYNOS4210_DRAM_MAX_SIZE, &error_fatal); - vmstate_register_ram_global(&s->dram1_mem); memory_region_add_subregion(system_mem, EXYNOS4210_DRAM1_BASE_ADDR, &s->dram1_mem); mem_size = EXYNOS4210_DRAM_MAX_SIZE; } - memory_region_init_ram_nomigrate(&s->dram0_mem, NULL, "exynos4210.dram0", mem_size, + memory_region_init_ram(&s->dram0_mem, NULL, "exynos4210.dram0", mem_size, &error_fatal); - vmstate_register_ram_global(&s->dram0_mem); memory_region_add_subregion(system_mem, EXYNOS4210_DRAM0_BASE_ADDR, &s->dram0_mem); } diff --git a/hw/arm/fsl-imx25.c b/hw/arm/fsl-imx25.c index cebe0ec..8cff3c1 100644 --- a/hw/arm/fsl-imx25.c +++ b/hw/arm/fsl-imx25.c @@ -267,7 +267,7 @@ static void fsl_imx25_realize(DeviceState *dev, Error **errp) &s->rom[1]); /* initialize internal RAM (128 KB) */ - memory_region_init_ram_nomigrate(&s->iram, NULL, "imx25.iram", FSL_IMX25_IRAM_SIZE, + memory_region_init_ram(&s->iram, NULL, "imx25.iram", FSL_IMX25_IRAM_SIZE, &err); if (err) { error_propagate(errp, err); @@ -275,7 +275,6 @@ static void fsl_imx25_realize(DeviceState *dev, Error **errp) } memory_region_add_subregion(get_system_memory(), FSL_IMX25_IRAM_ADDR, &s->iram); - vmstate_register_ram_global(&s->iram); /* internal RAM (128 KB) is aliased over 128 MB - 128 KB */ memory_region_init_alias(&s->iram_alias, NULL, "imx25.iram_alias", diff --git a/hw/arm/fsl-imx31.c b/hw/arm/fsl-imx31.c index 6c2823a..9027875 100644 --- a/hw/arm/fsl-imx31.c +++ b/hw/arm/fsl-imx31.c @@ -239,7 +239,7 @@ static void fsl_imx31_realize(DeviceState *dev, Error **errp) &s->rom); /* initialize internal RAM (16 KB) */ - memory_region_init_ram_nomigrate(&s->iram, NULL, "imx31.iram", FSL_IMX31_IRAM_SIZE, + memory_region_init_ram(&s->iram, NULL, "imx31.iram", FSL_IMX31_IRAM_SIZE, &err); if (err) { error_propagate(errp, err); @@ -247,7 +247,6 @@ static void fsl_imx31_realize(DeviceState *dev, Error **errp) } memory_region_add_subregion(get_system_memory(), FSL_IMX31_IRAM_ADDR, &s->iram); - vmstate_register_ram_global(&s->iram); /* internal RAM (16 KB) is aliased over 256 MB - 16 KB */ memory_region_init_alias(&s->iram_alias, NULL, "imx31.iram_alias", diff --git a/hw/arm/fsl-imx6.c b/hw/arm/fsl-imx6.c index e00b2f9..576c663 100644 --- a/hw/arm/fsl-imx6.c +++ b/hw/arm/fsl-imx6.c @@ -419,7 +419,7 @@ static void fsl_imx6_realize(DeviceState *dev, Error **errp) &s->caam); /* OCRAM memory */ - memory_region_init_ram_nomigrate(&s->ocram, NULL, "imx6.ocram", FSL_IMX6_OCRAM_SIZE, + memory_region_init_ram(&s->ocram, NULL, "imx6.ocram", FSL_IMX6_OCRAM_SIZE, &err); if (err) { error_propagate(errp, err); @@ -427,7 +427,6 @@ static void fsl_imx6_realize(DeviceState *dev, Error **errp) } memory_region_add_subregion(get_system_memory(), FSL_IMX6_OCRAM_ADDR, &s->ocram); - vmstate_register_ram_global(&s->ocram); /* internal OCRAM (256 KB) is aliased over 1 MB */ memory_region_init_alias(&s->ocram_alias, NULL, "imx6.ocram_alias", diff --git a/hw/arm/mainstone.c b/hw/arm/mainstone.c index 4ade8a2..fb268e6 100644 --- a/hw/arm/mainstone.c +++ b/hw/arm/mainstone.c @@ -128,9 +128,8 @@ static void mainstone_common_init(MemoryRegion *address_space_mem, /* Setup CPU & memory */ mpu = pxa270_init(address_space_mem, mainstone_binfo.ram_size, cpu_model); - memory_region_init_ram_nomigrate(rom, NULL, "mainstone.rom", MAINSTONE_ROM, + memory_region_init_ram(rom, NULL, "mainstone.rom", MAINSTONE_ROM, &error_fatal); - vmstate_register_ram_global(rom); memory_region_set_readonly(rom, true); memory_region_add_subregion(address_space_mem, 0, rom); diff --git a/hw/arm/musicpal.c b/hw/arm/musicpal.c index ee5dfed..7e8ab31 100644 --- a/hw/arm/musicpal.c +++ b/hw/arm/musicpal.c @@ -1604,9 +1604,8 @@ static void musicpal_init(MachineState *machine) MP_RAM_DEFAULT_SIZE); memory_region_add_subregion(address_space_mem, 0, ram); - memory_region_init_ram_nomigrate(sram, NULL, "musicpal.sram", MP_SRAM_SIZE, + memory_region_init_ram(sram, NULL, "musicpal.sram", MP_SRAM_SIZE, &error_fatal); - vmstate_register_ram_global(sram); memory_region_add_subregion(address_space_mem, MP_SRAM_BASE, sram); dev = sysbus_create_simple(TYPE_MV88W8618_PIC, MP_PIC_BASE, diff --git a/hw/arm/omap1.c b/hw/arm/omap1.c index f4afb88..3d15ff6 100644 --- a/hw/arm/omap1.c +++ b/hw/arm/omap1.c @@ -3880,9 +3880,8 @@ struct omap_mpu_state_s *omap310_mpu_init(MemoryRegion *system_memory, memory_region_allocate_system_memory(&s->emiff_ram, NULL, "omap1.dram", s->sdram_size); memory_region_add_subregion(system_memory, OMAP_EMIFF_BASE, &s->emiff_ram); - memory_region_init_ram_nomigrate(&s->imif_ram, NULL, "omap1.sram", s->sram_size, + memory_region_init_ram(&s->imif_ram, NULL, "omap1.sram", s->sram_size, &error_fatal); - vmstate_register_ram_global(&s->imif_ram); memory_region_add_subregion(system_memory, OMAP_IMIF_BASE, &s->imif_ram); omap_clkm_init(system_memory, 0xfffece00, 0xe1008000, s); diff --git a/hw/arm/omap2.c b/hw/arm/omap2.c index 504bfe1..bbf0b7e 100644 --- a/hw/arm/omap2.c +++ b/hw/arm/omap2.c @@ -2278,9 +2278,8 @@ struct omap_mpu_state_s *omap2420_mpu_init(MemoryRegion *sysmem, memory_region_allocate_system_memory(&s->sdram, NULL, "omap2.dram", s->sdram_size); memory_region_add_subregion(sysmem, OMAP2_Q2_BASE, &s->sdram); - memory_region_init_ram_nomigrate(&s->sram, NULL, "omap2.sram", s->sram_size, + memory_region_init_ram(&s->sram, NULL, "omap2.sram", s->sram_size, &error_fatal); - vmstate_register_ram_global(&s->sram); memory_region_add_subregion(sysmem, OMAP2_SRAM_BASE, &s->sram); s->l4 = omap_l4_init(sysmem, OMAP2_L4_BASE, 54); diff --git a/hw/arm/omap_sx1.c b/hw/arm/omap_sx1.c index d70c6b6..9809106 100644 --- a/hw/arm/omap_sx1.c +++ b/hw/arm/omap_sx1.c @@ -123,9 +123,8 @@ static void sx1_init(MachineState *machine, const int version) machine->cpu_model); /* External Flash (EMIFS) */ - memory_region_init_ram_nomigrate(flash, NULL, "omap_sx1.flash0-0", flash_size, + memory_region_init_ram(flash, NULL, "omap_sx1.flash0-0", flash_size, &error_fatal); - vmstate_register_ram_global(flash); memory_region_set_readonly(flash, true); memory_region_add_subregion(address_space, OMAP_CS0_BASE, flash); @@ -167,9 +166,8 @@ static void sx1_init(MachineState *machine, const int version) if ((version == 1) && (dinfo = drive_get(IF_PFLASH, 0, fl_idx)) != NULL) { MemoryRegion *flash_1 = g_new(MemoryRegion, 1); - memory_region_init_ram_nomigrate(flash_1, NULL, "omap_sx1.flash1-0", flash1_size, - &error_fatal); - vmstate_register_ram_global(flash_1); + memory_region_init_ram(flash_1, NULL, "omap_sx1.flash1-0", + flash1_size, &error_fatal); memory_region_set_readonly(flash_1, true); memory_region_add_subregion(address_space, OMAP_CS1_BASE, flash_1); diff --git a/hw/arm/palm.c b/hw/arm/palm.c index abacdff..64cf8ca 100644 --- a/hw/arm/palm.c +++ b/hw/arm/palm.c @@ -214,9 +214,8 @@ static void palmte_init(MachineState *machine) mpu = omap310_mpu_init(address_space_mem, sdram_size, cpu_model); /* External Flash (EMIFS) */ - memory_region_init_ram_nomigrate(flash, NULL, "palmte.flash", flash_size, + memory_region_init_ram(flash, NULL, "palmte.flash", flash_size, &error_fatal); - vmstate_register_ram_global(flash); memory_region_set_readonly(flash, true); memory_region_add_subregion(address_space_mem, OMAP_CS0_BASE, flash); diff --git a/hw/arm/pxa2xx.c b/hw/arm/pxa2xx.c index ae46659..6fa8cf3 100644 --- a/hw/arm/pxa2xx.c +++ b/hw/arm/pxa2xx.c @@ -2073,13 +2073,11 @@ PXA2xxState *pxa270_init(MemoryRegion *address_space, s->reset = qemu_allocate_irq(pxa2xx_reset, s, 0); /* SDRAM & Internal Memory Storage */ - memory_region_init_ram_nomigrate(&s->sdram, NULL, "pxa270.sdram", sdram_size, + memory_region_init_ram(&s->sdram, NULL, "pxa270.sdram", sdram_size, &error_fatal); - vmstate_register_ram_global(&s->sdram); memory_region_add_subregion(address_space, PXA2XX_SDRAM_BASE, &s->sdram); - memory_region_init_ram_nomigrate(&s->internal, NULL, "pxa270.internal", 0x40000, + memory_region_init_ram(&s->internal, NULL, "pxa270.internal", 0x40000, &error_fatal); - vmstate_register_ram_global(&s->internal); memory_region_add_subregion(address_space, PXA2XX_INTERNAL_BASE, &s->internal); @@ -2205,13 +2203,11 @@ PXA2xxState *pxa255_init(MemoryRegion *address_space, unsigned int sdram_size) s->reset = qemu_allocate_irq(pxa2xx_reset, s, 0); /* SDRAM & Internal Memory Storage */ - memory_region_init_ram_nomigrate(&s->sdram, NULL, "pxa255.sdram", sdram_size, + memory_region_init_ram(&s->sdram, NULL, "pxa255.sdram", sdram_size, &error_fatal); - vmstate_register_ram_global(&s->sdram); memory_region_add_subregion(address_space, PXA2XX_SDRAM_BASE, &s->sdram); - memory_region_init_ram_nomigrate(&s->internal, NULL, "pxa255.internal", + memory_region_init_ram(&s->internal, NULL, "pxa255.internal", PXA2XX_INTERNAL_SIZE, &error_fatal); - vmstate_register_ram_global(&s->internal); memory_region_add_subregion(address_space, PXA2XX_INTERNAL_BASE, &s->internal); diff --git a/hw/arm/realview.c b/hw/arm/realview.c index a5e8f86..76ff557 100644 --- a/hw/arm/realview.c +++ b/hw/arm/realview.c @@ -143,15 +143,13 @@ static void realview_init(MachineState *machine, ram_lo = g_new(MemoryRegion, 1); low_ram_size = ram_size - 0x20000000; ram_size = 0x20000000; - memory_region_init_ram_nomigrate(ram_lo, NULL, "realview.lowmem", low_ram_size, + memory_region_init_ram(ram_lo, NULL, "realview.lowmem", low_ram_size, &error_fatal); - vmstate_register_ram_global(ram_lo); memory_region_add_subregion(sysmem, 0x20000000, ram_lo); } - memory_region_init_ram_nomigrate(ram_hi, NULL, "realview.highmem", ram_size, + memory_region_init_ram(ram_hi, NULL, "realview.highmem", ram_size, &error_fatal); - vmstate_register_ram_global(ram_hi); low_ram_size = ram_size; if (low_ram_size > 0x10000000) low_ram_size = 0x10000000; @@ -345,9 +343,8 @@ static void realview_init(MachineState *machine, startup code. I guess this works on real hardware because the BootROM happens to be in ROM/flash or in memory that isn't clobbered until after Linux boots the secondary CPUs. */ - memory_region_init_ram_nomigrate(ram_hack, NULL, "realview.hack", 0x1000, + memory_region_init_ram(ram_hack, NULL, "realview.hack", 0x1000, &error_fatal); - vmstate_register_ram_global(ram_hack); memory_region_add_subregion(sysmem, SMP_BOOT_ADDR, ram_hack); realview_binfo.ram_size = ram_size; diff --git a/hw/arm/spitz.c b/hw/arm/spitz.c index f89584c..7f588ce 100644 --- a/hw/arm/spitz.c +++ b/hw/arm/spitz.c @@ -919,8 +919,7 @@ static void spitz_common_init(MachineState *machine, sl_flash_register(mpu, (model == spitz) ? FLASH_128M : FLASH_1024M); - memory_region_init_ram_nomigrate(rom, NULL, "spitz.rom", SPITZ_ROM, &error_fatal); - vmstate_register_ram_global(rom); + memory_region_init_ram(rom, NULL, "spitz.rom", SPITZ_ROM, &error_fatal); memory_region_set_readonly(rom, true); memory_region_add_subregion(address_space_mem, 0, rom); diff --git a/hw/arm/stellaris.c b/hw/arm/stellaris.c index ce23f36..408c1a1 100644 --- a/hw/arm/stellaris.c +++ b/hw/arm/stellaris.c @@ -1288,15 +1288,13 @@ static void stellaris_init(const char *kernel_filename, const char *cpu_model, sram_size = ((board->dc0 >> 18) + 1) * 1024; /* Flash programming is done via the SCU, so pretend it is ROM. */ - memory_region_init_ram_nomigrate(flash, NULL, "stellaris.flash", flash_size, + memory_region_init_ram(flash, NULL, "stellaris.flash", flash_size, &error_fatal); - vmstate_register_ram_global(flash); memory_region_set_readonly(flash, true); memory_region_add_subregion(system_memory, 0, flash); - memory_region_init_ram_nomigrate(sram, NULL, "stellaris.sram", sram_size, + memory_region_init_ram(sram, NULL, "stellaris.sram", sram_size, &error_fatal); - vmstate_register_ram_global(sram); memory_region_add_subregion(system_memory, 0x20000000, sram); nvic = armv7m_init(system_memory, flash_size, NUM_IRQ_LINES, diff --git a/hw/arm/stm32f205_soc.c b/hw/arm/stm32f205_soc.c index 2e9dff1..f61e735 100644 --- a/hw/arm/stm32f205_soc.c +++ b/hw/arm/stm32f205_soc.c @@ -95,22 +95,19 @@ static void stm32f205_soc_realize(DeviceState *dev_soc, Error **errp) MemoryRegion *flash = g_new(MemoryRegion, 1); MemoryRegion *flash_alias = g_new(MemoryRegion, 1); - memory_region_init_ram_nomigrate(flash, NULL, "STM32F205.flash", FLASH_SIZE, + memory_region_init_ram(flash, NULL, "STM32F205.flash", FLASH_SIZE, &error_fatal); memory_region_init_alias(flash_alias, NULL, "STM32F205.flash.alias", flash, 0, FLASH_SIZE); - vmstate_register_ram_global(flash); - memory_region_set_readonly(flash, true); memory_region_set_readonly(flash_alias, true); memory_region_add_subregion(system_memory, FLASH_BASE_ADDRESS, flash); memory_region_add_subregion(system_memory, 0, flash_alias); - memory_region_init_ram_nomigrate(sram, NULL, "STM32F205.sram", SRAM_SIZE, + memory_region_init_ram(sram, NULL, "STM32F205.sram", SRAM_SIZE, &error_fatal); - vmstate_register_ram_global(sram); memory_region_add_subregion(system_memory, SRAM_BASE_ADDRESS, sram); armv7m = DEVICE(&s->armv7m); diff --git a/hw/arm/tosa.c b/hw/arm/tosa.c index bfd1153..8b757ff 100644 --- a/hw/arm/tosa.c +++ b/hw/arm/tosa.c @@ -234,8 +234,7 @@ static void tosa_init(MachineState *machine) mpu = pxa255_init(address_space_mem, tosa_binfo.ram_size); - memory_region_init_ram_nomigrate(rom, NULL, "tosa.rom", TOSA_ROM, &error_fatal); - vmstate_register_ram_global(rom); + memory_region_init_ram(rom, NULL, "tosa.rom", TOSA_ROM, &error_fatal); memory_region_set_readonly(rom, true); memory_region_add_subregion(address_space_mem, 0, rom); diff --git a/hw/arm/vexpress.c b/hw/arm/vexpress.c index 874d885..528c65d 100644 --- a/hw/arm/vexpress.c +++ b/hw/arm/vexpress.c @@ -390,9 +390,8 @@ static void a15_daughterboard_init(const VexpressMachineState *vms, /* 0x2b060000: SP805 watchdog: not modelled */ /* 0x2b0a0000: PL341 dynamic memory controller: not modelled */ /* 0x2e000000: system SRAM */ - memory_region_init_ram_nomigrate(sram, NULL, "vexpress.a15sram", 0x10000, + memory_region_init_ram(sram, NULL, "vexpress.a15sram", 0x10000, &error_fatal); - vmstate_register_ram_global(sram); memory_region_add_subregion(sysmem, 0x2e000000, sram); /* 0x7ffb0000: DMA330 DMA controller: not modelled */ @@ -673,15 +672,13 @@ static void vexpress_common_init(MachineState *machine) } sram_size = 0x2000000; - memory_region_init_ram_nomigrate(sram, NULL, "vexpress.sram", sram_size, + memory_region_init_ram(sram, NULL, "vexpress.sram", sram_size, &error_fatal); - vmstate_register_ram_global(sram); memory_region_add_subregion(sysmem, map[VE_SRAM], sram); vram_size = 0x800000; - memory_region_init_ram_nomigrate(vram, NULL, "vexpress.vram", vram_size, + memory_region_init_ram(vram, NULL, "vexpress.vram", vram_size, &error_fatal); - vmstate_register_ram_global(vram); memory_region_add_subregion(sysmem, map[VE_VIDEORAM], vram); /* 0x4e000000 LAN9118 Ethernet */ diff --git a/hw/arm/virt.c b/hw/arm/virt.c index 30f010a..31739d7 100644 --- a/hw/arm/virt.c +++ b/hw/arm/virt.c @@ -1155,8 +1155,8 @@ static void create_secure_ram(VirtMachineState *vms, hwaddr base = vms->memmap[VIRT_SECURE_MEM].base; hwaddr size = vms->memmap[VIRT_SECURE_MEM].size; - memory_region_init_ram_nomigrate(secram, NULL, "virt.secure-ram", size, &error_fatal); - vmstate_register_ram_global(secram); + memory_region_init_ram(secram, NULL, "virt.secure-ram", size, + &error_fatal); memory_region_add_subregion(secure_sysmem, base, secram); nodename = g_strdup_printf("/secram@%" PRIx64, base); diff --git a/hw/arm/xilinx_zynq.c b/hw/arm/xilinx_zynq.c index 8ae6535..6b11a75 100644 --- a/hw/arm/xilinx_zynq.c +++ b/hw/arm/xilinx_zynq.c @@ -204,9 +204,8 @@ static void zynq_init(MachineState *machine) memory_region_add_subregion(address_space_mem, 0, ext_ram); /* 256K of on-chip memory */ - memory_region_init_ram_nomigrate(ocm_ram, NULL, "zynq.ocm_ram", 256 << 10, + memory_region_init_ram(ocm_ram, NULL, "zynq.ocm_ram", 256 << 10, &error_fatal); - vmstate_register_ram_global(ocm_ram); memory_region_add_subregion(address_space_mem, 0xFFFC0000, ocm_ram); DriveInfo *dinfo = drive_get(IF_PFLASH, 0, 0); diff --git a/hw/arm/xlnx-zynqmp.c b/hw/arm/xlnx-zynqmp.c index d6f73d7..9eceadb 100644 --- a/hw/arm/xlnx-zynqmp.c +++ b/hw/arm/xlnx-zynqmp.c @@ -226,9 +226,8 @@ static void xlnx_zynqmp_realize(DeviceState *dev, Error **errp) for (i = 0; i < XLNX_ZYNQMP_NUM_OCM_BANKS; i++) { char *ocm_name = g_strdup_printf("zynqmp.ocm_ram_bank_%d", i); - memory_region_init_ram_nomigrate(&s->ocm_ram[i], NULL, ocm_name, + memory_region_init_ram(&s->ocm_ram[i], NULL, ocm_name, XLNX_ZYNQMP_OCM_RAM_SIZE, &error_fatal); - vmstate_register_ram_global(&s->ocm_ram[i]); memory_region_add_subregion(get_system_memory(), XLNX_ZYNQMP_OCM_RAM_0_ADDRESS + i * XLNX_ZYNQMP_OCM_RAM_SIZE, diff --git a/hw/cris/axis_dev88.c b/hw/cris/axis_dev88.c index 8a2564d..80674f6 100644 --- a/hw/cris/axis_dev88.c +++ b/hw/cris/axis_dev88.c @@ -281,9 +281,8 @@ void axisdev88_init(MachineState *machine) /* The ETRAX-FS has 128Kb on chip ram, the docs refer to it as the internal memory. */ - memory_region_init_ram_nomigrate(phys_intmem, NULL, "axisdev88.chipram", INTMEM_SIZE, - &error_fatal); - vmstate_register_ram_global(phys_intmem); + memory_region_init_ram(phys_intmem, NULL, "axisdev88.chipram", + INTMEM_SIZE, &error_fatal); memory_region_add_subregion(address_space_mem, 0x38000000, phys_intmem); /* Attach a NAND flash to CS1. */ diff --git a/hw/display/cg3.c b/hw/display/cg3.c index 54439b2..e069c44 100644 --- a/hw/display/cg3.c +++ b/hw/display/cg3.c @@ -311,10 +311,9 @@ static void cg3_realizefn(DeviceState *dev, Error **errp) } } - memory_region_init_ram_nomigrate(&s->vram_mem, NULL, "cg3.vram", s->vram_size, + memory_region_init_ram(&s->vram_mem, NULL, "cg3.vram", s->vram_size, &error_fatal); memory_region_set_log(&s->vram_mem, true, DIRTY_MEMORY_VGA); - vmstate_register_ram_global(&s->vram_mem); sysbus_init_mmio(sbd, &s->vram_mem); sysbus_init_irq(sbd, &s->irq); diff --git a/hw/display/tc6393xb.c b/hw/display/tc6393xb.c index 762e370..74d10af 100644 --- a/hw/display/tc6393xb.c +++ b/hw/display/tc6393xb.c @@ -586,9 +586,8 @@ TC6393xbState *tc6393xb_init(MemoryRegion *sysmem, uint32_t base, qemu_irq irq) memory_region_init_io(&s->iomem, NULL, &tc6393xb_ops, s, "tc6393xb", 0x10000); memory_region_add_subregion(sysmem, base, &s->iomem); - memory_region_init_ram_nomigrate(&s->vram, NULL, "tc6393xb.vram", 0x100000, + memory_region_init_ram(&s->vram, NULL, "tc6393xb.vram", 0x100000, &error_fatal); - vmstate_register_ram_global(&s->vram); s->vram_ptr = memory_region_get_ram_ptr(&s->vram); memory_region_add_subregion(sysmem, base + 0x100000, &s->vram); s->scr_width = 480; diff --git a/hw/display/vmware_vga.c b/hw/display/vmware_vga.c index 120b0dd..4a64b41 100644 --- a/hw/display/vmware_vga.c +++ b/hw/display/vmware_vga.c @@ -1239,9 +1239,8 @@ static void vmsvga_init(DeviceState *dev, struct vmsvga_state_s *s, s->vga.con = graphic_console_init(dev, 0, &vmsvga_ops, s); s->fifo_size = SVGA_FIFO_SIZE; - memory_region_init_ram_nomigrate(&s->fifo_ram, NULL, "vmsvga.fifo", s->fifo_size, + memory_region_init_ram(&s->fifo_ram, NULL, "vmsvga.fifo", s->fifo_size, &error_fatal); - vmstate_register_ram_global(&s->fifo_ram); s->fifo_ptr = memory_region_get_ram_ptr(&s->fifo_ram); vga_common_init(&s->vga, OBJECT(dev), true); diff --git a/hw/i386/pc.c b/hw/i386/pc.c index 72c03ec..b0420e2 100644 --- a/hw/i386/pc.c +++ b/hw/i386/pc.c @@ -1442,9 +1442,8 @@ void pc_memory_init(PCMachineState *pcms, pc_system_firmware_init(rom_memory, !pcmc->pci_enabled); option_rom_mr = g_malloc(sizeof(*option_rom_mr)); - memory_region_init_ram_nomigrate(option_rom_mr, NULL, "pc.rom", PC_ROM_SIZE, + memory_region_init_ram(option_rom_mr, NULL, "pc.rom", PC_ROM_SIZE, &error_fatal); - vmstate_register_ram_global(option_rom_mr); memory_region_add_subregion_overlap(rom_memory, PC_ROM_MIN_VGA, option_rom_mr, diff --git a/hw/i386/pc_sysfw.c b/hw/i386/pc_sysfw.c index fbfd0c4..6b18374 100644 --- a/hw/i386/pc_sysfw.c +++ b/hw/i386/pc_sysfw.c @@ -57,9 +57,8 @@ static void pc_isa_bios_init(MemoryRegion *rom_memory, /* map the last 128KB of the BIOS in ISA space */ isa_bios_size = MIN(flash_size, 128 * 1024); isa_bios = g_malloc(sizeof(*isa_bios)); - memory_region_init_ram_nomigrate(isa_bios, NULL, "isa-bios", isa_bios_size, + memory_region_init_ram(isa_bios, NULL, "isa-bios", isa_bios_size, &error_fatal); - vmstate_register_ram_global(isa_bios); memory_region_add_subregion_overlap(rom_memory, 0x100000 - isa_bios_size, isa_bios, @@ -195,8 +194,7 @@ static void old_pc_system_rom_init(MemoryRegion *rom_memory, bool isapc_ram_fw) goto bios_error; } bios = g_malloc(sizeof(*bios)); - memory_region_init_ram_nomigrate(bios, NULL, "pc.bios", bios_size, &error_fatal); - vmstate_register_ram_global(bios); + memory_region_init_ram(bios, NULL, "pc.bios", bios_size, &error_fatal); if (!isapc_ram_fw) { memory_region_set_readonly(bios, true); } diff --git a/hw/i386/xen/xen-hvm.c b/hw/i386/xen/xen-hvm.c index 55ec96d..3d951a3 100644 --- a/hw/i386/xen/xen-hvm.c +++ b/hw/i386/xen/xen-hvm.c @@ -212,10 +212,9 @@ static void xen_ram_init(PCMachineState *pcms, */ block_len = (1ULL << 32) + pcms->above_4g_mem_size; } - memory_region_init_ram_nomigrate(&ram_memory, NULL, "xen.ram", block_len, + memory_region_init_ram(&ram_memory, NULL, "xen.ram", block_len, &error_fatal); *ram_memory_p = &ram_memory; - vmstate_register_ram_global(&ram_memory); memory_region_init_alias(&ram_640k, NULL, "xen.ram.640k", &ram_memory, 0, 0xa0000); diff --git a/hw/m68k/an5206.c b/hw/m68k/an5206.c index 6fd3c6f..c762441 100644 --- a/hw/m68k/an5206.c +++ b/hw/m68k/an5206.c @@ -60,8 +60,7 @@ static void an5206_init(MachineState *machine) memory_region_add_subregion(address_space_mem, 0, ram); /* Internal SRAM. */ - memory_region_init_ram_nomigrate(sram, NULL, "an5206.sram", 512, &error_fatal); - vmstate_register_ram_global(sram); + memory_region_init_ram(sram, NULL, "an5206.sram", 512, &error_fatal); memory_region_add_subregion(address_space_mem, AN5206_RAMBAR_ADDR, sram); mcf5206_init(address_space_mem, AN5206_MBAR_ADDR, cpu); diff --git a/hw/m68k/mcf5208.c b/hw/m68k/mcf5208.c index f4abe1d..f4b1387 100644 --- a/hw/m68k/mcf5208.c +++ b/hw/m68k/mcf5208.c @@ -248,8 +248,7 @@ static void mcf5208evb_init(MachineState *machine) memory_region_add_subregion(address_space_mem, 0x40000000, ram); /* Internal SRAM. */ - memory_region_init_ram_nomigrate(sram, NULL, "mcf5208.sram", 16384, &error_fatal); - vmstate_register_ram_global(sram); + memory_region_init_ram(sram, NULL, "mcf5208.sram", 16384, &error_fatal); memory_region_add_subregion(address_space_mem, 0x80000000, sram); /* Internal peripherals. */ diff --git a/hw/microblaze/petalogix_ml605_mmu.c b/hw/microblaze/petalogix_ml605_mmu.c index fb022cd..b664dc0 100644 --- a/hw/microblaze/petalogix_ml605_mmu.c +++ b/hw/microblaze/petalogix_ml605_mmu.c @@ -96,14 +96,12 @@ petalogix_ml605_init(MachineState *machine) object_property_set_bool(OBJECT(cpu), true, "realized", &error_abort); /* Attach emulated BRAM through the LMB. */ - memory_region_init_ram_nomigrate(phys_lmb_bram, NULL, "petalogix_ml605.lmb_bram", + memory_region_init_ram(phys_lmb_bram, NULL, "petalogix_ml605.lmb_bram", LMB_BRAM_SIZE, &error_fatal); - vmstate_register_ram_global(phys_lmb_bram); memory_region_add_subregion(address_space_mem, 0x00000000, phys_lmb_bram); - memory_region_init_ram_nomigrate(phys_ram, NULL, "petalogix_ml605.ram", ram_size, + memory_region_init_ram(phys_ram, NULL, "petalogix_ml605.ram", ram_size, &error_fatal); - vmstate_register_ram_global(phys_ram); memory_region_add_subregion(address_space_mem, MEMORY_BASEADDR, phys_ram); dinfo = drive_get(IF_PFLASH, 0, 0); diff --git a/hw/microblaze/petalogix_s3adsp1800_mmu.c b/hw/microblaze/petalogix_s3adsp1800_mmu.c index d71fcd5..5cb4deb 100644 --- a/hw/microblaze/petalogix_s3adsp1800_mmu.c +++ b/hw/microblaze/petalogix_s3adsp1800_mmu.c @@ -75,15 +75,13 @@ petalogix_s3adsp1800_init(MachineState *machine) object_property_set_bool(OBJECT(cpu), true, "realized", &error_abort); /* Attach emulated BRAM through the LMB. */ - memory_region_init_ram_nomigrate(phys_lmb_bram, NULL, + memory_region_init_ram(phys_lmb_bram, NULL, "petalogix_s3adsp1800.lmb_bram", LMB_BRAM_SIZE, &error_fatal); - vmstate_register_ram_global(phys_lmb_bram); memory_region_add_subregion(sysmem, 0x00000000, phys_lmb_bram); - memory_region_init_ram_nomigrate(phys_ram, NULL, "petalogix_s3adsp1800.ram", + memory_region_init_ram(phys_ram, NULL, "petalogix_s3adsp1800.ram", ram_size, &error_fatal); - vmstate_register_ram_global(phys_ram); memory_region_add_subregion(sysmem, ddr_base, phys_ram); dinfo = drive_get(IF_PFLASH, 0, 0); diff --git a/hw/mips/mips_fulong2e.c b/hw/mips/mips_fulong2e.c index def3717..3f3cb32 100644 --- a/hw/mips/mips_fulong2e.c +++ b/hw/mips/mips_fulong2e.c @@ -294,9 +294,8 @@ static void mips_fulong2e_init(MachineState *machine) /* allocate RAM */ memory_region_allocate_system_memory(ram, NULL, "fulong2e.ram", ram_size); - memory_region_init_ram_nomigrate(bios, NULL, "fulong2e.bios", bios_size, + memory_region_init_ram(bios, NULL, "fulong2e.bios", bios_size, &error_fatal); - vmstate_register_ram_global(bios); memory_region_set_readonly(bios, true); memory_region_add_subregion(address_space_mem, 0, ram); diff --git a/hw/mips/mips_jazz.c b/hw/mips/mips_jazz.c index fcf0529..533a7b7 100644 --- a/hw/mips/mips_jazz.c +++ b/hw/mips/mips_jazz.c @@ -175,9 +175,8 @@ static void mips_jazz_init(MachineState *machine, machine->ram_size); memory_region_add_subregion(address_space, 0, ram); - memory_region_init_ram_nomigrate(bios, NULL, "mips_jazz.bios", MAGNUM_BIOS_SIZE, + memory_region_init_ram(bios, NULL, "mips_jazz.bios", MAGNUM_BIOS_SIZE, &error_fatal); - vmstate_register_ram_global(bios); memory_region_set_readonly(bios, true); memory_region_init_alias(bios2, NULL, "mips_jazz.bios", bios, 0, MAGNUM_BIOS_SIZE); @@ -242,9 +241,8 @@ static void mips_jazz_init(MachineState *machine, { /* Simple ROM, so user doesn't have to provide one */ MemoryRegion *rom_mr = g_new(MemoryRegion, 1); - memory_region_init_ram_nomigrate(rom_mr, NULL, "g364fb.rom", 0x80000, + memory_region_init_ram(rom_mr, NULL, "g364fb.rom", 0x80000, &error_fatal); - vmstate_register_ram_global(rom_mr); memory_region_set_readonly(rom_mr, true); uint8_t *rom = memory_region_get_ram_ptr(rom_mr); memory_region_add_subregion(address_space, 0x60000000, rom_mr); diff --git a/hw/mips/mips_mipssim.c b/hw/mips/mips_mipssim.c index da8dd81..6990b1b 100644 --- a/hw/mips/mips_mipssim.c +++ b/hw/mips/mips_mipssim.c @@ -177,9 +177,8 @@ mips_mipssim_init(MachineState *machine) /* Allocate RAM. */ memory_region_allocate_system_memory(ram, NULL, "mips_mipssim.ram", ram_size); - memory_region_init_ram_nomigrate(bios, NULL, "mips_mipssim.bios", BIOS_SIZE, + memory_region_init_ram(bios, NULL, "mips_mipssim.bios", BIOS_SIZE, &error_fatal); - vmstate_register_ram_global(bios); memory_region_set_readonly(bios, true); memory_region_add_subregion(address_space_mem, 0, ram); diff --git a/hw/mips/mips_r4k.c b/hw/mips/mips_r4k.c index a2f790b..690874b 100644 --- a/hw/mips/mips_r4k.c +++ b/hw/mips/mips_r4k.c @@ -236,9 +236,8 @@ void mips_r4k_init(MachineState *machine) #endif if ((bios_size > 0) && (bios_size <= BIOS_SIZE)) { bios = g_new(MemoryRegion, 1); - memory_region_init_ram_nomigrate(bios, NULL, "mips_r4k.bios", BIOS_SIZE, + memory_region_init_ram(bios, NULL, "mips_r4k.bios", BIOS_SIZE, &error_fatal); - vmstate_register_ram_global(bios); memory_region_set_readonly(bios, true); memory_region_add_subregion(get_system_memory(), 0x1fc00000, bios); diff --git a/hw/moxie/moxiesim.c b/hw/moxie/moxiesim.c index e18fb74..df3f124 100644 --- a/hw/moxie/moxiesim.c +++ b/hw/moxie/moxiesim.c @@ -128,12 +128,10 @@ static void moxiesim_init(MachineState *machine) qemu_register_reset(main_cpu_reset, cpu); /* Allocate RAM. */ - memory_region_init_ram_nomigrate(ram, NULL, "moxiesim.ram", ram_size, &error_fatal); - vmstate_register_ram_global(ram); + memory_region_init_ram(ram, NULL, "moxiesim.ram", ram_size, &error_fatal); memory_region_add_subregion(address_space_mem, ram_base, ram); - memory_region_init_ram_nomigrate(rom, NULL, "moxie.rom", 128*0x1000, &error_fatal); - vmstate_register_ram_global(rom); + memory_region_init_ram(rom, NULL, "moxie.rom", 128 * 0x1000, &error_fatal); memory_region_add_subregion(get_system_memory(), 0x1000, rom); if (kernel_filename) { diff --git a/hw/nios2/10m50_devboard.c b/hw/nios2/10m50_devboard.c index 4f1ea2d..b6868b8 100644 --- a/hw/nios2/10m50_devboard.c +++ b/hw/nios2/10m50_devboard.c @@ -57,19 +57,19 @@ static void nios2_10m50_ghrd_init(MachineState *machine) int i; /* Physical TCM (tb_ram_1k) with alias at 0xc0000000 */ - memory_region_init_ram_nomigrate(phys_tcm, NULL, "nios2.tcm", tcm_size, &error_abort); + memory_region_init_ram(phys_tcm, NULL, "nios2.tcm", tcm_size, + &error_abort); memory_region_init_alias(phys_tcm_alias, NULL, "nios2.tcm.alias", phys_tcm, 0, tcm_size); - vmstate_register_ram_global(phys_tcm); memory_region_add_subregion(address_space_mem, tcm_base, phys_tcm); memory_region_add_subregion(address_space_mem, 0xc0000000 + tcm_base, phys_tcm_alias); /* Physical DRAM with alias at 0xc0000000 */ - memory_region_init_ram_nomigrate(phys_ram, NULL, "nios2.ram", ram_size, &error_abort); + memory_region_init_ram(phys_ram, NULL, "nios2.ram", ram_size, + &error_abort); memory_region_init_alias(phys_ram_alias, NULL, "nios2.ram.alias", phys_ram, 0, ram_size); - vmstate_register_ram_global(phys_ram); memory_region_add_subregion(address_space_mem, ram_base, phys_ram); memory_region_add_subregion(address_space_mem, 0xc0000000 + ram_base, phys_ram_alias); diff --git a/hw/openrisc/openrisc_sim.c b/hw/openrisc/openrisc_sim.c index 73d8d7a..e1eeffc 100644 --- a/hw/openrisc/openrisc_sim.c +++ b/hw/openrisc/openrisc_sim.c @@ -119,8 +119,7 @@ static void openrisc_sim_init(MachineState *machine) } ram = g_malloc(sizeof(*ram)); - memory_region_init_ram_nomigrate(ram, NULL, "openrisc.ram", ram_size, &error_fatal); - vmstate_register_ram_global(ram); + memory_region_init_ram(ram, NULL, "openrisc.ram", ram_size, &error_fatal); memory_region_add_subregion(get_system_memory(), 0, ram); cpu_openrisc_pic_init(cpu); diff --git a/hw/ppc/mac_newworld.c b/hw/ppc/mac_newworld.c index 0b35ef1..3056d5f 100644 --- a/hw/ppc/mac_newworld.c +++ b/hw/ppc/mac_newworld.c @@ -204,9 +204,8 @@ static void ppc_core99_init(MachineState *machine) memory_region_add_subregion(get_system_memory(), 0, ram); /* allocate and load BIOS */ - memory_region_init_ram_nomigrate(bios, NULL, "ppc_core99.bios", BIOS_SIZE, + memory_region_init_ram(bios, NULL, "ppc_core99.bios", BIOS_SIZE, &error_fatal); - vmstate_register_ram_global(bios); if (bios_name == NULL) bios_name = PROM_FILENAME; diff --git a/hw/ppc/mac_oldworld.c b/hw/ppc/mac_oldworld.c index ac604cb..f2ae60a 100644 --- a/hw/ppc/mac_oldworld.c +++ b/hw/ppc/mac_oldworld.c @@ -141,9 +141,8 @@ static void ppc_heathrow_init(MachineState *machine) memory_region_add_subregion(sysmem, 0, ram); /* allocate and load BIOS */ - memory_region_init_ram_nomigrate(bios, NULL, "ppc_heathrow.bios", BIOS_SIZE, + memory_region_init_ram(bios, NULL, "ppc_heathrow.bios", BIOS_SIZE, &error_fatal); - vmstate_register_ram_global(bios); if (bios_name == NULL) bios_name = PROM_FILENAME; diff --git a/hw/ppc/ppc405_boards.c b/hw/ppc/ppc405_boards.c index c0146e8..e92db2c 100644 --- a/hw/ppc/ppc405_boards.c +++ b/hw/ppc/ppc405_boards.c @@ -218,9 +218,8 @@ static void ref405ep_init(MachineState *machine) 33333333, &pic, kernel_filename == NULL ? 0 : 1); /* allocate SRAM */ sram_size = 512 * 1024; - memory_region_init_ram_nomigrate(sram, NULL, "ef405ep.sram", sram_size, + memory_region_init_ram(sram, NULL, "ef405ep.sram", sram_size, &error_fatal); - vmstate_register_ram_global(sram); memory_region_add_subregion(sysmem, 0xFFF00000, sram); /* allocate and load BIOS */ #ifdef DEBUG_BOARD_INIT @@ -253,9 +252,8 @@ static void ref405ep_init(MachineState *machine) printf("Load BIOS from file\n"); #endif bios = g_new(MemoryRegion, 1); - memory_region_init_ram_nomigrate(bios, NULL, "ef405ep.bios", BIOS_SIZE, + memory_region_init_ram(bios, NULL, "ef405ep.bios", BIOS_SIZE, &error_fatal); - vmstate_register_ram_global(bios); if (bios_name == NULL) bios_name = BIOS_FILENAME; @@ -554,9 +552,8 @@ static void taihu_405ep_init(MachineState *machine) if (bios_name == NULL) bios_name = BIOS_FILENAME; bios = g_new(MemoryRegion, 1); - memory_region_init_ram_nomigrate(bios, NULL, "taihu_405ep.bios", BIOS_SIZE, + memory_region_init_ram(bios, NULL, "taihu_405ep.bios", BIOS_SIZE, &error_fatal); - vmstate_register_ram_global(bios); filename = qemu_find_file(QEMU_FILE_TYPE_BIOS, bios_name); if (filename) { bios_size = load_image(filename, memory_region_get_ram_ptr(bios)); diff --git a/hw/ppc/ppc405_uc.c b/hw/ppc/ppc405_uc.c index d5cf07e..f6fe3e6 100644 --- a/hw/ppc/ppc405_uc.c +++ b/hw/ppc/ppc405_uc.c @@ -978,9 +978,8 @@ static void ppc405_ocm_init(CPUPPCState *env) ocm = g_malloc0(sizeof(ppc405_ocm_t)); /* XXX: Size is 4096 or 0x04000000 */ - memory_region_init_ram_nomigrate(&ocm->isarc_ram, NULL, "ppc405.ocm", 4096, + memory_region_init_ram(&ocm->isarc_ram, NULL, "ppc405.ocm", 4096, &error_fatal); - vmstate_register_ram_global(&ocm->isarc_ram); memory_region_init_alias(&ocm->dsarc_ram, NULL, "ppc405.dsarc", &ocm->isarc_ram, 0, 4096); qemu_register_reset(&ocm_reset, ocm); diff --git a/hw/s390x/sclp.c b/hw/s390x/sclp.c index 6e7c0ba..9253dbb 100644 --- a/hw/s390x/sclp.c +++ b/hw/s390x/sclp.c @@ -266,14 +266,13 @@ static void assign_storage(SCLPDevice *sclp, SCCB *sccb) this_subregion_size = mhd->standby_subregion_size; } - memory_region_init_ram_nomigrate(standby_ram, NULL, id, this_subregion_size, + memory_region_init_ram(standby_ram, NULL, id, this_subregion_size, &error_fatal); /* This is a hack to make memory hotunplug work again. Once we have * subdevices, we have to unparent them when unassigning memory, * instead of doing it via the ref count of the MemoryRegion. */ object_ref(OBJECT(standby_ram)); object_unparent(OBJECT(standby_ram)); - vmstate_register_ram_global(standby_ram); memory_region_add_subregion(sysmem, offset, standby_ram); } /* The specified subregion is no longer in standby */ diff --git a/hw/sh4/r2d.c b/hw/sh4/r2d.c index 82e3b19..a0462ad 100644 --- a/hw/sh4/r2d.c +++ b/hw/sh4/r2d.c @@ -259,8 +259,7 @@ static void r2d_init(MachineState *machine) qemu_register_reset(main_cpu_reset, reset_info); /* Allocate memory space */ - memory_region_init_ram_nomigrate(sdram, NULL, "r2d.sdram", SDRAM_SIZE, &error_fatal); - vmstate_register_ram_global(sdram); + memory_region_init_ram(sdram, NULL, "r2d.sdram", SDRAM_SIZE, &error_fatal); memory_region_add_subregion(address_space_mem, SDRAM_BASE, sdram); /* Register peripherals */ s = sh7750_init(cpu, address_space_mem); diff --git a/hw/sh4/shix.c b/hw/sh4/shix.c index bf0d8c3..e22eaf0 100644 --- a/hw/sh4/shix.c +++ b/hw/sh4/shix.c @@ -63,17 +63,14 @@ static void shix_init(MachineState *machine) } /* Allocate memory space */ - memory_region_init_ram_nomigrate(rom, NULL, "shix.rom", 0x4000, &error_fatal); - vmstate_register_ram_global(rom); + memory_region_init_ram(rom, NULL, "shix.rom", 0x4000, &error_fatal); memory_region_set_readonly(rom, true); memory_region_add_subregion(sysmem, 0x00000000, rom); - memory_region_init_ram_nomigrate(&sdram[0], NULL, "shix.sdram1", 0x01000000, + memory_region_init_ram(&sdram[0], NULL, "shix.sdram1", 0x01000000, &error_fatal); - vmstate_register_ram_global(&sdram[0]); memory_region_add_subregion(sysmem, 0x08000000, &sdram[0]); - memory_region_init_ram_nomigrate(&sdram[1], NULL, "shix.sdram2", 0x01000000, + memory_region_init_ram(&sdram[1], NULL, "shix.sdram2", 0x01000000, &error_fatal); - vmstate_register_ram_global(&sdram[1]); memory_region_add_subregion(sysmem, 0x0c000000, &sdram[1]); /* Load BIOS in 0 (and access it through P2, 0xA0000000) */ diff --git a/hw/sparc/leon3.c b/hw/sparc/leon3.c index 6758ba6..d5ff188 100644 --- a/hw/sparc/leon3.c +++ b/hw/sparc/leon3.c @@ -159,8 +159,7 @@ static void leon3_generic_hw_init(MachineState *machine) /* Allocate BIOS */ prom_size = 8 * 1024 * 1024; /* 8Mb */ - memory_region_init_ram_nomigrate(prom, NULL, "Leon3.bios", prom_size, &error_fatal); - vmstate_register_ram_global(prom); + memory_region_init_ram(prom, NULL, "Leon3.bios", prom_size, &error_fatal); memory_region_set_readonly(prom, true); memory_region_add_subregion(address_space_mem, 0x00000000, prom); diff --git a/hw/tricore/tricore_testboard.c b/hw/tricore/tricore_testboard.c index 94b185e..6c57423 100644 --- a/hw/tricore/tricore_testboard.c +++ b/hw/tricore/tricore_testboard.c @@ -80,24 +80,18 @@ static void tricore_testboard_init(MachineState *machine, int board_id) exit(1); } env = &cpu->env; - memory_region_init_ram_nomigrate(ext_cram, NULL, "powerlink_ext_c.ram", 2*1024*1024, + memory_region_init_ram(ext_cram, NULL, "powerlink_ext_c.ram", + 2 * 1024 * 1024, &error_fatal); + memory_region_init_ram(ext_dram, NULL, "powerlink_ext_d.ram", + 4 * 1024 * 1024, &error_fatal); + memory_region_init_ram(int_cram, NULL, "powerlink_int_c.ram", 48 * 1024, &error_fatal); - vmstate_register_ram_global(ext_cram); - memory_region_init_ram_nomigrate(ext_dram, NULL, "powerlink_ext_d.ram", 4*1024*1024, + memory_region_init_ram(int_dram, NULL, "powerlink_int_d.ram", 48 * 1024, &error_fatal); - vmstate_register_ram_global(ext_dram); - memory_region_init_ram_nomigrate(int_cram, NULL, "powerlink_int_c.ram", 48*1024, - &error_fatal); - vmstate_register_ram_global(int_cram); - memory_region_init_ram_nomigrate(int_dram, NULL, "powerlink_int_d.ram", 48*1024, - &error_fatal); - vmstate_register_ram_global(int_dram); - memory_region_init_ram_nomigrate(pcp_data, NULL, "powerlink_pcp_data.ram", 16*1024, - &error_fatal); - vmstate_register_ram_global(pcp_data); - memory_region_init_ram_nomigrate(pcp_text, NULL, "powerlink_pcp_text.ram", 32*1024, - &error_fatal); - vmstate_register_ram_global(pcp_text); + memory_region_init_ram(pcp_data, NULL, "powerlink_pcp_data.ram", + 16 * 1024, &error_fatal); + memory_region_init_ram(pcp_text, NULL, "powerlink_pcp_text.ram", + 32 * 1024, &error_fatal); memory_region_add_subregion(sysmem, 0x80000000, ext_cram); memory_region_add_subregion(sysmem, 0xa1000000, ext_dram); diff --git a/hw/unicore32/puv3.c b/hw/unicore32/puv3.c index 291d75f..e9d1a60 100644 --- a/hw/unicore32/puv3.c +++ b/hw/unicore32/puv3.c @@ -78,9 +78,8 @@ static void puv3_board_init(CPUUniCore32State *env, ram_addr_t ram_size) MemoryRegion *ram_memory = g_new(MemoryRegion, 1); /* SDRAM at address zero. */ - memory_region_init_ram_nomigrate(ram_memory, NULL, "puv3.ram", ram_size, + memory_region_init_ram(ram_memory, NULL, "puv3.ram", ram_size, &error_fatal); - vmstate_register_ram_global(ram_memory); memory_region_add_subregion(get_system_memory(), 0, ram_memory); } diff --git a/hw/xtensa/sim.c b/hw/xtensa/sim.c index 3c6447b..249cd1e 100644 --- a/hw/xtensa/sim.c +++ b/hw/xtensa/sim.c @@ -48,10 +48,8 @@ static void xtensa_create_memory_regions(const XtensaMemory *memory, g_string_printf(num_name, "%s%u", name, i); m = g_new(MemoryRegion, 1); - memory_region_init_ram_nomigrate(m, NULL, num_name->str, - memory->location[i].size, - &error_fatal); - vmstate_register_ram_global(m); + memory_region_init_ram(m, NULL, num_name->str, + memory->location[i].size, &error_fatal); memory_region_add_subregion(get_system_memory(), memory->location[i].addr, m); } diff --git a/hw/xtensa/xtfpga.c b/hw/xtensa/xtfpga.c index 0c91c37..635a4d4 100644 --- a/hw/xtensa/xtfpga.c +++ b/hw/xtensa/xtfpga.c @@ -249,9 +249,8 @@ static void lx_init(const LxBoardDesc *board, MachineState *machine) } ram = g_malloc(sizeof(*ram)); - memory_region_init_ram_nomigrate(ram, NULL, "lx60.dram", machine->ram_size, + memory_region_init_ram(ram, NULL, "lx60.dram", machine->ram_size, &error_fatal); - vmstate_register_ram_global(ram); memory_region_add_subregion(system_memory, 0, ram); system_io = g_malloc(sizeof(*system_io)); @@ -292,9 +291,8 @@ static void lx_init(const LxBoardDesc *board, MachineState *machine) uint32_t cur_lowmem = QEMU_ALIGN_UP(lowmem_end / 2, 4096); rom = g_malloc(sizeof(*rom)); - memory_region_init_ram_nomigrate(rom, NULL, "lx60.sram", board->sram_size, + memory_region_init_ram(rom, NULL, "lx60.sram", board->sram_size, &error_fatal); - vmstate_register_ram_global(rom); memory_region_add_subregion(system_memory, 0xfe000000, rom); if (kernel_cmdline) { From patchwork Fri Jul 7 14:42:54 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Peter Maydell X-Patchwork-Id: 107203 Delivered-To: patches@linaro.org Received: by 10.140.101.44 with SMTP id t41csp147293qge; Fri, 7 Jul 2017 07:43:04 -0700 (PDT) X-Received: by 10.28.136.129 with SMTP id k123mr2616208wmd.14.1499438584160; Fri, 07 Jul 2017 07:43:04 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1499438584; cv=none; d=google.com; s=arc-20160816; b=y4ENr4pIJDZuohSrH7s2y9YrdwlMPrHtWoqWzT5RkHOzgRKt4OjSWzSgaCCtAYXII3 EATWy9zEIEHG7sOEBHBcjkuprlboi3CzNtz6WMOrPkDL0AyNMaa2AO/15lepfWu64VyU kOfk/kdScAukF11uxaq+VBbAYOEyqTOGJjDGB76WV/xRZs1aI7rWYRN1h2XdUXvlp70o oyD68b7E3OJ2USVKJx2lNIG1XtMgXpdtH4bHxQKOzCNkj54jRFsHCq2Bf8BKP7oEeu4R KvEvPunfU9zra5D8o1R+xb5KERQPN5k6l2DL/pSqLglgcbS8oKlVjq8GB59MrQTvhTc4 oYPg== ARC-Message-Signature: i=1; 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[2001:8b0:1d0::2]) by mx.google.com with ESMTPS id 49si2424350wrx.82.2017.07.07.07.43.03 for (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Fri, 07 Jul 2017 07:43:04 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of pm215@archaic.org.uk designates 2001:8b0:1d0::2 as permitted sender) client-ip=2001:8b0:1d0::2; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of pm215@archaic.org.uk designates 2001:8b0:1d0::2 as permitted sender) smtp.mailfrom=pm215@archaic.org.uk; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from pm215 by orth.archaic.org.uk with local (Exim 4.84_2) (envelope-from ) id 1dTUTH-0005uU-Mu; Fri, 07 Jul 2017 15:43:03 +0100 From: Peter Maydell To: qemu-devel@nongnu.org Cc: patches@linaro.org, Paolo Bonzini , Eduardo Habkost , Marcel Apfelbaum , Igor Mammedov Subject: [PATCH 08/11] hw/block/pflash_cfi01, pflash_cfi02: Use memory_region_init_rom_device() Date: Fri, 7 Jul 2017 15:42:54 +0100 Message-Id: <1499438577-7674-9-git-send-email-peter.maydell@linaro.org> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1499438577-7674-1-git-send-email-peter.maydell@linaro.org> References: <1499438577-7674-1-git-send-email-peter.maydell@linaro.org> Since we pass the same DeviceState object to memory_region_init_rom_device_nomigrate() and vmstate_register_ram(), we can switch to using memory_region_init_rom_device() instead. Signed-off-by: Peter Maydell --- hw/block/pflash_cfi01.c | 3 +-- hw/block/pflash_cfi02.c | 3 +-- 2 files changed, 2 insertions(+), 4 deletions(-) -- 2.7.4 diff --git a/hw/block/pflash_cfi01.c b/hw/block/pflash_cfi01.c index c044b56..1113ab1 100644 --- a/hw/block/pflash_cfi01.c +++ b/hw/block/pflash_cfi01.c @@ -743,7 +743,7 @@ static void pflash_cfi01_realize(DeviceState *dev, Error **errp) return NULL; #endif - memory_region_init_rom_device_nomigrate( + memory_region_init_rom_device( &pfl->mem, OBJECT(dev), &pflash_cfi01_ops, pfl, @@ -753,7 +753,6 @@ static void pflash_cfi01_realize(DeviceState *dev, Error **errp) return; } - vmstate_register_ram(&pfl->mem, DEVICE(pfl)); pfl->storage = memory_region_get_ram_ptr(&pfl->mem); sysbus_init_mmio(SYS_BUS_DEVICE(dev), &pfl->mem); diff --git a/hw/block/pflash_cfi02.c b/hw/block/pflash_cfi02.c index a08b09b..c81ddd3 100644 --- a/hw/block/pflash_cfi02.c +++ b/hw/block/pflash_cfi02.c @@ -621,7 +621,7 @@ static void pflash_cfi02_realize(DeviceState *dev, Error **errp) return NULL; #endif - memory_region_init_rom_device_nomigrate(&pfl->orig_mem, OBJECT(pfl), pfl->be ? + memory_region_init_rom_device(&pfl->orig_mem, OBJECT(pfl), pfl->be ? &pflash_cfi02_ops_be : &pflash_cfi02_ops_le, pfl, pfl->name, chip_len, &local_err); if (local_err) { @@ -629,7 +629,6 @@ static void pflash_cfi02_realize(DeviceState *dev, Error **errp) return; } - vmstate_register_ram(&pfl->orig_mem, DEVICE(pfl)); pfl->storage = memory_region_get_ram_ptr(&pfl->orig_mem); pfl->chip_len = chip_len; From patchwork Fri Jul 7 14:42:55 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Peter Maydell X-Patchwork-Id: 107204 Delivered-To: patches@linaro.org Received: by 10.140.101.44 with SMTP id t41csp147302qge; Fri, 7 Jul 2017 07:43:04 -0700 (PDT) X-Received: by 10.28.109.18 with SMTP id i18mr2563825wmc.97.1499438584694; Fri, 07 Jul 2017 07:43:04 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1499438584; cv=none; d=google.com; s=arc-20160816; b=Lqj62D4jJZelrTAufSwvbUhdEfUXQIF30b96HEMB0/4ODq7/Xo60aOu4XX3gApUUWO pU43qg1DpIYU9UWOErp6ThuAJbIyh99QKP+G7WICanbT90EJWWPG3efwta2DCSOFxzF7 Sv66cUyzd6acybdpyZBYlHMZ01BFxgoqp5TBC1wl7yhJGvwZUIdD5eVviRTVN6QapxlS eBgzyIij4tt6FHr6TTDZC2ox5dQlb9sSFIpnqX7uVNzF8H3aBlUn2VgqcksISsJhOjdm 0E1HTtZDntssoV58FpFlrHCNSnJ6SP3o07bIswcadE53PdDXWfdW3/8jOyZH1WEyfcX5 EJVA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=references:in-reply-to:message-id:date:subject:cc:to:from :arc-authentication-results; bh=+ZeAMiTDOZC5mUYdj3fSaG0t9Y52/BRKEhBC9i9oNk4=; b=k7M5pJIhuB9tKq1/j4WBISBx3abj5+NqRKmLF3VfE6s66EC2/PD5YYlxyaM2DmFCb7 dLryQ67R0BkSDcP/JF4TIuyCu8KNPzO5y+90W2ePX4oWG7hwD6bdbVfUEnPN97sSTe4N rC0IO27nPN8/ouRRf7YJ4my6TF2UXrOlzpQz3gA5yOm3v8w5rqwUYVIFTJMt48rfJGxV tpj6oRBSl/khICSweYSBxqhPDLSKIXA8v5VYtaUw+DfzokkoabqVvhO7pcgFO1A1lhZO nkKI8vNt+AuFPUwXMrEtTl2gak22JbnNAaGekAVCz10XKt+NoZ2L2p/0CPEv99jyenYM su+Q== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: best guess record for domain of pm215@archaic.org.uk designates 2001:8b0:1d0::2 as permitted sender) smtp.mailfrom=pm215@archaic.org.uk; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from orth.archaic.org.uk (orth.archaic.org.uk. [2001:8b0:1d0::2]) by mx.google.com with ESMTPS id r27si2344911wrr.120.2017.07.07.07.43.04 for (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Fri, 07 Jul 2017 07:43:04 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of pm215@archaic.org.uk designates 2001:8b0:1d0::2 as permitted sender) client-ip=2001:8b0:1d0::2; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of pm215@archaic.org.uk designates 2001:8b0:1d0::2 as permitted sender) smtp.mailfrom=pm215@archaic.org.uk; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from pm215 by orth.archaic.org.uk with local (Exim 4.84_2) (envelope-from ) id 1dTUTI-0005ut-7E; Fri, 07 Jul 2017 15:43:04 +0100 From: Peter Maydell To: qemu-devel@nongnu.org Cc: patches@linaro.org, Paolo Bonzini , Eduardo Habkost , Marcel Apfelbaum , Igor Mammedov Subject: [PATCH 09/11] hw/pci/pci.c: Use memory_region_init_rom() Date: Fri, 7 Jul 2017 15:42:55 +0100 Message-Id: <1499438577-7674-10-git-send-email-peter.maydell@linaro.org> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1499438577-7674-1-git-send-email-peter.maydell@linaro.org> References: <1499438577-7674-1-git-send-email-peter.maydell@linaro.org> Since we pass the same DeviceState object to memory_region_init_rom_nomigrate() and vmstate_register_ram(), we can switch to using memory_region_init_rom() instead. (This isn't entirely obvious from the code since it is using &pdev->qdev rather than DEVICE(pdov) for some reason, but PCIDevice does indeed use 'qdev' for its parent DeviceState member.) Signed-off-by: Peter Maydell --- hw/pci/pci.c | 3 +-- 1 file changed, 1 insertion(+), 2 deletions(-) -- 2.7.4 diff --git a/hw/pci/pci.c b/hw/pci/pci.c index e73279a..258fbe5 100644 --- a/hw/pci/pci.c +++ b/hw/pci/pci.c @@ -2235,8 +2235,7 @@ static void pci_add_option_rom(PCIDevice *pdev, bool is_default_rom, snprintf(name, sizeof(name), "%s.rom", object_get_typename(OBJECT(pdev))); } pdev->has_rom = true; - memory_region_init_rom_nomigrate(&pdev->rom, OBJECT(pdev), name, size, &error_fatal); - vmstate_register_ram(&pdev->rom, &pdev->qdev); + memory_region_init_rom(&pdev->rom, OBJECT(pdev), name, size, &error_fatal); ptr = memory_region_get_ram_ptr(&pdev->rom); load_image(path, ptr); g_free(path); From patchwork Fri Jul 7 14:42:56 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Peter Maydell X-Patchwork-Id: 107209 Delivered-To: patches@linaro.org Received: by 10.140.101.44 with SMTP id t41csp147315qge; Fri, 7 Jul 2017 07:43:05 -0700 (PDT) X-Received: by 10.28.170.8 with SMTP id t8mr2596260wme.111.1499438585249; Fri, 07 Jul 2017 07:43:05 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1499438585; cv=none; d=google.com; s=arc-20160816; b=qxld4kt11agS6O3rZmsuALCHRsylVVMZ9lK1DYkgWHD5qmkROdvXLXu5ff5DEx2K9C /7O+bhq5C15rpkbHEKjy2pfZfEJjk8OyVMTfCHGxdn/KhL/4xtGI3Vui5EYHr0JF2Jj7 G4DfuXLBK38gNmHAtBjUSbaQIXlCcILCpJNOZNGiKSqNHMkQXo0So0hxy4emvarYX5v/ W170ZjPRs2JvyFd1e+yUbfxueJu4YttJZgGjKl8RQOp2M75Zt0vMzMbpXL5L9BmsSnBP qp+2vGxVN0UpPUhvNIc34tbb8dG3szbUD5HDorpOxrasfNdrLZ7wI8DNIiG7yE4kmYOc Vccw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=references:in-reply-to:message-id:date:subject:cc:to:from :arc-authentication-results; bh=E+bPnAwa9OF9Kzbbio4p/EJPq6IudgvmE5L0TGzpeZk=; b=bjVP1n5pK1DQzQvQLJPuNHQNAgBUO4Ny3ODV169HwrdISwmC//C0k4FQ2+bgL2Mcsi FGZeuHaleunEfC0k776P7CfK5mWhTjMTSE5jMijTnuIL2hF5CXrudT38hk5+My7id47K dBZkYwb5TIeWbxCO/R+t9/kVnzz3mMffiAPQj7TnxoQjc7k22//dN1eYrui7NKZmb0T2 5l5M1NRQt2B8FlKPdUOdZ/jeIIpLLlugURRGoH+wiIw9/O84ERWaTqCxWZdQI0CrNLsr ZFUfXIawOgxkG/8WBtqP3yvtpVo1k0M8OqluSrLiwxAc9X63bXsX1ESESMfXjCzrBxri pViQ== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: best guess record for domain of pm215@archaic.org.uk designates 2001:8b0:1d0::2 as permitted sender) smtp.mailfrom=pm215@archaic.org.uk; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from orth.archaic.org.uk (orth.archaic.org.uk. [2001:8b0:1d0::2]) by mx.google.com with ESMTPS id 90si2322285wre.227.2017.07.07.07.43.05 for (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Fri, 07 Jul 2017 07:43:05 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of pm215@archaic.org.uk designates 2001:8b0:1d0::2 as permitted sender) client-ip=2001:8b0:1d0::2; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of pm215@archaic.org.uk designates 2001:8b0:1d0::2 as permitted sender) smtp.mailfrom=pm215@archaic.org.uk; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from pm215 by orth.archaic.org.uk with local (Exim 4.84_2) (envelope-from ) id 1dTUTI-0005vO-R2; Fri, 07 Jul 2017 15:43:04 +0100 From: Peter Maydell To: qemu-devel@nongnu.org Cc: patches@linaro.org, Paolo Bonzini , Eduardo Habkost , Marcel Apfelbaum , Igor Mammedov Subject: [PATCH 10/11] hw/display/qxl.c Use memory_region_init_ram() Date: Fri, 7 Jul 2017 15:42:56 +0100 Message-Id: <1499438577-7674-11-git-send-email-peter.maydell@linaro.org> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1499438577-7674-1-git-send-email-peter.maydell@linaro.org> References: <1499438577-7674-1-git-send-email-peter.maydell@linaro.org> Switch to memory_region_init_ram(), since we pass the same DeviceState to both memory_region_init_ram_nomigrate() and vmstate_register_ram(). Signed-off-by: Peter Maydell --- hw/display/qxl.c | 9 +++------ 1 file changed, 3 insertions(+), 6 deletions(-) -- 2.7.4 diff --git a/hw/display/qxl.c b/hw/display/qxl.c index 40e9372..7f8c73b 100644 --- a/hw/display/qxl.c +++ b/hw/display/qxl.c @@ -2089,16 +2089,14 @@ static void qxl_realize_common(PCIQXLDevice *qxl, Error **errp) pci_set_byte(&config[PCI_INTERRUPT_PIN], 1); qxl->rom_size = qxl_rom_size(); - memory_region_init_ram_nomigrate(&qxl->rom_bar, OBJECT(qxl), "qxl.vrom", + memory_region_init_ram(&qxl->rom_bar, OBJECT(qxl), "qxl.vrom", qxl->rom_size, &error_fatal); - vmstate_register_ram(&qxl->rom_bar, &qxl->pci.qdev); init_qxl_rom(qxl); init_qxl_ram(qxl); qxl->guest_surfaces.cmds = g_new0(QXLPHYSICAL, qxl->ssd.num_surfaces); - memory_region_init_ram_nomigrate(&qxl->vram_bar, OBJECT(qxl), "qxl.vram", + memory_region_init_ram(&qxl->vram_bar, OBJECT(qxl), "qxl.vram", qxl->vram_size, &error_fatal); - vmstate_register_ram(&qxl->vram_bar, &qxl->pci.qdev); memory_region_init_alias(&qxl->vram32_bar, OBJECT(qxl), "qxl.vram32", &qxl->vram_bar, 0, qxl->vram32_size); @@ -2198,9 +2196,8 @@ static void qxl_realize_secondary(PCIDevice *dev, Error **errp) qxl->id = device_id++; qxl_init_ramsize(qxl); - memory_region_init_ram_nomigrate(&qxl->vga.vram, OBJECT(dev), "qxl.vgavram", + memory_region_init_ram(&qxl->vga.vram, OBJECT(dev), "qxl.vgavram", qxl->vga.vram_size, &error_fatal); - vmstate_register_ram(&qxl->vga.vram, &qxl->pci.qdev); qxl->vga.vram_ptr = memory_region_get_ram_ptr(&qxl->vga.vram); qxl->vga.con = graphic_console_init(DEVICE(dev), 0, &qxl_ops, qxl); From patchwork Fri Jul 7 14:42:57 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Peter Maydell X-Patchwork-Id: 107210 Delivered-To: patches@linaro.org Received: by 10.140.101.44 with SMTP id t41csp147324qge; Fri, 7 Jul 2017 07:43:05 -0700 (PDT) X-Received: by 10.223.142.143 with SMTP id q15mr993769wrb.180.1499438585746; Fri, 07 Jul 2017 07:43:05 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1499438585; cv=none; d=google.com; s=arc-20160816; b=PnUBosLaahTYApS+5SHz6u665bGuOz/dXHYPgvkiS/N1jrWBblpAQVAlua19lIfVrg Mx2oOpnTF9uWJYAZ504Nw11GUVPQ0ChrhI3TAWk6E95hOJc2nfzWwrQLEmYKx8qVAn35 h54myHdwHffWH3owk6MPA9K0FWIQUX6MW4SD3pTW+z5Yrg6B8MDTMNpLPG/4kMNXbvhe PWIqPwKKPGem7yeQc4aRJBhXnvCxKKitDDVTDyoEAIVLm6MgvKjEs3qlns5UF02ZKMMH ql/ibhfsAbeBG/u+o15bDQHLJt7KybrQFnL4pH6ADg7f05VVyOyyvvkfVipW5RlRgSsZ Ww+g== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=references:in-reply-to:message-id:date:subject:cc:to:from :arc-authentication-results; bh=EuPRDqwe3ypKXnyGMmNUDT1J1nAG4NZUsFN53L2FIzg=; b=nNj+n9uC9W4V86FFe1uv7mk61U9hF5cR0+KzIbDIPyO5TnUCK9X8AGvn4fjAiR7k2g q3qA87e+T3ollTGbBlaucImWr/wTWWTuySXJn8ZoI7UeuMD1QP3Fcl6I4HgtolWNw3zM jWFkMgnpJGZy7SBI5xRCOP3NVhE6dH0PwTUmWGKbJTyZVq//1ZrMSyRbZ2lW4OaTfeuJ ZJZOAunIHmtzLYicx0FKnYcRiesU/p8wk0k6gxqK8JCiQoFysR/LEn+fQpt//x2nMLXr iNjtQylZeqTzxQ24zj33zvX0fWhfJXwfyOSMCT6buc/n9WtdgVr8s6F0c0Ojon8zjVT+ 5MNg== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: best guess record for domain of pm215@archaic.org.uk designates 2001:8b0:1d0::2 as permitted sender) smtp.mailfrom=pm215@archaic.org.uk; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from orth.archaic.org.uk (orth.archaic.org.uk. [2001:8b0:1d0::2]) by mx.google.com with ESMTPS id q201si3248707wmd.56.2017.07.07.07.43.05 for (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Fri, 07 Jul 2017 07:43:05 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of pm215@archaic.org.uk designates 2001:8b0:1d0::2 as permitted sender) client-ip=2001:8b0:1d0::2; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of pm215@archaic.org.uk designates 2001:8b0:1d0::2 as permitted sender) smtp.mailfrom=pm215@archaic.org.uk; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from pm215 by orth.archaic.org.uk with local (Exim 4.84_2) (envelope-from ) id 1dTUTJ-0005w4-A1; Fri, 07 Jul 2017 15:43:05 +0100 From: Peter Maydell To: qemu-devel@nongnu.org Cc: patches@linaro.org, Paolo Bonzini , Eduardo Habkost , Marcel Apfelbaum , Igor Mammedov Subject: [PATCH 11/11] docs/devel/memory.txt: Add section about RAM migration Date: Fri, 7 Jul 2017 15:42:57 +0100 Message-Id: <1499438577-7674-12-git-send-email-peter.maydell@linaro.org> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1499438577-7674-1-git-send-email-peter.maydell@linaro.org> References: <1499438577-7674-1-git-send-email-peter.maydell@linaro.org> Add a section to docs/devel/memory.txt about migration of the backing memory for RAM regions. Signed-off-by: Peter Maydell --- docs/devel/memory.txt | 31 +++++++++++++++++++++++++++++++ 1 file changed, 31 insertions(+) -- 2.7.4 diff --git a/docs/devel/memory.txt b/docs/devel/memory.txt index 811b1bd..8ed810f 100644 --- a/docs/devel/memory.txt +++ b/docs/devel/memory.txt @@ -91,6 +91,37 @@ one of whose subregions is a low priority "background" region covering the whole address range; this is often clearer and is preferred. Subregions cannot be added to an alias region. +Migration +--------- + +Where the memory region is backed by host memory (RAM, ROM and +ROM device memory region types), this host memory needs to be +copied to the destination on migration. These APIs which allocate +the host memory for you will also register the memory so it is +migrated: + - memory_region_init_ram() + - memory_region_init_rom() + - memory_region_init_rom_device() + +For most devices and boards this is the correct thing. If you +have a special case where you need to manage the migration of +the backing memory yourself, you can call the functions: + - memory_region_init_ram_nomigrate() + - memory_region_init_rom_nomigrate() + - memory_region_init_rom_device_nomigrate() +which only initialize the MemoryRegion and leave handling +migration to the caller. + +The functions: + - memory_region_init_resizeable_ram() + - memory_region_init_ram_from_file() + - memory_region_init_ram_from_fd() + - memory_region_init_ram_ptr() + - memory_region_init_ram_device_ptr() +are for special cases only, and so they do not automatically +register the backing memory for migration; the caller must +manage migration if necessary. + Region names ------------