From patchwork Mon Jun 22 12:55:24 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Andreas_F=C3=A4rber?= X-Patchwork-Id: 191340 Delivered-To: patch@linaro.org Received: by 2002:a92:1f07:0:0:0:0:0 with SMTP id i7csp1093129ile; Mon, 22 Jun 2020 07:28:11 -0700 (PDT) X-Google-Smtp-Source: ABdhPJw2sLtY6w4KKm2uLo84/A8abZ6Gamr0NVhhQK/w488VNNVfzrO9H5ta8Y/KQG7XGKgRabh7 X-Received: by 2002:a05:6402:31b8:: with SMTP id dj24mr11855057edb.188.1592836090931; Mon, 22 Jun 2020 07:28:10 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1592836090; cv=none; d=google.com; s=arc-20160816; b=OtMbja/C1RGhAg8bDYdHixpioXvg3aqJD8n+2srdVtWmW8oRjD0/xHct1m7MOdZf0q aF0r/NrjdKQ4H2Zw2q2sP1/721zZBnhv1zU3Z7H3GWSHr9wxtB7llfeQgW6j+fXyEX3i Z+pl1zmwy4vyWHLZk9yL6o/MAZd64MBWd44pQpnBvhqy4X6xFwzSGLHXRPObP+h9VaUa +YbKu0lSV0bFHH4EC5Tk1LnoLc15IWfEKa4ocYKRJK/q8bWtZ+eEntGjnztX+hShKxZa 7bA0pvsO6uO5yGEng5UixJdc7MK9vDRWdKCW0ZfTngDOYhEVirp2/vYjUIjaTW1LGAh6 wxVA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from; bh=SRODojRRqpEWFoZsaci26IqkWCdWhaXAMLUepxHw0dc=; b=jQ1a6jHbfE0Kx/T59cymumybEJ1ur7A9DbW+YhZYcUEPAnWlGPSGphJzJEhLSEOanA nLrST+d2IKlBEwTskD/q7+Jhrsu7x/zt5qM7Odpqi5LKVXAqVFUqQypQHHvG2frwGnvX 0HtSiGGgU+50+iebjncBQpKM6VPhOCy0IxsRIBwL81IpKI61AEL1uXhiPh/G4B8hYCBn Hz4eeXibAGKs4jm1/yuZqnMGhzokf/4x8ESEOeSXxfsAaCrolF6JC0SKFWj+Hx4xHuFh PbSL9HBrFbxJRVuTVdpi7yG2g51d939iWM9U2zXWNUbNtZZ4/S3neAgIo2Sqg0nEEbtJ qmDQ== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: domain of devicetree-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [23.128.96.18]) by mx.google.com with ESMTP id du6si11288960ejc.189.2020.06.22.07.28.10; Mon, 22 Jun 2020 07:28:10 -0700 (PDT) Received-SPF: pass (google.com: domain of devicetree-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18; Authentication-Results: mx.google.com; spf=pass (google.com: domain of devicetree-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1729422AbgFVO2G (ORCPT + 6 others); Mon, 22 Jun 2020 10:28:06 -0400 Received: from mx2.suse.de ([195.135.220.15]:47502 "EHLO mx2.suse.de" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1729397AbgFVO0j (ORCPT ); Mon, 22 Jun 2020 10:26:39 -0400 X-Virus-Scanned: by amavisd-new at test-mx.suse.de Received: from relay2.suse.de (unknown [195.135.221.27]) by mx2.suse.de (Postfix) with ESMTP id 3EB77C1B6; Mon, 22 Jun 2020 14:26:36 +0000 (UTC) From: =?utf-8?q?Andreas_F=C3=A4rber?= To: linux-realtek-soc@lists.infradead.org Cc: linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, =?utf-8?q?Andreas_F=C3=A4rber?= , Rob Herring , devicetree@vger.kernel.org Subject: [PATCH v4 1/3] dt-bindings: arm: realtek: Convert comments to descriptions Date: Mon, 22 Jun 2020 14:55:24 +0200 Message-Id: <20200622125527.24207-2-afaerber@suse.de> X-Mailer: git-send-email 2.26.2 In-Reply-To: <20200622125527.24207-1-afaerber@suse.de> References: <20200622125527.24207-1-afaerber@suse.de> MIME-Version: 1.0 Sender: devicetree-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Turn the SoC-level comments into description properties. Signed-off-by: Andreas Färber --- v4: New .../devicetree/bindings/arm/realtek.yaml | 24 +++++++++---------- 1 file changed, 12 insertions(+), 12 deletions(-) -- 2.26.2 Reviewed-by: Rob Herring diff --git a/Documentation/devicetree/bindings/arm/realtek.yaml b/Documentation/devicetree/bindings/arm/realtek.yaml index 845f9c76d6f7..0b388016bbcd 100644 --- a/Documentation/devicetree/bindings/arm/realtek.yaml +++ b/Documentation/devicetree/bindings/arm/realtek.yaml @@ -14,21 +14,21 @@ properties: const: '/' compatible: oneOf: - # RTD1195 SoC based boards - - items: + - description: RTD1195 SoC based boards + items: - enum: - mele,x1000 # MeLE X1000 - realtek,horseradish # Realtek Horseradish EVB - const: realtek,rtd1195 - # RTD1293 SoC based boards - - items: + - description: RTD1293 SoC based boards + items: - enum: - synology,ds418j # Synology DiskStation DS418j - const: realtek,rtd1293 - # RTD1295 SoC based boards - - items: + - description: RTD1295 SoC based boards + items: - enum: - mele,v9 # MeLE V9 - probox2,ava # ProBox2 AVA @@ -36,21 +36,21 @@ properties: - zidoo,x9s # Zidoo X9S - const: realtek,rtd1295 - # RTD1296 SoC based boards - - items: + - description: RTD1296 SoC based boards + items: - enum: - synology,ds418 # Synology DiskStation DS418 - const: realtek,rtd1296 - # RTD1395 SoC based boards - - items: + - description: RTD1395 SoC based boards + items: - enum: - bananapi,bpi-m4 # Banana Pi BPI-M4 - realtek,lion-skin # Realtek Lion Skin EVB - const: realtek,rtd1395 - # RTD1619 SoC based boards - - items: + - description: RTD1619 SoC based boards + items: - enum: - realtek,mjolnir # Realtek Mjolnir EVB - const: realtek,rtd1619 From patchwork Mon Jun 22 12:55:25 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Andreas_F=C3=A4rber?= X-Patchwork-Id: 191341 Delivered-To: patch@linaro.org Received: by 2002:a92:1f07:0:0:0:0:0 with SMTP id i7csp1093137ile; Mon, 22 Jun 2020 07:28:11 -0700 (PDT) X-Google-Smtp-Source: ABdhPJwqTO14YxFb1gpI6Rhadkv/IfmE8D8FgFCRm/6LjKwQx94yDqxaseItkzql7SHjiQFVMvi0 X-Received: by 2002:aa7:da4f:: with SMTP id w15mr16687533eds.384.1592836091473; Mon, 22 Jun 2020 07:28:11 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1592836091; cv=none; d=google.com; s=arc-20160816; b=xOOXwjx39SR2qDcRPpDUH+7arOtxv3juJTm1jSRw2JmyANssNPGGj3PE9F8Dslkxtl D+eeDajopE0ud6W+w8hik/PySfiuqJx3RVUjELUVk/pLCtqr+xapJsdiWsK3CLF1l/ez YFcXRr80W1nuPaU4+ZFY8ILTR3NcIXIZGG9zre4zvGQAlal5mHaPtT8uOiUi9C2/sl/4 dxxAmNpZ/4ZpIXF6TvV2GVsZGePrUAXDfp+OvU1f8+mbumxMXgIDQzsdiIKLBY+c0jdV u5Y8MDpDFsRgl+fVCcd49NEZli1B9IQDcs/j+TosLFhnVq+9SvwL5UbRcvZOdYXqGwZc Ox0w== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from; bh=xceaIi0vWHqrRAFq2n0uKJZMqeDcx6ea3cZ2/WQg5aw=; b=YwORypSC+tLh66HopzX+YgqeWBuHPr/LlvfpEOCgLTYYzmvHAObHqAiFmBbpTnw8/B ioEb8IuauGqnOKG+vI+Ue2ZxdR+YMRpMy6+FHjA/fXkpYuhQR5tfqmIexZKnZI7xjW6j TXtpF64NZTffOMaxd02ISiR3YmfWq9B89efMJDrPBAoLszcLcBYuY63x3hyMhVZVo3et LffkSlbw2Utc+f3xrwE6DFYA89zFmV0OAQVBKK3xjoeYZmz3qKIvJ404mkortfot7xNt RSjjJ4l6a9+UK+YUCFR005Qxz0YvQCtUwJqXa5aTxOZaYxNkZTLSSJX8n9oHk01cBx5f UDmg== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: domain of devicetree-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [23.128.96.18]) by mx.google.com with ESMTP id du6si11288960ejc.189.2020.06.22.07.28.11; Mon, 22 Jun 2020 07:28:11 -0700 (PDT) Received-SPF: pass (google.com: domain of devicetree-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18; Authentication-Results: mx.google.com; spf=pass (google.com: domain of devicetree-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1729373AbgFVO01 (ORCPT + 6 others); Mon, 22 Jun 2020 10:26:27 -0400 Received: from mx2.suse.de ([195.135.220.15]:46034 "EHLO mx2.suse.de" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1729358AbgFVO00 (ORCPT ); Mon, 22 Jun 2020 10:26:26 -0400 X-Virus-Scanned: by amavisd-new at test-mx.suse.de Received: from relay2.suse.de (unknown [195.135.221.27]) by mx2.suse.de (Postfix) with ESMTP id 175B3C1B6; Mon, 22 Jun 2020 14:26:23 +0000 (UTC) From: =?utf-8?q?Andreas_F=C3=A4rber?= To: linux-realtek-soc@lists.infradead.org Cc: linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, James Tai , =?utf-8?q?Andreas_F=C3=A4rber?= , Rob Herring , devicetree@vger.kernel.org Subject: [PATCH v4 2/3] dt-bindings: arm: realtek: Document RTD1319 and Realtek Pym Particles EVB Date: Mon, 22 Jun 2020 14:55:25 +0200 Message-Id: <20200622125527.24207-3-afaerber@suse.de> X-Mailer: git-send-email 2.26.2 In-Reply-To: <20200622125527.24207-1-afaerber@suse.de> References: <20200622125527.24207-1-afaerber@suse.de> MIME-Version: 1.0 Sender: devicetree-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org From: James Tai Define compatible strings for Realtek RTD1319 SoC and Realtek Pym Particles EVB. Signed-off-by: James Tai Signed-off-by: Andreas Färber --- v3 -> v4: * Renamed compatible from pymparticle to pym-particles * Turned SoC comment into description v2 -> v3: Unchanged v1 -> v2: * Put string in alphabetical order Documentation/devicetree/bindings/arm/realtek.yaml | 6 ++++++ 1 file changed, 6 insertions(+) -- 2.26.2 Reviewed-by: Rob Herring diff --git a/Documentation/devicetree/bindings/arm/realtek.yaml b/Documentation/devicetree/bindings/arm/realtek.yaml index 0b388016bbcd..e36e87df3521 100644 --- a/Documentation/devicetree/bindings/arm/realtek.yaml +++ b/Documentation/devicetree/bindings/arm/realtek.yaml @@ -42,6 +42,12 @@ properties: - synology,ds418 # Synology DiskStation DS418 - const: realtek,rtd1296 + - description: RTD1319 SoC based boards + items: + - enum: + - realtek,pym-particles # Realtek Pym Particles EVB + - const: realtek,rtd1319 + - description: RTD1395 SoC based boards items: - enum: From patchwork Mon Jun 22 12:55:26 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Andreas_F=C3=A4rber?= X-Patchwork-Id: 191342 Delivered-To: patch@linaro.org Received: by 2002:a92:1f07:0:0:0:0:0 with SMTP id i7csp1093201ile; Mon, 22 Jun 2020 07:28:16 -0700 (PDT) X-Google-Smtp-Source: ABdhPJx9AlmPiL3PNo7xAxNO1T+hjEyMzE2kSD41T6lpGR5WAKXH7VFmP+NL/sjASLli888RPLj4 X-Received: by 2002:a17:906:27c9:: with SMTP id k9mr10711701ejc.74.1592836096267; Mon, 22 Jun 2020 07:28:16 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1592836096; cv=none; d=google.com; s=arc-20160816; b=q1OALak3BQwJBRtDzU8psFZ46hxz0KNAXD2qe3KL9EHdh8seziuIf7jdEWBuY2/DhT rGaMV/yIbv90ziDhF1Komryo/kC8CuAGPulhlG3DrXyi65D95AoGCuP4LuGosc6DaGFz oRVRZiJL/xNCgCqD5AClUQsFbLHvoT04/Qq1cOj1QEQXGEDOvmJjFSVuQWUbU/UuKUwW s3Dnv4OUNcpcBv2JrRdpd3yOWrEHpK+AdUhWpBeN9tN+5hgm3PjDM+/LYJFgTZsMxtZq 6rv6fQ0VNB2kfj0JbMXkVIiDoJi62UgnaeAZ2hexCPEAo5TW1O4MT/q+bIJuV6jXkQZD Yhcg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from; bh=+1nXvcApdG7xJoE6XSyQzRU6lEu3dgDb51hxRrxoFfw=; b=sMO3D4j5AoCKfF6XHF4IBV4jdoz5/BtGUycOyBFcxRZaMcBaPbAVlaaDnCRH8cYfCQ KqDF+CTKR9F2oo2BULpFqNhSngAwfixmM6Q7uGXEmEGLdwaFaPDhzk8IcWQ3TE/Lq7N7 oBeRtDP+BEBULeL0rphCxy7r2fO9ivWMT1GR4C9+hHnQaRFI/adWdkmycUqQj6fMTbDX DUr9TaMuS6s1NyFrq3c8m7UWnZzRBJs3FAVdFxPnDApAQgrLUq+aTMwLC4G0jZqoDyED dE7nF43lkNBBf2feacGzDzEiWh7mcZwV91BNvjl+DDi1mvvQUyQ+IPDrdmWml3CyHkWl Jrzw== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: domain of devicetree-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [23.128.96.18]) by mx.google.com with ESMTP id n29si2794756edb.289.2020.06.22.07.28.16; Mon, 22 Jun 2020 07:28:16 -0700 (PDT) Received-SPF: pass (google.com: domain of devicetree-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18; Authentication-Results: mx.google.com; spf=pass (google.com: domain of devicetree-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1729845AbgFVO2N (ORCPT + 6 others); Mon, 22 Jun 2020 10:28:13 -0400 Received: from mx2.suse.de ([195.135.220.15]:45454 "EHLO mx2.suse.de" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1729296AbgFVO0W (ORCPT ); Mon, 22 Jun 2020 10:26:22 -0400 X-Virus-Scanned: by amavisd-new at test-mx.suse.de Received: from relay2.suse.de (unknown [195.135.221.27]) by mx2.suse.de (Postfix) with ESMTP id 7DB44C1B1; Mon, 22 Jun 2020 14:26:18 +0000 (UTC) From: =?utf-8?q?Andreas_F=C3=A4rber?= To: linux-realtek-soc@lists.infradead.org Cc: linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, James Tai , =?utf-8?q?Andreas_F=C3=A4rber?= , Rob Herring , devicetree@vger.kernel.org Subject: [PATCH v4 3/3] arm64: dts: realtek: Add RTD1319 SoC and Realtek Pym Particles EVB Date: Mon, 22 Jun 2020 14:55:26 +0200 Message-Id: <20200622125527.24207-4-afaerber@suse.de> X-Mailer: git-send-email 2.26.2 In-Reply-To: <20200622125527.24207-1-afaerber@suse.de> References: <20200622125527.24207-1-afaerber@suse.de> MIME-Version: 1.0 Sender: devicetree-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org From: James Tai Add Device Trees for Realtek RTD1319 SoC family, RTD1319 SoC and Realtek Pym Particles EVB. Signed-off-by: James Tai Signed-off-by: Andreas Färber --- v3 -> v4: * Updated Realtek copyright for 2 out of 3 files from v3 * Renamed from rtd1319-pymparticle.dts to rtd1319-pymparticles.dts * Updated compatible from pymparticle to pym-particles * Updated PMU compatible from armv8-pmuv3 to cortex-a55-pmu (Robin) v2 -> v3: * Add virtual maintenance interrupt for architecture timer * Correct the GIC redistributor address range v1 -> v2: * Reserve the boot ROM address * Reserve boot loader address * Reserve audio/video FW address * Reserve RPC and ring buffer address * Reserve TEE address * Support 1 GiB RAM by default * Reduce rbus range to 2 MiB * Apply the syscon for ISO,MISC,CRT,SB2,SCPU_WRAPPER * Adjust compatible strings order in document arch/arm64/boot/dts/realtek/Makefile | 2 + .../boot/dts/realtek/rtd1319-pymparticles.dts | 43 ++++ arch/arm64/boot/dts/realtek/rtd1319.dtsi | 12 + arch/arm64/boot/dts/realtek/rtd13xx.dtsi | 213 ++++++++++++++++++ 4 files changed, 270 insertions(+) create mode 100644 arch/arm64/boot/dts/realtek/rtd1319-pymparticles.dts create mode 100644 arch/arm64/boot/dts/realtek/rtd1319.dtsi create mode 100644 arch/arm64/boot/dts/realtek/rtd13xx.dtsi -- 2.26.2 diff --git a/arch/arm64/boot/dts/realtek/Makefile b/arch/arm64/boot/dts/realtek/Makefile index ef8d8fcbaa05..83708596726d 100644 --- a/arch/arm64/boot/dts/realtek/Makefile +++ b/arch/arm64/boot/dts/realtek/Makefile @@ -9,6 +9,8 @@ dtb-$(CONFIG_ARCH_REALTEK) += rtd1295-zidoo-x9s.dtb dtb-$(CONFIG_ARCH_REALTEK) += rtd1296-ds418.dtb +dtb-$(CONFIG_ARCH_REALTEK) += rtd1319-pymparticles.dtb + dtb-$(CONFIG_ARCH_REALTEK) += rtd1395-bpi-m4.dtb dtb-$(CONFIG_ARCH_REALTEK) += rtd1395-lionskin.dtb diff --git a/arch/arm64/boot/dts/realtek/rtd1319-pymparticles.dts b/arch/arm64/boot/dts/realtek/rtd1319-pymparticles.dts new file mode 100644 index 000000000000..e0b3c3707a85 --- /dev/null +++ b/arch/arm64/boot/dts/realtek/rtd1319-pymparticles.dts @@ -0,0 +1,43 @@ +// SPDX-License-Identifier: (GPL-2.0-or-later OR BSD-2-Clause) +/* + * Copyright (c) 2019-2020 Realtek Semiconductor Corp. + */ + +/dts-v1/; + +#include "rtd1319.dtsi" + +/ { + compatible = "realtek,pym-particles", "realtek,rtd1319"; + model = "Realtek Pym Particles EVB"; + + memory@2e000 { + device_type = "memory"; + reg = <0x2e000 0x3ffd2000>; /* boot ROM to 1 GiB or 2 GiB */ + }; + + chosen { + stdout-path = "serial0:460800n8"; + }; + + aliases { + serial0 = &uart0; + serial1 = &uart1; + serial2 = &uart2; + }; +}; + +/* debug console (J1) */ +&uart0 { + status = "okay"; +}; + +/* M.2 slots (CON2, CON8) and J14 */ +&uart1 { + status = "disabled"; +}; + +/* GPIO connector (T1) */ +&uart2 { + status = "disabled"; +}; diff --git a/arch/arm64/boot/dts/realtek/rtd1319.dtsi b/arch/arm64/boot/dts/realtek/rtd1319.dtsi new file mode 100644 index 000000000000..1dcee00009cd --- /dev/null +++ b/arch/arm64/boot/dts/realtek/rtd1319.dtsi @@ -0,0 +1,12 @@ +// SPDX-License-Identifier: (GPL-2.0-or-later OR BSD-2-Clause) +/* + * Realtek RTD1319 SoC + * + * Copyright (c) 2019 Realtek Semiconductor Corp. + */ + +#include "rtd13xx.dtsi" + +/ { + compatible = "realtek,rtd1319"; +}; diff --git a/arch/arm64/boot/dts/realtek/rtd13xx.dtsi b/arch/arm64/boot/dts/realtek/rtd13xx.dtsi new file mode 100644 index 000000000000..8c5b6fc7b8eb --- /dev/null +++ b/arch/arm64/boot/dts/realtek/rtd13xx.dtsi @@ -0,0 +1,213 @@ +// SPDX-License-Identifier: (GPL-2.0-or-later OR BSD-2-Clause) +/* + * Realtek RTD13xx SoC family + * + * Copyright (c) 2019-2020 Realtek Semiconductor Corp. + */ + +/memreserve/ 0x0000000000000000 0x000000000002e000; /* Boot ROM */ +/memreserve/ 0x000000000002e000 0x0000000000100000; /* Boot loader */ +/memreserve/ 0x000000000f400000 0x0000000000500000; /* Video FW */ +/memreserve/ 0x000000000f900000 0x0000000000500000; /* Audio FW */ +/memreserve/ 0x0000000010000000 0x0000000000014000; /* Audio FW RAM */ + +#include +#include + +/ { + interrupt-parent = <&gic>; + #address-cells = <1>; + #size-cells = <1>; + + reserved-memory { + #address-cells = <1>; + #size-cells = <1>; + ranges; + + rpc_comm: rpc@3f000 { + reg = <0x3f000 0x1000>; + }; + + rpc_ringbuf: rpc@1ffe000 { + reg = <0x1ffe000 0x4000>; + }; + + tee: tee@10100000 { + reg = <0x10100000 0xf00000>; + no-map; + }; + }; + + cpus { + #address-cells = <1>; + #size-cells = <0>; + + cpu0: cpu@0 { + device_type = "cpu"; + compatible = "arm,cortex-a55"; + reg = <0x0>; + enable-method = "psci"; + next-level-cache = <&l2>; + }; + + cpu1: cpu@100 { + device_type = "cpu"; + compatible = "arm,cortex-a55"; + reg = <0x100>; + enable-method = "psci"; + next-level-cache = <&l2>; + }; + + cpu2: cpu@200 { + device_type = "cpu"; + compatible = "arm,cortex-a55"; + reg = <0x200>; + enable-method = "psci"; + next-level-cache = <&l2>; + }; + + cpu3: cpu@300 { + device_type = "cpu"; + compatible = "arm,cortex-a55"; + reg = <0x300>; + enable-method = "psci"; + next-level-cache = <&l2>; + }; + + l2: l2-cache { + compatible = "cache"; + }; + }; + + timer { + compatible = "arm,armv8-timer"; + interrupts = , + , + , + , + ; + }; + + arm_pmu: pmu { + compatible = "arm,cortex-a55-pmu"; + interrupts = ; + interrupt-affinity = <&cpu0>, <&cpu1>, <&cpu2>, <&cpu3>; + }; + + psci { + compatible = "arm,psci-1.0"; + method = "smc"; + }; + + osc27M: osc { + compatible = "fixed-clock"; + clock-frequency = <27000000>; + clock-output-names = "osc27M"; + #clock-cells = <0>; + }; + + soc { + compatible = "simple-bus"; + #address-cells = <1>; + #size-cells = <1>; + ranges = <0x00000000 0x00000000 0x0002e000>, /* boot ROM */ + <0xff100000 0xff100000 0x00200000>, /* GIC */ + <0x98000000 0x98000000 0x00200000>; /* rbus */ + + rbus: bus@98000000 { + compatible = "simple-bus"; + reg = <0x98000000 0x200000>; + #address-cells = <1>; + #size-cells = <1>; + ranges = <0x0 0x98000000 0x200000>; + + crt: syscon@0 { + compatible = "syscon", "simple-mfd"; + reg = <0x0 0x1000>; + reg-io-width = <4>; + #address-cells = <1>; + #size-cells = <1>; + ranges = <0x0 0x0 0x1000>; + }; + + iso: syscon@7000 { + compatible = "syscon", "simple-mfd"; + reg = <0x7000 0x1000>; + reg-io-width = <4>; + #address-cells = <1>; + #size-cells = <1>; + ranges = <0x0 0x7000 0x1000>; + }; + + sb2: syscon@1a000 { + compatible = "syscon", "simple-mfd"; + reg = <0x1a000 0x1000>; + reg-io-width = <4>; + #address-cells = <1>; + #size-cells = <1>; + ranges = <0x0 0x1a000 0x1000>; + }; + + misc: syscon@1b000 { + compatible = "syscon", "simple-mfd"; + reg = <0x1b000 0x1000>; + reg-io-width = <4>; + #address-cells = <1>; + #size-cells = <1>; + ranges = <0x0 0x1b000 0x1000>; + }; + + scpu_wrapper: syscon@1d000 { + compatible = "syscon", "simple-mfd"; + reg = <0x1d000 0x1000>; + reg-io-width = <4>; + #address-cells = <1>; + #size-cells = <1>; + ranges = <0x0 0x1d000 0x1000>; + }; + }; + + gic: interrupt-controller@ff100000 { + compatible = "arm,gic-v3"; + reg = <0xff100000 0x10000>, + <0xff140000 0x80000>; + interrupts = ; + interrupt-controller; + #interrupt-cells = <3>; + }; + }; +}; + +&iso { + uart0: serial0@800 { + compatible = "snps,dw-apb-uart"; + reg = <0x800 0x400>; + reg-shift = <2>; + reg-io-width = <4>; + interrupts = ; + clock-frequency = <432000000>; + status = "disabled"; + }; +}; + +&misc { + uart1: serial1@200 { + compatible = "snps,dw-apb-uart"; + reg = <0x200 0x400>; + reg-shift = <2>; + reg-io-width = <4>; + interrupts = ; + clock-frequency = <432000000>; + status = "disabled"; + }; + + uart2: serial2@400 { + compatible = "snps,dw-apb-uart"; + reg = <0x400 0x400>; + reg-shift = <2>; + reg-io-width = <4>; + interrupts = ; + clock-frequency = <432000000>; + status = "disabled"; + }; +};