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[104.188.17.28]) by smtp.gmail.com with ESMTPSA id h36sm3589304oth.37.2020.06.22.15.27.37 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 22 Jun 2020 15:27:37 -0700 (PDT) From: Bjorn Andersson To: Andy Gross , Bjorn Andersson , Dmitry Baryshkov , Manivannan Sadhasivam Cc: linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org Subject: [PATCH 1/6] arm64: dts: qcom: sm8250-mtp: Drop PM8150 ldo11 Date: Mon, 22 Jun 2020 15:27:42 -0700 Message-Id: <20200622222747.717306-2-bjorn.andersson@linaro.org> X-Mailer: git-send-email 2.26.2 In-Reply-To: <20200622222747.717306-1-bjorn.andersson@linaro.org> References: <20200622222747.717306-1-bjorn.andersson@linaro.org> MIME-Version: 1.0 Sender: devicetree-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org PM8150 ldo11 on the MTP is wired to VDD_SSC_CX and controlled in levels, rather than as a regulator. As such it's available from the rpmhpd as the SM8250_LCX power domain. Fixes: ec13d5c23a33 ("arm64: dts: qcom: sm8250-mtp: Add pm8150, pm8150l and pm8009") Signed-off-by: Bjorn Andersson --- arch/arm64/boot/dts/qcom/sm8250-mtp.dts | 7 ------- 1 file changed, 7 deletions(-) -- 2.26.2 Reviewed-by: Manivannan Sadhasivam diff --git a/arch/arm64/boot/dts/qcom/sm8250-mtp.dts b/arch/arm64/boot/dts/qcom/sm8250-mtp.dts index 2fc9e7ff0060..63d259931c4d 100644 --- a/arch/arm64/boot/dts/qcom/sm8250-mtp.dts +++ b/arch/arm64/boot/dts/qcom/sm8250-mtp.dts @@ -140,13 +140,6 @@ vreg_l10a_1p8: ldo10 { regulator-initial-mode = ; }; - vreg_l11a_0p75: ldo11 { - regulator-name = "vreg_l11a_0p75"; - regulator-min-microvolt = <800000>; - regulator-max-microvolt = <800000>; - regulator-initial-mode = ; - }; - vreg_l12a_1p8: ldo12 { regulator-name = "vreg_l12a_1p8"; regulator-min-microvolt = <1800000>; From patchwork Mon Jun 22 22:27:43 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Bjorn Andersson X-Patchwork-Id: 191392 Delivered-To: patch@linaro.org Received: by 2002:a92:1f07:0:0:0:0:0 with SMTP id i7csp1439756ile; Mon, 22 Jun 2020 15:27:44 -0700 (PDT) X-Google-Smtp-Source: ABdhPJySXJS5xm8hc/ScU6nVancQzxvLZbBl0ahbflMPFCVp6Ymz8ciQiT7bBKcW2uFedJP3HNN/ X-Received: by 2002:a17:907:402e:: with SMTP id nr22mr16960455ejb.239.1592864864395; Mon, 22 Jun 2020 15:27:44 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1592864864; cv=none; d=google.com; s=arc-20160816; b=cw1DCO+ZuMY24rr1pUwFnn9W7qYrC/2eS71xkU0i1EXxiSU5iqNGHJwiIadTmQK41B MpkiU8nMp6+YByks8fO6ywg7w3yf+yWtSgVx7hypkJbQlGT2gvbpmjxjuFULdB53Kkpk YeM7UiXUmM1PmaEEZmfDyEqy9f9W8DE6wtOH8iDhqV5fWzB5/ejFSIS9WL3Ew8uiIH5J FUbWyN7VCO+T1Ao1SylLo7hx3YJwIQ0zki54ZYuUSxF8iCuugWZVbWQYraMuSzUbYcz8 Bc770tnOKr/+T/Rg2/dPWd43K/f9VsEx8nIXA+Ax7RFebLtSjAAWif/yKUT0bosuhFHY OpTQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=i3ZFx1cfGWfklPrTeX40d9zi2JN5zxamR5nNhJdd1zY=; b=qAK2EVfF0QT9rY0vt+xASKwRxIgj0uRrNlTJsapSjwaok9NMa/YlAoFYfNWU7JPMMb X1JrccEz5acEA9WIAZ1FUFSfEL/F8pW4BvJb79tFcnVeo7lHunkXR7RqD+c7qmybxp3f +Y0aiZ9aqHHiGr1qe7jhMJ9eRTJpn9wd/kCa09641MAlyoJdfN/HSsD8jnQpsfRFTOWT 0m8FUQh4k0LFtcNa3I32TjM286zrHFu7eDF2w5tpjwNARTEb7Vt7C7YaWWYcHhwzd3Mr ap3tw809umQLfdWpr/YrzLFttQTW/b3i+Jtt6SSEC0LeXgLEjiyGVTsos+0gIoeBA77T 1wEg== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=lenyekES; spf=pass (google.com: domain of devicetree-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. 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[104.188.17.28]) by smtp.gmail.com with ESMTPSA id h36sm3589304oth.37.2020.06.22.15.27.38 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 22 Jun 2020 15:27:39 -0700 (PDT) From: Bjorn Andersson To: Andy Gross , Bjorn Andersson , Dmitry Baryshkov , Manivannan Sadhasivam Cc: linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org Subject: [PATCH 2/6] arm64: dts: qcom: sm8250: Add IPCC Date: Mon, 22 Jun 2020 15:27:43 -0700 Message-Id: <20200622222747.717306-3-bjorn.andersson@linaro.org> X-Mailer: git-send-email 2.26.2 In-Reply-To: <20200622222747.717306-1-bjorn.andersson@linaro.org> References: <20200622222747.717306-1-bjorn.andersson@linaro.org> MIME-Version: 1.0 Sender: devicetree-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Add the IPCC node, used to send and receive IPC signals with remoteprocs. Signed-off-by: Bjorn Andersson --- arch/arm64/boot/dts/qcom/sm8250.dtsi | 10 ++++++++++ 1 file changed, 10 insertions(+) -- 2.26.2 diff --git a/arch/arm64/boot/dts/qcom/sm8250.dtsi b/arch/arm64/boot/dts/qcom/sm8250.dtsi index e583a01cbcf1..74a7ca96177e 100644 --- a/arch/arm64/boot/dts/qcom/sm8250.dtsi +++ b/arch/arm64/boot/dts/qcom/sm8250.dtsi @@ -6,6 +6,7 @@ #include #include #include +#include #include #include @@ -329,6 +330,15 @@ gcc: clock-controller@100000 { clocks = <&rpmhcc RPMH_CXO_CLK>, <&sleep_clk>; }; + ipcc: interrupt-controller@408000 { + compatible = "qcom,sm8250-ipcc", "qcom,ipcc"; + reg = <0 0x00408000 0 0x1000>; + interrupts = ; + interrupt-controller; + #interrupt-cells = <3>; + #mbox-cells = <2>; + }; + qupv3_id_2: geniqup@8c0000 { compatible = "qcom,geni-se-qup"; reg = <0x0 0x008c0000 0x0 0x6000>; From patchwork Mon Jun 22 22:27:44 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Bjorn Andersson X-Patchwork-Id: 198628 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-10.1 required=3.0 tests=DKIM_SIGNED,DKIM_VALID, DKIM_VALID_AU, HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_PATCH, MAILING_LIST_MULTI, SIGNED_OFF_BY,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED,USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 2AC81C433E1 for ; Mon, 22 Jun 2020 22:28:17 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 0AAAF2075A for ; Mon, 22 Jun 2020 22:28:17 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (2048-bit key) header.d=linaro.org header.i=@linaro.org header.b="r0rg84zI" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1730864AbgFVW2P (ORCPT ); Mon, 22 Jun 2020 18:28:15 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:46974 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1731030AbgFVW1m (ORCPT ); Mon, 22 Jun 2020 18:27:42 -0400 Received: from mail-ot1-x342.google.com (mail-ot1-x342.google.com [IPv6:2607:f8b0:4864:20::342]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id BA60EC061573 for ; Mon, 22 Jun 2020 15:27:41 -0700 (PDT) Received: by mail-ot1-x342.google.com with SMTP id 72so1033359otc.3 for ; Mon, 22 Jun 2020 15:27:41 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=np06MBoJ0AuPrMypeIwHblD2LOFOM+rqs7EtZrEx3Pw=; b=r0rg84zIbL8kV63uOUn5+t2IYIe5xGcfcJIXWWbnqpMFBmhHPYvLmbvKLz3bI49DpB 9GCapPYUnEg2FOGhkvUKxsoUfr7PZ43oOihybXzLwMCVY5h2qfjTnQwjxeSfWIgQ26pF amaqn8BNJzRVInEJvpxSJI9ZPQpULYN+d1wZV0Z26Hk6moQY2PvJpfCRqKu7rSqFqwmI Z0Hec+pOHqbc+XQ3rSA9P7T3cyRbn7BCfoO8Ptf2Q9IiMBGv0o/t4dv9VrbqJ0WUxpdK AmTHI+baqgMXQcoVK3D9/RbbH7ALZISQb87ZFDRlTuZ67MZJTOd72f8KCBKtTVsECcag 1UMA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=np06MBoJ0AuPrMypeIwHblD2LOFOM+rqs7EtZrEx3Pw=; b=BfMveF7BXCUZ6eINvodcWmq2z4+oKUxkbSnhiPR0GJ9yW/G3TxUz/WnuCi8YlWNkhx dbLt/Q3gzFnaYkaccBYX19G7NANggx9GSg14ptpfgi8kSEBuOV8nUDNIpab0tcf0QVbx NtvaAhlF3eUMqfx90RCRIFqIWioGU6nyr/0pjUno0dfbItqo5peH3r2vhevcCjLI4Ez1 q9YOXzEBhf3k3L7861s08aVpaI3BR8s15CTdEqpjeJ2mJf20ZePF0tkAOnyMQiN/lnyN r0wiyH9eyn7dkth7Et46jzZooAiqcaClgnRR4DTbeHPmzbA79g8C0ke3e0npjlDC3keA BETQ== X-Gm-Message-State: AOAM5338WAL4zGWVBKHf1ttfSkj45L6hjYD1JqtK6U0bxxBvLXPP9JLz pRIX9hnmWFmREaUkOaaIKjcDdQ== X-Google-Smtp-Source: ABdhPJyFaBDzpgqSiNBG+6lr3jq8HwxV1odT6pvGc+rG78De/yGfdOA1I/wF9744YHOjfDcVOHmURg== X-Received: by 2002:a9d:aaa:: with SMTP id 39mr15107908otq.269.1592864861102; Mon, 22 Jun 2020 15:27:41 -0700 (PDT) Received: from localhost.localdomain (104-188-17-28.lightspeed.sndgca.sbcglobal.net. [104.188.17.28]) by smtp.gmail.com with ESMTPSA id h36sm3589304oth.37.2020.06.22.15.27.39 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 22 Jun 2020 15:27:40 -0700 (PDT) From: Bjorn Andersson To: Andy Gross , Bjorn Andersson , Dmitry Baryshkov , Manivannan Sadhasivam Cc: linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org Subject: [PATCH 3/6] arm64: dts: qcom: sm8250: Add QMP AOSS node Date: Mon, 22 Jun 2020 15:27:44 -0700 Message-Id: <20200622222747.717306-4-bjorn.andersson@linaro.org> X-Mailer: git-send-email 2.26.2 In-Reply-To: <20200622222747.717306-1-bjorn.andersson@linaro.org> References: <20200622222747.717306-1-bjorn.andersson@linaro.org> MIME-Version: 1.0 Sender: devicetree-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Add a node for the QMP AOSS. Signed-off-by: Bjorn Andersson --- arch/arm64/boot/dts/qcom/sm8250.dtsi | 14 ++++++++++++++ 1 file changed, 14 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/sm8250.dtsi b/arch/arm64/boot/dts/qcom/sm8250.dtsi index 74a7ca96177e..246e6f279aa8 100644 --- a/arch/arm64/boot/dts/qcom/sm8250.dtsi +++ b/arch/arm64/boot/dts/qcom/sm8250.dtsi @@ -7,6 +7,7 @@ #include #include #include +#include #include #include @@ -989,6 +990,19 @@ pdc: interrupt-controller@b220000 { interrupt-controller; }; + aoss_qmp: qmp@c300000 { + compatible = "qcom,sm8250-aoss-qmp"; + reg = <0 0x0c300000 0 0x100000>; + interrupts-extended = <&ipcc IPCC_CLIENT_AOP + IPCC_MPROC_SIGNAL_GLINK_QMP + IRQ_TYPE_EDGE_RISING>; + mboxes = <&ipcc IPCC_CLIENT_AOP + IPCC_MPROC_SIGNAL_GLINK_QMP>; + + #clock-cells = <0>; + #power-domain-cells = <1>; + }; + spmi_bus: spmi@c440000 { compatible = "qcom,spmi-pmic-arb"; reg = <0x0 0x0c440000 0x0 0x0001100>, From patchwork Mon Jun 22 22:27:45 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Bjorn Andersson X-Patchwork-Id: 198630 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-10.1 required=3.0 tests=DKIM_SIGNED,DKIM_VALID, DKIM_VALID_AU, HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_PATCH, MAILING_LIST_MULTI, SIGNED_OFF_BY,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED,USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 37D87C433E0 for ; Mon, 22 Jun 2020 22:27:49 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 1277F2075A for ; Mon, 22 Jun 2020 22:27:49 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (2048-bit key) header.d=linaro.org header.i=@linaro.org header.b="e6L6AkxQ" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1731082AbgFVW1s (ORCPT ); Mon, 22 Jun 2020 18:27:48 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:46994 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1731071AbgFVW1r (ORCPT ); Mon, 22 Jun 2020 18:27:47 -0400 Received: from mail-ot1-x342.google.com (mail-ot1-x342.google.com [IPv6:2607:f8b0:4864:20::342]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 0E3B5C061799 for ; Mon, 22 Jun 2020 15:27:43 -0700 (PDT) Received: by mail-ot1-x342.google.com with SMTP id e5so14552039ote.11 for ; Mon, 22 Jun 2020 15:27:43 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=2twIzfs0XUdlpwpGhkxofa+OvC6guPhGkJO/5SWD0ok=; b=e6L6AkxQfK4zgaD6G+i1IMw0VPcYhPuMTtZlm1gGZZdFYmjp35ERwxWGbJenH39fq9 LGdDj0QBZReaSMTlQZ/0auUblx3nWv3eRvJv9T4lueEM8d1aASv00T6NvZJ1Ig97fyUZ T8RaWgqyCtH0kuHRANJ6Fv2y8aBUOhYdvfCYWDp1IL5+6SC4f5OOhtP+0HE7rBIA3ZoS lyv1qDiYND52PczwcL4pUMj8fW3cmbpZvY1Yjg7IdupTgorfwu4PkRfjzBApTPDA0R2G oG3f7qt1gGQq4bYG9HeoqxIqvnppq8Til9queMyxZkkEWMod7EFPTQrC+DgEPl9bSNXW Pm6w== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=2twIzfs0XUdlpwpGhkxofa+OvC6guPhGkJO/5SWD0ok=; b=W0T10nf49u6QRE5Sk8dSWBYIQPOQjB0m4P6+lTRI6jhdtNGZb3TC/SUI5oogMU6jox oQ+Le+sFnc/6SpMty2UKDVP9zNyH0Fuy7lu5RXSsw0tDGGAsNRxxK21Bla6Q1jbgXAUW K0ILYxd10T8V/cKP/eLGenRUa8vNjFVZrlDFe1rsK77EE54Bc2VS2P0nFPvTZ59ieG5L aazYPtTTLkNmO9MlY+iMTylWLePVrKSk4n4EWTNZ7cvIavhB7g1zTLxUED/uZ663r8Zf cQ8SPuaFo4kwz5cSeE+wnI1I6Qlent69/2wh0aRo/MH8c+cBrf6+5I8H6d0QZtNGSQtt A9Hw== X-Gm-Message-State: AOAM533Eo5A81UAPX9r/Ud5I6K6w3qhw95k4ru9MgH8qcpL9VyD4DCMC yhlhWVgNuuIjxeHccBNvv95AqA== X-Google-Smtp-Source: ABdhPJwgey5b7ZI7MvePviVABAMsCQydjl7xm6I27E+P6GcQYA+M+SczI1BLtaOa6STro09MTrS6dA== X-Received: by 2002:a05:6830:1d8c:: with SMTP id y12mr16164734oti.162.1592864862368; Mon, 22 Jun 2020 15:27:42 -0700 (PDT) Received: from localhost.localdomain (104-188-17-28.lightspeed.sndgca.sbcglobal.net. [104.188.17.28]) by smtp.gmail.com with ESMTPSA id h36sm3589304oth.37.2020.06.22.15.27.41 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 22 Jun 2020 15:27:41 -0700 (PDT) From: Bjorn Andersson To: Andy Gross , Bjorn Andersson , Dmitry Baryshkov , Manivannan Sadhasivam Cc: linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org Subject: [PATCH 4/6] arm64: dts: qcom: sm8250: Add SMP2P nodes Date: Mon, 22 Jun 2020 15:27:45 -0700 Message-Id: <20200622222747.717306-5-bjorn.andersson@linaro.org> X-Mailer: git-send-email 2.26.2 In-Reply-To: <20200622222747.717306-1-bjorn.andersson@linaro.org> References: <20200622222747.717306-1-bjorn.andersson@linaro.org> MIME-Version: 1.0 Sender: devicetree-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org SMP2P is used for interrupting and being interrupted about remoteproc state changes related to the audio, compute and sensor subsystems. Signed-off-by: Bjorn Andersson --- arch/arm64/boot/dts/qcom/sm8250.dtsi | 72 ++++++++++++++++++++++++++++ 1 file changed, 72 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/sm8250.dtsi b/arch/arm64/boot/dts/qcom/sm8250.dtsi index 246e6f279aa8..364d9a798673 100644 --- a/arch/arm64/boot/dts/qcom/sm8250.dtsi +++ b/arch/arm64/boot/dts/qcom/sm8250.dtsi @@ -314,6 +314,78 @@ smem: qcom,smem { hwlocks = <&tcsr_mutex 3>; }; + smp2p-adsp { + compatible = "qcom,smp2p"; + qcom,smem = <443>, <429>; + interrupts-extended = <&ipcc IPCC_CLIENT_LPASS + IPCC_MPROC_SIGNAL_SMP2P + IRQ_TYPE_EDGE_RISING>; + mboxes = <&ipcc IPCC_CLIENT_LPASS + IPCC_MPROC_SIGNAL_SMP2P>; + + qcom,local-pid = <0>; + qcom,remote-pid = <2>; + + smp2p_adsp_out: master-kernel { + qcom,entry-name = "master-kernel"; + #qcom,smem-state-cells = <1>; + }; + + smp2p_adsp_in: slave-kernel { + qcom,entry-name = "slave-kernel"; + interrupt-controller; + #interrupt-cells = <2>; + }; + }; + + smp2p-cdsp { + compatible = "qcom,smp2p"; + qcom,smem = <94>, <432>; + interrupts-extended = <&ipcc IPCC_CLIENT_CDSP + IPCC_MPROC_SIGNAL_SMP2P + IRQ_TYPE_EDGE_RISING>; + mboxes = <&ipcc IPCC_CLIENT_CDSP + IPCC_MPROC_SIGNAL_SMP2P>; + + qcom,local-pid = <0>; + qcom,remote-pid = <5>; + + smp2p_cdsp_out: master-kernel { + qcom,entry-name = "master-kernel"; + #qcom,smem-state-cells = <1>; + }; + + smp2p_cdsp_in: slave-kernel { + qcom,entry-name = "slave-kernel"; + interrupt-controller; + #interrupt-cells = <2>; + }; + }; + + smp2p-slpi { + compatible = "qcom,smp2p"; + qcom,smem = <481>, <430>; + interrupts-extended = <&ipcc IPCC_CLIENT_SLPI + IPCC_MPROC_SIGNAL_SMP2P + IRQ_TYPE_EDGE_RISING>; + mboxes = <&ipcc IPCC_CLIENT_SLPI + IPCC_MPROC_SIGNAL_SMP2P>; + + qcom,local-pid = <0>; + qcom,remote-pid = <3>; + + smp2p_slpi_out: master-kernel { + qcom,entry-name = "master-kernel"; + #qcom,smem-state-cells = <1>; + }; + + smp2p_slpi_in: slave-kernel { + qcom,entry-name = "slave-kernel"; + interrupt-controller; + #interrupt-cells = <2>; + }; + }; + soc: soc@0 { #address-cells = <2>; #size-cells = <2>; From patchwork Mon Jun 22 22:27:46 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Bjorn Andersson X-Patchwork-Id: 191395 Delivered-To: patch@linaro.org Received: by 2002:a92:1f07:0:0:0:0:0 with SMTP id i7csp1439938ile; Mon, 22 Jun 2020 15:28:03 -0700 (PDT) X-Google-Smtp-Source: ABdhPJxbTRb438JGReBiyJ3k2Xhi51ETa8XzTJS1uwQnV617nJ2xPniehtDXBLXA+ZdO2K31oxXw X-Received: by 2002:a50:ee84:: with SMTP id f4mr6901313edr.183.1592864883541; Mon, 22 Jun 2020 15:28:03 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1592864883; cv=none; d=google.com; s=arc-20160816; b=p9hbYfQvgI67KkOikcaMcuNttDs8ZVrZWP3aFG8yViAGjLmWT7wtb1n8uCPNFxOZqD EKOtgNpfPRyjr0Dw6hM9NeNOaXKwEKcM+sn73OiRoFDUQbwML7rUsYJtcSaCu6/C+Ubp FGM39B771i84unW3pBjy5OEGBu1r/rdH6ZswOkjO62Izz9a5BE9OXSB4mYDgfCuccxN4 wpnUMMP1ZDcj4O0L6aubWBnhZxfPp6Fl49Yu3v5nRmfc1ny2PNAyYG2o4xQENHTIHcWL fq5zxdmE+UJm1NWCLsBYhG/3CvjZNzKbv1V8Tk0yckGe9B74z6AzRllRufYqOeLRf8At A1XA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=wYNMROVmkPoqnFNJEIZnim/Bm5IaS8jlBoM1iy2mvU4=; b=w+0TJQnMBrudR+LDPRSMFIuySzDoeT89k94AimuZejfqf5mEqovWz6+MGYoDRY5R4M s6HFXGlkIIpnQg8fyzTZRsKF2reG4x7jBCz9GcIub0YRHm6So41SHMGj6Ez3yE6rMwFI G07CfKtqzjvf1FBG84QUiBnrZdG5QzPWWS/Ctpf16qzuhEkFpybzoEWUPjsOKR7jOw/f 9gBNGB82vAG1uCNJvX2ZS+Obo18KGUs+pwBlY7unRTYVDBdqtM87GCwdb8FWErkYX3Rg ig0rhfc9NntlXTrRk2du7SOYhSfwCyg1FMW0/4vCaXCVbaTaHHEQN9g0hi+sZmFAj80Y Rogg== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=Eu7GWeez; spf=pass (google.com: domain of devicetree-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. 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[104.188.17.28]) by smtp.gmail.com with ESMTPSA id h36sm3589304oth.37.2020.06.22.15.27.42 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 22 Jun 2020 15:27:43 -0700 (PDT) From: Bjorn Andersson To: Andy Gross , Bjorn Andersson , Dmitry Baryshkov , Manivannan Sadhasivam Cc: linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org Subject: [PATCH 5/6] arm64: dts: qcom: sm8250: Add remoteprocs Date: Mon, 22 Jun 2020 15:27:46 -0700 Message-Id: <20200622222747.717306-6-bjorn.andersson@linaro.org> X-Mailer: git-send-email 2.26.2 In-Reply-To: <20200622222747.717306-1-bjorn.andersson@linaro.org> References: <20200622222747.717306-1-bjorn.andersson@linaro.org> MIME-Version: 1.0 Sender: devicetree-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Add remoteproc nodes for the audio, compute and sensor cores, define glink for each one and enable them on the MTP with appropriate firmware defined. Signed-off-by: Bjorn Andersson --- arch/arm64/boot/dts/qcom/sm8250-mtp.dts | 15 +++ arch/arm64/boot/dts/qcom/sm8250.dtsi | 116 ++++++++++++++++++++++++ 2 files changed, 131 insertions(+) -- 2.26.2 Reviewed-by: Manivannan Sadhasivam diff --git a/arch/arm64/boot/dts/qcom/sm8250-mtp.dts b/arch/arm64/boot/dts/qcom/sm8250-mtp.dts index 63d259931c4d..6894f8490dae 100644 --- a/arch/arm64/boot/dts/qcom/sm8250-mtp.dts +++ b/arch/arm64/boot/dts/qcom/sm8250-mtp.dts @@ -55,6 +55,11 @@ vreg_s6c_0p88: smpc6-regulator { }; }; +&adsp { + status = "okay"; + firmware-name = "qcom/sm8250/adsp.mbn"; +}; + &apps_rsc { pm8150-rpmh-regulators { compatible = "qcom,pm8150-rpmh-regulators"; @@ -348,10 +353,20 @@ vreg_l7f_1p8: ldo7 { }; }; +&cdsp { + status = "okay"; + firmware-name = "qcom/sm8250/cdsp.mbn"; +}; + &qupv3_id_1 { status = "okay"; }; +&slpi { + status = "okay"; + firmware-name = "qcom/sm8250/slpi.mbn"; +}; + &tlmm { gpio-reserved-ranges = <28 4>, <40 4>; }; diff --git a/arch/arm64/boot/dts/qcom/sm8250.dtsi b/arch/arm64/boot/dts/qcom/sm8250.dtsi index 364d9a798673..a21299b9c62f 100644 --- a/arch/arm64/boot/dts/qcom/sm8250.dtsi +++ b/arch/arm64/boot/dts/qcom/sm8250.dtsi @@ -1052,6 +1052,83 @@ tcsr_mutex_regs: syscon@1f40000 { reg = <0x0 0x01f40000 0x0 0x40000>; }; + slpi: remoteproc@5c00000 { + compatible = "qcom,sm8250-slpi-pas"; + reg = <0 0x05c00000 0 0x4000>; + + interrupts-extended = <&pdc 9 IRQ_TYPE_LEVEL_HIGH>, + <&smp2p_slpi_in 0 IRQ_TYPE_EDGE_RISING>, + <&smp2p_slpi_in 1 IRQ_TYPE_EDGE_RISING>, + <&smp2p_slpi_in 2 IRQ_TYPE_EDGE_RISING>, + <&smp2p_slpi_in 3 IRQ_TYPE_EDGE_RISING>; + interrupt-names = "wdog", "fatal", "ready", + "handover", "stop-ack"; + + clocks = <&rpmhcc RPMH_CXO_CLK>; + clock-names = "xo"; + + power-domains = <&aoss_qmp AOSS_QMP_LS_SLPI>, + <&rpmhpd SM8250_LCX>, + <&rpmhpd SM8250_LMX>; + power-domain-names = "load_state", "lcx", "lmx"; + + memory-region = <&slpi_mem>; + + qcom,smem-states = <&smp2p_slpi_out 0>; + qcom,smem-state-names = "stop"; + + status = "disabled"; + + glink-edge { + interrupts-extended = <&ipcc IPCC_CLIENT_SLPI + IPCC_MPROC_SIGNAL_GLINK_QMP + IRQ_TYPE_EDGE_RISING>; + mboxes = <&ipcc IPCC_CLIENT_SLPI + IPCC_MPROC_SIGNAL_GLINK_QMP>; + + label = "lpass"; + qcom,remote-pid = <3>; + }; + }; + + cdsp: remoteproc@8300000 { + compatible = "qcom,sm8250-cdsp-pas"; + reg = <0 0x08300000 0 0x10000>; + + interrupts-extended = <&intc GIC_SPI 578 IRQ_TYPE_LEVEL_HIGH>, + <&smp2p_cdsp_in 0 IRQ_TYPE_EDGE_RISING>, + <&smp2p_cdsp_in 1 IRQ_TYPE_EDGE_RISING>, + <&smp2p_cdsp_in 2 IRQ_TYPE_EDGE_RISING>, + <&smp2p_cdsp_in 3 IRQ_TYPE_EDGE_RISING>; + interrupt-names = "wdog", "fatal", "ready", + "handover", "stop-ack"; + + clocks = <&rpmhcc RPMH_CXO_CLK>; + clock-names = "xo"; + + power-domains = <&aoss_qmp AOSS_QMP_LS_CDSP>, + <&rpmhpd SM8250_CX>; + power-domain-names = "load_state", "cx"; + + memory-region = <&cdsp_mem>; + + qcom,smem-states = <&smp2p_cdsp_out 0>; + qcom,smem-state-names = "stop"; + + status = "disabled"; + + glink-edge { + interrupts-extended = <&ipcc IPCC_CLIENT_CDSP + IPCC_MPROC_SIGNAL_GLINK_QMP + IRQ_TYPE_EDGE_RISING>; + mboxes = <&ipcc IPCC_CLIENT_CDSP + IPCC_MPROC_SIGNAL_GLINK_QMP>; + + label = "lpass"; + qcom,remote-pid = <5>; + }; + }; + pdc: interrupt-controller@b220000 { compatible = "qcom,sm8250-pdc", "qcom,pdc"; reg = <0 0x0b220000 0 0x30000>, <0 0x17c000f0 0 0x60>; @@ -1668,6 +1745,45 @@ config { }; }; + adsp: remoteproc@17300000 { + compatible = "qcom,sm8250-adsp-pas"; + reg = <0 0x17300000 0 0x100>; + + interrupts-extended = <&pdc 6 IRQ_TYPE_LEVEL_HIGH>, + <&smp2p_adsp_in 0 IRQ_TYPE_EDGE_RISING>, + <&smp2p_adsp_in 1 IRQ_TYPE_EDGE_RISING>, + <&smp2p_adsp_in 2 IRQ_TYPE_EDGE_RISING>, + <&smp2p_adsp_in 3 IRQ_TYPE_EDGE_RISING>; + interrupt-names = "wdog", "fatal", "ready", + "handover", "stop-ack"; + + clocks = <&rpmhcc RPMH_CXO_CLK>; + clock-names = "xo"; + + power-domains = <&aoss_qmp AOSS_QMP_LS_LPASS>, + <&rpmhpd SM8250_LCX>, + <&rpmhpd SM8250_LMX>; + power-domain-names = "load_state", "lcx", "lmx"; + + memory-region = <&adsp_mem>; + + qcom,smem-states = <&smp2p_adsp_out 0>; + qcom,smem-state-names = "stop"; + + status = "disabled"; + + glink-edge { + interrupts-extended = <&ipcc IPCC_CLIENT_LPASS + IPCC_MPROC_SIGNAL_GLINK_QMP + IRQ_TYPE_EDGE_RISING>; + mboxes = <&ipcc IPCC_CLIENT_LPASS + IPCC_MPROC_SIGNAL_GLINK_QMP>; + + label = "lpass"; + qcom,remote-pid = <2>; + }; + }; + intc: interrupt-controller@17a00000 { compatible = "arm,gic-v3"; #interrupt-cells = <3>; From patchwork Mon Jun 22 22:27:47 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Bjorn Andersson X-Patchwork-Id: 191394 Delivered-To: patch@linaro.org Received: by 2002:a92:1f07:0:0:0:0:0 with SMTP id i7csp1439927ile; Mon, 22 Jun 2020 15:28:02 -0700 (PDT) X-Google-Smtp-Source: ABdhPJwpH3eJsPQgILCJlnfDikwWaraw+ZPeX8ymgbGljH0hU7m9Aq9TSkCUopYqqZMzaU49akXv X-Received: by 2002:a17:906:470c:: with SMTP id y12mr18154488ejq.336.1592864882513; Mon, 22 Jun 2020 15:28:02 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1592864882; cv=none; d=google.com; s=arc-20160816; b=RPGy3qVFDZjM1PsSvWohWOfO1k/99aKko+K89alRkSuyhLRasYelJPFFw2cyera1rv FSOTcXvtZuXh4X4IzoIG6kDr78hh0fNeucjtovtyUP5hdLywu8+F87xsQ6V8g2vcB4JQ R023xKHWy8x3gAyojYksAqpIyca1ex3bIGDfiRE5PHgpt0ys01QTu88Wu166SUOaOruH d5zj+5NuRya68gnCsZ0o0eIf5qvCDUqNF7RJCAhK+GP9bMiAiEbMfmY8dxzIxyApKMR7 uPWHsvVH9ZIE8VQmv89hQv1iBaPLvdS+mRJfkUTBaVsKxKGIhhpx/+wAGFjNYCJb8sqO Hxzw== ARC-Message-Signature: i=1; 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[104.188.17.28]) by smtp.gmail.com with ESMTPSA id h36sm3589304oth.37.2020.06.22.15.27.43 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 22 Jun 2020 15:27:44 -0700 (PDT) From: Bjorn Andersson To: Andy Gross , Bjorn Andersson , Dmitry Baryshkov , Manivannan Sadhasivam Cc: linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org Subject: [PATCH 6/6] arm64: defconfig: Enable Qualcomm IPCC driver Date: Mon, 22 Jun 2020 15:27:47 -0700 Message-Id: <20200622222747.717306-7-bjorn.andersson@linaro.org> X-Mailer: git-send-email 2.26.2 In-Reply-To: <20200622222747.717306-1-bjorn.andersson@linaro.org> References: <20200622222747.717306-1-bjorn.andersson@linaro.org> MIME-Version: 1.0 Sender: devicetree-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org The IPCC hardware block provides a mechanism for triggering interrupts between co-processors in recent Qualcomm SoCs. This is used as basis for most form of communication between co-processors, so enable this support. Signed-off-by: Bjorn Andersson --- arch/arm64/configs/defconfig | 1 + 1 file changed, 1 insertion(+) -- 2.26.2 diff --git a/arch/arm64/configs/defconfig b/arch/arm64/configs/defconfig index 5848799dcad0..b3d13e1a052a 100644 --- a/arch/arm64/configs/defconfig +++ b/arch/arm64/configs/defconfig @@ -834,6 +834,7 @@ CONFIG_IMX_MBOX=y CONFIG_PLATFORM_MHU=y CONFIG_BCM2835_MBOX=y CONFIG_QCOM_APCS_IPC=y +CONFIG_QCOM_IPCC=y CONFIG_ROCKCHIP_IOMMU=y CONFIG_TEGRA_IOMMU_SMMU=y CONFIG_ARM_SMMU=y