From patchwork Wed Jun 24 12:16:01 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Dan Murphy X-Patchwork-Id: 191645 Delivered-To: patch@linaro.org Received: by 2002:a92:1f07:0:0:0:0:0 with SMTP id i7csp532560ile; Wed, 24 Jun 2020 05:16:30 -0700 (PDT) X-Google-Smtp-Source: ABdhPJxnNPTisbB2uo4W+mDExaJUfqJiTvF5KcfJbha2xRLd9hO3L9YeqLF6CkClZBX5g9cmICqC X-Received: by 2002:a05:6402:2207:: with SMTP id cq7mr27362176edb.186.1593000990017; Wed, 24 Jun 2020 05:16:30 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1593000990; cv=none; d=google.com; s=arc-20160816; b=CZrBwOA272QljszrIjuwpDpJ6gAOH6XyRmQESg1VO9UdEUxi5tx9azH8tC3obKlS6X L4t3hj056De3lOu1aKK7h3NY1K797FFNiEh/U6dvgAJ+IAHhMqdMSOlsIWUZ0JM8EkNE mt78ZcDWKzNkjsngbdz5UXJqyjAr2B9/uSLjcbn2WUH6bPDwO9lNxdLOU7mLYxLSU0i2 8i1eysxL3gHzkC0KdDOCCJsmcuhUSP/PbQijb0gxGJgdD1jvSoXjxUO9OxowW1Uq6wcR 2VGOzRwWOYGjW9zMEydAb0t+9T8vFYBzsRCufklQi5JIiH2cySFlU3QQJkwj8xVV4Tpz NcWA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=NjHRGQyuPawgk7rsFcYQJon3wpp+3lTd1hxMTCsjXxs=; b=Vo9xNGnWPaP/js3WsXH91RFUOcSUBtp67Xwal0Z5xNrkUYryvIlpzaM14BbNZbeonD r1N2mIbjcevJoVziOAh5kLeq1KBfQKHZVkLH//J6z7WTMseMcnk9UGlQ+cHFXwnlYzCo VVq5NRMx99uauC39+Q3NZyXTtePCduGy+fWe93cmgAMeF7bniDW11SG8d+33xHWTtDhV RsYZ2GurdZA5eqZ2fhtRM0bPv7lmY7SFzWL3HQ/8QgnnpxEMD8MVRWD+Oc6P87TFPDD+ 2YCEs8FPLJtEYVg4ecYMIlDmZzhMpD8wKHsmTOitrKPmK231yE063K5FY58qfvRdg6ad C9ug== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@ti.com header.s=ti-com-17Q1 header.b=wZgsYrDc; spf=pass (google.com: domain of netdev-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=netdev-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=NONE dis=NONE) header.from=ti.com Return-Path: Received: from vger.kernel.org (vger.kernel.org. [23.128.96.18]) by mx.google.com with ESMTP id m17si13317464eds.189.2020.06.24.05.16.29; Wed, 24 Jun 2020 05:16:30 -0700 (PDT) Received-SPF: pass (google.com: domain of netdev-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18; Authentication-Results: mx.google.com; dkim=pass header.i=@ti.com header.s=ti-com-17Q1 header.b=wZgsYrDc; spf=pass (google.com: domain of netdev-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=netdev-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=NONE dis=NONE) header.from=ti.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S2390530AbgFXMQ0 (ORCPT + 9 others); Wed, 24 Jun 2020 08:16:26 -0400 Received: from lelv0143.ext.ti.com ([198.47.23.248]:43924 "EHLO lelv0143.ext.ti.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S2388296AbgFXMQY (ORCPT ); Wed, 24 Jun 2020 08:16:24 -0400 Received: from lelv0265.itg.ti.com ([10.180.67.224]) by lelv0143.ext.ti.com (8.15.2/8.15.2) with ESMTP id 05OCGHJp100308; Wed, 24 Jun 2020 07:16:17 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ti.com; s=ti-com-17Q1; t=1593000977; bh=NjHRGQyuPawgk7rsFcYQJon3wpp+3lTd1hxMTCsjXxs=; h=From:To:CC:Subject:Date:In-Reply-To:References; b=wZgsYrDcKEZoSfSUBSRF419WH3vJmF0UI9QZga2YeKfYOL2GQ+yaiP7mqGE5nJzXF 6hPdj2abt244nq2GjcZ3Y3ob+CljFCT7zsUCA4uSJQGCSA2IKPaFLgtXh8lNNekwvg DS2hi68ywqKKV+1tbo4BLRxPQecDXEjHNjp9xFWE= Received: from DFLE112.ent.ti.com (dfle112.ent.ti.com [10.64.6.33]) by lelv0265.itg.ti.com (8.15.2/8.15.2) with ESMTPS id 05OCGHXY069349 (version=TLSv1.2 cipher=AES256-GCM-SHA384 bits=256 verify=FAIL); Wed, 24 Jun 2020 07:16:17 -0500 Received: from DFLE101.ent.ti.com (10.64.6.22) by DFLE112.ent.ti.com (10.64.6.33) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.1979.3; Wed, 24 Jun 2020 07:16:17 -0500 Received: from lelv0326.itg.ti.com (10.180.67.84) by DFLE101.ent.ti.com (10.64.6.22) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.1979.3 via Frontend Transport; Wed, 24 Jun 2020 07:16:17 -0500 Received: from localhost (ileax41-snat.itg.ti.com [10.172.224.153]) by lelv0326.itg.ti.com (8.15.2/8.15.2) with ESMTP id 05OCGHqW056663; Wed, 24 Jun 2020 07:16:17 -0500 From: Dan Murphy To: , , , , CC: , , , Dan Murphy Subject: [PATCH net-next v11 1/5] dt-bindings: net: Add tx and rx internal delays Date: Wed, 24 Jun 2020 07:16:01 -0500 Message-ID: <20200624121605.18259-2-dmurphy@ti.com> X-Mailer: git-send-email 2.26.2 In-Reply-To: <20200624121605.18259-1-dmurphy@ti.com> References: <20200624121605.18259-1-dmurphy@ti.com> MIME-Version: 1.0 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 Sender: netdev-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: netdev@vger.kernel.org tx-internal-delays and rx-internal-delays are a common setting for RGMII capable devices. These properties are used when the phy-mode or phy-controller is set to rgmii-id, rgmii-rxid or rgmii-txid. These modes indicate to the controller that the PHY will add the internal delay for the connection. Signed-off-by: Dan Murphy --- .../devicetree/bindings/net/ethernet-phy.yaml | 12 ++++++++++++ 1 file changed, 12 insertions(+) -- 2.26.2 diff --git a/Documentation/devicetree/bindings/net/ethernet-phy.yaml b/Documentation/devicetree/bindings/net/ethernet-phy.yaml index 9b1f1147ca36..a9e547ac7905 100644 --- a/Documentation/devicetree/bindings/net/ethernet-phy.yaml +++ b/Documentation/devicetree/bindings/net/ethernet-phy.yaml @@ -162,6 +162,18 @@ properties: description: Specifies a reference to a node representing a SFP cage. + rx-internal-delay-ps: + description: | + RGMII Receive PHY Clock Delay defined in pico seconds. This is used for + PHY's that have configurable RX internal delays. If this property is + present then the PHY applies the RX delay. + + tx-internal-delay-ps: + description: | + RGMII Transmit PHY Clock Delay defined in pico seconds. This is used for + PHY's that have configurable TX internal delays. If this property is + present then the PHY applies the TX delay. + required: - reg From patchwork Wed Jun 24 12:16:03 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Dan Murphy X-Patchwork-Id: 191647 Delivered-To: patch@linaro.org Received: by 2002:a92:1f07:0:0:0:0:0 with SMTP id i7csp532846ile; Wed, 24 Jun 2020 05:16:49 -0700 (PDT) X-Google-Smtp-Source: ABdhPJyfBk8887JOr28P7H7w41bScPTKLlTqwO60M1pEw5sjUuFMRxDYGEGi7W8snESYavjimhCO X-Received: by 2002:a17:906:488b:: with SMTP id v11mr15981623ejq.173.1593001009712; Wed, 24 Jun 2020 05:16:49 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1593001009; cv=none; d=google.com; s=arc-20160816; b=o4/0l8KXcMJjgAUd8jUkl47OawN9V3nfiCaoI+jUyatLt3GTGBs4NS++SCuFQ79jNV 73FsC58Ci19seRlllTaV2p7RDKxsnpN9g1+fFVKvzmjIdJylIJW/ZtKXVDkLk37O/Cs8 Y1Qp+NcwYaThtG2iGWsRI/QRkFN2sPwNJqU1PQIAUoOQQvz3ERQypeRGN04XT/9SIlbp p3utmjxrkAP753+aakuIlzyFv+anlYfFnqVXK94hV7ELGpLWJEaER3Ldd2nzDj5aaXYr +tpsTOzYAsVfmXsuv1d974l9FoflEvbevVapnjtpCkSK3Cc6o6KzMZOa7An4zq5fLbxr FuIA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=eShyx82GLaQ3xsgsj9ve463coidBb5dHGAfrzfcrN0w=; b=IqDPNATb8mP8/CCr4C4173BfBC7DH1Kcd+qSzxE0Qti/X7YvOAFXD4/PmH2PAGTysa NqkuJsmrenUOM+c//Hr3eqetf1m25V4jpG9oXiPdL2DP7JhblwcQHEuuImLv/8Eoah5z oLbm0JeCD8jCR885DKYGqLEE77t3aNh/YsTb5XwYJHNxvTwRzQmltRS+qsSeAlYM+HPE HLu3fiNnJ+mAAJ5ZzZ0XgX7uMGZWkPFuvCSp6NH4beAbJ963pJ3t3lztwUMNYbMCHzzl +kulQzmJ0aZxs9az2Jgzvw4KWQlbhApQlmZK+HLHAjN8vrgAqae82jMYx7wuL2N3VoPO B8kg== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@ti.com header.s=ti-com-17Q1 header.b=NN1xC0Ws; spf=pass (google.com: domain of netdev-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=netdev-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=NONE dis=NONE) header.from=ti.com Return-Path: Received: from vger.kernel.org (vger.kernel.org. [23.128.96.18]) by mx.google.com with ESMTP id v16si7902562edr.93.2020.06.24.05.16.49; Wed, 24 Jun 2020 05:16:49 -0700 (PDT) Received-SPF: pass (google.com: domain of netdev-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18; Authentication-Results: mx.google.com; dkim=pass header.i=@ti.com header.s=ti-com-17Q1 header.b=NN1xC0Ws; spf=pass (google.com: domain of netdev-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=netdev-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=NONE dis=NONE) header.from=ti.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S2403866AbgFXMQn (ORCPT + 9 others); Wed, 24 Jun 2020 08:16:43 -0400 Received: from fllv0015.ext.ti.com ([198.47.19.141]:46674 "EHLO fllv0015.ext.ti.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S2403829AbgFXMQg (ORCPT ); Wed, 24 Jun 2020 08:16:36 -0400 Received: from fllv0034.itg.ti.com ([10.64.40.246]) by fllv0015.ext.ti.com (8.15.2/8.15.2) with ESMTP id 05OCGSKK035729; Wed, 24 Jun 2020 07:16:28 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ti.com; s=ti-com-17Q1; t=1593000988; bh=eShyx82GLaQ3xsgsj9ve463coidBb5dHGAfrzfcrN0w=; h=From:To:CC:Subject:Date:In-Reply-To:References; b=NN1xC0Ws5TO+UCo3mBnFyImKBMIHqx6bdPf6wFHGKK81ugPEGrTN+BKzWbN3xpLXO nWKZiqWQ/wT3O06z0cYEkEQ5YOhr9OoSwfatAiVzMAvqIsL2n/2uD73yJJ1sTkwvf/ bJa5zuRas02dzKeXjTxsI6c6LCjEY4RDrFt/CixQ= Received: from DLEE112.ent.ti.com (dlee112.ent.ti.com [157.170.170.23]) by fllv0034.itg.ti.com (8.15.2/8.15.2) with ESMTPS id 05OCGS7t021194 (version=TLSv1.2 cipher=AES256-GCM-SHA384 bits=256 verify=FAIL); Wed, 24 Jun 2020 07:16:28 -0500 Received: from DLEE102.ent.ti.com (157.170.170.32) by DLEE112.ent.ti.com (157.170.170.23) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.1979.3; Wed, 24 Jun 2020 07:16:28 -0500 Received: from lelv0326.itg.ti.com (10.180.67.84) by DLEE102.ent.ti.com (157.170.170.32) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.1979.3 via Frontend Transport; Wed, 24 Jun 2020 07:16:28 -0500 Received: from localhost (ileax41-snat.itg.ti.com [10.172.224.153]) by lelv0326.itg.ti.com (8.15.2/8.15.2) with ESMTP id 05OCGR6F056875; Wed, 24 Jun 2020 07:16:27 -0500 From: Dan Murphy To: , , , , CC: , , , Dan Murphy Subject: [PATCH net-next v11 3/5] dt-bindings: net: Add RGMII internal delay for DP83869 Date: Wed, 24 Jun 2020 07:16:03 -0500 Message-ID: <20200624121605.18259-4-dmurphy@ti.com> X-Mailer: git-send-email 2.26.2 In-Reply-To: <20200624121605.18259-1-dmurphy@ti.com> References: <20200624121605.18259-1-dmurphy@ti.com> MIME-Version: 1.0 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 Sender: netdev-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: netdev@vger.kernel.org Add the internal delay values into the header and update the binding with the internal delay properties. Signed-off-by: Dan Murphy --- .../devicetree/bindings/net/ti,dp83869.yaml | 16 +++++++++++++++- 1 file changed, 15 insertions(+), 1 deletion(-) -- 2.26.2 diff --git a/Documentation/devicetree/bindings/net/ti,dp83869.yaml b/Documentation/devicetree/bindings/net/ti,dp83869.yaml index 5b69ef03bbf7..71e90a3e4652 100644 --- a/Documentation/devicetree/bindings/net/ti,dp83869.yaml +++ b/Documentation/devicetree/bindings/net/ti,dp83869.yaml @@ -8,7 +8,7 @@ $schema: "http://devicetree.org/meta-schemas/core.yaml#" title: TI DP83869 ethernet PHY allOf: - - $ref: "ethernet-controller.yaml#" + - $ref: "ethernet-phy.yaml#" maintainers: - Dan Murphy @@ -64,6 +64,18 @@ properties: Operational mode for the PHY. If this is not set then the operational mode is set by the straps. see dt-bindings/net/ti-dp83869.h for values + rx-internal-delay-ps: + description: Delay is in pico seconds + enum: [ 250, 500, 750, 1000, 1250, 1500, 1750, 2000, 2250, 2500, 2750, 3000, + 3250, 3500, 3750, 4000 ] + default: 2000 + + tx-internal-delay-ps: + description: Delay is in pico seconds + enum: [ 250, 500, 750, 1000, 1250, 1500, 1750, 2000, 2250, 2500, 2750, 3000, + 3250, 3500, 3750, 4000 ] + default: 2000 + required: - reg @@ -80,5 +92,7 @@ examples: ti,op-mode = ; ti,max-output-impedance = "true"; ti,clk-output-sel = ; + rx-internal-delay-ps = <2000>; + tx-internal-delay-ps = <2000>; }; }; From patchwork Wed Jun 24 12:16:04 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Dan Murphy X-Patchwork-Id: 191649 Delivered-To: patch@linaro.org Received: by 2002:a92:1f07:0:0:0:0:0 with SMTP id i7csp533134ile; Wed, 24 Jun 2020 05:17:04 -0700 (PDT) X-Google-Smtp-Source: ABdhPJx/eN1TNrirkEZA22AtrF3n79qZ+R9A9rKdxXrC7N1KBSTJrBWsRi3OHXQ8RSa9QKW/i/t/ X-Received: by 2002:aa7:c3d7:: with SMTP id l23mr26072780edr.264.1593001024652; Wed, 24 Jun 2020 05:17:04 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1593001024; cv=none; d=google.com; s=arc-20160816; b=MpTEKSrQw5py/rpB9gK0BavK3dHDOrfth0UGKgqHv1JC7zXgqGGEudUvTXjUVq82H1 ivqbpX3edD//NC8nWl0U8lhXBGXV+X8+DvHHJO3rVD+CjggY0nQdLaE8N/ZKXNAYJw/i vjn0M8srho2teRewRtMMd/QFe1WXTCu0G/Btf+FCXjcoKjW4A569o2Ui1lnC/l/dv6H4 piJyy3juJyXGAWEvYgHLYapFGGG1Snh9st51Jxs5elwhb5dYVusNhi9TYrxJRcqxla/N MLSoWJLqzcQcuH7tRgQxdMz2Y7JqQKiz5Z7OSxt2tm/Wfi1gFwsPDxJE0uFwQQURS4Em CNqQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=iLdvMCbgjuB3IvjEffc3VbBTcvc2wltvJLix5r4FFus=; b=ZakV42yzPwXnBvB/yLySKQrA1o1iLL6sHRRNozaO9BDRpS79eu8ddNnyUFMdttKiCS CXvZ3nDH8X7rbv3rZzKO2wNMMmHjJB5YsdL3WWqLS8DheHvifwDInzBPSOHf/DPZfvUZ sJ4RaHaB3U/1K5wA8AVoCrjRAu6Yr6ek/WcH9++13YSc/t2znjEsK/HHAVp/d2kV1Gzd mT73ACDpwecAw0zhbqJ0kIuTuyqxne+mtCM0yFj7v5D6NiVge0FEToqqdF6IXThONFKw rL5LVvvxXL8F6gN9cR50nzj8r1pAAj5ChgCrXvbiFu0KzhZO7f6u6ZayDjdSVbcgk/ao A2oQ== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@ti.com header.s=ti-com-17Q1 header.b=x0pLiyZ5; spf=pass (google.com: domain of netdev-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=netdev-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=NONE dis=NONE) header.from=ti.com Return-Path: Received: from vger.kernel.org (vger.kernel.org. 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Signed-off-by: Dan Murphy --- drivers/net/phy/dp83869.c | 53 ++++++++++++++++++++++++++++++++++++--- 1 file changed, 50 insertions(+), 3 deletions(-) -- 2.26.2 diff --git a/drivers/net/phy/dp83869.c b/drivers/net/phy/dp83869.c index 53ed3abc26c9..58103152c601 100644 --- a/drivers/net/phy/dp83869.c +++ b/drivers/net/phy/dp83869.c @@ -64,6 +64,10 @@ #define DP83869_RGMII_TX_CLK_DELAY_EN BIT(1) #define DP83869_RGMII_RX_CLK_DELAY_EN BIT(0) +/* RGMIIDCTL */ +#define DP83869_RGMII_CLK_DELAY_SHIFT 4 +#define DP83869_CLK_DELAY_DEF 7 + /* STRAP_STS1 bits */ #define DP83869_STRAP_OP_MODE_MASK GENMASK(2, 0) #define DP83869_STRAP_STS1_RESERVED BIT(11) @@ -78,9 +82,6 @@ #define DP83869_PHYCR_FIFO_DEPTH_MASK GENMASK(15, 12) #define DP83869_PHYCR_RESERVED_MASK BIT(11) -/* RGMIIDCTL bits */ -#define DP83869_RGMII_TX_CLK_DELAY_SHIFT 4 - /* IO_MUX_CFG bits */ #define DP83869_IO_MUX_CFG_IO_IMPEDANCE_CTRL 0x1f @@ -108,6 +109,8 @@ enum { struct dp83869_private { int tx_fifo_depth; int rx_fifo_depth; + s32 rx_int_delay; + s32 tx_int_delay; int io_impedance; int port_mirroring; bool rxctrl_strap_quirk; @@ -177,11 +180,16 @@ static int dp83869_set_strapped_mode(struct phy_device *phydev) } #if IS_ENABLED(CONFIG_OF_MDIO) +static const int dp83869_internal_delay[] = {250, 500, 750, 1000, 1250, 1500, + 1750, 2000, 2250, 2500, 2750, 3000, + 3250, 3500, 3750, 4000}; + static int dp83869_of_init(struct phy_device *phydev) { struct dp83869_private *dp83869 = phydev->priv; struct device *dev = &phydev->mdio.dev; struct device_node *of_node = dev->of_node; + int delay_size = ARRAY_SIZE(dp83869_internal_delay); int ret; if (!of_node) @@ -235,6 +243,20 @@ static int dp83869_of_init(struct phy_device *phydev) &dp83869->tx_fifo_depth)) dp83869->tx_fifo_depth = DP83869_PHYCR_FIFO_DEPTH_4_B_NIB; + dp83869->rx_int_delay = phy_get_internal_delay(phydev, dev, + &dp83869_internal_delay[0], + delay_size, true); + if (dp83869->rx_int_delay < 0) + dp83869->rx_int_delay = + dp83869_internal_delay[DP83869_CLK_DELAY_DEF]; + + dp83869->tx_int_delay = phy_get_internal_delay(phydev, dev, + &dp83869_internal_delay[0], + delay_size, false); + if (dp83869->tx_int_delay < 0) + dp83869->tx_int_delay = + dp83869_internal_delay[DP83869_CLK_DELAY_DEF]; + return ret; } #else @@ -397,6 +419,31 @@ static int dp83869_config_init(struct phy_device *phydev) dp83869->clk_output_sel << DP83869_IO_MUX_CFG_CLK_O_SEL_SHIFT); + if (phy_interface_is_rgmii(phydev)) { + ret = phy_write_mmd(phydev, DP83869_DEVADDR, DP83869_RGMIIDCTL, + dp83869->rx_int_delay | + dp83869->tx_int_delay << DP83869_RGMII_CLK_DELAY_SHIFT); + if (ret) + return ret; + + val = phy_read_mmd(phydev, DP83869_DEVADDR, DP83869_RGMIICTL); + val &= ~(DP83869_RGMII_TX_CLK_DELAY_EN | + DP83869_RGMII_RX_CLK_DELAY_EN); + + if (phydev->interface == PHY_INTERFACE_MODE_RGMII_ID) + val |= (DP83869_RGMII_TX_CLK_DELAY_EN | + DP83869_RGMII_RX_CLK_DELAY_EN); + + if (phydev->interface == PHY_INTERFACE_MODE_RGMII_TXID) + val |= DP83869_RGMII_TX_CLK_DELAY_EN; + + if (phydev->interface == PHY_INTERFACE_MODE_RGMII_RXID) + val |= DP83869_RGMII_RX_CLK_DELAY_EN; + + ret = phy_write_mmd(phydev, DP83869_DEVADDR, DP83869_RGMIICTL, + val); + } + return ret; }