From patchwork Tue Jun 30 09:27:27 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Roger Quadros X-Patchwork-Id: 192059 Delivered-To: patch@linaro.org Received: by 2002:a92:d244:0:0:0:0:0 with SMTP id v4csp3645557ilg; Tue, 30 Jun 2020 02:27:49 -0700 (PDT) X-Google-Smtp-Source: ABdhPJxSE5iT2P2ED+QBohzS/5HqmtbLLhuHnklGYlPGZXQHR8HzYEEOt/+2iQfmPGMxfb+0Year X-Received: by 2002:a17:906:1e85:: with SMTP id e5mr9742718ejj.76.1593509269309; Tue, 30 Jun 2020 02:27:49 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1593509269; cv=none; d=google.com; s=arc-20160816; b=COsjOs2miLe8t0JkBO0hIfPWrvw2g6vnbEZlG++Z5B+ENE8b+wVU7ounFUciqvS8iF 53xtzjIxIg60T2sUpVE2200Str8pymdv+SbK3bxijR80uBsHhGzZtLhEsj6jSiOcO5R/ DaDbopYA9cKRnsaoePAuo02AN5xmPHX+z9Ei9IgILPce04eB4U86WJAZicE9H9R8Jdah D8RZ8hCXbNma0LAveAKtmrXi9hcmJiDUBHTC7VFDi46MhiKpyI/VbABLqkqKGVO4Mrzi VQi9LIFips25QvHNOY/+4tigiy2+fQ+rbqsOIq2bcwB3Dmb/flMSbcWmaA+bK5wdk+8e bNrQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:dkim-signature; bh=pvl+6jxJ10VHtJcOvzDKdRz7owlVjuvry8eZ4PbPrnE=; b=RoBROlq2rEwY9rxf39pcJpPPOxkUMEuqaj03P3iHoGDbiZHAlNNr8IXEbzRzzXIgSS FNnc+59Qd7BH6eSF8KDIHM6/ontFaHwfa5CrEIekdpc7P6TCmEwB+nnS9HDW/D6igTcl YwU+R5zSTtRolAZ8zRKFmAMyzN91Hwx18ZeED+2qtHrhMpnFwXarnwKKN1/wsFZg5n7U HSis8LV+dm6kl49u3QWZncqlfG+O3PXfKL4Dw+suIim1lY1njHoCRnoo8y71qo/1kHsl Ba8J7a7WCTwv/kdtfpM+Q2edi8Cqe5KvDYgazxHlxdWsVZFsRrUxoYNUTUxwu3V7c1A6 56fw== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@ti.com header.s=ti-com-17Q1 header.b=dNZsMCPM; spf=pass (google.com: domain of devicetree-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=NONE dis=NONE) header.from=ti.com Return-Path: Received: from vger.kernel.org (vger.kernel.org. [23.128.96.18]) by mx.google.com with ESMTP id o16si1418394edv.45.2020.06.30.02.27.49; Tue, 30 Jun 2020 02:27:49 -0700 (PDT) Received-SPF: pass (google.com: domain of devicetree-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18; Authentication-Results: mx.google.com; dkim=pass header.i=@ti.com header.s=ti-com-17Q1 header.b=dNZsMCPM; spf=pass (google.com: domain of devicetree-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=NONE dis=NONE) header.from=ti.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1731977AbgF3J1l (ORCPT + 6 others); Tue, 30 Jun 2020 05:27:41 -0400 Received: from lelv0142.ext.ti.com ([198.47.23.249]:36016 "EHLO lelv0142.ext.ti.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1731958AbgF3J1h (ORCPT ); Tue, 30 Jun 2020 05:27:37 -0400 Received: from fllv0034.itg.ti.com ([10.64.40.246]) by lelv0142.ext.ti.com (8.15.2/8.15.2) with ESMTP id 05U9RZxE101555; Tue, 30 Jun 2020 04:27:35 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ti.com; s=ti-com-17Q1; t=1593509255; bh=pvl+6jxJ10VHtJcOvzDKdRz7owlVjuvry8eZ4PbPrnE=; h=From:To:CC:Subject:Date:In-Reply-To:References; b=dNZsMCPMx0SH6kM39AN+AGCidw746KQGm9hrsBbVWIvVwAiB2/y4lR8dXKmH1ro/o j07RQiUpBhRhIkgTojEK55aE+ojLl1u/M+LFh4kx6H9cSlPwn2FFm7xab8+EkMnNfA NGcP8duGPlxc7vluKGq47ip9o/yb+AV9FjrdjEwc= Received: from DFLE114.ent.ti.com (dfle114.ent.ti.com [10.64.6.35]) by fllv0034.itg.ti.com (8.15.2/8.15.2) with ESMTPS id 05U9RZ4l123422 (version=TLSv1.2 cipher=AES256-GCM-SHA384 bits=256 verify=FAIL); Tue, 30 Jun 2020 04:27:35 -0500 Received: from DFLE115.ent.ti.com (10.64.6.36) by DFLE114.ent.ti.com (10.64.6.35) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.1979.3; Tue, 30 Jun 2020 04:27:35 -0500 Received: from lelv0326.itg.ti.com (10.180.67.84) by DFLE115.ent.ti.com (10.64.6.36) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.1979.3 via Frontend Transport; Tue, 30 Jun 2020 04:27:34 -0500 Received: from lta0400828a.ti.com (ileax41-snat.itg.ti.com [10.172.224.153]) by lelv0326.itg.ti.com (8.15.2/8.15.2) with ESMTP id 05U9RUU5003947; Tue, 30 Jun 2020 04:27:33 -0500 From: Roger Quadros To: CC: , , , , , Roger Quadros Subject: [PATCH v3 1/3] dt-binding: phy: convert ti,omap-usb2 to YAML Date: Tue, 30 Jun 2020 12:27:27 +0300 Message-ID: <20200630092729.15346-2-rogerq@ti.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20200630092729.15346-1-rogerq@ti.com> References: <20200630092729.15346-1-rogerq@ti.com> MIME-Version: 1.0 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 Sender: devicetree-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Move ti,omap-usb2 to its own YAML schema. Signed-off-by: Roger Quadros Reviewed-by: Rob Herring --- .../devicetree/bindings/phy/ti,omap-usb2.yaml | 69 +++++++++++++++++++ .../devicetree/bindings/phy/ti-phy.txt | 37 ---------- 2 files changed, 69 insertions(+), 37 deletions(-) create mode 100644 Documentation/devicetree/bindings/phy/ti,omap-usb2.yaml -- Texas Instruments Finland Oy, Porkkalankatu 22, 00180 Helsinki. Y-tunnus/Business ID: 0615521-4. Kotipaikka/Domicile: Helsinki diff --git a/Documentation/devicetree/bindings/phy/ti,omap-usb2.yaml b/Documentation/devicetree/bindings/phy/ti,omap-usb2.yaml new file mode 100644 index 000000000000..8df74629dc55 --- /dev/null +++ b/Documentation/devicetree/bindings/phy/ti,omap-usb2.yaml @@ -0,0 +1,69 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/phy/ti,omap-usb2.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: OMAP USB2 PHY + +maintainers: + - Kishon Vijay Abraham I + - Roger Quadros + +properties: + compatible: + items: + - enum: + - ti,dra7x-usb2 + - ti,dra7x-usb2-phy2a + - ti,am654-usb2 + - enum: + - ti,omap-usb2 + + reg: + maxItems: 1 + + '#phy-cells': + const: 0 + + clocks: + minItems: 1 + items: + - description: wakeup clock + - description: reference clock + + clock-names: + minItems: 1 + items: + - const: wkupclk + - const: refclk + + syscon-phy-power: + $ref: /schemas/types.yaml#definitions/phandle-array + description: + phandle/offset pair. Phandle to the system control module and + register offset to power on/off the PHY. + + ctrl-module: + $ref: /schemas/types.yaml#definitions/phandle + description: + (deprecated) phandle of the control module used by PHY driver + to power on the PHY. Use syscon-phy-power instead. + +required: + - compatible + - reg + - '#phy-cells' + - clocks + - clock-names + +examples: + - | + usb0_phy: phy@4100000 { + compatible = "ti,am654-usb2", "ti,omap-usb2"; + reg = <0x0 0x4100000 0x0 0x54>; + syscon-phy-power = <&scm_conf 0x4000>; + clocks = <&k3_clks 151 0>, <&k3_clks 151 1>; + clock-names = "wkupclk", "refclk"; + #phy-cells = <0>; + }; diff --git a/Documentation/devicetree/bindings/phy/ti-phy.txt b/Documentation/devicetree/bindings/phy/ti-phy.txt index 8f93c3b694a7..60c9d0ac75e6 100644 --- a/Documentation/devicetree/bindings/phy/ti-phy.txt +++ b/Documentation/devicetree/bindings/phy/ti-phy.txt @@ -27,43 +27,6 @@ omap_control_usb: omap-control-usb@4a002300 { reg-names = "otghs_control"; }; -OMAP USB2 PHY - -Required properties: - - compatible: Should be "ti,omap-usb2" - Should be "ti,dra7x-usb2" for the 1st instance of USB2 PHY on - DRA7x - Should be "ti,dra7x-usb2-phy2" for the 2nd instance of USB2 PHY - in DRA7x - Should be "ti,am654-usb2" for the USB2 PHYs on AM654. - - reg : Address and length of the register set for the device. - - #phy-cells: determine the number of cells that should be given in the - phandle while referencing this phy. - - clocks: a list of phandles and clock-specifier pairs, one for each entry in - clock-names. - - clock-names: should include: - * "wkupclk" - wakeup clock. - * "refclk" - reference clock (optional). - -Deprecated properties: - - ctrl-module : phandle of the control module used by PHY driver to power on - the PHY. - -Recommended properies: -- syscon-phy-power : phandle/offset pair. Phandle to the system control - module and the register offset to power on/off the PHY. - -This is usually a subnode of ocp2scp to which it is connected. - -usb2phy@4a0ad080 { - compatible = "ti,omap-usb2"; - reg = <0x4a0ad080 0x58>; - ctrl-module = <&omap_control_usb>; - #phy-cells = <0>; - clocks = <&usb_phy_cm_clk32k>, <&usb_otg_ss_refclk960m>; - clock-names = "wkupclk", "refclk"; -}; - TI PIPE3 PHY Required properties: From patchwork Tue Jun 30 09:27:28 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Roger Quadros X-Patchwork-Id: 192058 Delivered-To: patch@linaro.org Received: by 2002:a92:d244:0:0:0:0:0 with SMTP id v4csp3645484ilg; Tue, 30 Jun 2020 02:27:42 -0700 (PDT) X-Google-Smtp-Source: ABdhPJxISSbz540GThfLPmz1gtTYk7MzW3Ht0nfhWeo51s5xz1TYgh+UtykuHeUPP5/rImJFN4ia X-Received: by 2002:a17:906:5006:: with SMTP id s6mr17030340ejj.294.1593509262385; Tue, 30 Jun 2020 02:27:42 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1593509262; cv=none; d=google.com; s=arc-20160816; b=mKTdHpHvDZmlKM+i2KLe5PEJfS5omUYQcroVW7IiWEiXBHqRzSMIgFXpIz1ywRgW0H pu30Up7DWHzpbIhcTVULK5y6FffBWOPtlW+DRpVvezCODyHd19im9mZVJS+FV/FUxjLu 5XxVh1AJSLfq8f57+RNqlEWu1rtZ7W1fajMFquo3x6NHR5aMndItJFCthG3S75UPQrwL PcnKe47qkBM+df9MUTPljrHYUpKaMR13mF2hVHR+EA4dIoLH3pyilbfPMAxdTscfz8dr hbR4aR2hosDajwHtnxv50Qav9bkNI/aweD0Cg53wtWSkbPCFfSiNjrYDDiev+aR/waik vbuw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:dkim-signature; bh=x14r7XrArKBd6hn4PjqfuyEvnabv6/oxd2++qFqcTmQ=; b=cB0ctJqpl3fqGoiNWIOjoIXsryHVM0CgAtl5+p9Dk8Firr27ONqLMEEHutPYxIHqnx ec0aZO1S/OFgC1AOQk/Gt5Fi9AkgEMQmdKNvE1Sh2jkqCPi8Z4ub1iOIGYTfiu8OJNpL emRR0WyNA79Wqja+feGEMIPSZF1LRLT+2q3MzCuVHhEmy0efs1v2ykp6nYL995IC3ZXv LVAN6tAh/5IvgEEznYqJmUkMVcNjs8tb4WEcKz4/kmEK0gnfQJ2rr1No4MmalZivxdJ/ o91+IqfdQTCHnVFJa1WFi+L7fMuvAtSNkGESe3rHkJiB9YWo/RghwJZQcOgVDktqcOVU 8Bag== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@ti.com header.s=ti-com-17Q1 header.b="e3m/5ZTP"; spf=pass (google.com: domain of devicetree-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=NONE dis=NONE) header.from=ti.com Return-Path: Received: from vger.kernel.org (vger.kernel.org. [23.128.96.18]) by mx.google.com with ESMTP id y11si1390813ejw.645.2020.06.30.02.27.42; Tue, 30 Jun 2020 02:27:42 -0700 (PDT) Received-SPF: pass (google.com: domain of devicetree-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18; Authentication-Results: mx.google.com; dkim=pass header.i=@ti.com header.s=ti-com-17Q1 header.b="e3m/5ZTP"; spf=pass (google.com: domain of devicetree-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=NONE dis=NONE) header.from=ti.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1731975AbgF3J1l (ORCPT + 6 others); Tue, 30 Jun 2020 05:27:41 -0400 Received: from fllv0015.ext.ti.com ([198.47.19.141]:46524 "EHLO fllv0015.ext.ti.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1731969AbgF3J1j (ORCPT ); Tue, 30 Jun 2020 05:27:39 -0400 Received: from lelv0266.itg.ti.com ([10.180.67.225]) by fllv0015.ext.ti.com (8.15.2/8.15.2) with ESMTP id 05U9RbXX046413; Tue, 30 Jun 2020 04:27:37 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ti.com; s=ti-com-17Q1; t=1593509257; bh=x14r7XrArKBd6hn4PjqfuyEvnabv6/oxd2++qFqcTmQ=; h=From:To:CC:Subject:Date:In-Reply-To:References; b=e3m/5ZTPk56CD7Ct4s9xO8Fyn0ficgyMzMZSU9vC6plneSRCXg70fzwxUA32E8YeC J936Y8yuOTIGAdGb7xkOv6ygk9ygmL8i4Obs1QLt5keEf4bj3BkWKAGXL4Wbt25bvP /+pcLUCJYnx9jIqUpmE2GMvgC5lpjXbZeNbrD7VA= Received: from DLEE108.ent.ti.com (dlee108.ent.ti.com [157.170.170.38]) by lelv0266.itg.ti.com (8.15.2/8.15.2) with ESMTPS id 05U9Rbso006078 (version=TLSv1.2 cipher=AES256-GCM-SHA384 bits=256 verify=FAIL); Tue, 30 Jun 2020 04:27:37 -0500 Received: from DLEE110.ent.ti.com (157.170.170.21) by DLEE108.ent.ti.com (157.170.170.38) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.1979.3; Tue, 30 Jun 2020 04:27:37 -0500 Received: from lelv0326.itg.ti.com (10.180.67.84) by DLEE110.ent.ti.com (157.170.170.21) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.1979.3 via Frontend Transport; Tue, 30 Jun 2020 04:27:37 -0500 Received: from lta0400828a.ti.com (ileax41-snat.itg.ti.com [10.172.224.153]) by lelv0326.itg.ti.com (8.15.2/8.15.2) with ESMTP id 05U9RUU6003947; Tue, 30 Jun 2020 04:27:35 -0500 From: Roger Quadros To: CC: , , , , , Roger Quadros Subject: [PATCH v3 2/3] dt-binding: phy: ti, omap-usb2: Add quirk to disable charger detection Date: Tue, 30 Jun 2020 12:27:28 +0300 Message-ID: <20200630092729.15346-3-rogerq@ti.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20200630092729.15346-1-rogerq@ti.com> References: <20200630092729.15346-1-rogerq@ti.com> MIME-Version: 1.0 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 Sender: devicetree-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Add "ti,disable-charger-det" property to disable the USB2_PHY Charger Detect logic. Signed-off-by: Roger Quadros Reviewed-by: Rob Herring --- Documentation/devicetree/bindings/phy/ti,omap-usb2.yaml | 5 +++++ 1 file changed, 5 insertions(+) -- Texas Instruments Finland Oy, Porkkalankatu 22, 00180 Helsinki. Y-tunnus/Business ID: 0615521-4. Kotipaikka/Domicile: Helsinki diff --git a/Documentation/devicetree/bindings/phy/ti,omap-usb2.yaml b/Documentation/devicetree/bindings/phy/ti,omap-usb2.yaml index 8df74629dc55..a454e3e573cf 100644 --- a/Documentation/devicetree/bindings/phy/ti,omap-usb2.yaml +++ b/Documentation/devicetree/bindings/phy/ti,omap-usb2.yaml @@ -50,6 +50,11 @@ properties: (deprecated) phandle of the control module used by PHY driver to power on the PHY. Use syscon-phy-power instead. + ti,disable-charger-det: + description: + if present, driver will disable charger detection logic. + type: boolean + required: - compatible - reg From patchwork Tue Jun 30 09:27:29 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Roger Quadros X-Patchwork-Id: 192060 Delivered-To: patch@linaro.org Received: by 2002:a92:d244:0:0:0:0:0 with SMTP id v4csp3645572ilg; Tue, 30 Jun 2020 02:27:50 -0700 (PDT) X-Google-Smtp-Source: ABdhPJz9+qDjMDrVVgtk96/u5Nhkc11tZUpPa4df6ynPA4g9Aur5iD9NnKpyRhblLrmpM7GhHTyE X-Received: by 2002:a17:907:1050:: with SMTP id oy16mr18265734ejb.353.1593509270008; Tue, 30 Jun 2020 02:27:50 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1593509270; cv=none; d=google.com; s=arc-20160816; b=B45SxajHt1ikeo7ilcHZWgMILat6siuchQndvW/0aoiKuUcy63SC6BZBVs42gTMN0q T6hmmZsM8CVHxKR+nhNkZtVnUNd9Vvkk7DAfOfjhhXUlKtWEeA1X/rP+N2qs46STkRmm sP0XPgFj+DmWxJupJbxJIpY21cOVMwZOmnRWDA56+QZ2xboTJqE6zQ16kmOImEXO0w/q 8DiIxliBWy5pRpNghrr8ILXgKKHokiN7WIiMOnpv9d2U7eSs15bZmZ6JI896Y7AQwQ4E u2qiXcKhje+zG+7oHk074RBaoQmVz6KIRRw7a4iMqb6xne7aHR9udkVkbhSx2u0D+Tfa OYKw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:dkim-signature; bh=gtnBfikQgeKFXoCbSTClfcF4fEw+NTU1+ewwsYoy6H0=; b=pPvIr/i2S9kDl7dZsUwJnHVUdB1pr4iT+vYi9iCsRaOqWtLOVa7TSRmPD9jSijpmXc 7p9MeNGFp7tHD+DOf39xxZEgrfqQVT0rXGuzE063YBl5EICHOtMRbZrica058a9cSdZW uxVQT+FWCnyJ4+yA0Cz4tnJyMv6BZ4ywp/RR2Ia+GjGLPNfgviHVk4afJUwr+8gJowXG 9ih5+J0TkH8UN7//Oxc67fjXDIh5a+8BRxqcn2AYMcw978TMf7XyKQL2dhSxHg7aG9QB RI11EZ1wTjJ0B17P4z+qyhXwMA8uX2dVWtoqGpTfwo5IiJsudKR/Pz+NB9cSmIAoFAPE Ryhw== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@ti.com header.s=ti-com-17Q1 header.b=J4PMh6rF; spf=pass (google.com: domain of devicetree-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=NONE dis=NONE) header.from=ti.com Return-Path: Received: from vger.kernel.org (vger.kernel.org. [23.128.96.18]) by mx.google.com with ESMTP id o16si1418394edv.45.2020.06.30.02.27.49; Tue, 30 Jun 2020 02:27:50 -0700 (PDT) Received-SPF: pass (google.com: domain of devicetree-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18; Authentication-Results: mx.google.com; dkim=pass header.i=@ti.com header.s=ti-com-17Q1 header.b=J4PMh6rF; spf=pass (google.com: domain of devicetree-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=NONE dis=NONE) header.from=ti.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1731937AbgF3J1s (ORCPT + 6 others); Tue, 30 Jun 2020 05:27:48 -0400 Received: from lelv0143.ext.ti.com ([198.47.23.248]:46420 "EHLO lelv0143.ext.ti.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1730256AbgF3J1l (ORCPT ); Tue, 30 Jun 2020 05:27:41 -0400 Received: from lelv0265.itg.ti.com ([10.180.67.224]) by lelv0143.ext.ti.com (8.15.2/8.15.2) with ESMTP id 05U9RdIN080172; Tue, 30 Jun 2020 04:27:39 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ti.com; s=ti-com-17Q1; t=1593509259; bh=gtnBfikQgeKFXoCbSTClfcF4fEw+NTU1+ewwsYoy6H0=; h=From:To:CC:Subject:Date:In-Reply-To:References; b=J4PMh6rFDjB92KyKCwMoRcTM8jcci1MAVpb3Q61G3lGW62GHNmN+DcZmZ7NIGVckf DU6vEWL+gtp+aB7ghrp52ZgIPEI82uINK2mO2ccsyV4qWyBPvJ+1Zp/9CKDB1W9ITX KGuQZsNwJxVDe1Dkkx9ZjWq/iLKnTz+0LCeV9qoc= Received: from DLEE108.ent.ti.com (dlee108.ent.ti.com [157.170.170.38]) by lelv0265.itg.ti.com (8.15.2/8.15.2) with ESMTPS id 05U9RdCq030347 (version=TLSv1.2 cipher=AES256-GCM-SHA384 bits=256 verify=FAIL); Tue, 30 Jun 2020 04:27:39 -0500 Received: from DLEE102.ent.ti.com (157.170.170.32) by DLEE108.ent.ti.com (157.170.170.38) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.1979.3; Tue, 30 Jun 2020 04:27:39 -0500 Received: from lelv0326.itg.ti.com (10.180.67.84) by DLEE102.ent.ti.com (157.170.170.32) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.1979.3 via Frontend Transport; Tue, 30 Jun 2020 04:27:39 -0500 Received: from lta0400828a.ti.com (ileax41-snat.itg.ti.com [10.172.224.153]) by lelv0326.itg.ti.com (8.15.2/8.15.2) with ESMTP id 05U9RUU7003947; Tue, 30 Jun 2020 04:27:37 -0500 From: Roger Quadros To: CC: , , , , , Roger Quadros , Bin Liu Subject: [PATCH v3 3/3] phy: omap-usb2-phy: disable PHY charger detect Date: Tue, 30 Jun 2020 12:27:29 +0300 Message-ID: <20200630092729.15346-4-rogerq@ti.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20200630092729.15346-1-rogerq@ti.com> References: <20200630092729.15346-1-rogerq@ti.com> MIME-Version: 1.0 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 Sender: devicetree-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org AM654x PG1.0 has a silicon bug that D+ is pulled high after POR, which could cause enumeration failure with some USB hubs. Disabling the USB2_PHY Charger Detect function will put D+ into the normal state. Using property "ti,disable-charger-det" in the DT usb2-phy node to enable this workaround for AM654x PG1.0. This addresses Silicon Errata: i2075 - "USB2PHY: USB2PHY Charger Detect is Enabled by Default Without VBUS Presence" Signed-off-by: Bin Liu Signed-off-by: Sekhar Nori Signed-off-by: Roger Quadros --- drivers/phy/ti/phy-omap-usb2.c | 35 +++++++++++++++++++++++++++------- 1 file changed, 28 insertions(+), 7 deletions(-) -- Texas Instruments Finland Oy, Porkkalankatu 22, 00180 Helsinki. Y-tunnus/Business ID: 0615521-4. Kotipaikka/Domicile: Helsinki diff --git a/drivers/phy/ti/phy-omap-usb2.c b/drivers/phy/ti/phy-omap-usb2.c index cb2dd3230fa7..21c3904d4efc 100644 --- a/drivers/phy/ti/phy-omap-usb2.c +++ b/drivers/phy/ti/phy-omap-usb2.c @@ -26,6 +26,10 @@ #define USB2PHY_ANA_CONFIG1 0x4c #define USB2PHY_DISCON_BYP_LATCH BIT(31) +#define USB2PHY_CHRG_DET 0x14 +#define USB2PHY_CHRG_DET_USE_CHG_DET_REG BIT(29) +#define USB2PHY_CHRG_DET_DIS_CHG_DET BIT(28) + /* SoC Specific USB2_OTG register definitions */ #define AM654_USB2_OTG_PD BIT(8) #define AM654_USB2_VBUS_DET_EN BIT(5) @@ -43,6 +47,7 @@ #define OMAP_USB2_HAS_START_SRP BIT(0) #define OMAP_USB2_HAS_SET_VBUS BIT(1) #define OMAP_USB2_CALIBRATE_FALSE_DISCONNECT BIT(2) +#define OMAP_USB2_DISABLE_CHRG_DET BIT(3) struct omap_usb { struct usb_phy phy; @@ -236,6 +241,13 @@ static int omap_usb_init(struct phy *x) omap_usb_writel(phy->phy_base, USB2PHY_ANA_CONFIG1, val); } + if (phy->flags & OMAP_USB2_DISABLE_CHRG_DET) { + val = omap_usb_readl(phy->phy_base, USB2PHY_CHRG_DET); + val |= USB2PHY_CHRG_DET_USE_CHG_DET_REG | + USB2PHY_CHRG_DET_DIS_CHG_DET; + omap_usb_writel(phy->phy_base, USB2PHY_CHRG_DET, val); + } + return 0; } @@ -366,14 +378,12 @@ static int omap_usb2_probe(struct platform_device *pdev) phy->mask = phy_data->mask; phy->power_on = phy_data->power_on; phy->power_off = phy_data->power_off; + phy->flags = phy_data->flags; - if (phy_data->flags & OMAP_USB2_CALIBRATE_FALSE_DISCONNECT) { - res = platform_get_resource(pdev, IORESOURCE_MEM, 0); - phy->phy_base = devm_ioremap_resource(&pdev->dev, res); - if (IS_ERR(phy->phy_base)) - return PTR_ERR(phy->phy_base); - phy->flags |= OMAP_USB2_CALIBRATE_FALSE_DISCONNECT; - } + res = platform_get_resource(pdev, IORESOURCE_MEM, 0); + phy->phy_base = devm_ioremap_resource(&pdev->dev, res); + if (IS_ERR(phy->phy_base)) + return PTR_ERR(phy->phy_base); phy->syscon_phy_power = syscon_regmap_lookup_by_phandle(node, "syscon-phy-power"); @@ -405,6 +415,17 @@ static int omap_usb2_probe(struct platform_device *pdev) } } + /* + * Errata i2075: USB2PHY: USB2PHY Charger Detect is Enabled by + * Default Without VBUS Presence. + * + * AM654x SR1.0 has a silicon bug due to which D+ is pulled high after + * POR, which could cause enumeration failure with some USB hubs. + * Disabling the USB2_PHY Charger Detect function will put D+ + * into the normal state. + */ + if (of_property_read_bool(node, "ti,disable-charger-det")) + phy->flags |= OMAP_USB2_DISABLE_CHRG_DET; phy->wkupclk = devm_clk_get(phy->dev, "wkupclk"); if (IS_ERR(phy->wkupclk)) {