From patchwork Wed Aug 16 00:38:44 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Andreas_F=C3=A4rber?= X-Patchwork-Id: 110194 Delivered-To: patch@linaro.org Received: by 10.182.109.195 with SMTP id hu3csp183522obb; Tue, 15 Aug 2017 17:39:10 -0700 (PDT) X-Received: by 10.98.159.28 with SMTP id g28mr23214757pfe.212.1502843950541; Tue, 15 Aug 2017 17:39:10 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1502843950; cv=none; d=google.com; s=arc-20160816; b=NR3M/j4nC1SVLNW+vtsCijTsAoMgESUcrHoKVmdfQAnRjbJKezKDifsM+XRwklbPr6 O5PtBtLLUXrHWyTPqhR7WmbZVf5EoXb9ufKsRJ4f4F/SwNmsdMbgm1XhBnge/vmJgKY7 SEjGPzPGK7LeQkTIKIjCudMZYHSNvDt2GpPT7UVf9kuRFdIkMXYxRCFwWXbGmEh7ZDHj kEZms2QJDJzojTBbyhL40Qp4v6ZEW8R/O2jgvN1hTnzY94BT21PQ7o0rouaLPHNOqxEB GeNm19+H7D2HNDddpVy/Fxna108LENSCYjtrZwz6yl/HtwyWBF4DCWW/F3GCwZn97oKD g+Ag== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :arc-authentication-results; bh=YHlWuNZ12ERntXLKXh1U7gwdqLNW6XJUBfsR+sgy4dk=; b=dYV0BR7l9/vVsY5hm3DFWG7hwIpQFgK/gf9NEf5BjHTBvxZaUSP0zLAy3YmfA75cLv l3BpQ70S4Z1BVW3+5qrlrCgOE1MMXm8/gTDWMPChvG4y/Z8UNwIscfXTGR+JR4H57A13 qkgj//06rSmlHnRVL7JnXkO9GIWhbLZo25LhRrjv15Cagu605KQK0+a0NK3tNGYBh0nW QtBSpTycXR5ZtC/oewg2MGUbrOFFqce8EusGrnTiR27Nqoqw5o7Tu8hM1ABJFUp6Mlr2 UqH88cNfZORzu/eCeXqgPy/PMQL/qbefgRoHJULSKu+8jQmRYsYEKil/PCX22MFSmAYk xHoQ== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id 17si6212729pfv.598.2017.08.15.17.39.10; Tue, 15 Aug 2017 17:39:10 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1753465AbdHPAjH (ORCPT + 26 others); Tue, 15 Aug 2017 20:39:07 -0400 Received: from mx2.suse.de ([195.135.220.15]:45367 "EHLO mx1.suse.de" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S1753151AbdHPAjD (ORCPT ); Tue, 15 Aug 2017 20:39:03 -0400 X-Virus-Scanned: by amavisd-new at test-mx.suse.de Received: from relay1.suse.de (charybdis-ext.suse.de [195.135.220.254]) by mx1.suse.de (Postfix) with ESMTP id D141AAF37; Wed, 16 Aug 2017 00:39:01 +0000 (UTC) From: =?utf-8?q?Andreas_F=C3=A4rber?= To: Philipp Zabel , linux-arm-kernel@lists.infradead.org Cc: linux-kernel@vger.kernel.org, Roc He , =?utf-8?b?6JKL?= =?utf-8?b?5Li955C0?= , =?utf-8?q?Andreas_F=C3=A4rber?= , Rob Herring , Mark Rutland , Catalin Marinas , Will Deacon , devicetree@vger.kernel.org Subject: [PATCH 2/5] arm64: dts: realtek: Add RTD1295 reset controller nodes Date: Wed, 16 Aug 2017 02:38:44 +0200 Message-Id: <20170816003847.6208-3-afaerber@suse.de> X-Mailer: git-send-email 2.12.3 In-Reply-To: <20170816003847.6208-1-afaerber@suse.de> References: <20170816003847.6208-1-afaerber@suse.de> MIME-Version: 1.0 Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Add nodes for the Realtek RTD1295 reset controllers. Signed-off-by: Andreas Färber --- arch/arm64/boot/dts/realtek/rtd1295.dtsi | 30 ++++++++++++++++++++++++++++++ 1 file changed, 30 insertions(+) -- 2.12.3 diff --git a/arch/arm64/boot/dts/realtek/rtd1295.dtsi b/arch/arm64/boot/dts/realtek/rtd1295.dtsi index 43da91fce2b1..9f1dcd1fa8b3 100644 --- a/arch/arm64/boot/dts/realtek/rtd1295.dtsi +++ b/arch/arm64/boot/dts/realtek/rtd1295.dtsi @@ -87,6 +87,36 @@ /* Exclude up to 2 GiB of RAM */ ranges = <0x80000000 0x80000000 0x80000000>; + reset1: reset-controller@98000000 { + compatible = "realtek,rtd1295-reset"; + reg = <0x98000000 0x4>; + #reset-cells = <1>; + }; + + reset2: reset-controller@98000004 { + compatible = "realtek,rtd1295-reset"; + reg = <0x98000004 0x4>; + #reset-cells = <1>; + }; + + reset3: reset-controller@98000008 { + compatible = "realtek,rtd1295-reset"; + reg = <0x98000008 0x4>; + #reset-cells = <1>; + }; + + reset4: reset-controller@98000050 { + compatible = "realtek,rtd1295-reset"; + reg = <0x98000050 0x4>; + #reset-cells = <1>; + }; + + iso_reset: reset-controller@98007088 { + compatible = "realtek,rtd1295-reset"; + reg = <0x98007088 0x4>; + #reset-cells = <1>; + }; + uart0: serial@98007800 { compatible = "snps,dw-apb-uart"; reg = <0x98007800 0x400>; From patchwork Wed Aug 16 00:38:45 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Andreas_F=C3=A4rber?= X-Patchwork-Id: 110195 Delivered-To: patch@linaro.org Received: by 10.182.109.195 with SMTP id hu3csp183572obb; Tue, 15 Aug 2017 17:39:14 -0700 (PDT) X-Received: by 10.99.117.30 with SMTP id q30mr29713750pgc.437.1502843954191; Tue, 15 Aug 2017 17:39:14 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1502843954; cv=none; d=google.com; s=arc-20160816; b=VZDmJjy97x2iDPq15M8ALYytIYzkd64RrNRpgrznqUO5S0eR1+lbdVLfJrAbZqjolR dou+QXUa63ER06JXNaA7ltCX0h8FgzuIc85uLJ3MAnEln5hDHglXRTxF//Th+zOahdeS 1UlMPxUg0tNjATJ0Q+8UJ7Zc5j3zuENG3S22EOkpRYN28Ggj0IAYb5H7fLX7c68309Dz gZXkhs2KwFS4zokLzWGU4WXG30MdlKYvdd7H0+251roHjLKIzBl/ejF2nbOSE2XkXKKI BbS0+HSixNR/TfsYfS6w8kUI4alZJY4FlLaqyqBtuuS0VyUJHNCr4DSnziFOnToD4b0J 3vGA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :arc-authentication-results; bh=mO3b+LzmQTLj/1mJrlnulc0zfvEPDFVpeT3mAPtf6kY=; b=S++03/DgFTBGtLYekHWWSL1E/AnR6oTGYNM/cdUWm0KVUTEJjRR4mhMZr+YxROOm1J dg2qhEnEC5HAOJoeVpLb+0eEeYuvvNrg2t/iUZWEsc7qBf+Tszd5O93XRxFJxtVRjElV K8a0xV7G/pWisIaQFO+P+W+7GRA87B8yeJBktWdb1H11wN7WW9tHoRzxmkDplmeDcRgn /ZRec5gM+sTLW/07AB9rLpSOy9HNDN6oD8IW3JHQoLX/SoOed11eW+T0sKrFjvWhCl01 tQBzdKJnA6CJQqmzAMD9dUwzd65QtBvXslXVMLCTWHyBkr7BW0P9MfcnV7SxU/Bgkk5G JQzA== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id 17si6212729pfv.598.2017.08.15.17.39.13; Tue, 15 Aug 2017 17:39:14 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1753487AbdHPAjJ (ORCPT + 26 others); Tue, 15 Aug 2017 20:39:09 -0400 Received: from mx2.suse.de ([195.135.220.15]:45400 "EHLO mx1.suse.de" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S1753014AbdHPAjH (ORCPT ); Tue, 15 Aug 2017 20:39:07 -0400 X-Virus-Scanned: by amavisd-new at test-mx.suse.de Received: from relay2.suse.de (charybdis-ext.suse.de [195.135.220.254]) by mx1.suse.de (Postfix) with ESMTP id EA440AF3A; Wed, 16 Aug 2017 00:39:05 +0000 (UTC) From: =?utf-8?q?Andreas_F=C3=A4rber?= To: Philipp Zabel , linux-arm-kernel@lists.infradead.org Cc: linux-kernel@vger.kernel.org, Roc He , =?utf-8?b?6JKL?= =?utf-8?b?5Li955C0?= , =?utf-8?q?Andreas_F=C3=A4rber?= Subject: [PATCH 3/5] reset: Add Realtek RTD1295 driver Date: Wed, 16 Aug 2017 02:38:45 +0200 Message-Id: <20170816003847.6208-4-afaerber@suse.de> X-Mailer: git-send-email 2.12.3 In-Reply-To: <20170816003847.6208-1-afaerber@suse.de> References: <20170816003847.6208-1-afaerber@suse.de> MIME-Version: 1.0 Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Add a per-register reset controller driver. This deals with the fact that not all registers are adjoined. Signed-off-by: Andreas Färber --- drivers/reset/Kconfig | 6 +++ drivers/reset/Makefile | 1 + drivers/reset/reset-rtd129x.c | 100 ++++++++++++++++++++++++++++++++++++++++++ 3 files changed, 107 insertions(+) create mode 100644 drivers/reset/reset-rtd129x.c -- 2.12.3 diff --git a/drivers/reset/Kconfig b/drivers/reset/Kconfig index 52d5251660b9..dbac75e3f82c 100644 --- a/drivers/reset/Kconfig +++ b/drivers/reset/Kconfig @@ -68,6 +68,12 @@ config RESET_PISTACHIO help This enables the reset driver for ImgTec Pistachio SoCs. +config RESET_RTD129X + bool "Realtek RTD129x Reset Driver" if COMPILE_TEST + default ARCH_REALTEK if ARM64 + help + This enables the reset controller driver for Realtek RTD1295 SoC. + config RESET_SOCFPGA bool "SoCFPGA Reset Driver" if COMPILE_TEST default ARCH_SOCFPGA diff --git a/drivers/reset/Makefile b/drivers/reset/Makefile index b62783f50fe5..bca900260a57 100644 --- a/drivers/reset/Makefile +++ b/drivers/reset/Makefile @@ -11,6 +11,7 @@ obj-$(CONFIG_RESET_LPC18XX) += reset-lpc18xx.o obj-$(CONFIG_RESET_MESON) += reset-meson.o obj-$(CONFIG_RESET_OXNAS) += reset-oxnas.o obj-$(CONFIG_RESET_PISTACHIO) += reset-pistachio.o +obj-$(CONFIG_RESET_RTD129X) += reset-rtd129x.o obj-$(CONFIG_RESET_SOCFPGA) += reset-socfpga.o obj-$(CONFIG_RESET_STM32) += reset-stm32.o obj-$(CONFIG_RESET_SUNXI) += reset-sunxi.o diff --git a/drivers/reset/reset-rtd129x.c b/drivers/reset/reset-rtd129x.c new file mode 100644 index 000000000000..d553900096c6 --- /dev/null +++ b/drivers/reset/reset-rtd129x.c @@ -0,0 +1,100 @@ +/* + * Realtek RTD129x reset controller + * + * Copyright (c) 2017 Andreas Färber + * + * SPDX-License-Identifier: GPL-2.0+ + */ +#include +#include +#include +#include +#include +#include +#include + +struct rtd129x_reset_controller { + struct reset_controller_dev rcdev; + void __iomem *base; + spinlock_t lock; +}; + +#define to_rtd129x_rcdev(_rcdev) \ + container_of(_rcdev, struct rtd129x_reset_controller, rcdev) + +static int rtd129x_reset_assert(struct reset_controller_dev *rcdev, + unsigned long id) +{ + struct rtd129x_reset_controller *data = to_rtd129x_rcdev(rcdev); + unsigned long flags; + u32 reg; + + spin_lock_irqsave(&data->lock, flags); + + reg = readl(data->base); + writel(reg & ~BIT(id), data->base); + + spin_unlock_irqrestore(&data->lock, flags); + + return 0; +} + +static int rtd129x_reset_deassert(struct reset_controller_dev *rcdev, + unsigned long id) +{ + struct rtd129x_reset_controller *data = to_rtd129x_rcdev(rcdev); + unsigned long flags; + u32 reg; + + spin_lock_irqsave(&data->lock, flags); + + reg = readl(data->base); + writel(reg | BIT(id), data->base); + + spin_unlock_irqrestore(&data->lock, flags); + + return 0; +} + +static const struct reset_control_ops rtd129x_reset_ops = { + .assert = rtd129x_reset_assert, + .deassert = rtd129x_reset_deassert, +}; + +static const struct of_device_id rtd129x_reset_dt_ids[] = { + { .compatible = "realtek,rtd1295-reset" }, + { } +}; + +static int rtd129x_reset_probe(struct platform_device *pdev) +{ + struct rtd129x_reset_controller *data; + struct resource *res; + + data = devm_kzalloc(&pdev->dev, sizeof(*data), GFP_KERNEL); + if (!data) + return -ENOMEM; + + res = platform_get_resource(pdev, IORESOURCE_MEM, 0); + data->base = devm_ioremap_resource(&pdev->dev, res); + if (IS_ERR(data->base)) + return PTR_ERR(data->base); + + spin_lock_init(&data->lock); + + data->rcdev.owner = THIS_MODULE; + data->rcdev.nr_resets = 32; + data->rcdev.ops = &rtd129x_reset_ops; + data->rcdev.of_node = pdev->dev.of_node; + + return devm_reset_controller_register(&pdev->dev, &data->rcdev); +} + +static struct platform_driver rtd129x_reset_driver = { + .probe = rtd129x_reset_probe, + .driver = { + .name = "rtd129x-reset", + .of_match_table = rtd129x_reset_dt_ids, + }, +}; +builtin_platform_driver(rtd129x_reset_driver); From patchwork Wed Aug 16 00:38:46 2017 Content-Type: text/plain; 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[209.132.180.67]) by mx.google.com with ESMTP id s85si6173950pfa.472.2017.08.15.17.40.14; Tue, 15 Aug 2017 17:40:14 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1753543AbdHPAkL (ORCPT + 26 others); Tue, 15 Aug 2017 20:40:11 -0400 Received: from mx2.suse.de ([195.135.220.15]:45382 "EHLO mx1.suse.de" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S1753409AbdHPAjF (ORCPT ); Tue, 15 Aug 2017 20:39:05 -0400 X-Virus-Scanned: by amavisd-new at test-mx.suse.de Received: from relay1.suse.de (charybdis-ext.suse.de [195.135.220.254]) by mx1.suse.de (Postfix) with ESMTP id 9BF20AF38; Wed, 16 Aug 2017 00:39:03 +0000 (UTC) From: =?utf-8?q?Andreas_F=C3=A4rber?= To: Philipp Zabel , linux-arm-kernel@lists.infradead.org Cc: linux-kernel@vger.kernel.org, Roc He , =?utf-8?b?6JKL?= =?utf-8?b?5Li955C0?= , =?utf-8?q?Andreas_F=C3=A4rber?= , Rob Herring , Mark Rutland , Catalin Marinas , Will Deacon , devicetree@vger.kernel.org Subject: [PATCH 4/5] arm64: dts: realtek: Add RTD1295 UART resets Date: Wed, 16 Aug 2017 02:38:46 +0200 Message-Id: <20170816003847.6208-5-afaerber@suse.de> X-Mailer: git-send-email 2.12.3 In-Reply-To: <20170816003847.6208-1-afaerber@suse.de> References: <20170816003847.6208-1-afaerber@suse.de> MIME-Version: 1.0 Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Associate the UART nodes with the corresponding reset controller bits. Signed-off-by: Andreas Färber --- arch/arm64/boot/dts/realtek/rtd1295.dtsi | 3 +++ 1 file changed, 3 insertions(+) -- 2.12.3 diff --git a/arch/arm64/boot/dts/realtek/rtd1295.dtsi b/arch/arm64/boot/dts/realtek/rtd1295.dtsi index 9f1dcd1fa8b3..e777200d84b9 100644 --- a/arch/arm64/boot/dts/realtek/rtd1295.dtsi +++ b/arch/arm64/boot/dts/realtek/rtd1295.dtsi @@ -123,6 +123,7 @@ reg-shift = <2>; reg-io-width = <4>; clock-frequency = <27000000>; + resets = <&iso_reset 8>; status = "disabled"; }; @@ -132,6 +133,7 @@ reg-shift = <2>; reg-io-width = <4>; clock-frequency = <432000000>; + resets = <&reset2 28>; status = "disabled"; }; @@ -141,6 +143,7 @@ reg-shift = <2>; reg-io-width = <4>; clock-frequency = <432000000>; + resets = <&reset2 27>; status = "disabled"; }; From patchwork Wed Aug 16 00:38:47 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Andreas_F=C3=A4rber?= X-Patchwork-Id: 110196 Delivered-To: patch@linaro.org Received: by 10.182.109.195 with SMTP id hu3csp184005obb; Tue, 15 Aug 2017 17:39:54 -0700 (PDT) X-Received: by 10.99.100.132 with SMTP id y126mr28310573pgb.173.1502843994870; Tue, 15 Aug 2017 17:39:54 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1502843994; cv=none; d=google.com; s=arc-20160816; b=ErFPWHlQVJCB8fpaIOgMoGahJ9A5bhUgRsWcHrMbhPYK21MS5kXasNtepq9sJ4TKBN SKPv/qGugcjkh8r7yzDv79k6D+q8rt9VjXCu0DZMLXlc9M2pJFMJE0gt0dlE0V7Uqqgm zxOfeRCZw91Y+0lZcO6MR8gzqWKmUlUXM3xDpkcRJrMuxuSFsU9CQUknJTZgNHBJM4Iw inqsYNtjRUoj36+LKq3quAYzDInVass7IMJElhVjUszNmN9DRdUXVkE0JUPJSN8b69mq FjrNuisFs+mAgLsyyuLb/PeskHVc+MxZ8Ruy1BvLgeYLMfNBEMT6pB7Fq0TugM4kIuHi f3rg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :arc-authentication-results; bh=Kkv7GQLqNKwvptD0ngLY89tiCZHNBau+lwSOnZhuFFE=; b=C3ZraDmTB+DacEdG3BIiS9Gs5GF03qbIdvrESW1etjEfGLrpnxMBTlmjG1IVFgIfVv 1ciCjey4EuPaqzQ/xDezmeTBmpYz/bHA5vc373XZazJlCrTy8BL5VjObw2+auyJZxj6n NLduFCwt7OqsaDNlZgmosAUFfjm9C5gBeSmUbeYXujiJDdrm0floqQolR/Gg3Rtg0/cl eNn/8ApwdInnpoZ2S6GS7eutrUf58ZVIwoME8dJ9UeHlTJW9uoGPB1JCYaxm40n1vdex /iTxqeKszUnqtg3QQB4/XrZYFMPzSP2ivtcXET+E7eg0Vgb7JC0MrGnzUh/jzqp1fYdZ XOqg== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id y3si6168076pfa.545.2017.08.15.17.39.54; Tue, 15 Aug 2017 17:39:54 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1753519AbdHPAjw (ORCPT + 26 others); Tue, 15 Aug 2017 20:39:52 -0400 Received: from mx2.suse.de ([195.135.220.15]:45395 "EHLO mx1.suse.de" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S1752964AbdHPAjF (ORCPT ); Tue, 15 Aug 2017 20:39:05 -0400 X-Virus-Scanned: by amavisd-new at test-mx.suse.de Received: from relay2.suse.de (charybdis-ext.suse.de [195.135.220.254]) by mx1.suse.de (Postfix) with ESMTP id 26434AF39; Wed, 16 Aug 2017 00:39:04 +0000 (UTC) From: =?utf-8?q?Andreas_F=C3=A4rber?= To: Philipp Zabel , linux-arm-kernel@lists.infradead.org Cc: linux-kernel@vger.kernel.org, Roc He , =?utf-8?b?6JKL?= =?utf-8?b?5Li955C0?= , =?utf-8?q?Andreas_F=C3=A4rber?= , Rob Herring , Mark Rutland , Catalin Marinas , Will Deacon , devicetree@vger.kernel.org Subject: [PATCH 5/5] arm64: dts: realtek: Adopt RTD1295 reset constants Date: Wed, 16 Aug 2017 02:38:47 +0200 Message-Id: <20170816003847.6208-6-afaerber@suse.de> X-Mailer: git-send-email 2.12.3 In-Reply-To: <20170816003847.6208-1-afaerber@suse.de> References: <20170816003847.6208-1-afaerber@suse.de> MIME-Version: 1.0 Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Replace reset controller indices with constants. Signed-off-by: Andreas Färber --- arch/arm64/boot/dts/realtek/rtd1295.dtsi | 7 ++++--- 1 file changed, 4 insertions(+), 3 deletions(-) -- 2.12.3 diff --git a/arch/arm64/boot/dts/realtek/rtd1295.dtsi b/arch/arm64/boot/dts/realtek/rtd1295.dtsi index e777200d84b9..2d2d84b573e3 100644 --- a/arch/arm64/boot/dts/realtek/rtd1295.dtsi +++ b/arch/arm64/boot/dts/realtek/rtd1295.dtsi @@ -7,6 +7,7 @@ */ #include +#include / { compatible = "realtek,rtd1295"; @@ -123,7 +124,7 @@ reg-shift = <2>; reg-io-width = <4>; clock-frequency = <27000000>; - resets = <&iso_reset 8>; + resets = <&iso_reset RTD1295_ISO_RSTN_UR0>; status = "disabled"; }; @@ -133,7 +134,7 @@ reg-shift = <2>; reg-io-width = <4>; clock-frequency = <432000000>; - resets = <&reset2 28>; + resets = <&reset2 RTD1295_RSTN_UR1>; status = "disabled"; }; @@ -143,7 +144,7 @@ reg-shift = <2>; reg-io-width = <4>; clock-frequency = <432000000>; - resets = <&reset2 27>; + resets = <&reset2 RTD1295_RSTN_UR2>; status = "disabled"; };