From patchwork Wed Apr 1 08:39:05 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Benjamin Gaignard X-Patchwork-Id: 202561 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-9.8 required=3.0 tests=DKIM_SIGNED,DKIM_VALID, DKIM_VALID_AU, HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_PATCH, MAILING_LIST_MULTI, SIGNED_OFF_BY,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED,USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 87F85C43331 for ; Wed, 1 Apr 2020 08:39:55 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 59AB72078B for ; Wed, 1 Apr 2020 08:39:55 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (2048-bit key) header.d=st.com header.i=@st.com header.b="yYkdbvyc" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1732074AbgDAIjy (ORCPT ); Wed, 1 Apr 2020 04:39:54 -0400 Received: from mx08-00178001.pphosted.com ([91.207.212.93]:14888 "EHLO mx07-00178001.pphosted.com" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S1726368AbgDAIjx (ORCPT ); Wed, 1 Apr 2020 04:39:53 -0400 Received: from pps.filterd (m0046660.ppops.net [127.0.0.1]) by mx07-00178001.pphosted.com (8.16.0.42/8.16.0.42) with SMTP id 0318bETg029934; Wed, 1 Apr 2020 10:39:37 +0200 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=st.com; h=from : to : cc : subject : date : message-id : in-reply-to : references : mime-version : content-type; s=STMicroelectronics; bh=na/oKumJJlSOAsC4yLKxdvbCb8WJgv/VEAjKtvvJjY0=; b=yYkdbvycJiGc349n5Huur97tzbGMxNG5IIqp+sKnhXkV8S8g838vVKx6TZUSkg2id7/H oqOZQUxHYlJmvXfVDUZkxr66BsaK5ttR1oVWOW0ZTPmcFUyWcbboK9a6GVxy/JAfYz+g HxM2Ur6tNeMOM4ir4UY/1CGSlaelKt1mJIbtFojO4zW2XZXdrNME/viJgkFiyviR6jLL /VsBb1+lozKUvZT3+E1tRdM/WGudDDTo6YVwbKxIe86xWqQKBiY7PjPsamjzzpSfJoV9 0hSf6ZeFtX1DFkDD8XQoOhMi2RU2dIidAflOoC6Amqa8IukrY/zaOOmN+nso0ulT0ceO 4w== Received: from beta.dmz-eu.st.com (beta.dmz-eu.st.com [164.129.1.35]) by mx07-00178001.pphosted.com with ESMTP id 301vkdvaht-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Wed, 01 Apr 2020 10:39:37 +0200 Received: from euls16034.sgp.st.com (euls16034.sgp.st.com [10.75.44.20]) by beta.dmz-eu.st.com (STMicroelectronics) with ESMTP id 426B410003B; Wed, 1 Apr 2020 10:39:36 +0200 (CEST) Received: from Webmail-eu.st.com (sfhdag3node3.st.com [10.75.127.9]) by euls16034.sgp.st.com (STMicroelectronics) with ESMTP id 3507121CA8F; Wed, 1 Apr 2020 10:39:36 +0200 (CEST) Received: from localhost (10.75.127.44) by SFHDAG3NODE3.st.com (10.75.127.9) with Microsoft SMTP Server (TLS) id 15.0.1347.2; Wed, 1 Apr 2020 10:39:35 +0200 From: Benjamin Gaignard To: , , , , , , , CC: , , , , Benjamin Gaignard Subject: [PATCH v6 2/6] ARM: dts: stm32: Add timer subnodes on stm32mp15 SoCs Date: Wed, 1 Apr 2020 10:39:05 +0200 Message-ID: <20200401083909.18886-3-benjamin.gaignard@st.com> X-Mailer: git-send-email 2.15.0 In-Reply-To: <20200401083909.18886-1-benjamin.gaignard@st.com> References: <20200401083909.18886-1-benjamin.gaignard@st.com> MIME-Version: 1.0 X-Originating-IP: [10.75.127.44] X-ClientProxiedBy: SFHDAG4NODE2.st.com (10.75.127.11) To SFHDAG3NODE3.st.com (10.75.127.9) X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10434:6.0.138, 18.0.676 definitions=2020-03-31_07:2020-03-31,2020-03-31 signatures=0 Sender: devicetree-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Add timer subnode and interrupts to low power timer nodes for all stm32mp15x SoCs. Signed-off-by: Benjamin Gaignard --- arch/arm/boot/dts/stm32mp151.dtsi | 35 +++++++++++++++++++++++++++++++++++ 1 file changed, 35 insertions(+) diff --git a/arch/arm/boot/dts/stm32mp151.dtsi b/arch/arm/boot/dts/stm32mp151.dtsi index fb41d0778b00..09e2dc209976 100644 --- a/arch/arm/boot/dts/stm32mp151.dtsi +++ b/arch/arm/boot/dts/stm32mp151.dtsi @@ -358,6 +358,8 @@ reg = <0x40009000 0x400>; clocks = <&rcc LPTIM1_K>; clock-names = "mux"; + interrupts-extended = <&exti 47 IRQ_TYPE_LEVEL_HIGH>; + wakeup-source; status = "disabled"; pwm { @@ -376,6 +378,11 @@ compatible = "st,stm32-lptimer-counter"; status = "disabled"; }; + + timer { + compatible = "st,stm32-lptimer-timer"; + status = "disabled"; + }; }; spi2: spi@4000b000 { @@ -1135,6 +1142,8 @@ reg = <0x50021000 0x400>; clocks = <&rcc LPTIM2_K>; clock-names = "mux"; + interrupts-extended = <&exti 48 IRQ_TYPE_LEVEL_HIGH>; + wakeup-source; status = "disabled"; pwm { @@ -1153,6 +1162,11 @@ compatible = "st,stm32-lptimer-counter"; status = "disabled"; }; + + timer { + compatible = "st,stm32-lptimer-timer"; + status = "disabled"; + }; }; lptimer3: timer@50022000 { @@ -1162,6 +1176,8 @@ reg = <0x50022000 0x400>; clocks = <&rcc LPTIM3_K>; clock-names = "mux"; + interrupts-extended = <&exti 50 IRQ_TYPE_LEVEL_HIGH>; + wakeup-source; status = "disabled"; pwm { @@ -1175,6 +1191,11 @@ reg = <2>; status = "disabled"; }; + + timer { + compatible = "st,stm32-lptimer-timer"; + status = "disabled"; + }; }; lptimer4: timer@50023000 { @@ -1182,6 +1203,8 @@ reg = <0x50023000 0x400>; clocks = <&rcc LPTIM4_K>; clock-names = "mux"; + interrupts-extended = <&exti 52 IRQ_TYPE_LEVEL_HIGH>; + wakeup-source; status = "disabled"; pwm { @@ -1189,6 +1212,11 @@ #pwm-cells = <3>; status = "disabled"; }; + + timer { + compatible = "st,stm32-lptimer-timer"; + status = "disabled"; + }; }; lptimer5: timer@50024000 { @@ -1196,6 +1224,8 @@ reg = <0x50024000 0x400>; clocks = <&rcc LPTIM5_K>; clock-names = "mux"; + interrupts-extended = <&exti 53 IRQ_TYPE_LEVEL_HIGH>; + wakeup-source; status = "disabled"; pwm { @@ -1203,6 +1233,11 @@ #pwm-cells = <3>; status = "disabled"; }; + + timer { + compatible = "st,stm32-lptimer-timer"; + status = "disabled"; + }; }; vrefbuf: vrefbuf@50025000 { From patchwork Wed Apr 1 08:39:07 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Benjamin Gaignard X-Patchwork-Id: 202562 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-9.9 required=3.0 tests=DKIM_SIGNED,DKIM_VALID, DKIM_VALID_AU, HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_PATCH, MAILING_LIST_MULTI, SIGNED_OFF_BY,SPF_HELO_NONE,SPF_PASS,USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 6DDC0C43331 for ; Wed, 1 Apr 2020 08:39:49 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 3DABA2073B for ; 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Wed, 01 Apr 2020 10:39:39 +0200 Received: from euls16034.sgp.st.com (euls16034.sgp.st.com [10.75.44.20]) by beta.dmz-eu.st.com (STMicroelectronics) with ESMTP id 9152610002A; Wed, 1 Apr 2020 10:39:38 +0200 (CEST) Received: from Webmail-eu.st.com (sfhdag3node3.st.com [10.75.127.9]) by euls16034.sgp.st.com (STMicroelectronics) with ESMTP id 83E3221CA8F; Wed, 1 Apr 2020 10:39:38 +0200 (CEST) Received: from localhost (10.75.127.44) by SFHDAG3NODE3.st.com (10.75.127.9) with Microsoft SMTP Server (TLS) id 15.0.1347.2; Wed, 1 Apr 2020 10:39:38 +0200 From: Benjamin Gaignard To: , , , , , , , CC: , , , , Benjamin Gaignard Subject: [PATCH v6 4/6] mfd: stm32: enable regmap fast_io for stm32-lptimer Date: Wed, 1 Apr 2020 10:39:07 +0200 Message-ID: <20200401083909.18886-5-benjamin.gaignard@st.com> X-Mailer: git-send-email 2.15.0 In-Reply-To: <20200401083909.18886-1-benjamin.gaignard@st.com> References: <20200401083909.18886-1-benjamin.gaignard@st.com> MIME-Version: 1.0 X-Originating-IP: [10.75.127.44] X-ClientProxiedBy: SFHDAG5NODE3.st.com (10.75.127.15) To SFHDAG3NODE3.st.com (10.75.127.9) X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10434:6.0.138, 18.0.676 definitions=2020-03-31_07:2020-03-31,2020-03-31 signatures=0 Sender: devicetree-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Because stm32-lptimer need to write in registers in interrupt context enable regmap fast_io to use a spin_lock to protect registers access rather than a mutex. Signed-off-by: Benjamin Gaignard --- drivers/mfd/stm32-lptimer.c | 1 + 1 file changed, 1 insertion(+) diff --git a/drivers/mfd/stm32-lptimer.c b/drivers/mfd/stm32-lptimer.c index a00f99f36559..746e51a17cc8 100644 --- a/drivers/mfd/stm32-lptimer.c +++ b/drivers/mfd/stm32-lptimer.c @@ -17,6 +17,7 @@ static const struct regmap_config stm32_lptimer_regmap_cfg = { .val_bits = 32, .reg_stride = sizeof(u32), .max_register = STM32_LPTIM_MAX_REGISTER, + .fast_io = true, }; static int stm32_lptimer_detect_encoder(struct stm32_lptimer *ddata) From patchwork Wed Apr 1 08:39:09 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Benjamin Gaignard X-Patchwork-Id: 202560 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-9.8 required=3.0 tests=DKIM_SIGNED,DKIM_VALID, DKIM_VALID_AU, HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_PATCH, MAILING_LIST_MULTI, SIGNED_OFF_BY,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED,USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 21572C2D0E7 for ; Wed, 1 Apr 2020 08:40:03 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id E8F7020857 for ; Wed, 1 Apr 2020 08:40:02 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (2048-bit key) header.d=st.com header.i=@st.com header.b="o2rK4Uth" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1732108AbgDAIj7 (ORCPT ); Wed, 1 Apr 2020 04:39:59 -0400 Received: from mx08-00178001.pphosted.com ([91.207.212.93]:15086 "EHLO mx07-00178001.pphosted.com" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S1732106AbgDAIj6 (ORCPT ); Wed, 1 Apr 2020 04:39:58 -0400 Received: from pps.filterd (m0046660.ppops.net [127.0.0.1]) by mx07-00178001.pphosted.com (8.16.0.42/8.16.0.42) with SMTP id 0318bDf7029926; Wed, 1 Apr 2020 10:39:48 +0200 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=st.com; h=from : to : cc : subject : date : message-id : in-reply-to : references : mime-version : content-type; s=STMicroelectronics; bh=AXPGvtsGWLkKS+I+Kb5oNNnn9+C77me7iOpHlW+3zcQ=; b=o2rK4UthE6AKyCuj0SYoVrYUCVidIzLFNlRGTavaWhQWcnIoRCgA7JWWZjMohNlJopee ff/oGy12rIApLRdk9tja8gjo+Uml7m90DS/277dhBsDmMmJEssgX3bf5MPmdq9uVK/M0 0si38uSlJ5hsFS5eUV3OK05ebF56jwpvtxglNyfL+4LTbeCWSOVAQzZCfopslerPiV0f hvtoCMNssPenODnWCdl4CZDU4b9yoom8V8YXuZaRXOb+m2RSBlNxf3dHy+9XisJ6x8Dv Tjq9+9BtxGroFTr3HbMzWTBVo71ojDlO8DMsQ9uup/Q+PrcaYw3o46Qwdlq6Bn0rJHbp kg== Received: from beta.dmz-eu.st.com (beta.dmz-eu.st.com [164.129.1.35]) by mx07-00178001.pphosted.com with ESMTP id 301vkdvakg-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Wed, 01 Apr 2020 10:39:48 +0200 Received: from euls16034.sgp.st.com (euls16034.sgp.st.com [10.75.44.20]) by beta.dmz-eu.st.com (STMicroelectronics) with ESMTP id AF8AC100034; Wed, 1 Apr 2020 10:39:47 +0200 (CEST) Received: from Webmail-eu.st.com (sfhdag3node3.st.com [10.75.127.9]) by euls16034.sgp.st.com (STMicroelectronics) with ESMTP id A321121CA8E; Wed, 1 Apr 2020 10:39:47 +0200 (CEST) Received: from localhost (10.75.127.45) by SFHDAG3NODE3.st.com (10.75.127.9) with Microsoft SMTP Server (TLS) id 15.0.1347.2; Wed, 1 Apr 2020 10:39:47 +0200 From: Benjamin Gaignard To: , , , , , , , CC: , , , , Benjamin Gaignard Subject: [PATCH v6 6/6] ARM: mach-stm32: select low power timer for STM32MP157 Date: Wed, 1 Apr 2020 10:39:09 +0200 Message-ID: <20200401083909.18886-7-benjamin.gaignard@st.com> X-Mailer: git-send-email 2.15.0 In-Reply-To: <20200401083909.18886-1-benjamin.gaignard@st.com> References: <20200401083909.18886-1-benjamin.gaignard@st.com> MIME-Version: 1.0 X-Originating-IP: [10.75.127.45] X-ClientProxiedBy: SFHDAG3NODE1.st.com (10.75.127.7) To SFHDAG3NODE3.st.com (10.75.127.9) X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10434:6.0.138, 18.0.676 definitions=2020-03-31_07:2020-03-31,2020-03-31 signatures=0 Sender: devicetree-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Make MACH_STM32MP157 select CLKSRC_STM32_LP to get a broadcast timer. Signed-off-by: Benjamin Gaignard --- arch/arm/mach-stm32/Kconfig | 1 + 1 file changed, 1 insertion(+) diff --git a/arch/arm/mach-stm32/Kconfig b/arch/arm/mach-stm32/Kconfig index 57699bd8f107..d78f55b7b1d0 100644 --- a/arch/arm/mach-stm32/Kconfig +++ b/arch/arm/mach-stm32/Kconfig @@ -46,6 +46,7 @@ if ARCH_MULTI_V7 config MACH_STM32MP157 bool "STMicroelectronics STM32MP157" select ARM_ERRATA_814220 + select CLKSRC_STM32_LP default y endif # ARMv7-A