From patchwork Mon Aug 21 16:06:29 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jerome Brunet X-Patchwork-Id: 110575 Delivered-To: patch@linaro.org Received: by 10.182.109.195 with SMTP id hu3csp4247434obb; Mon, 21 Aug 2017 09:06:52 -0700 (PDT) X-Received: by 10.99.174.10 with SMTP id q10mr16504592pgf.234.1503331612211; Mon, 21 Aug 2017 09:06:52 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1503331612; cv=none; d=google.com; s=arc-20160816; b=Qe0IN9kjNohx51AdcyXD5shqD82gdXPnoYQRHuK3lCFbJteAgvKFhyf8+Nw16GUZgI l+fRxU37mhzDnGz2tG04k/xHoAu9NSZuAl95g0Rql5DY081d6Ib7uVyNj1UXmf/4KdjV EfXTBEknUKTX9Lr/0p9b7Oo/lP0Cwht0GHg/hpRUyVtoH9xcE6Oee14nbcEmrZXipy9A 1S4lP7hc4wfiAPQlzqLdePM3D5Zwc1S3RHTYXa6jdnoSO1oDq6hPbBRI/IBSBeGxCuLW vYzpVIYmnYnO35hg4sUrqRhXmTjLTKG9vudp/RzidfyjDPSfrYiuPqmcaVUZC5wGybWo Rkig== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:references:in-reply-to:message-id:date :subject:cc:to:from:dkim-signature:arc-authentication-results; bh=guFBIx2fs49gYTjsi99u5FJkI06g/PYxVdDG+xDzc7I=; b=SOGjRHb6oCn0n6jfmx0h+/b8fDE42Acs6ZzkWXr2dYBeq5T8u5mKhd+0soML2Wwelh HzWHp8a7lr9JF2/pzcerGQcNFMI6/KFC78inIl3RyqEAsg5woQtWf4G4mKXBtBzPeKNk bpl6vXfg6BhDYHCheANPPuXoFkLXjfrokaYIpBEnN4tel3WYS09mZf0gBoDd2QyGw79G PTsjewkWxx+rm1R9Vg10A7S5CudKH8EZNNE3+Nq5IqftR5Y4Yh+ei0Ira3XHXS5E5okz FdG8Qs4wLrCdPNA8yIjqQzUsEm+41h1bkCn+OyBj2dU8Zo3nEksq59EbqQYrrMjbWTZi yjCQ== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@baylibre-com.20150623.gappssmtp.com header.s=20150623 header.b=A99ca5F0; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. 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Mon, 21 Aug 2017 09:06:41 -0700 (PDT) Received: from localhost.localdomain ([90.63.244.31]) by smtp.googlemail.com with ESMTPSA id r79sm12346432wmd.42.2017.08.21.09.06.40 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Mon, 21 Aug 2017 09:06:41 -0700 (PDT) From: Jerome Brunet To: Kevin Hilman , Carlo Caione Cc: Jerome Brunet , linux-amlogic@lists.infradead.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org Subject: [PATCH v2 1/9] ARM64: dts: meson-gx: Use correct mmc clock source 0 Date: Mon, 21 Aug 2017 18:06:29 +0200 Message-Id: <20170821160637.22456-2-jbrunet@baylibre.com> X-Mailer: git-send-email 2.9.5 In-Reply-To: <20170821160637.22456-1-jbrunet@baylibre.com> References: <20170821160637.22456-1-jbrunet@baylibre.com> Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Now that the clock source 0 is properly described in the CCF, use it instead of assuming the default value (xtal) Signed-off-by: Jerome Brunet --- arch/arm64/boot/dts/amlogic/meson-gxbb.dtsi | 6 +++--- arch/arm64/boot/dts/amlogic/meson-gxl.dtsi | 6 +++--- 2 files changed, 6 insertions(+), 6 deletions(-) -- 2.9.5 diff --git a/arch/arm64/boot/dts/amlogic/meson-gxbb.dtsi b/arch/arm64/boot/dts/amlogic/meson-gxbb.dtsi index 17d3efdf1469..9a1e478f80d5 100644 --- a/arch/arm64/boot/dts/amlogic/meson-gxbb.dtsi +++ b/arch/arm64/boot/dts/amlogic/meson-gxbb.dtsi @@ -652,21 +652,21 @@ &sd_emmc_a { clocks = <&clkc CLKID_SD_EMMC_A>, - <&xtal>, + <&clkc CLKID_SD_EMMC_A_CLK0>, <&clkc CLKID_FCLK_DIV2>; clock-names = "core", "clkin0", "clkin1"; }; &sd_emmc_b { clocks = <&clkc CLKID_SD_EMMC_B>, - <&xtal>, + <&clkc CLKID_SD_EMMC_B_CLK0>, <&clkc CLKID_FCLK_DIV2>; clock-names = "core", "clkin0", "clkin1"; }; &sd_emmc_c { clocks = <&clkc CLKID_SD_EMMC_C>, - <&xtal>, + <&clkc CLKID_SD_EMMC_C_CLK0>, <&clkc CLKID_FCLK_DIV2>; clock-names = "core", "clkin0", "clkin1"; }; diff --git a/arch/arm64/boot/dts/amlogic/meson-gxl.dtsi b/arch/arm64/boot/dts/amlogic/meson-gxl.dtsi index 8d4f3160a0ee..071eca074a91 100644 --- a/arch/arm64/boot/dts/amlogic/meson-gxl.dtsi +++ b/arch/arm64/boot/dts/amlogic/meson-gxl.dtsi @@ -593,21 +593,21 @@ &sd_emmc_a { clocks = <&clkc CLKID_SD_EMMC_A>, - <&xtal>, + <&clkc CLKID_SD_EMMC_A_CLK0>, <&clkc CLKID_FCLK_DIV2>; clock-names = "core", "clkin0", "clkin1"; }; &sd_emmc_b { clocks = <&clkc CLKID_SD_EMMC_B>, - <&xtal>, + <&clkc CLKID_SD_EMMC_B_CLK0>, <&clkc CLKID_FCLK_DIV2>; clock-names = "core", "clkin0", "clkin1"; }; &sd_emmc_c { clocks = <&clkc CLKID_SD_EMMC_C>, - <&xtal>, + <&clkc CLKID_SD_EMMC_C_CLK0>, <&clkc CLKID_FCLK_DIV2>; clock-names = "core", "clkin0", "clkin1"; }; From patchwork Mon Aug 21 16:06:30 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jerome Brunet X-Patchwork-Id: 110584 Delivered-To: patch@linaro.org Received: by 10.140.95.78 with SMTP id h72csp1493294qge; Mon, 21 Aug 2017 09:09:32 -0700 (PDT) X-Received: by 10.99.138.66 with SMTP id y63mr13405223pgd.443.1503331771928; Mon, 21 Aug 2017 09:09:31 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1503331771; cv=none; d=google.com; s=arc-20160816; b=KrhxAeHtUTixcya5HjNAZ3euEkHI6fHayJX0//o9+PDbolYqe4sz+JNvezj+wjtXTr plJCh3ODoXC3EYWbeHsxMQHGRDFCXcZlulraPqpufw7O2wmEoB+afQiY6m5LQ2UpF4uX Aa1fF3kJ+QlcLDlio9ZgU/SyTQ9o8RKf0JqCLXQLrZZOQb1JDXmngWHECr7AKFQzfthQ wljvYVJhb2RkPzgU4Qj9+YaphSJbQelJe5/Grls1x9thw/a9dsltiqwkixit3EeHWvLc 8463z2AGJMOBkFQtyMTNLC2CtpaBi/KMUYBkfJQC8dWxGF41/rhFVkvU2sQBdDqvKqzT skvA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; 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Signed-off-by: Jerome Brunet --- arch/arm64/boot/dts/amlogic/meson-gx-p23x-q20x.dtsi | 1 - arch/arm64/boot/dts/amlogic/meson-gxbb-nanopi-k2.dts | 1 - arch/arm64/boot/dts/amlogic/meson-gxbb-nexbox-a95x.dts | 1 - arch/arm64/boot/dts/amlogic/meson-gxbb-odroidc2.dts | 1 - arch/arm64/boot/dts/amlogic/meson-gxbb-p20x.dtsi | 1 - arch/arm64/boot/dts/amlogic/meson-gxbb-vega-s95.dtsi | 1 - arch/arm64/boot/dts/amlogic/meson-gxl-s905x-hwacom-amazetv.dts | 1 - arch/arm64/boot/dts/amlogic/meson-gxl-s905x-nexbox-a95x.dts | 1 - arch/arm64/boot/dts/amlogic/meson-gxl-s905x-p212.dtsi | 1 - arch/arm64/boot/dts/amlogic/meson-gxm-nexbox-a1.dts | 1 - arch/arm64/boot/dts/amlogic/meson-gxm-rbox-pro.dts | 1 - 11 files changed, 11 deletions(-) -- 2.9.5 diff --git a/arch/arm64/boot/dts/amlogic/meson-gx-p23x-q20x.dtsi b/arch/arm64/boot/dts/amlogic/meson-gx-p23x-q20x.dtsi index dc478d094c11..cff39c5a2632 100644 --- a/arch/arm64/boot/dts/amlogic/meson-gx-p23x-q20x.dtsi +++ b/arch/arm64/boot/dts/amlogic/meson-gx-p23x-q20x.dtsi @@ -208,7 +208,6 @@ pinctrl-names = "default"; bus-width = <8>; - cap-sd-highspeed; cap-mmc-highspeed; max-frequency = <200000000>; non-removable; diff --git a/arch/arm64/boot/dts/amlogic/meson-gxbb-nanopi-k2.dts b/arch/arm64/boot/dts/amlogic/meson-gxbb-nanopi-k2.dts index fa462831ccaf..b48a4576158a 100644 --- a/arch/arm64/boot/dts/amlogic/meson-gxbb-nanopi-k2.dts +++ b/arch/arm64/boot/dts/amlogic/meson-gxbb-nanopi-k2.dts @@ -239,7 +239,6 @@ pinctrl-names = "default"; bus-width = <8>; - cap-sd-highspeed; max-frequency = <200000000>; non-removable; disable-wp; diff --git a/arch/arm64/boot/dts/amlogic/meson-gxbb-nexbox-a95x.dts b/arch/arm64/boot/dts/amlogic/meson-gxbb-nexbox-a95x.dts index a1078b3e1c76..c64c2256d092 100644 --- a/arch/arm64/boot/dts/amlogic/meson-gxbb-nexbox-a95x.dts +++ b/arch/arm64/boot/dts/amlogic/meson-gxbb-nexbox-a95x.dts @@ -267,7 +267,6 @@ pinctrl-names = "default"; bus-width = <8>; - cap-sd-highspeed; cap-mmc-highspeed; max-frequency = <200000000>; non-removable; diff --git a/arch/arm64/boot/dts/amlogic/meson-gxbb-odroidc2.dts b/arch/arm64/boot/dts/amlogic/meson-gxbb-odroidc2.dts index d147c853ab05..a12303becab4 100644 --- a/arch/arm64/boot/dts/amlogic/meson-gxbb-odroidc2.dts +++ b/arch/arm64/boot/dts/amlogic/meson-gxbb-odroidc2.dts @@ -274,7 +274,6 @@ pinctrl-names = "default"; bus-width = <8>; - cap-sd-highspeed; max-frequency = <200000000>; non-removable; disable-wp; diff --git a/arch/arm64/boot/dts/amlogic/meson-gxbb-p20x.dtsi b/arch/arm64/boot/dts/amlogic/meson-gxbb-p20x.dtsi index 58b32f272a0e..30b880b694de 100644 --- a/arch/arm64/boot/dts/amlogic/meson-gxbb-p20x.dtsi +++ b/arch/arm64/boot/dts/amlogic/meson-gxbb-p20x.dtsi @@ -234,7 +234,6 @@ pinctrl-names = "default"; bus-width = <8>; - cap-sd-highspeed; cap-mmc-highspeed; max-frequency = <200000000>; non-removable; diff --git a/arch/arm64/boot/dts/amlogic/meson-gxbb-vega-s95.dtsi b/arch/arm64/boot/dts/amlogic/meson-gxbb-vega-s95.dtsi index 346753fb6324..0262ef8d48e4 100644 --- a/arch/arm64/boot/dts/amlogic/meson-gxbb-vega-s95.dtsi +++ b/arch/arm64/boot/dts/amlogic/meson-gxbb-vega-s95.dtsi @@ -201,7 +201,6 @@ pinctrl-names = "default"; bus-width = <8>; - cap-sd-highspeed; cap-mmc-highspeed; max-frequency = <200000000>; non-removable; diff --git a/arch/arm64/boot/dts/amlogic/meson-gxl-s905x-hwacom-amazetv.dts b/arch/arm64/boot/dts/amlogic/meson-gxl-s905x-hwacom-amazetv.dts index 2a5804ce7f4b..f779a985f923 100644 --- a/arch/arm64/boot/dts/amlogic/meson-gxl-s905x-hwacom-amazetv.dts +++ b/arch/arm64/boot/dts/amlogic/meson-gxl-s905x-hwacom-amazetv.dts @@ -144,7 +144,6 @@ pinctrl-names = "default"; bus-width = <8>; - cap-sd-highspeed; cap-mmc-highspeed; max-frequency = <100000000>; non-removable; diff --git a/arch/arm64/boot/dts/amlogic/meson-gxl-s905x-nexbox-a95x.dts b/arch/arm64/boot/dts/amlogic/meson-gxl-s905x-nexbox-a95x.dts index 6633a5d8fdd3..83c35efbae8b 100644 --- a/arch/arm64/boot/dts/amlogic/meson-gxl-s905x-nexbox-a95x.dts +++ b/arch/arm64/boot/dts/amlogic/meson-gxl-s905x-nexbox-a95x.dts @@ -224,7 +224,6 @@ pinctrl-names = "default"; bus-width = <8>; - cap-sd-highspeed; cap-mmc-highspeed; max-frequency = <200000000>; non-removable; diff --git a/arch/arm64/boot/dts/amlogic/meson-gxl-s905x-p212.dtsi b/arch/arm64/boot/dts/amlogic/meson-gxl-s905x-p212.dtsi index f3eea8e89d12..8899121f79e1 100644 --- a/arch/arm64/boot/dts/amlogic/meson-gxl-s905x-p212.dtsi +++ b/arch/arm64/boot/dts/amlogic/meson-gxl-s905x-p212.dtsi @@ -137,7 +137,6 @@ pinctrl-names = "default"; bus-width = <8>; - cap-sd-highspeed; cap-mmc-highspeed; max-frequency = <200000000>; non-removable; diff --git a/arch/arm64/boot/dts/amlogic/meson-gxm-nexbox-a1.dts b/arch/arm64/boot/dts/amlogic/meson-gxm-nexbox-a1.dts index 5f626d683088..583da09acf66 100644 --- a/arch/arm64/boot/dts/amlogic/meson-gxm-nexbox-a1.dts +++ b/arch/arm64/boot/dts/amlogic/meson-gxm-nexbox-a1.dts @@ -189,7 +189,6 @@ pinctrl-names = "default"; bus-width = <8>; - cap-sd-highspeed; cap-mmc-highspeed; max-frequency = <200000000>; non-removable; diff --git a/arch/arm64/boot/dts/amlogic/meson-gxm-rbox-pro.dts b/arch/arm64/boot/dts/amlogic/meson-gxm-rbox-pro.dts index 08f1dd69b679..470f72bb863c 100644 --- a/arch/arm64/boot/dts/amlogic/meson-gxm-rbox-pro.dts +++ b/arch/arm64/boot/dts/amlogic/meson-gxm-rbox-pro.dts @@ -220,7 +220,6 @@ pinctrl-names = "default"; bus-width = <8>; - cap-sd-highspeed; cap-mmc-highspeed; max-frequency = <200000000>; non-removable; From patchwork Mon Aug 21 16:06:31 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jerome Brunet X-Patchwork-Id: 110583 Delivered-To: patch@linaro.org Received: by 10.140.95.78 with SMTP id h72csp1491962qge; Mon, 21 Aug 2017 09:08:37 -0700 (PDT) X-Received: by 10.84.171.132 with SMTP id l4mr19429203plb.183.1503331717036; Mon, 21 Aug 2017 09:08:37 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1503331717; cv=none; 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[209.132.180.67]) by mx.google.com with ESMTP id a4si7502411pli.915.2017.08.21.09.08.36; Mon, 21 Aug 2017 09:08:37 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@baylibre-com.20150623.gappssmtp.com header.s=20150623 header.b=tNGMdvpF; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1754502AbdHUQId (ORCPT + 26 others); Mon, 21 Aug 2017 12:08:33 -0400 Received: from mail-wr0-f173.google.com ([209.85.128.173]:36689 "EHLO mail-wr0-f173.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S932131AbdHUQGp (ORCPT ); Mon, 21 Aug 2017 12:06:45 -0400 Received: by mail-wr0-f173.google.com with SMTP id f8so67085483wrf.3 for ; Mon, 21 Aug 2017 09:06:44 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=baylibre-com.20150623.gappssmtp.com; s=20150623; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=bLDJHlnHH6vDGsocSpL8dA1RSCd6Js11psOh0i6k7tU=; b=tNGMdvpFTboeNMTzqIaV/icn0lSTyPWXrM5bpXjqW08KbccObyp0Lyk+OSGynYmUOU t4i5ibAMwFqeMUh5Z9sik3rRwxfyxAJdIb3aR58qKf4+rGQk0MBoA9cLXKmUns+jz20U fQshu4qEt4Sk1EReWoXHTKkitLTgSdKTjCsM/FOO7CFXdmqBYzLE2gpfEBc2RAwrubJF qrvx3wWH9BQchfPXO46CLHpcZ4ZBP3qO+ljAC6SFxFaMvfnZKengIgxmpSxhJVPPhlIJ GIq/kLvEoxtkNPSNyygq8rh+KcoBeRrfFfB+Jp0mCTedsQQ6fb3LPEoA4uJg/s66Yfv8 CfGw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=bLDJHlnHH6vDGsocSpL8dA1RSCd6Js11psOh0i6k7tU=; b=CU0+XOUlzwCDiagAnUBgFBSLHKemaCcuUxhk/WziSR6FLjTZJOZCqSjzepma1Ex39P SVySb7HDHEHg9cbujdTjsSTSHpnoU05PufHMSDu9wjUx0clld6Gl0HBESfUVIJZkcbjm i2NJpqRAlMZ0JzRg1IWXdlMo5r395vMrgBdHNV5DrDZizvBS0sDvrl6eOESK+tsoDqUs Pf9thr8PYRAiZJ1+D1YEJKO/ILivIKMCBY6yk9FK09uD8aYGi2thWbpC1/JRL29Tu6P+ yQXyJWS8CbuxEh7iozWgeaVJ0Qj5GgJ6U2zsb1tdSNGYHKXubo3v23/WsFXQil7S+2/f p5ag== X-Gm-Message-State: AHYfb5hu+T1nZCmW6gEGu+ebyJM/7A/U/7Z4EEexOhz8MY3xrW48ctUO B64DrVpylcZrZR3r X-Received: by 10.28.21.76 with SMTP id 73mr7126735wmv.73.1503331603813; Mon, 21 Aug 2017 09:06:43 -0700 (PDT) Received: from localhost.localdomain ([90.63.244.31]) by smtp.googlemail.com with ESMTPSA id r79sm12346432wmd.42.2017.08.21.09.06.42 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Mon, 21 Aug 2017 09:06:43 -0700 (PDT) From: Jerome Brunet To: Kevin Hilman , Carlo Caione Cc: Jerome Brunet , linux-amlogic@lists.infradead.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org Subject: [PATCH v2 3/9] ARM64: dts: meson: add mmc clk gate pins Date: Mon, 21 Aug 2017 18:06:31 +0200 Message-Id: <20170821160637.22456-4-jbrunet@baylibre.com> X-Mailer: git-send-email 2.9.5 In-Reply-To: <20170821160637.22456-1-jbrunet@baylibre.com> References: <20170821160637.22456-1-jbrunet@baylibre.com> Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Add the pinctrl to switch mmc clk pins in gpio (pulled down) mode. This is necessary to be able to gate the clk outside of the SoC while keeping it running in the controller Signed-off-by: Jerome Brunet --- .../arm64/boot/dts/amlogic/meson-gx-p23x-q20x.dtsi | 9 ++++-- .../boot/dts/amlogic/meson-gxbb-nanopi-k2.dts | 9 ++++-- .../boot/dts/amlogic/meson-gxbb-nexbox-a95x.dts | 11 +++++--- .../arm64/boot/dts/amlogic/meson-gxbb-odroidc2.dts | 8 ++++-- arch/arm64/boot/dts/amlogic/meson-gxbb-p20x.dtsi | 9 ++++-- .../boot/dts/amlogic/meson-gxbb-vega-s95.dtsi | 9 ++++-- arch/arm64/boot/dts/amlogic/meson-gxbb.dtsi | 33 ++++++++++++++++++++++ .../dts/amlogic/meson-gxl-s905x-hwacom-amazetv.dts | 6 ++-- .../dts/amlogic/meson-gxl-s905x-libretech-cc.dts | 6 ++-- .../dts/amlogic/meson-gxl-s905x-nexbox-a95x.dts | 9 ++++-- .../boot/dts/amlogic/meson-gxl-s905x-p212.dtsi | 9 ++++-- arch/arm64/boot/dts/amlogic/meson-gxl.dtsi | 33 ++++++++++++++++++++++ .../arm64/boot/dts/amlogic/meson-gxm-nexbox-a1.dts | 6 ++-- 13 files changed, 126 insertions(+), 31 deletions(-) -- 2.9.5 diff --git a/arch/arm64/boot/dts/amlogic/meson-gx-p23x-q20x.dtsi b/arch/arm64/boot/dts/amlogic/meson-gx-p23x-q20x.dtsi index cff39c5a2632..9ac904f75013 100644 --- a/arch/arm64/boot/dts/amlogic/meson-gx-p23x-q20x.dtsi +++ b/arch/arm64/boot/dts/amlogic/meson-gx-p23x-q20x.dtsi @@ -161,7 +161,8 @@ &sd_emmc_a { status = "okay"; pinctrl-0 = <&sdio_pins>; - pinctrl-names = "default"; + pinctrl-1 = <&sdio_clk_gate_pins>; + pinctrl-names = "default", "clk-gate"; #address-cells = <1>; #size-cells = <0>; @@ -187,7 +188,8 @@ &sd_emmc_b { status = "okay"; pinctrl-0 = <&sdcard_pins>; - pinctrl-names = "default"; + pinctrl-1 = <&sdcard_clk_gate_pins>; + pinctrl-names = "default", "clk-gate"; bus-width = <4>; cap-sd-highspeed; @@ -205,7 +207,8 @@ &sd_emmc_c { status = "okay"; pinctrl-0 = <&emmc_pins>; - pinctrl-names = "default"; + pinctrl-1 = <&emmc_clk_gate_pins>; + pinctrl-names = "default", "clk-gate"; bus-width = <8>; cap-mmc-highspeed; diff --git a/arch/arm64/boot/dts/amlogic/meson-gxbb-nanopi-k2.dts b/arch/arm64/boot/dts/amlogic/meson-gxbb-nanopi-k2.dts index b48a4576158a..e4c6b2fd52ee 100644 --- a/arch/arm64/boot/dts/amlogic/meson-gxbb-nanopi-k2.dts +++ b/arch/arm64/boot/dts/amlogic/meson-gxbb-nanopi-k2.dts @@ -192,7 +192,8 @@ &sd_emmc_a { status = "okay"; pinctrl-0 = <&sdio_pins>, <&sdio_irq_pins>; - pinctrl-names = "default"; + pinctrl-1 = <&sdio_clk_gate_pins>; + pinctrl-names = "default", "clk-gate"; #address-cells = <1>; #size-cells = <0>; @@ -218,7 +219,8 @@ &sd_emmc_b { status = "okay"; pinctrl-0 = <&sdcard_pins>; - pinctrl-names = "default"; + pinctrl-1 = <&sdcard_clk_gate_pins>; + pinctrl-names = "default", "clk-gate"; bus-width = <4>; cap-sd-highspeed; @@ -236,7 +238,8 @@ &sd_emmc_c { status = "disabled"; pinctrl-0 = <&emmc_pins>; - pinctrl-names = "default"; + pinctrl-1 = <&emmc_clk_gate_pins>; + pinctrl-names = "default", "clk-gate"; bus-width = <8>; max-frequency = <200000000>; diff --git a/arch/arm64/boot/dts/amlogic/meson-gxbb-nexbox-a95x.dts b/arch/arm64/boot/dts/amlogic/meson-gxbb-nexbox-a95x.dts index c64c2256d092..7342c31f73b6 100644 --- a/arch/arm64/boot/dts/amlogic/meson-gxbb-nexbox-a95x.dts +++ b/arch/arm64/boot/dts/amlogic/meson-gxbb-nexbox-a95x.dts @@ -51,7 +51,7 @@ / { compatible = "nexbox,a95x", "amlogic,meson-gxbb"; model = "NEXBOX A95X"; - + aliases { serial0 = &uart_AO; }; @@ -225,7 +225,8 @@ &sd_emmc_a { status = "okay"; pinctrl-0 = <&sdio_pins>; - pinctrl-names = "default"; + pinctrl-1 = <&sdio_clk_gate_pins>; + pinctrl-names = "default", "clk-gate"; #address-cells = <1>; #size-cells = <0>; @@ -246,7 +247,8 @@ &sd_emmc_b { status = "okay"; pinctrl-0 = <&sdcard_pins>; - pinctrl-names = "default"; + pinctrl-1 = <&sdcard_clk_gate_pins>; + pinctrl-names = "default", "clk-gate"; bus-width = <4>; cap-sd-highspeed; @@ -264,7 +266,8 @@ &sd_emmc_c { status = "okay"; pinctrl-0 = <&emmc_pins>; - pinctrl-names = "default"; + pinctrl-1 = <&emmc_clk_gate_pins>; + pinctrl-names = "default", "clk-gate"; bus-width = <8>; cap-mmc-highspeed; diff --git a/arch/arm64/boot/dts/amlogic/meson-gxbb-odroidc2.dts b/arch/arm64/boot/dts/amlogic/meson-gxbb-odroidc2.dts index a12303becab4..1ffa1c238a72 100644 --- a/arch/arm64/boot/dts/amlogic/meson-gxbb-odroidc2.dts +++ b/arch/arm64/boot/dts/amlogic/meson-gxbb-odroidc2.dts @@ -50,7 +50,7 @@ / { compatible = "hardkernel,odroid-c2", "amlogic,meson-gxbb"; model = "Hardkernel ODROID-C2"; - + aliases { serial0 = &uart_AO; }; @@ -253,7 +253,8 @@ &sd_emmc_b { status = "okay"; pinctrl-0 = <&sdcard_pins>; - pinctrl-names = "default"; + pinctrl-1 = <&sdcard_clk_gate_pins>; + pinctrl-names = "default", "clk-gate"; bus-width = <4>; cap-sd-highspeed; @@ -271,7 +272,8 @@ &sd_emmc_c { status = "okay"; pinctrl-0 = <&emmc_pins>; - pinctrl-names = "default"; + pinctrl-1 = <&emmc_clk_gate_pins>; + pinctrl-names = "default", "clk-gate"; bus-width = <8>; max-frequency = <200000000>; diff --git a/arch/arm64/boot/dts/amlogic/meson-gxbb-p20x.dtsi b/arch/arm64/boot/dts/amlogic/meson-gxbb-p20x.dtsi index 30b880b694de..99c409d1c8f8 100644 --- a/arch/arm64/boot/dts/amlogic/meson-gxbb-p20x.dtsi +++ b/arch/arm64/boot/dts/amlogic/meson-gxbb-p20x.dtsi @@ -187,7 +187,8 @@ &sd_emmc_a { status = "okay"; pinctrl-0 = <&sdio_pins>; - pinctrl-names = "default"; + pinctrl-1 = <&sdio_clk_gate_pins>; + pinctrl-names = "default", "clk-gate"; #address-cells = <1>; #size-cells = <0>; @@ -213,7 +214,8 @@ &sd_emmc_b { status = "okay"; pinctrl-0 = <&sdcard_pins>; - pinctrl-names = "default"; + pinctrl-1 = <&sdcard_clk_gate_pins>; + pinctrl-names = "default", "clk-gate"; bus-width = <4>; cap-sd-highspeed; @@ -231,7 +233,8 @@ &sd_emmc_c { status = "okay"; pinctrl-0 = <&emmc_pins>; - pinctrl-names = "default"; + pinctrl-1 = <&emmc_clk_gate_pins>; + pinctrl-names = "default", "clk-gate"; bus-width = <8>; cap-mmc-highspeed; diff --git a/arch/arm64/boot/dts/amlogic/meson-gxbb-vega-s95.dtsi b/arch/arm64/boot/dts/amlogic/meson-gxbb-vega-s95.dtsi index 0262ef8d48e4..f2bc6dea1fc6 100644 --- a/arch/arm64/boot/dts/amlogic/meson-gxbb-vega-s95.dtsi +++ b/arch/arm64/boot/dts/amlogic/meson-gxbb-vega-s95.dtsi @@ -155,7 +155,8 @@ &sd_emmc_a { status = "okay"; pinctrl-0 = <&sdio_pins &sdio_irq_pins>; - pinctrl-names = "default"; + pinctrl-1 = <&sdio_clk_gate_pins>; + pinctrl-names = "default", "clk-gate"; #address-cells = <1>; #size-cells = <0>; @@ -181,7 +182,8 @@ &sd_emmc_b { status = "okay"; pinctrl-0 = <&sdcard_pins>; - pinctrl-names = "default"; + pinctrl-1 = <&sdcard_clk_gate_pins>; + pinctrl-names = "default", "clk-gate"; bus-width = <4>; cap-sd-highspeed; @@ -198,7 +200,8 @@ &sd_emmc_c { status = "okay"; pinctrl-0 = <&emmc_pins>; - pinctrl-names = "default"; + pinctrl-1 = <&emmc_clk_gate_pins>; + pinctrl-names = "default", "clk-gate"; bus-width = <8>; cap-mmc-highspeed; diff --git a/arch/arm64/boot/dts/amlogic/meson-gxbb.dtsi b/arch/arm64/boot/dts/amlogic/meson-gxbb.dtsi index 9a1e478f80d5..1d6314e2eb8a 100644 --- a/arch/arm64/boot/dts/amlogic/meson-gxbb.dtsi +++ b/arch/arm64/boot/dts/amlogic/meson-gxbb.dtsi @@ -383,6 +383,17 @@ }; }; + emmc_clk_gate_pins: emmc_clk_gate { + mux { + groups = "BOOT_8"; + function = "gpio_periphs"; + }; + cfg-pull-down { + pins = "BOOT_8"; + bias-pull-down; + }; + }; + nor_pins: nor { mux { groups = "nor_d", @@ -421,6 +432,17 @@ }; }; + sdcard_clk_gate_pins: sdcard_clk_gate { + mux { + groups = "CARD_2"; + function = "gpio_periphs"; + }; + cfg-pull-down { + pins = "CARD_2"; + bias-pull-down; + }; + }; + sdio_pins: sdio { mux { groups = "sdio_d0", @@ -433,6 +455,17 @@ }; }; + sdio_clk_gate_pins: sdio_clk_gate { + mux { + groups = "GPIOX_4"; + function = "gpio_periphs"; + }; + cfg-pull-down { + pins = "GPIOX_4"; + bias-pull-down; + }; + }; + sdio_irq_pins: sdio_irq { mux { groups = "sdio_irq"; diff --git a/arch/arm64/boot/dts/amlogic/meson-gxl-s905x-hwacom-amazetv.dts b/arch/arm64/boot/dts/amlogic/meson-gxl-s905x-hwacom-amazetv.dts index f779a985f923..977b4240f3c1 100644 --- a/arch/arm64/boot/dts/amlogic/meson-gxl-s905x-hwacom-amazetv.dts +++ b/arch/arm64/boot/dts/amlogic/meson-gxl-s905x-hwacom-amazetv.dts @@ -123,7 +123,8 @@ &sd_emmc_b { status = "okay"; pinctrl-0 = <&sdcard_pins>; - pinctrl-names = "default"; + pinctrl-1 = <&sdcard_clk_gate_pins>; + pinctrl-names = "default", "clk-gate"; bus-width = <4>; cap-sd-highspeed; @@ -141,7 +142,8 @@ &sd_emmc_c { status = "okay"; pinctrl-0 = <&emmc_pins>; - pinctrl-names = "default"; + pinctrl-1 = <&emmc_clk_gate_pins>; + pinctrl-names = "default", "clk-gate"; bus-width = <8>; cap-mmc-highspeed; diff --git a/arch/arm64/boot/dts/amlogic/meson-gxl-s905x-libretech-cc.dts b/arch/arm64/boot/dts/amlogic/meson-gxl-s905x-libretech-cc.dts index 51c4ecc3b31e..2b56f7d9be2b 100644 --- a/arch/arm64/boot/dts/amlogic/meson-gxl-s905x-libretech-cc.dts +++ b/arch/arm64/boot/dts/amlogic/meson-gxl-s905x-libretech-cc.dts @@ -134,7 +134,8 @@ &sd_emmc_b { status = "okay"; pinctrl-0 = <&sdcard_pins>; - pinctrl-names = "default"; + pinctrl-1 = <&sdcard_clk_gate_pins>; + pinctrl-names = "default", "clk-gate"; bus-width = <4>; cap-sd-highspeed; @@ -156,7 +157,8 @@ &sd_emmc_c { status = "okay"; pinctrl-0 = <&emmc_pins>; - pinctrl-names = "default"; + pinctrl-1 = <&emmc_clk_gate_pins>; + pinctrl-names = "default", "clk-gate"; bus-width = <8>; cap-mmc-highspeed; diff --git a/arch/arm64/boot/dts/amlogic/meson-gxl-s905x-nexbox-a95x.dts b/arch/arm64/boot/dts/amlogic/meson-gxl-s905x-nexbox-a95x.dts index 83c35efbae8b..df448b11a16b 100644 --- a/arch/arm64/boot/dts/amlogic/meson-gxl-s905x-nexbox-a95x.dts +++ b/arch/arm64/boot/dts/amlogic/meson-gxl-s905x-nexbox-a95x.dts @@ -182,7 +182,8 @@ &sd_emmc_a { status = "okay"; pinctrl-0 = <&sdio_pins>; - pinctrl-names = "default"; + pinctrl-1 = <&sdio_clk_gate_pins>; + pinctrl-names = "default", "clk-gate"; #address-cells = <1>; #size-cells = <0>; @@ -203,7 +204,8 @@ &sd_emmc_b { status = "okay"; pinctrl-0 = <&sdcard_pins>; - pinctrl-names = "default"; + pinctrl-1 = <&sdcard_clk_gate_pins>; + pinctrl-names = "default", "clk-gate"; bus-width = <4>; cap-sd-highspeed; @@ -221,7 +223,8 @@ &sd_emmc_c { status = "okay"; pinctrl-0 = <&emmc_pins>; - pinctrl-names = "default"; + pinctrl-1 = <&emmc_clk_gate_pins>; + pinctrl-names = "default", "clk-gate"; bus-width = <8>; cap-mmc-highspeed; diff --git a/arch/arm64/boot/dts/amlogic/meson-gxl-s905x-p212.dtsi b/arch/arm64/boot/dts/amlogic/meson-gxl-s905x-p212.dtsi index 8899121f79e1..129af9068814 100644 --- a/arch/arm64/boot/dts/amlogic/meson-gxl-s905x-p212.dtsi +++ b/arch/arm64/boot/dts/amlogic/meson-gxl-s905x-p212.dtsi @@ -95,7 +95,8 @@ &sd_emmc_a { status = "okay"; pinctrl-0 = <&sdio_pins>; - pinctrl-names = "default"; + pinctrl-1 = <&sdio_clk_gate_pins>; + pinctrl-names = "default", "clk-gate"; #address-cells = <1>; #size-cells = <0>; @@ -116,7 +117,8 @@ &sd_emmc_b { status = "okay"; pinctrl-0 = <&sdcard_pins>; - pinctrl-names = "default"; + pinctrl-1 = <&sdcard_clk_gate_pins>; + pinctrl-names = "default", "clk-gate"; bus-width = <4>; cap-sd-highspeed; @@ -134,7 +136,8 @@ &sd_emmc_c { status = "okay"; pinctrl-0 = <&emmc_pins>; - pinctrl-names = "default"; + pinctrl-1 = <&emmc_clk_gate_pins>; + pinctrl-names = "default", "clk-gate"; bus-width = <8>; cap-mmc-highspeed; diff --git a/arch/arm64/boot/dts/amlogic/meson-gxl.dtsi b/arch/arm64/boot/dts/amlogic/meson-gxl.dtsi index 071eca074a91..e3433a4bf451 100644 --- a/arch/arm64/boot/dts/amlogic/meson-gxl.dtsi +++ b/arch/arm64/boot/dts/amlogic/meson-gxl.dtsi @@ -271,6 +271,17 @@ }; }; + emmc_clk_gate_pins: emmc_clk_gate { + mux { + groups = "BOOT_8"; + function = "gpio_periphs"; + }; + cfg-pull-down { + pins = "BOOT_8"; + bias-pull-down; + }; + }; + nor_pins: nor { mux { groups = "nor_d", @@ -309,6 +320,17 @@ }; }; + sdcard_clk_gate_pins: sdcard_clk_gate { + mux { + groups = "CARD_2"; + function = "gpio_periphs"; + }; + cfg-pull-down { + pins = "CARD_2"; + bias-pull-down; + }; + }; + sdio_pins: sdio { mux { groups = "sdio_d0", @@ -321,6 +343,17 @@ }; }; + sdio_clk_gate_pins: sdio_clk_gate { + mux { + groups = "GPIOX_4"; + function = "gpio_periphs"; + }; + cfg-pull-down { + pins = "GPIOX_4"; + bias-pull-down; + }; + }; + sdio_irq_pins: sdio_irq { mux { groups = "sdio_irq"; diff --git a/arch/arm64/boot/dts/amlogic/meson-gxm-nexbox-a1.dts b/arch/arm64/boot/dts/amlogic/meson-gxm-nexbox-a1.dts index 583da09acf66..7af153535073 100644 --- a/arch/arm64/boot/dts/amlogic/meson-gxm-nexbox-a1.dts +++ b/arch/arm64/boot/dts/amlogic/meson-gxm-nexbox-a1.dts @@ -168,7 +168,8 @@ &sd_emmc_b { status = "okay"; pinctrl-0 = <&sdcard_pins>; - pinctrl-names = "default"; + pinctrl-1 = <&sdcard_clk_gate_pins>; + pinctrl-names = "default", "clk-gate"; bus-width = <4>; cap-sd-highspeed; @@ -186,7 +187,8 @@ &sd_emmc_c { status = "okay"; pinctrl-0 = <&emmc_pins>; - pinctrl-names = "default"; + pinctrl-1 = <&emmc_clk_gate_pins>; + pinctrl-names = "default", "clk-gate"; bus-width = <8>; cap-mmc-highspeed; From patchwork Mon Aug 21 16:06:32 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jerome Brunet X-Patchwork-Id: 110581 Delivered-To: patch@linaro.org Received: by 10.140.95.78 with SMTP id h72csp1491553qge; Mon, 21 Aug 2017 09:08:19 -0700 (PDT) X-Received: by 10.84.231.206 with SMTP id g14mr20065548pln.394.1503331699700; Mon, 21 Aug 2017 09:08:19 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1503331699; cv=none; d=google.com; s=arc-20160816; b=oDeAsjSXNaVJuZytsndyhG9noo2LnIUrHhvY4sKTxi89SzAnuxMGwSri1Nq2oIRkd2 FRZD2TY8V+JkVbnYPdatI3K/HIXabTBfsmAf3h75aHNibnk/j0/LvxRyWbCUIMzdWeUM PXo5UdcDPmh9oj9paGIqhKJ2MZ/wYdPOEbtkI+n91kCfnUGkpjg3QTB8/EvRnTpZPGtt +fk1Gp+rJ7Y8NpziH1LCxo5hT7WmkWij5zKxTFhzYtAuNlHBcgNffYIYzZ496/dd5wYI rc5ejVsE3Kvf9Lw9fwBZtR2imBxfwfpvpE45fzyv6NTF40rsxk0fWzBwzEbyyfLCR5Lt wUoQ== ARC-Message-Signature: i=1; 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[209.132.180.67]) by mx.google.com with ESMTP id p188si7306243pga.521.2017.08.21.09.08.19; Mon, 21 Aug 2017 09:08:19 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@baylibre-com.20150623.gappssmtp.com header.s=20150623 header.b=oT+hczub; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S932196AbdHUQIR (ORCPT + 26 others); Mon, 21 Aug 2017 12:08:17 -0400 Received: from mail-wr0-f170.google.com ([209.85.128.170]:35761 "EHLO mail-wr0-f170.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1754405AbdHUQGq (ORCPT ); Mon, 21 Aug 2017 12:06:46 -0400 Received: by mail-wr0-f170.google.com with SMTP id k46so28476827wre.2 for ; Mon, 21 Aug 2017 09:06:45 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=baylibre-com.20150623.gappssmtp.com; s=20150623; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=zPHBd80W0jIEr0U5KiMu3G0meGsq+1Q1/3dWhj3EJTI=; b=oT+hczubaKxrOqNUQ6aZJl248M4zfBGMMVmAWwPbnVb0s/Bbc7MKG/8rFKDnjMMQMH 91LOx+rrWVlTRYCOnCsHGuDygZengyfMlh/5eK78sFyMzoT212t5Lftlv4GwK7nrdIJw wGCRDBpJlF7zE+16s3L39Ld5khj/kZm4zXH6UkawEe8s7VAbtU5+q7UVYeFGKm3MaveY rHGJv//Yf9OX6tjojwo6YRxMotXLHk9AdslDzq85/2Bjn3/NAzwBJHqrjG0yfILu5wpM DNh1kZfu27Yj1QSIg2HG9bkEqZyNv1m7zG3sPBXj/2NLPeaa2Yt0NQ+K4TVbNO6gs8wM 8sOw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=zPHBd80W0jIEr0U5KiMu3G0meGsq+1Q1/3dWhj3EJTI=; b=EWNctWEGxyhvcyftUkYX/NYGLa8rOBk75cyiSUd5rR5iqxHLZMgsaheAU0ihJO6ebT SduSbIKBGS97Vx0jFtclQkfoWBWagk47rGW8vX0LG7hrxdQMuLaWo87d4lV89pQIqCRP WeTHNmwgSxiiHmZwbJ97eM8SYMCsrRA+/IUa8dcRN2ncb+rsd+/tsA2OCsJ14KvU37rB PgN83ZRKhqC60VHPr8P552JtPEN59Z3UAqKVIFOJmMwnaDDSPcOMFBt23JXpXM0507Nt HmPBraZ9dr7XhVBUPaiuF8Zq9Emn3+pBNlpdaH66IpaUzSJ4e06Y7mkVKQTWryN760C1 K8RA== X-Gm-Message-State: AHYfb5gJyGErS+Oqd7NbG5r7vRq/M1P/fNCKega1WxGhR178rZUmbsJQ kFgjmS2EAmpeme4X X-Received: by 10.28.147.206 with SMTP id v197mr2198577wmd.133.1503331605015; Mon, 21 Aug 2017 09:06:45 -0700 (PDT) Received: from localhost.localdomain ([90.63.244.31]) by smtp.googlemail.com with ESMTPSA id r79sm12346432wmd.42.2017.08.21.09.06.43 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Mon, 21 Aug 2017 09:06:44 -0700 (PDT) From: Jerome Brunet To: Kevin Hilman , Carlo Caione Cc: Jerome Brunet , linux-amlogic@lists.infradead.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org Subject: [PATCH v2 4/9] ARM64: dts: meson-gxbb: nanopi-k2: add card regulator settle times Date: Mon, 21 Aug 2017 18:06:32 +0200 Message-Id: <20170821160637.22456-5-jbrunet@baylibre.com> X-Mailer: git-send-email 2.9.5 In-Reply-To: <20170821160637.22456-1-jbrunet@baylibre.com> References: <20170821160637.22456-1-jbrunet@baylibre.com> Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Changing the card voltage on the nanopi-k2 is not instantaneous, especially when switching from 3.3v to 1.8v. It take at least 3ms for the regulator to go from 3.3v to 1.8v. Add margin to that to make sure we don't upset the sdcard during the voltage switch Fixes: 9bc7ffb08daf ("arm64: dts: amlogic: Add NanoPi K2") Signed-off-by: Jerome Brunet --- arch/arm64/boot/dts/amlogic/meson-gxbb-nanopi-k2.dts | 3 +++ 1 file changed, 3 insertions(+) -- 2.9.5 diff --git a/arch/arm64/boot/dts/amlogic/meson-gxbb-nanopi-k2.dts b/arch/arm64/boot/dts/amlogic/meson-gxbb-nanopi-k2.dts index e4c6b2fd52ee..de4ed28d78bc 100644 --- a/arch/arm64/boot/dts/amlogic/meson-gxbb-nanopi-k2.dts +++ b/arch/arm64/boot/dts/amlogic/meson-gxbb-nanopi-k2.dts @@ -107,6 +107,9 @@ states = <3300000 0>, <1800000 1>; + + regulator-settling-time-up-us = <100>; + regulator-settling-time-down-us = <5000>; }; wifi_32k: wifi-32k { From patchwork Mon Aug 21 16:06:33 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jerome Brunet X-Patchwork-Id: 110576 Delivered-To: patch@linaro.org Received: by 10.182.109.195 with SMTP id hu3csp4247487obb; Mon, 21 Aug 2017 09:06:54 -0700 (PDT) X-Received: by 10.98.63.146 with SMTP id z18mr1324744pfj.256.1503331614873; Mon, 21 Aug 2017 09:06:54 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1503331614; cv=none; d=google.com; s=arc-20160816; b=wQWPx5rikJikLfzd6cockkjD6fkznK5dG8+XwJBBrWIdD/ybrnZd3tnLD0YxRPskiC vX5RLWZ59d/61AoePZglAHAfh1AliWR46t75vtT1Fs6wXClnL/6yWwB+mzsNWaJmXD5j KI6BtjImb8attV36tBq4zVGyXMSOes8UgdYukBXunxIKWvpJZsrhLHK9KUZiFKeDyuwp xHlUWcWInVpekFWfhM2huCetUGmw7uauUac4quoq50QhHW8Cyt2eKkxC0NpsvcRyR+PP B8O4cZfgQdwZ87ty+eMdwO/v+T30xEON1R/jDbm4BmoRtN2mtJIhezoc1XpZpZ39mhDW 27iw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:references:in-reply-to:message-id:date :subject:cc:to:from:dkim-signature:arc-authentication-results; bh=7c7D0zv0g5yaIKJa4SbdcT/Z1NduI/6pFQ7GEpoQZ1s=; b=Cyn8pXc/Gmd7IQ94g4cUCiN2xX/kMhOygMZkOsqqpci92YME1RFsGRwacw6Ja6NGid sZJkhpnUEEp3YIpYyJhWv3mtRk7PPzTFY+L004Z5LGCp3vcvfXPGz5ZZalgA+K9P1zH7 S954e/TsDKnThBjM7+F5eeb4ManmilUrLZCY8e7/OIz3BQ3thm8YuatGyePLmTRmh6/u oq0NxX3BnGaIuE1Vknysu6r2XHjMrT8LyroDr6gZlWfbxeI1EHPtYIkxcDLv5IDaREt9 RvFUjCvTe7VAm5EiyDPUfuMAALUaI9/yzRulAR+5JlmON9JNNqg79qI6e0TSox4CbKui iFHg== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@baylibre-com.20150623.gappssmtp.com header.s=20150623 header.b=pTTlJsqn; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. 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It take at least 30ms for the regulator to go from 3.3v to 1.8v. Add margin to that to make sure we don't upset the sdcard during the voltage switch Fixes: 61ff2af9b278 ("ARM64: dts: fixup libretech cc definition") Signed-off-by: Jerome Brunet --- arch/arm64/boot/dts/amlogic/meson-gxl-s905x-libretech-cc.dts | 3 +++ 1 file changed, 3 insertions(+) -- 2.9.5 diff --git a/arch/arm64/boot/dts/amlogic/meson-gxl-s905x-libretech-cc.dts b/arch/arm64/boot/dts/amlogic/meson-gxl-s905x-libretech-cc.dts index 2b56f7d9be2b..0537b92cd226 100644 --- a/arch/arm64/boot/dts/amlogic/meson-gxl-s905x-libretech-cc.dts +++ b/arch/arm64/boot/dts/amlogic/meson-gxl-s905x-libretech-cc.dts @@ -92,6 +92,9 @@ states = <3300000 0>, <1800000 1>; + + regulator-settling-time-up-us = <200>; + regulator-settling-time-down-us = <50000>; }; vddio_boot: regulator-vddio_boot { From patchwork Mon Aug 21 16:06:34 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jerome Brunet X-Patchwork-Id: 110580 Delivered-To: patch@linaro.org Received: by 10.140.95.78 with SMTP id h72csp1491092qge; Mon, 21 Aug 2017 09:07:59 -0700 (PDT) X-Received: by 10.98.58.204 with SMTP id v73mr17430627pfj.191.1503331679742; Mon, 21 Aug 2017 09:07:59 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1503331679; cv=none; d=google.com; s=arc-20160816; b=s4VUEWRcIsr2h1vzkHJxSlfcuKabECFf+q/z+ZoAqngsXZ2V0H3+fFclrORM4WOMSt VpSckKDVcUWmHei0Er0D0EKhih0UNNYf6sB0e/c1V1/x5Exz6JWUXakuz9Pedo+xOjsR mnW9ETd4XtXbOuC4nvYtUj371h/9eGY6YPs09EhrMJu7/fqz7/mXeP/v+8fJJHVMHRkh Wbp41UaRvNUgib/xObf8LLDAT4K09r/XFS7vnepUDbRBIdkqQEUD5RoM5C+Ac4ivc4EP vvzL4tngNsvVC4isk/VALfkzcl4+MFoo8QPtVZBjJNJjrXAVSl4YszzodpYbJeHOAN9V sg3Q== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:references:in-reply-to:message-id:date :subject:cc:to:from:dkim-signature:arc-authentication-results; bh=SLSBCl4ht/w5SKt+jvk+2o/AfCf81g91YHj4+7dtHjc=; b=v1r9Ez1hFVUtXNECi2szmrApZRXDHlIFhh/BAVnYEurLydI7EKa7mUtg9LyyiGOdXJ TEt+oJyXE2Xd3z7d5SMOudpiyn9hvAENm9isEK6qFP8blxPM6wJ2ivEHx38cN5Grcq7O OJyJ8IXx6JFxoOvtzmeMGH7x+j4FdiCgA3sJD6FQQDPKl6qZqwFD6cAl9LdOyQdHxQSj NiIPSUPeGzLqYB93EHe7RYddEGHx/Hca4m3uZaeNE/Oc/D0UVxhTNx3TwGLDQaZqTQDE hOs3S9CdeqF50IGWtkajXptImyIy/9HUuk3GUBslXQkZePSFYFTc5Fr0+0Bgz2BvTeJf uEow== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@baylibre-com.20150623.gappssmtp.com header.s=20150623 header.b=A+f3glgL; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. 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Mon, 21 Aug 2017 09:06:47 -0700 (PDT) Received: from localhost.localdomain ([90.63.244.31]) by smtp.googlemail.com with ESMTPSA id r79sm12346432wmd.42.2017.08.21.09.06.46 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Mon, 21 Aug 2017 09:06:46 -0700 (PDT) From: Jerome Brunet To: Kevin Hilman , Carlo Caione Cc: Jerome Brunet , linux-amlogic@lists.infradead.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org Subject: [PATCH v2 6/9] ARM64: dts: meson-gxl: libretech-cc: remove sdr104 capability Date: Mon, 21 Aug 2017 18:06:34 +0200 Message-Id: <20170821160637.22456-7-jbrunet@baylibre.com> X-Mailer: git-send-email 2.9.5 In-Reply-To: <20170821160637.22456-1-jbrunet@baylibre.com> References: <20170821160637.22456-1-jbrunet@baylibre.com> Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Unfortunately, the PCB of the libretech-cc cannot handle sdcard at 200Mhz reliably, so sdr104 is removed Signed-off-by: Jerome Brunet --- arch/arm64/boot/dts/amlogic/meson-gxl-s905x-libretech-cc.dts | 1 - 1 file changed, 1 deletion(-) -- 2.9.5 diff --git a/arch/arm64/boot/dts/amlogic/meson-gxl-s905x-libretech-cc.dts b/arch/arm64/boot/dts/amlogic/meson-gxl-s905x-libretech-cc.dts index 0537b92cd226..a582152f5e63 100644 --- a/arch/arm64/boot/dts/amlogic/meson-gxl-s905x-libretech-cc.dts +++ b/arch/arm64/boot/dts/amlogic/meson-gxl-s905x-libretech-cc.dts @@ -145,7 +145,6 @@ sd-uhs-sdr12; sd-uhs-sdr25; sd-uhs-sdr50; - sd-uhs-sdr104; max-frequency = <100000000>; disable-wp; From patchwork Mon Aug 21 16:06:35 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jerome Brunet X-Patchwork-Id: 110579 Delivered-To: patch@linaro.org Received: by 10.182.109.195 with SMTP id hu3csp4248418obb; Mon, 21 Aug 2017 09:07:42 -0700 (PDT) X-Received: by 10.99.121.201 with SMTP id u192mr17411721pgc.214.1503331662038; Mon, 21 Aug 2017 09:07:42 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1503331662; cv=none; d=google.com; s=arc-20160816; b=UM2KDnGbRgTUBJtyytw7DObmvrTlBztQann6K5nhN+aueDE1SqZImMBBI6YcrLiqwN /UMD6VxtmJQXDbysrKSmnC2QcV1l3oe3W6gjYW/UWo99LzIUSJOnyoVtndCXI605TXHa zecwh0fJHqhtqwp/T35WaTfadndbxZ6hzVcf9EU83G8u408bMINhh89xbOGPmtLoNpq0 2USeAxFpg7M81JJiLMcs6tOOlOA9wCYcd27xzFGEXb1xwuYd6MM+pW/eHuwSJwoEsZ5o elWx12aorfIVziwF2uYC04D8ncSibKjTiZzwbcX0eIB9FMxEXpgWd7EUySEsPKZ1qTK1 7Xmw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; 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[209.132.180.67]) by mx.google.com with ESMTP id k133si7421017pgc.90.2017.08.21.09.07.41; Mon, 21 Aug 2017 09:07:42 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@baylibre-com.20150623.gappssmtp.com header.s=20150623 header.b=MbnIHIdT; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1754499AbdHUQHh (ORCPT + 26 others); Mon, 21 Aug 2017 12:07:37 -0400 Received: from mail-wr0-f172.google.com ([209.85.128.172]:32817 "EHLO mail-wr0-f172.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1754377AbdHUQGt (ORCPT ); Mon, 21 Aug 2017 12:06:49 -0400 Received: by mail-wr0-f172.google.com with SMTP id 30so30640079wrk.0 for ; Mon, 21 Aug 2017 09:06:48 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=baylibre-com.20150623.gappssmtp.com; s=20150623; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=egFL+DPfeVWVZWP3zG0OVbtxl9oE+rTAWjh8qZ5T7Gc=; b=MbnIHIdTkFOeZbqb/8Wraav2JrRTebacilppepD3/HAxw1nRcjEGw09f4o1yaA6kng KRs4mX8/a3zbheOisVSIHZHbuH4x5n3DM9rBYbWxjoXLW5SfEAYmvUj/b72An/KI7c8c vWu+eoGGGMsUd6HQWRYeRzW1bGXe2mxJNZYF6mfssU2CI3z+faFkhUZ6TX1bRD+C+1MH ODbvHQLV78kBAyy05n7eE7mPh9U4AE98uTov6vTFXp1+Yu3bbz8S8UJKh4lP9XLyzx5r 4bCFmrxrKvIdM4ubHfzR8UAAZUKvIeWA+n07DUoaZi7oVIiW8Ou/zxxByZlRJgi/ek9b vasQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=egFL+DPfeVWVZWP3zG0OVbtxl9oE+rTAWjh8qZ5T7Gc=; b=iClKLZjELrWXmDIHYzfbTPkwmz04CqG8LX0Miwpqk2RJWhfb6WF6Bq0l1WK4UlGqI7 8vI05DxyNHJpIXUYq9vFLwKPD575aLrRdkJGwnxpNB0R/OFca+jb2rG0jiZ2+6X3+o31 Q1XXfzJMOiYuYFu87vr9htCTSsaMv7V6NARjYYbSvrFRp0Yb1gJRCVCZ03O9112Ygwh/ 4KtfsZspjXjBv1GInQFZeY8gGajtHcMzeRxVrNFF3Zz0w8NXatt6s6P/q6g6q/xv4CTu 8Qr0BgtGEMJ2bJcpoq03iRn0IFYV12DMvb1+Zm0gXW8jn7Lw6fk28S/OqGWnEovknj7L wi7A== X-Gm-Message-State: AHYfb5g5yiJR50N6pJQv689o3QbDP4xzoji1AXnCrPF6KYco6BhIndGY GqWZJZans2HoYIG8 X-Received: by 10.223.134.47 with SMTP id 44mr8396698wrv.73.1503331608192; Mon, 21 Aug 2017 09:06:48 -0700 (PDT) Received: from localhost.localdomain ([90.63.244.31]) by smtp.googlemail.com with ESMTPSA id r79sm12346432wmd.42.2017.08.21.09.06.47 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Mon, 21 Aug 2017 09:06:47 -0700 (PDT) From: Jerome Brunet To: Kevin Hilman , Carlo Caione Cc: Jerome Brunet , linux-amlogic@lists.infradead.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org Subject: [PATCH v2 7/9] ARM64: dts: meson-gxbb: p20x: enable sdcard UHS modes Date: Mon, 21 Aug 2017 18:06:35 +0200 Message-Id: <20170821160637.22456-8-jbrunet@baylibre.com> X-Mailer: git-send-email 2.9.5 In-Reply-To: <20170821160637.22456-1-jbrunet@baylibre.com> References: <20170821160637.22456-1-jbrunet@baylibre.com> Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Enable sdcard UHS modes, up to SDR50, on p20x based boards. While the s905 supports SDR104 mode, it appears that the PCB of p20x based boards can't cope with a rate as high as 200Mhz. Signed-off-by: Jerome Brunet --- arch/arm64/boot/dts/amlogic/meson-gxbb-p20x.dtsi | 3 +++ 1 file changed, 3 insertions(+) -- 2.9.5 diff --git a/arch/arm64/boot/dts/amlogic/meson-gxbb-p20x.dtsi b/arch/arm64/boot/dts/amlogic/meson-gxbb-p20x.dtsi index 99c409d1c8f8..d5dad8fa4993 100644 --- a/arch/arm64/boot/dts/amlogic/meson-gxbb-p20x.dtsi +++ b/arch/arm64/boot/dts/amlogic/meson-gxbb-p20x.dtsi @@ -219,6 +219,9 @@ bus-width = <4>; cap-sd-highspeed; + sd-uhs-sdr12; + sd-uhs-sdr25; + sd-uhs-sdr50; max-frequency = <100000000>; disable-wp; From patchwork Mon Aug 21 16:06:36 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jerome Brunet X-Patchwork-Id: 110577 Delivered-To: patch@linaro.org Received: by 10.182.109.195 with SMTP id hu3csp4247550obb; Mon, 21 Aug 2017 09:06:58 -0700 (PDT) X-Received: by 10.98.141.149 with SMTP id p21mr17816457pfk.264.1503331617914; Mon, 21 Aug 2017 09:06:57 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1503331617; cv=none; d=google.com; s=arc-20160816; b=tAgTatjWpJwKAbLjp9puwGZKZSATqiNmP92Xq3zptMHWwtil0aHIf0P5l0J5n4779e k1xHD4zfQjuScs76pO+DjM6ILMw3BKC6DqduAHD0Hb5qogwL+AoG/K1Owy9X1ykcUxt3 pKlSNlpunaYpFAGAGf1RrsVDVy4TaDGk7lOSFMbyspHysMVCghUkFnYvTvavvZVfpPwD DCC2vXblKBcD4wJxUQROT7NGB435zsiA134lpyJBSaaL36UEl9ng38H91NlGDCbX7YdK +6K6UW2Zi+IT+v+u4hNT2BPG6V5bmhxSxWV3vvftHcy1RKlMx7tlWqju3J9E374QZv4X N5TA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:references:in-reply-to:message-id:date :subject:cc:to:from:dkim-signature:arc-authentication-results; bh=p7Yojx3EdYzvZKguX1rVOvuRR0/iDbBMKkm+ix0Xfrg=; b=R+eUQUEymbr8EQW71eQG6Vw7AhJLV8zy+rAtMgy2bKyGHdi7bJtwqRQzBYVTORRSg1 9YPM0cs2J0rguQPk/6ZbKcnNRKWZ0xdwOoMaQS6K2tKONQiktvx9/RjWxCW9lh+tfsgw 6GJo4jCqDGm8qqAndmA6sbUxWHNNr/+B4eglKVeDlTotDf0atrmR3Gtw+Z9lzUvnAvcA O4MwCGG8VAZTKkLtF1KHAxnPX6TaNRIzEOXxMPutKusFRX9IvrrI16yoebLe2AZD4Ow2 wam3CRLQHtpo7KxjWQ1bL+Fglxv5UoQWYEzQ1XecNOJb4ZKYNNwl1nqAXfN7r862oKM5 aEyg== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@baylibre-com.20150623.gappssmtp.com header.s=20150623 header.b=0B/T8Y5k; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. 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Signed-off-by: Jerome Brunet --- arch/arm64/boot/dts/amlogic/meson-gxbb-nanopi-k2.dts | 3 +++ 1 file changed, 3 insertions(+) -- 2.9.5 diff --git a/arch/arm64/boot/dts/amlogic/meson-gxbb-nanopi-k2.dts b/arch/arm64/boot/dts/amlogic/meson-gxbb-nanopi-k2.dts index de4ed28d78bc..38630871c2ea 100644 --- a/arch/arm64/boot/dts/amlogic/meson-gxbb-nanopi-k2.dts +++ b/arch/arm64/boot/dts/amlogic/meson-gxbb-nanopi-k2.dts @@ -227,6 +227,9 @@ bus-width = <4>; cap-sd-highspeed; + sd-uhs-sdr12; + sd-uhs-sdr25; + sd-uhs-sdr50; max-frequency = <100000000>; disable-wp;