From patchwork Tue Aug 22 13:17:39 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Linus Walleij X-Patchwork-Id: 110659 Delivered-To: patch@linaro.org Received: by 10.140.95.78 with SMTP id h72csp2668667qge; Tue, 22 Aug 2017 06:17:49 -0700 (PDT) X-Received: by 10.99.113.25 with SMTP id m25mr710099pgc.432.1503407869382; Tue, 22 Aug 2017 06:17:49 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1503407869; cv=none; d=google.com; s=arc-20160816; b=PBJ4E6qXkD0Y++Gr3Nz3poLbDNb+X5KSKtTxoa1JpMSHawuTg8MC0kXVejTS0TKK1K Xg9iHj/X2mD9khXRMXPDMc0X8fUx0q6M0q7lMt3/2daGU4/mKEQOCsVwX5esthQk17wY FHN0uXaZmMI2el7Zi3cQ9sew2Tl/HYnYLJQ2lqRalwt2wW89ElQ4ZxyGmKa2lmzC0VdH prHl8JKpveKDVCtPqmMs69UaF1ug973DW6swzxvd5Lt3taa78XknmNzjDSZodRhmn2PN 9TBLYVE3Af4XzES/iRTlTxwLda9fXDR7VwLkzuLRH3BZirz1AoS6bw0K5el+E5LLJUAv 2GKA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:message-id:date:subject:cc:to:from :dkim-signature:arc-authentication-results; bh=nSdqv01h6cg8IJWVgaJGVvboChFqRrTTF50NAZnESJ0=; b=HjYoPteARMkZwcv0BoFdsKeZsIdrjM803y9fABLeIQmTuIzudDbEKxiwBOGgLp+3Gj 8N5BoCs/gnBRyypfSqulksyTqi8Tjo1BED2ffhfVQF3rVycQXLwmmVgkpxyIgRnJpSVf dY2PfAvUWCQOxTmVnL281Cjb0ma9m65kNlhroi7n8zAnoiF4UYcnDZVpzLCOsFnqZo3h 3Y3BTgNhv21tU9BmF8AbrDbWsZpXls1c+m/7xt60bpFumcKZ7IoqnKgtRixrNyMF5hvp zO+MT4H3t5HbyWBI4Ysjf9PZIQESuPefPv3TDZqDETgrNgA20Vqfy2kXzYJRJq5+9AQ5 hi6g== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=fnO40mO/; spf=pass (google.com: best guess record for domain of linux-pm-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-pm-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id v78si8951896pfd.552.2017.08.22.06.17.49; Tue, 22 Aug 2017 06:17:49 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-pm-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=fnO40mO/; spf=pass (google.com: best guess record for domain of linux-pm-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-pm-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S932833AbdHVNRs (ORCPT + 12 others); Tue, 22 Aug 2017 09:17:48 -0400 Received: from mail-lf0-f49.google.com ([209.85.215.49]:36116 "EHLO mail-lf0-f49.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S932657AbdHVNRr (ORCPT ); Tue, 22 Aug 2017 09:17:47 -0400 Received: by mail-lf0-f49.google.com with SMTP id l137so3952776lfg.3 for ; Tue, 22 Aug 2017 06:17:47 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id; bh=nSdqv01h6cg8IJWVgaJGVvboChFqRrTTF50NAZnESJ0=; b=fnO40mO/aDtWtPkPOqnUomH5JmnS9R+TmLuZK/4Rn5nqS5+V6hH4EGfBrW5E66sOPj vOZmOclIsb+vwv9gXcf1AjrvgQq6T09rgzIZ4VZQyhTbpD41umpHB9UXNz/nH0IjXJC2 KTGEHvOiP9AocSV4QGozpF0oBB9sgEgCx96+8= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id; bh=nSdqv01h6cg8IJWVgaJGVvboChFqRrTTF50NAZnESJ0=; b=quhoqtcU85dJVzrs3PY0aWxDBOZuZjGxl8a1GFVmmMpx0n9xAGc0ZItaBsdI9TPQWG 9LGIU2BUAm8bXf2SQGVxHRwheyih0R4vhBzFqiiMo1W/DlvIafqOARNcHjNTIMf2UzBL Kz9q8wPe5Jf+YRn/vxN1CrDJC5/wsgljzYfVt0K8NI6/8pTW40xkb0oA9OjWKtIMfDqn rKqgjYReW4gnBJcFGK8TDoaS6qTT1piQQy3DI4/tkhpLnhfKepg4Kstt5JTPlJxklvZr cahRm0QqdHkwY9bYqoYidO7xduyBNrZ1mw4ga3b7htMsLR4HUrawX+Da6gyK32WhsVXQ Ovvg== X-Gm-Message-State: AHYfb5gPJpMu2W4Rqm+ylOjIjn5QKXfdSpmpQPhXGGck3yJMOQQoxU3m EUiIpNyZjaKjRA7p X-Received: by 10.46.19.9 with SMTP id 9mr283847ljt.179.1503407866574; Tue, 22 Aug 2017 06:17:46 -0700 (PDT) Received: from genomnajs.ideon.se ([85.235.10.227]) by smtp.gmail.com with ESMTPSA id 193sm2715984ljj.30.2017.08.22.06.17.44 (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Tue, 22 Aug 2017 06:17:45 -0700 (PDT) From: Linus Walleij To: "Rafael J . Wysocki" , Viresh Kumar , Lee Jones Cc: linux-pm@vger.kernel.org, linux-arm-kernel@lists.infradead.org, Arnd Bergmann , Ulf Hansson , Linus Walleij Subject: [PATCH 1/3 v3] cpufreq: enable the DT cpufreq driver on the Ux500 Date: Tue, 22 Aug 2017 15:17:39 +0200 Message-Id: <20170822131741.23473-1-linus.walleij@linaro.org> X-Mailer: git-send-email 2.13.5 Sender: linux-pm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-pm@vger.kernel.org This enables the generic DT and OPP-based cpufreq driver on the ST-Ericsson Ux500 series. Acked-by: Viresh Kumar Signed-off-by: Linus Walleij --- ChangeLog v2->v3: - No changes, just resending --- drivers/cpufreq/cpufreq-dt-platdev.c | 5 +++++ 1 file changed, 5 insertions(+) -- 2.13.5 diff --git a/drivers/cpufreq/cpufreq-dt-platdev.c b/drivers/cpufreq/cpufreq-dt-platdev.c index 1c262923fe58..d80300251bc4 100644 --- a/drivers/cpufreq/cpufreq-dt-platdev.c +++ b/drivers/cpufreq/cpufreq-dt-platdev.c @@ -88,6 +88,11 @@ static const struct of_device_id machines[] __initconst = { { .compatible = "socionext,uniphier-ld11", }, { .compatible = "socionext,uniphier-ld20", }, + { .compatible = "st-ericsson,u8500", }, + { .compatible = "st-ericsson,u8540", }, + { .compatible = "st-ericsson,u9500", }, + { .compatible = "st-ericsson,u9540", }, + { .compatible = "ti,omap2", }, { .compatible = "ti,omap3", }, { .compatible = "ti,omap4", }, From patchwork Tue Aug 22 13:17:40 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Linus Walleij X-Patchwork-Id: 110660 Delivered-To: patch@linaro.org Received: by 10.140.95.78 with SMTP id h72csp2668711qge; Tue, 22 Aug 2017 06:17:51 -0700 (PDT) X-Received: by 10.99.146.76 with SMTP id s12mr680195pgn.382.1503407871812; Tue, 22 Aug 2017 06:17:51 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1503407871; cv=none; d=google.com; s=arc-20160816; b=Wy27dpCfKhgDTA7uJdeEc+NxTXtBJKuv+LTjz8DBp0/Ot2p5a9i7LIOjEJCW+bOSp/ UHixgpDasO3UmfPxXZO+6iC3i1dO+3x73LEZ4q5F0LUflhbTeXbDAvaHbjEC96cCZh57 EfrFzHRWhoJpLcpqtuU+YQ+oYarY3j04c7BgDZY+HLRQpUSFRMWqpBlwsHdN9LT6XYyP DnT2N5o+lr8E8eYuMH8fx/n1dH5P0aREW2/ImGtfGFyMlxLbG4G52U9ngG8R6Y6v9yO0 9seZVaVuwzn5qd7sZiCjY8WqLNFvhKRukYllW2Wm3+G0jzGsyBMWO4GFK59XrtKYNZBp agDQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:references:in-reply-to:message-id:date :subject:cc:to:from:dkim-signature:arc-authentication-results; bh=I7GfY+hDh9HmlPcGekOlb4QvepOZZPgSSh3sVvy3v5M=; b=pu8h5512AlRnB38Oa8lh5iFwMIvUPqaogbT6cyZaAkDo1ri7lJ1PHN5pYcx7E9DK8A CfJILcUy7rzz8Xf5C4TXRjexEiqbbNCALZsi8CXRtK9KxsfNrchwnIAwLjOEHYPbovaM EHO+/i7FN6ZZJ3cJvvoUxaNy4j4Hs78Zdw+WOieSVsXbHrBfUiJxfGZnwrjquEC7IAkj hFnEqt35OoTOycqeQX2kGjyRXzu2EcdtdYzyeTzErEIhHYNs9nUWEW7LWCUAyIHrMCCc BEWIMSLj6kn+3icsETbHYQ0MxJoSjefHj7E6ly8eyyLS83an+W5rveGZxBsDA+orGZX4 z+Xw== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=eLDZuYTy; spf=pass (google.com: best guess record for domain of linux-pm-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-pm-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id v78si8951896pfd.552.2017.08.22.06.17.51; Tue, 22 Aug 2017 06:17:51 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-pm-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=eLDZuYTy; spf=pass (google.com: best guess record for domain of linux-pm-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-pm-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S932859AbdHVNRu (ORCPT + 12 others); Tue, 22 Aug 2017 09:17:50 -0400 Received: from mail-lf0-f46.google.com ([209.85.215.46]:35523 "EHLO mail-lf0-f46.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S932657AbdHVNRu (ORCPT ); Tue, 22 Aug 2017 09:17:50 -0400 Received: by mail-lf0-f46.google.com with SMTP id k186so23467006lfe.2 for ; Tue, 22 Aug 2017 06:17:49 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=I7GfY+hDh9HmlPcGekOlb4QvepOZZPgSSh3sVvy3v5M=; b=eLDZuYTyO7a0ofGLZVtNG3uTXQohOWGRfoL48kaJ5RVhq2wuSAfGhkBvttHCKWhpc1 APCpKRQoZLjzz0FOsWefx7TGBbNUhURxV4+SNIA1YTRxA3+cmpL1uN/2ukoF8W7DKKw7 IBmWste/AHf+DSVLTv5UwUR/NKOcl9vEUoyGM= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=I7GfY+hDh9HmlPcGekOlb4QvepOZZPgSSh3sVvy3v5M=; b=bZ7G9pQBk1Xib/zZLh1mLazpEXBA6Idn4P9DdAEllZ8oBSkoc8LopYyjOusKwuWgC7 lyWMYjJ1ZVGynCxR0tvf1uvN/Bg7wruBZoZTmdj7Q9i0Ji4T5ZrQWwrJ0XTi84yeW3/r 0Ue3qz2lrMjJPlD8usBK+sJFkdkkOjDvVmVy+zWhnpLiGj+Q6Aeam0v74yHXSmKLVT/E zN3xsQEVqeoAhVjjwmBPLp0QCxRObelKPbfu2C8KUPPV1T5fX8w33N7LTNnNrHBfTxVB CnCo8RFP+1tN8RsE7rxqnMG6W98GmUFf1dmO3XWKeQv+zmYUesIkMKTnR9CFLrRY1OO4 CAiQ== X-Gm-Message-State: AHYfb5hW4D5NZDlw7WumuSWyIapoTiDli3wX6qqaG6xIJO1hCNuI4kHI uoUOvxW7uTLblzyA X-Received: by 10.46.64.73 with SMTP id n70mr330554lja.120.1503407868481; Tue, 22 Aug 2017 06:17:48 -0700 (PDT) Received: from genomnajs.ideon.se ([85.235.10.227]) by smtp.gmail.com with ESMTPSA id 193sm2715984ljj.30.2017.08.22.06.17.47 (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Tue, 22 Aug 2017 06:17:47 -0700 (PDT) From: Linus Walleij To: "Rafael J . Wysocki" , Viresh Kumar , Lee Jones Cc: linux-pm@vger.kernel.org, linux-arm-kernel@lists.infradead.org, Arnd Bergmann , Ulf Hansson , Linus Walleij Subject: [PATCH 2/3 v3] mfd: db8500-prcmu: Get rid of cpufreq dependency Date: Tue, 22 Aug 2017 15:17:40 +0200 Message-Id: <20170822131741.23473-2-linus.walleij@linaro.org> X-Mailer: git-send-email 2.13.5 In-Reply-To: <20170822131741.23473-1-linus.walleij@linaro.org> References: <20170822131741.23473-1-linus.walleij@linaro.org> Sender: linux-pm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-pm@vger.kernel.org The ARMSS clock, also known as the operating point of the CPU, should not cross-depend on cpufreq like this. Move the code to use just frequencies and remove the false frequency (1GHz) and put in the actual frequency provided by the ARMSS clock (998400000 Hz) as part of the process. After this and the related cpufreq patch, the DB8500 will simply use the standard DT cpufreq driver to change the operating points through the common clock framework using the ARMSS clock. Acked-by: Lee Jones Signed-off-by: Linus Walleij --- ChangeLog v2->v3: - Fixed freq table indentation so both checkpatch and Lee are happy. --- drivers/mfd/db8500-prcmu.c | 62 ++++++++++++++++------------------------------ 1 file changed, 21 insertions(+), 41 deletions(-) -- 2.13.5 diff --git a/drivers/mfd/db8500-prcmu.c b/drivers/mfd/db8500-prcmu.c index 5c739ac752e8..5970b8def548 100644 --- a/drivers/mfd/db8500-prcmu.c +++ b/drivers/mfd/db8500-prcmu.c @@ -33,7 +33,6 @@ #include #include #include -#include #include #include #include "dbx500-prcmu-regs.h" @@ -1692,32 +1691,27 @@ static long round_clock_rate(u8 clock, unsigned long rate) return rounded_rate; } -/* CPU FREQ table, may be changed due to if MAX_OPP is supported. */ -static struct cpufreq_frequency_table db8500_cpufreq_table[] = { - { .frequency = 200000, .driver_data = ARM_EXTCLK,}, - { .frequency = 400000, .driver_data = ARM_50_OPP,}, - { .frequency = 800000, .driver_data = ARM_100_OPP,}, - { .frequency = CPUFREQ_TABLE_END,}, /* To be used for MAX_OPP. */ - { .frequency = CPUFREQ_TABLE_END,}, +static const unsigned long armss_freqs[] = { + 200000000, + 400000000, + 800000000, + 998400000 }; static long round_armss_rate(unsigned long rate) { - struct cpufreq_frequency_table *pos; - long freq = 0; - - /* cpufreq table frequencies is in KHz. */ - rate = rate / 1000; + unsigned long freq = 0; + int i; /* Find the corresponding arm opp from the cpufreq table. */ - cpufreq_for_each_entry(pos, db8500_cpufreq_table) { - freq = pos->frequency; - if (freq == rate) + for (i = 0; i < ARRAY_SIZE(armss_freqs); i++) { + freq = armss_freqs[i]; + if (rate <= freq) break; } /* Return the last valid value, even if a match was not found. */ - return freq * 1000; + return freq; } #define MIN_PLL_VCO_RATE 600000000ULL @@ -1854,21 +1848,23 @@ static void set_clock_rate(u8 clock, unsigned long rate) static int set_armss_rate(unsigned long rate) { - struct cpufreq_frequency_table *pos; - - /* cpufreq table frequencies is in KHz. */ - rate = rate / 1000; + unsigned long freq; + u8 opps[] = { ARM_EXTCLK, ARM_50_OPP, ARM_100_OPP, ARM_MAX_OPP }; + int i; /* Find the corresponding arm opp from the cpufreq table. */ - cpufreq_for_each_entry(pos, db8500_cpufreq_table) - if (pos->frequency == rate) + for (i = 0; i < ARRAY_SIZE(armss_freqs); i++) { + freq = armss_freqs[i]; + if (rate == freq) break; + } - if (pos->frequency != rate) + if (rate != freq) return -EINVAL; /* Set the new arm opp. */ - return db8500_prcmu_set_arm_opp(pos->driver_data); + pr_debug("SET ARM OPP 0x%02x\n", opps[i]); + return db8500_prcmu_set_arm_opp(opps[i]); } static int set_plldsi_rate(unsigned long rate) @@ -3049,12 +3045,6 @@ static const struct mfd_cell db8500_prcmu_devs[] = { .pdata_size = sizeof(db8500_regulators), }, { - .name = "cpufreq-ux500", - .of_compatible = "stericsson,cpufreq-ux500", - .platform_data = &db8500_cpufreq_table, - .pdata_size = sizeof(db8500_cpufreq_table), - }, - { .name = "cpuidle-dbx500", .of_compatible = "stericsson,cpuidle-dbx500", }, @@ -3067,14 +3057,6 @@ static const struct mfd_cell db8500_prcmu_devs[] = { }, }; -static void db8500_prcmu_update_cpufreq(void) -{ - if (prcmu_has_arm_maxopp()) { - db8500_cpufreq_table[3].frequency = 1000000; - db8500_cpufreq_table[3].driver_data = ARM_MAX_OPP; - } -} - static int db8500_prcmu_register_ab8500(struct device *parent) { struct device_node *np; @@ -3160,8 +3142,6 @@ static int db8500_prcmu_probe(struct platform_device *pdev) prcmu_config_esram0_deep_sleep(ESRAM0_DEEP_SLEEP_STATE_RET); - db8500_prcmu_update_cpufreq(); - err = mfd_add_devices(&pdev->dev, 0, common_prcmu_devs, ARRAY_SIZE(common_prcmu_devs), NULL, 0, db8500_irq_domain); if (err) { From patchwork Tue Aug 22 13:17:41 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Linus Walleij X-Patchwork-Id: 110661 Delivered-To: patch@linaro.org Received: by 10.140.95.78 with SMTP id h72csp2668764qge; Tue, 22 Aug 2017 06:17:53 -0700 (PDT) X-Received: by 10.99.164.17 with SMTP id c17mr668927pgf.133.1503407873865; Tue, 22 Aug 2017 06:17:53 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1503407873; cv=none; d=google.com; s=arc-20160816; b=u2JrFfRZ/hHjEhsTivD3xqIVrIHkIbZZ+TvMWWdtFU/M6SwzsVe5a1ZcKkKTmuMmfF v3uT6OROeZlyFkYY9L2qNtSeWDpeo1fvopiH48zEPNiP1aMeU05LTRtGdoKMByfx/lPs vO1IkJBdF+5WKB5KigvSGojGyBBNu4BL2Z69o32P/K/p6O9pO5XWdhUeex8pm39ngjNg +Zd0jfhywetHKWd/FWHY9jIM/zCC5J2P5ZIE85nnY5aIIxZ/t/PaOoW8BDxs94UfI8aV duCWEjEw7UZ/gbwxhy1N/+X5WJHkjFFAqiKNWOo8mkT3uZ3Uplv30EU4/vi3E2K51BZA uLJA== ARC-Message-Signature: i=1; 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Wysocki" , Viresh Kumar , Lee Jones Cc: linux-pm@vger.kernel.org, linux-arm-kernel@lists.infradead.org, Arnd Bergmann , Ulf Hansson , Linus Walleij Subject: [PATCH 3/3 v3] cpufreq: dbx500: Delete obsolete driver Date: Tue, 22 Aug 2017 15:17:41 +0200 Message-Id: <20170822131741.23473-3-linus.walleij@linaro.org> X-Mailer: git-send-email 2.13.5 In-Reply-To: <20170822131741.23473-1-linus.walleij@linaro.org> References: <20170822131741.23473-1-linus.walleij@linaro.org> Sender: linux-pm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-pm@vger.kernel.org We have moved the Ux500 over to use the generic DT based cpufreq driver, so delete the old custom driver. At the same time select CPUFREQ_DT from the machine's Kconfig in order to satisfy the "default ARCH_U8500" selection on the old driver. Acked-by: Viresh Kumar Signed-off-by: Linus Walleij --- ChangeLog v2->v3: - No changes, just resending. --- arch/arm/mach-ux500/Kconfig | 1 + drivers/cpufreq/Kconfig.arm | 9 ---- drivers/cpufreq/Makefile | 1 - drivers/cpufreq/dbx500-cpufreq.c | 103 --------------------------------------- 4 files changed, 1 insertion(+), 113 deletions(-) delete mode 100644 drivers/cpufreq/dbx500-cpufreq.c -- 2.13.5 diff --git a/arch/arm/mach-ux500/Kconfig b/arch/arm/mach-ux500/Kconfig index 4740ac393297..2b56e4af5a27 100644 --- a/arch/arm/mach-ux500/Kconfig +++ b/arch/arm/mach-ux500/Kconfig @@ -9,6 +9,7 @@ menuconfig ARCH_U8500 select ARM_GIC select CACHE_L2X0 select CLKSRC_NOMADIK_MTU + select CPUFREQ_DT select GPIOLIB select HAVE_ARM_SCU if SMP select HAVE_ARM_TWD if SMP diff --git a/drivers/cpufreq/Kconfig.arm b/drivers/cpufreq/Kconfig.arm index 2011fec2d6ad..74ed7e9a7f27 100644 --- a/drivers/cpufreq/Kconfig.arm +++ b/drivers/cpufreq/Kconfig.arm @@ -71,15 +71,6 @@ config ARM_HIGHBANK_CPUFREQ If in doubt, say N. -config ARM_DB8500_CPUFREQ - tristate "ST-Ericsson DB8500 cpufreq" if COMPILE_TEST && !ARCH_U8500 - default ARCH_U8500 - depends on HAS_IOMEM - depends on !CPU_THERMAL || THERMAL - help - This adds the CPUFreq driver for ST-Ericsson Ux500 (DB8500) SoC - series. - config ARM_IMX6Q_CPUFREQ tristate "Freescale i.MX6 cpufreq support" depends on ARCH_MXC diff --git a/drivers/cpufreq/Makefile b/drivers/cpufreq/Makefile index ab3a42cd29ef..a07c6efe4910 100644 --- a/drivers/cpufreq/Makefile +++ b/drivers/cpufreq/Makefile @@ -53,7 +53,6 @@ obj-$(CONFIG_ARM_DT_BL_CPUFREQ) += arm_big_little_dt.o obj-$(CONFIG_ARM_BRCMSTB_AVS_CPUFREQ) += brcmstb-avs-cpufreq.o obj-$(CONFIG_ARCH_DAVINCI) += davinci-cpufreq.o -obj-$(CONFIG_ARM_DB8500_CPUFREQ) += dbx500-cpufreq.o obj-$(CONFIG_ARM_EXYNOS5440_CPUFREQ) += exynos5440-cpufreq.o obj-$(CONFIG_ARM_HIGHBANK_CPUFREQ) += highbank-cpufreq.o obj-$(CONFIG_ARM_IMX6Q_CPUFREQ) += imx6q-cpufreq.o diff --git a/drivers/cpufreq/dbx500-cpufreq.c b/drivers/cpufreq/dbx500-cpufreq.c deleted file mode 100644 index 4ee0431579c1..000000000000 --- a/drivers/cpufreq/dbx500-cpufreq.c +++ /dev/null @@ -1,103 +0,0 @@ -/* - * Copyright (C) STMicroelectronics 2009 - * Copyright (C) ST-Ericsson SA 2010-2012 - * - * License Terms: GNU General Public License v2 - * Author: Sundar Iyer - * Author: Martin Persson - * Author: Jonas Aaberg - */ - -#include -#include -#include -#include -#include -#include -#include -#include - -static struct cpufreq_frequency_table *freq_table; -static struct clk *armss_clk; -static struct thermal_cooling_device *cdev; - -static int dbx500_cpufreq_target(struct cpufreq_policy *policy, - unsigned int index) -{ - /* update armss clk frequency */ - return clk_set_rate(armss_clk, freq_table[index].frequency * 1000); -} - -static int dbx500_cpufreq_init(struct cpufreq_policy *policy) -{ - policy->clk = armss_clk; - return cpufreq_generic_init(policy, freq_table, 20 * 1000); -} - -static int dbx500_cpufreq_exit(struct cpufreq_policy *policy) -{ - if (!IS_ERR(cdev)) - cpufreq_cooling_unregister(cdev); - return 0; -} - -static void dbx500_cpufreq_ready(struct cpufreq_policy *policy) -{ - cdev = cpufreq_cooling_register(policy); - if (IS_ERR(cdev)) - pr_err("Failed to register cooling device %ld\n", PTR_ERR(cdev)); - else - pr_info("Cooling device registered: %s\n", cdev->type); -} - -static struct cpufreq_driver dbx500_cpufreq_driver = { - .flags = CPUFREQ_STICKY | CPUFREQ_CONST_LOOPS | - CPUFREQ_NEED_INITIAL_FREQ_CHECK, - .verify = cpufreq_generic_frequency_table_verify, - .target_index = dbx500_cpufreq_target, - .get = cpufreq_generic_get, - .init = dbx500_cpufreq_init, - .exit = dbx500_cpufreq_exit, - .ready = dbx500_cpufreq_ready, - .name = "DBX500", - .attr = cpufreq_generic_attr, -}; - -static int dbx500_cpufreq_probe(struct platform_device *pdev) -{ - struct cpufreq_frequency_table *pos; - - freq_table = dev_get_platdata(&pdev->dev); - if (!freq_table) { - pr_err("dbx500-cpufreq: Failed to fetch cpufreq table\n"); - return -ENODEV; - } - - armss_clk = clk_get(&pdev->dev, "armss"); - if (IS_ERR(armss_clk)) { - pr_err("dbx500-cpufreq: Failed to get armss clk\n"); - return PTR_ERR(armss_clk); - } - - pr_info("dbx500-cpufreq: Available frequencies:\n"); - cpufreq_for_each_entry(pos, freq_table) - pr_info(" %d Mhz\n", pos->frequency / 1000); - - return cpufreq_register_driver(&dbx500_cpufreq_driver); -} - -static struct platform_driver dbx500_cpufreq_plat_driver = { - .driver = { - .name = "cpufreq-ux500", - }, - .probe = dbx500_cpufreq_probe, -}; - -static int __init dbx500_cpufreq_register(void) -{ - return platform_driver_register(&dbx500_cpufreq_plat_driver); -} -device_initcall(dbx500_cpufreq_register); - -MODULE_LICENSE("GPL v2"); -MODULE_DESCRIPTION("cpufreq driver for DBX500");