From patchwork Thu Feb 27 22:28:33 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Suman Anna X-Patchwork-Id: 204097 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-9.9 required=3.0 tests=DKIMWL_WL_HIGH, DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_PATCH, MAILING_LIST_MULTI, SIGNED_OFF_BY, SPF_HELO_NONE, SPF_PASS, USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 87850C3F2C6 for ; Thu, 27 Feb 2020 22:29:10 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 5B17224697 for ; Thu, 27 Feb 2020 22:29:10 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (1024-bit key) header.d=ti.com header.i=@ti.com header.b="umvKp+2r" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1730169AbgB0W2w (ORCPT ); Thu, 27 Feb 2020 17:28:52 -0500 Received: from fllv0016.ext.ti.com ([198.47.19.142]:58822 "EHLO fllv0016.ext.ti.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1729868AbgB0W2w (ORCPT ); Thu, 27 Feb 2020 17:28:52 -0500 Received: from fllv0035.itg.ti.com ([10.64.41.0]) by fllv0016.ext.ti.com (8.15.2/8.15.2) with ESMTP id 01RMSnH9079926; Thu, 27 Feb 2020 16:28:49 -0600 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ti.com; s=ti-com-17Q1; t=1582842529; bh=63cC4NHrfMOkwW/2vuaaWneznyESfcGCTMYxXiBAAk8=; h=From:To:CC:Subject:Date:In-Reply-To:References; b=umvKp+2rE+iQ2F53phvPwXv5Ul1BF6xl3jPBqddHystCaJnfriPMfWZzk1Yaa5Em0 ecx6NPXmbG3o8W/LxxAcSxhv7EEpC8Tv4N0DkQFv1XE5UujFg48R/7zIIuFLGVnWg0 3wPwUvmwGyVM7uFni35ZxOmA1hfCQooVwvR38clM= Received: from DLEE103.ent.ti.com (dlee103.ent.ti.com [157.170.170.33]) by fllv0035.itg.ti.com (8.15.2/8.15.2) with ESMTP id 01RMSnjN056953; Thu, 27 Feb 2020 16:28:49 -0600 Received: from DLEE105.ent.ti.com (157.170.170.35) by DLEE103.ent.ti.com (157.170.170.33) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.1847.3; Thu, 27 Feb 2020 16:28:48 -0600 Received: from lelv0326.itg.ti.com (10.180.67.84) by DLEE105.ent.ti.com (157.170.170.35) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.1847.3 via Frontend Transport; Thu, 27 Feb 2020 16:28:48 -0600 Received: from fllv0103.dal.design.ti.com (fllv0103.dal.design.ti.com [10.247.120.73]) by lelv0326.itg.ti.com (8.15.2/8.15.2) with ESMTP id 01RMSmIg116902; Thu, 27 Feb 2020 16:28:48 -0600 Received: from localhost (irmo.dhcp.ti.com [128.247.58.153]) by fllv0103.dal.design.ti.com (8.14.7/8.14.7) with ESMTP id 01RMSmvs087005; Thu, 27 Feb 2020 16:28:48 -0600 From: Suman Anna To: Tony Lindgren CC: Roger Quadros , Tero Kristo , , , , Rob Herring , Suman Anna Subject: [PATCH v2 1/5] dt-bindings: bus: ti-sysc: Add support for PRUSS SYSC type Date: Thu, 27 Feb 2020 16:28:33 -0600 Message-ID: <20200227222837.7329-2-s-anna@ti.com> X-Mailer: git-send-email 2.23.0 In-Reply-To: <20200227222837.7329-1-s-anna@ti.com> References: <20200227222837.7329-1-s-anna@ti.com> MIME-Version: 1.0 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 Sender: devicetree-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org From: Roger Quadros The PRUSS module has a SYSCFG which is unique. The SYSCFG has two additional unique fields called STANDBY_INIT and SUB_MWAIT in addition to regular IDLE_MODE and STANDBY_MODE fields. Add the bindings for this new sysc type. Cc: Rob Herring Signed-off-by: Roger Quadros Signed-off-by: Suman Anna --- v2: No changes Documentation/devicetree/bindings/bus/ti-sysc.txt | 1 + include/dt-bindings/bus/ti-sysc.h | 4 ++++ 2 files changed, 5 insertions(+) diff --git a/Documentation/devicetree/bindings/bus/ti-sysc.txt b/Documentation/devicetree/bindings/bus/ti-sysc.txt index 233eb8294204..c984143d08d2 100644 --- a/Documentation/devicetree/bindings/bus/ti-sysc.txt +++ b/Documentation/devicetree/bindings/bus/ti-sysc.txt @@ -38,6 +38,7 @@ Required standard properties: "ti,sysc-dra7-mcasp" "ti,sysc-usb-host-fs" "ti,sysc-dra7-mcan" + "ti,sysc-pruss" - reg shall have register areas implemented for the interconnect target module in question such as revision, sysc and syss diff --git a/include/dt-bindings/bus/ti-sysc.h b/include/dt-bindings/bus/ti-sysc.h index babd08a1d226..76b07826ed05 100644 --- a/include/dt-bindings/bus/ti-sysc.h +++ b/include/dt-bindings/bus/ti-sysc.h @@ -18,6 +18,10 @@ #define SYSC_DRA7_MCAN_ENAWAKEUP (1 << 4) +/* PRUSS sysc found on AM33xx/AM43xx/AM57xx */ +#define SYSC_PRUSS_SUB_MWAIT (1 << 5) +#define SYSC_PRUSS_STANDBY_INIT (1 << 4) + /* SYSCONFIG STANDBYMODE/MIDLEMODE/SIDLEMODE supported by hardware */ #define SYSC_IDLE_FORCE 0 #define SYSC_IDLE_NO 1 From patchwork Thu Feb 27 22:28:35 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Suman Anna X-Patchwork-Id: 204098 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-9.9 required=3.0 tests=DKIMWL_WL_HIGH, DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_PATCH, MAILING_LIST_MULTI, SIGNED_OFF_BY, SPF_HELO_NONE, SPF_PASS, USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id DA202C3F2C6 for ; Thu, 27 Feb 2020 22:29:02 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id B01B9246B6 for ; Thu, 27 Feb 2020 22:29:02 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (1024-bit key) header.d=ti.com header.i=@ti.com header.b="TFrcXta8" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1730330AbgB0W2z (ORCPT ); Thu, 27 Feb 2020 17:28:55 -0500 Received: from lelv0143.ext.ti.com ([198.47.23.248]:41222 "EHLO lelv0143.ext.ti.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1730293AbgB0W2y (ORCPT ); Thu, 27 Feb 2020 17:28:54 -0500 Received: from lelv0266.itg.ti.com ([10.180.67.225]) by lelv0143.ext.ti.com (8.15.2/8.15.2) with ESMTP id 01RMSoXu106637; Thu, 27 Feb 2020 16:28:50 -0600 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ti.com; s=ti-com-17Q1; t=1582842530; bh=jzIJRcVXGg56lh4wpxg3DO2Gscg2H+zIF2k2SSUW4Aw=; h=From:To:CC:Subject:Date:In-Reply-To:References; b=TFrcXta830h5plXX03l2X4I3jvhOFOAO8SKKzJ7M8eZT1ueWaXJWdTOed50FSU9JE ExHTi0zXJOkYqXnYCxnTHGDfSYiY4tR51yhb4/9leK8HxoIj9HzNTOWH4GKzUHR/YU v3vZQYUhTi4BxtxhbK5oNh9tMLuiUOs9P2M8dWbk= Received: from DFLE113.ent.ti.com (dfle113.ent.ti.com [10.64.6.34]) by lelv0266.itg.ti.com (8.15.2/8.15.2) with ESMTPS id 01RMSoCe084652 (version=TLSv1.2 cipher=AES256-GCM-SHA384 bits=256 verify=FAIL); Thu, 27 Feb 2020 16:28:50 -0600 Received: from DFLE112.ent.ti.com (10.64.6.33) by DFLE113.ent.ti.com (10.64.6.34) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.1847.3; Thu, 27 Feb 2020 16:28:50 -0600 Received: from lelv0327.itg.ti.com (10.180.67.183) by DFLE112.ent.ti.com (10.64.6.33) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.1847.3 via Frontend Transport; Thu, 27 Feb 2020 16:28:50 -0600 Received: from fllv0103.dal.design.ti.com (fllv0103.dal.design.ti.com [10.247.120.73]) by lelv0327.itg.ti.com (8.15.2/8.15.2) with ESMTP id 01RMSouP121976; Thu, 27 Feb 2020 16:28:50 -0600 Received: from localhost (irmo.dhcp.ti.com [128.247.58.153]) by fllv0103.dal.design.ti.com (8.14.7/8.14.7) with ESMTP id 01RMSo25087087; Thu, 27 Feb 2020 16:28:50 -0600 From: Suman Anna To: Tony Lindgren CC: Roger Quadros , Tero Kristo , , , , Suman Anna Subject: [PATCH v2 3/5] ARM: dts: AM33xx-l4: Update PRUSS interconnect target-module node Date: Thu, 27 Feb 2020 16:28:35 -0600 Message-ID: <20200227222837.7329-4-s-anna@ti.com> X-Mailer: git-send-email 2.23.0 In-Reply-To: <20200227222837.7329-1-s-anna@ti.com> References: <20200227222837.7329-1-s-anna@ti.com> MIME-Version: 1.0 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 Sender: devicetree-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org The PRU-ICSS present on some AM33xx SoCs has a very unique SYSC register. The IP also uses a hard-reset line, and requires this PRCM reset to be deasserted to be able to access any registers. Update the existing PRUSS interconnect target-module with all the required properties. The PRUSS device itself shall be added as a child node to this interconnect node in the future. PRU-ICSS is not supported on AM3351/AM3352/AM3354 SoCs though in the AM33xx family, so the target module node should be disabled in derivative board files that use any of these SoCs. Signed-off-by: Suman Anna --- v2: Revise patch description, no code changes arch/arm/boot/dts/am33xx-l4.dtsi | 21 ++++++++++++++++++--- 1 file changed, 18 insertions(+), 3 deletions(-) diff --git a/arch/arm/boot/dts/am33xx-l4.dtsi b/arch/arm/boot/dts/am33xx-l4.dtsi index 4e2986f0c604..5ed7f3c58c0f 100644 --- a/arch/arm/boot/dts/am33xx-l4.dtsi +++ b/arch/arm/boot/dts/am33xx-l4.dtsi @@ -759,12 +759,27 @@ ranges = <0x0 0x200000 0x80000>; }; - target-module@300000 { /* 0x4a300000, ap 9 04.0 */ - compatible = "ti,sysc"; - status = "disabled"; + pruss_tm: target-module@300000 { /* 0x4a300000, ap 9 04.0 */ + compatible = "ti,sysc-pruss", "ti,sysc"; + reg = <0x326000 0x4>, + <0x326004 0x4>; + reg-names = "rev", "sysc"; + ti,sysc-mask = <(SYSC_PRUSS_STANDBY_INIT | + SYSC_PRUSS_SUB_MWAIT)>; + ti,sysc-midle = , + , + ; + ti,sysc-sidle = , + , + ; + clocks = <&pruss_ocp_clkctrl AM3_PRUSS_OCP_PRUSS_CLKCTRL 0>; + clock-names = "fck"; + resets = <&prm_per 1>; + reset-names = "rstctrl"; #address-cells = <1>; #size-cells = <1>; ranges = <0x0 0x300000 0x80000>; + status = "disabled"; }; }; }; From patchwork Thu Feb 27 22:28:36 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Suman Anna X-Patchwork-Id: 204099 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-9.9 required=3.0 tests=DKIMWL_WL_HIGH, DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_PATCH, MAILING_LIST_MULTI, SIGNED_OFF_BY, SPF_HELO_NONE, SPF_PASS, USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 5144DC3F2C2 for ; Thu, 27 Feb 2020 22:28:54 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 23BE9246A2 for ; Thu, 27 Feb 2020 22:28:54 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (1024-bit key) header.d=ti.com header.i=@ti.com header.b="psH9UbQr" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1730270AbgB0W2x (ORCPT ); Thu, 27 Feb 2020 17:28:53 -0500 Received: from lelv0143.ext.ti.com ([198.47.23.248]:41218 "EHLO lelv0143.ext.ti.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1730198AbgB0W2x (ORCPT ); Thu, 27 Feb 2020 17:28:53 -0500 Received: from fllv0034.itg.ti.com ([10.64.40.246]) by lelv0143.ext.ti.com (8.15.2/8.15.2) with ESMTP id 01RMSp8l106641; Thu, 27 Feb 2020 16:28:51 -0600 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ti.com; s=ti-com-17Q1; t=1582842531; bh=wpJm8EVY/uB14h+BkJS+LRdTUAYM9k8bE4INF6DskhM=; h=From:To:CC:Subject:Date:In-Reply-To:References; b=psH9UbQrdZW552NohVzrR6+QmA/d0TpGntI4BYZ7ytktEn1/u6p1TJkUIzIMd7NWt rz18e+SPLBpFlr5xT8gAWRgsuoEVhC6zZd8j23tcWoJL7QV1XExpTK+BEhTlVG40TW p3CdLdamVDjXAzn7LF18RBsLo9caR8Mbde2lAwOk= Received: from DFLE114.ent.ti.com (dfle114.ent.ti.com [10.64.6.35]) by fllv0034.itg.ti.com (8.15.2/8.15.2) with ESMTPS id 01RMSp2m077911 (version=TLSv1.2 cipher=AES256-GCM-SHA384 bits=256 verify=FAIL); Thu, 27 Feb 2020 16:28:51 -0600 Received: from DFLE110.ent.ti.com (10.64.6.31) by DFLE114.ent.ti.com (10.64.6.35) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.1847.3; Thu, 27 Feb 2020 16:28:50 -0600 Received: from fllv0040.itg.ti.com (10.64.41.20) by DFLE110.ent.ti.com (10.64.6.31) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.1847.3 via Frontend Transport; Thu, 27 Feb 2020 16:28:50 -0600 Received: from fllv0103.dal.design.ti.com (fllv0103.dal.design.ti.com [10.247.120.73]) by fllv0040.itg.ti.com (8.15.2/8.15.2) with ESMTP id 01RMSowA120440; Thu, 27 Feb 2020 16:28:50 -0600 Received: from localhost (irmo.dhcp.ti.com [128.247.58.153]) by fllv0103.dal.design.ti.com (8.14.7/8.14.7) with ESMTP id 01RMSoLW087091; Thu, 27 Feb 2020 16:28:50 -0600 From: Suman Anna To: Tony Lindgren CC: Roger Quadros , Tero Kristo , , , , Suman Anna Subject: [PATCH v2 4/5] ARM: dts: AM4372: Add the PRU-ICSS interconnect target-module node Date: Thu, 27 Feb 2020 16:28:36 -0600 Message-ID: <20200227222837.7329-5-s-anna@ti.com> X-Mailer: git-send-email 2.23.0 In-Reply-To: <20200227222837.7329-1-s-anna@ti.com> References: <20200227222837.7329-1-s-anna@ti.com> MIME-Version: 1.0 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 Sender: devicetree-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org The AM437x family of SoCs contains two dissimilar PRU-ICSS instances, but leverage a common reset line and SYSCFG from the larger PRU-ICSS1 instance. This SYSC register has also very unique bit-fields. Both the IPs require the PRCM reset to be deasserted to be able to access any registers. Add a common PRUSS interconnect target-module with all the required properties. The PRUSS devices themselves shall be added as child nodes to this interconnect node in the future. The PRU-ICSS instances are not supported on AM4372 SoC though in the AM437x family, so the target module node should be disabled in any derivative board files that use this SoC. Signed-off-by: Suman Anna --- v2: - Remove status=disabled - Revise last para in patch description arch/arm/boot/dts/am4372.dtsi | 22 ++++++++++++++++++++++ 1 file changed, 22 insertions(+) diff --git a/arch/arm/boot/dts/am4372.dtsi b/arch/arm/boot/dts/am4372.dtsi index faa14dc0faff..9f39413b0d0e 100644 --- a/arch/arm/boot/dts/am4372.dtsi +++ b/arch/arm/boot/dts/am4372.dtsi @@ -344,6 +344,28 @@ }; }; + pruss_tm: target-module@54400000 { + compatible = "ti,sysc-pruss", "ti,sysc"; + reg = <0x54426000 0x4>, + <0x54426004 0x4>; + reg-names = "rev", "sysc"; + ti,sysc-mask = <(SYSC_PRUSS_STANDBY_INIT | + SYSC_PRUSS_SUB_MWAIT)>; + ti,sysc-midle = , + , + ; + ti,sysc-sidle = , + , + ; + clocks = <&pruss_ocp_clkctrl AM4_PRUSS_OCP_PRUSS_CLKCTRL 0>; + clock-names = "fck"; + resets = <&prm_per 1>; + reset-names = "rstctrl"; + #address-cells = <1>; + #size-cells = <1>; + ranges = <0x0 0x54400000 0x80000>; + }; + gpmc: gpmc@50000000 { compatible = "ti,am3352-gpmc"; ti,hwmods = "gpmc";