From patchwork Mon Jun 22 09:31:44 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Maulik Shah X-Patchwork-Id: 206717 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-9.8 required=3.0 tests=DKIM_INVALID,DKIM_SIGNED, HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_PATCH, MAILING_LIST_MULTI, SIGNED_OFF_BY, SPF_HELO_NONE, SPF_PASS, URIBL_BLOCKED, USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 932CFC433DF for ; Mon, 22 Jun 2020 09:32:51 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 72EDA20732 for ; Mon, 22 Jun 2020 09:32:51 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=fail reason="signature verification failed" (1024-bit key) header.d=mg.codeaurora.org header.i=@mg.codeaurora.org header.b="j6rQLQ07" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726380AbgFVJcu (ORCPT ); Mon, 22 Jun 2020 05:32:50 -0400 Received: from m43-7.mailgun.net ([69.72.43.7]:28517 "EHLO m43-7.mailgun.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726428AbgFVJct (ORCPT ); Mon, 22 Jun 2020 05:32:49 -0400 DKIM-Signature: a=rsa-sha256; v=1; c=relaxed/relaxed; d=mg.codeaurora.org; q=dns/txt; s=smtp; t=1592818368; h=References: In-Reply-To: Message-Id: Date: Subject: Cc: To: From: Sender; bh=kCMlGHm3v2RvmiTd65tVBBeTC8GoTYd/UHLskdGqeIc=; b=j6rQLQ07rixBpJ/CHeAqVXRFVr1yYtb6gEIPTPaxP8M1VNGE8PFgm51oOqSHA1NrxWtm6dOC RmyYa0FU8DW+I0x9fr6eAXQ+Tbuc4F2etlTyUSaN6JtL3tW6Ws+QdtHDkdv/jPTyACA0jqtU L0ovEPFWebyEGGkL+7R6Oqj06p8= X-Mailgun-Sending-Ip: 69.72.43.7 X-Mailgun-Sid: WyI0ZDgwZiIsICJsaW51eC1ncGlvQHZnZXIua2VybmVsLm9yZyIsICJiZTllNGEiXQ== Received: from smtp.codeaurora.org (ec2-35-166-182-171.us-west-2.compute.amazonaws.com [35.166.182.171]) by smtp-out-n15.prod.us-west-2.postgun.com with SMTP id 5ef07aba6bebe35deb21ce71 (version=TLS1.2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256); Mon, 22 Jun 2020 09:32:42 GMT Received: by smtp.codeaurora.org (Postfix, from userid 1001) id 091FDC4339C; Mon, 22 Jun 2020 09:32:41 +0000 (UTC) Received: from mkshah-linux.qualcomm.com (blr-c-bdr-fw-01_GlobalNAT_AllZones-Outside.qualcomm.com [103.229.19.19]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-SHA256 (128/128 bits)) (No client certificate requested) (Authenticated sender: mkshah) by smtp.codeaurora.org (Postfix) with ESMTPSA id 8B02DC433CA; Mon, 22 Jun 2020 09:32:36 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 smtp.codeaurora.org 8B02DC433CA Authentication-Results: aws-us-west-2-caf-mail-1.web.codeaurora.org; dmarc=none (p=none dis=none) header.from=codeaurora.org Authentication-Results: aws-us-west-2-caf-mail-1.web.codeaurora.org; spf=none smtp.mailfrom=mkshah@codeaurora.org From: Maulik Shah To: bjorn.andersson@linaro.org, maz@kernel.org, linus.walleij@linaro.org, swboyd@chromium.org, evgreen@chromium.org, mka@chromium.org Cc: linux-kernel@vger.kernel.org, linux-arm-msm@vger.kernel.org, linux-gpio@vger.kernel.org, agross@kernel.org, tglx@linutronix.de, jason@lakedaemon.net, dianders@chromium.org, rnayak@codeaurora.org, ilina@codeaurora.org, lsrao@codeaurora.org, Maulik Shah Subject: [PATCH v3 1/5] pinctrl: qcom: Remove irq_disable callback from msmgpio irqchip Date: Mon, 22 Jun 2020 15:01:44 +0530 Message-Id: <1592818308-23001-2-git-send-email-mkshah@codeaurora.org> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1592818308-23001-1-git-send-email-mkshah@codeaurora.org> References: <1592818308-23001-1-git-send-email-mkshah@codeaurora.org> Sender: linux-gpio-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-gpio@vger.kernel.org The gpio can be marked for wakeup and drivers can invoke disable_irq() during suspend, in such cases unlazy approach will also disable at HW and such gpios will not wakeup device from suspend to RAM. Remove irq_disable callback to allow gpio interrupts to lazy disabled. The gpio interrupts will get disabled during irq_mask callback. Acked-by: Linus Walleij Signed-off-by: Maulik Shah --- drivers/pinctrl/qcom/pinctrl-msm.c | 13 ------------- 1 file changed, 13 deletions(-) diff --git a/drivers/pinctrl/qcom/pinctrl-msm.c b/drivers/pinctrl/qcom/pinctrl-msm.c index 83b7d64..2419023 100644 --- a/drivers/pinctrl/qcom/pinctrl-msm.c +++ b/drivers/pinctrl/qcom/pinctrl-msm.c @@ -815,18 +815,6 @@ static void msm_gpio_irq_enable(struct irq_data *d) msm_gpio_irq_clear_unmask(d, true); } -static void msm_gpio_irq_disable(struct irq_data *d) -{ - struct gpio_chip *gc = irq_data_get_irq_chip_data(d); - struct msm_pinctrl *pctrl = gpiochip_get_data(gc); - - if (d->parent_data) - irq_chip_disable_parent(d); - - if (!test_bit(d->hwirq, pctrl->skip_wake_irqs)) - msm_gpio_irq_mask(d); -} - static void msm_gpio_irq_unmask(struct irq_data *d) { msm_gpio_irq_clear_unmask(d, false); @@ -1146,7 +1134,6 @@ static int msm_gpio_init(struct msm_pinctrl *pctrl) pctrl->irq_chip.name = "msmgpio"; pctrl->irq_chip.irq_enable = msm_gpio_irq_enable; - pctrl->irq_chip.irq_disable = msm_gpio_irq_disable; pctrl->irq_chip.irq_mask = msm_gpio_irq_mask; pctrl->irq_chip.irq_unmask = msm_gpio_irq_unmask; pctrl->irq_chip.irq_ack = msm_gpio_irq_ack; From patchwork Mon Jun 22 09:31:46 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Maulik Shah X-Patchwork-Id: 206716 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-9.8 required=3.0 tests=DKIM_INVALID,DKIM_SIGNED, HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_PATCH, MAILING_LIST_MULTI, SIGNED_OFF_BY, SPF_HELO_NONE, SPF_PASS, URIBL_BLOCKED, USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 911F7C433E0 for ; Mon, 22 Jun 2020 09:33:02 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 6CED620708 for ; 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Mon, 22 Jun 2020 09:32:53 GMT Received: by smtp.codeaurora.org (Postfix, from userid 1001) id 15D56C433A1; Mon, 22 Jun 2020 09:32:53 +0000 (UTC) Received: from mkshah-linux.qualcomm.com (blr-c-bdr-fw-01_GlobalNAT_AllZones-Outside.qualcomm.com [103.229.19.19]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-SHA256 (128/128 bits)) (No client certificate requested) (Authenticated sender: mkshah) by smtp.codeaurora.org (Postfix) with ESMTPSA id 82FEFC43391; Mon, 22 Jun 2020 09:32:47 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 smtp.codeaurora.org 82FEFC43391 Authentication-Results: aws-us-west-2-caf-mail-1.web.codeaurora.org; dmarc=none (p=none dis=none) header.from=codeaurora.org Authentication-Results: aws-us-west-2-caf-mail-1.web.codeaurora.org; spf=none smtp.mailfrom=mkshah@codeaurora.org From: Maulik Shah To: bjorn.andersson@linaro.org, maz@kernel.org, linus.walleij@linaro.org, swboyd@chromium.org, evgreen@chromium.org, mka@chromium.org Cc: linux-kernel@vger.kernel.org, linux-arm-msm@vger.kernel.org, linux-gpio@vger.kernel.org, agross@kernel.org, tglx@linutronix.de, jason@lakedaemon.net, dianders@chromium.org, rnayak@codeaurora.org, ilina@codeaurora.org, lsrao@codeaurora.org, Maulik Shah Subject: [PATCH v3 3/5] pinctrl: qcom: Use return value from irq_set_wake call Date: Mon, 22 Jun 2020 15:01:46 +0530 Message-Id: <1592818308-23001-4-git-send-email-mkshah@codeaurora.org> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1592818308-23001-1-git-send-email-mkshah@codeaurora.org> References: <1592818308-23001-1-git-send-email-mkshah@codeaurora.org> Sender: linux-gpio-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-gpio@vger.kernel.org msmgpio irqchip is not using return value of irq_set_wake call. Start using it. Fixes: e35a6ae0eb3a ("pinctrl/msm: Setup GPIO chip in hierarchy") Signed-off-by: Maulik Shah Reviewed-by: Douglas Anderson --- drivers/pinctrl/qcom/pinctrl-msm.c | 8 +++----- 1 file changed, 3 insertions(+), 5 deletions(-) diff --git a/drivers/pinctrl/qcom/pinctrl-msm.c b/drivers/pinctrl/qcom/pinctrl-msm.c index b909ffe..92fe7d6 100644 --- a/drivers/pinctrl/qcom/pinctrl-msm.c +++ b/drivers/pinctrl/qcom/pinctrl-msm.c @@ -978,12 +978,10 @@ static int msm_gpio_irq_set_wake(struct irq_data *d, unsigned int on) * when TLMM is powered on. To allow that, enable the GPIO * summary line to be wakeup capable at GIC. */ - if (d->parent_data) - irq_chip_set_wake_parent(d, on); - - irq_set_irq_wake(pctrl->irq, on); + if (d->parent_data && test_bit(d->hwirq, pctrl->skip_wake_irqs)) + return irq_chip_set_wake_parent(d, on); - return 0; + return irq_set_irq_wake(pctrl->irq, on); } static int msm_gpio_irq_reqres(struct irq_data *d) From patchwork Mon Jun 22 09:31:48 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Maulik Shah X-Patchwork-Id: 206715 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-9.8 required=3.0 tests=DKIM_INVALID,DKIM_SIGNED, HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_PATCH, MAILING_LIST_MULTI, SIGNED_OFF_BY, SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED,USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 8A0F3C433DF for ; Mon, 22 Jun 2020 09:33:09 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 67E9720720 for ; Mon, 22 Jun 2020 09:33:09 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=fail reason="signature verification failed" (1024-bit key) header.d=mg.codeaurora.org header.i=@mg.codeaurora.org header.b="PBzO3XHh" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727004AbgFVJdI (ORCPT ); Mon, 22 Jun 2020 05:33:08 -0400 Received: from mail29.static.mailgun.info ([104.130.122.29]:23064 "EHLO mail29.static.mailgun.info" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726955AbgFVJdH (ORCPT ); Mon, 22 Jun 2020 05:33:07 -0400 DKIM-Signature: a=rsa-sha256; v=1; c=relaxed/relaxed; d=mg.codeaurora.org; q=dns/txt; s=smtp; t=1592818387; h=References: In-Reply-To: Message-Id: Date: Subject: Cc: To: From: Sender; bh=qY8kwUGUQvJmFqhD+3PhiES4ZiCcfYGjUj/PxGa7Klg=; b=PBzO3XHhgzDK/kSSvY/fpheaQfxMPKAOHAiNtJLO52L81eVIhL5Fy8q7wBttFYrKTSXMi5Fd WejdnzRSXiF3rrR1TUMupoDndrI6Z23aD6wcHvOIf24/Irk8cgskTSqDNiqNWWg1yDBhdRpO lGOMTkvemJ/6lQxvzIjO8fxeZ/0= X-Mailgun-Sending-Ip: 104.130.122.29 X-Mailgun-Sid: WyI0ZDgwZiIsICJsaW51eC1ncGlvQHZnZXIua2VybmVsLm9yZyIsICJiZTllNGEiXQ== Received: from smtp.codeaurora.org (ec2-35-166-182-171.us-west-2.compute.amazonaws.com [35.166.182.171]) by smtp-out-n15.prod.us-east-1.postgun.com with SMTP id 5ef07ad1567385e8e785bafe (version=TLS1.2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256); Mon, 22 Jun 2020 09:33:05 GMT Received: by smtp.codeaurora.org (Postfix, from userid 1001) id E1FE2C433AD; Mon, 22 Jun 2020 09:33:04 +0000 (UTC) Received: from mkshah-linux.qualcomm.com (blr-c-bdr-fw-01_GlobalNAT_AllZones-Outside.qualcomm.com [103.229.19.19]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-SHA256 (128/128 bits)) (No client certificate requested) (Authenticated sender: mkshah) by smtp.codeaurora.org (Postfix) with ESMTPSA id 81E5FC43395; Mon, 22 Jun 2020 09:32:58 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 smtp.codeaurora.org 81E5FC43395 Authentication-Results: aws-us-west-2-caf-mail-1.web.codeaurora.org; dmarc=none (p=none dis=none) header.from=codeaurora.org Authentication-Results: aws-us-west-2-caf-mail-1.web.codeaurora.org; spf=none smtp.mailfrom=mkshah@codeaurora.org From: Maulik Shah To: bjorn.andersson@linaro.org, maz@kernel.org, linus.walleij@linaro.org, swboyd@chromium.org, evgreen@chromium.org, mka@chromium.org Cc: linux-kernel@vger.kernel.org, linux-arm-msm@vger.kernel.org, linux-gpio@vger.kernel.org, agross@kernel.org, tglx@linutronix.de, jason@lakedaemon.net, dianders@chromium.org, rnayak@codeaurora.org, ilina@codeaurora.org, lsrao@codeaurora.org, Maulik Shah Subject: [PATCH v3 5/5] irqchip: qcom-pdc: Reset all pdc interrupts during init Date: Mon, 22 Jun 2020 15:01:48 +0530 Message-Id: <1592818308-23001-6-git-send-email-mkshah@codeaurora.org> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1592818308-23001-1-git-send-email-mkshah@codeaurora.org> References: <1592818308-23001-1-git-send-email-mkshah@codeaurora.org> Sender: linux-gpio-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-gpio@vger.kernel.org Clear previous kernel's configuration during init by resetting all interrupts in enable bank to zero. Signed-off-by: Maulik Shah --- drivers/irqchip/qcom-pdc.c | 13 +++++++++++++ 1 file changed, 13 insertions(+) diff --git a/drivers/irqchip/qcom-pdc.c b/drivers/irqchip/qcom-pdc.c index 8beb6f7..11a9d3a 100644 --- a/drivers/irqchip/qcom-pdc.c +++ b/drivers/irqchip/qcom-pdc.c @@ -19,6 +19,7 @@ #include #include +#define PDC_MAX_IRQS_PER_REG 32 #define PDC_MAX_IRQS 168 #define PDC_MAX_GPIO_IRQS 256 @@ -339,6 +340,7 @@ static const struct irq_domain_ops qcom_pdc_gpio_ops = { static int pdc_setup_pin_mapping(struct device_node *np) { int ret, n; + u32 reg, max_regs, max_pins = 0; n = of_property_count_elems_of_size(np, "qcom,pdc-ranges", sizeof(u32)); if (n <= 0 || n % 3) @@ -367,8 +369,19 @@ static int pdc_setup_pin_mapping(struct device_node *np) &pdc_region[n].cnt); if (ret) return ret; + max_pins += pdc_region[n].cnt; } + if (max_pins > PDC_MAX_IRQS) + return -EINVAL; + + max_regs = max_pins / PDC_MAX_IRQS_PER_REG; + if (max_pins % PDC_MAX_IRQS_PER_REG) + max_regs++; + + for (reg = 0; reg < max_regs; reg++) + pdc_reg_write(IRQ_ENABLE_BANK, reg, 0); + return 0; }