From patchwork Mon Apr 27 17:28:31 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Lokesh Vutla X-Patchwork-Id: 211471 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-9.9 required=3.0 tests=DKIMWL_WL_HIGH, DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_PATCH, MAILING_LIST_MULTI, SIGNED_OFF_BY, SPF_HELO_NONE, SPF_PASS, USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id CE7C5C55199 for ; Mon, 27 Apr 2020 17:28:42 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 9FE4720728 for ; Mon, 27 Apr 2020 17:28:42 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (1024-bit key) header.d=ti.com header.i=@ti.com header.b="jigExJEw" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726402AbgD0R2m (ORCPT ); Mon, 27 Apr 2020 13:28:42 -0400 Received: from fllv0015.ext.ti.com ([198.47.19.141]:45276 "EHLO fllv0015.ext.ti.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726348AbgD0R2l (ORCPT ); Mon, 27 Apr 2020 13:28:41 -0400 Received: from fllv0035.itg.ti.com ([10.64.41.0]) by fllv0015.ext.ti.com (8.15.2/8.15.2) with ESMTP id 03RHSbqk104244; Mon, 27 Apr 2020 12:28:37 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ti.com; s=ti-com-17Q1; t=1588008517; bh=dkYDQiJXfdVnI5Ul/GYJhp6hlCqYVf4gO6nywH0oUXY=; h=From:To:CC:Subject:Date; b=jigExJEwCtkyqdDLTJ/ja+ULmNFZJ141jGUs0qpPlD8gZWdvmADXP/m4VYX6mIfG2 64ULOwqokCPOLpwbDeDcN21fbp4xAhNZz6XG0MZ7Y1apZuYrZ67p2IEnyEwEDA2wMQ nQ1iT7YAYLxPPN5mPlyEglOv9mP67zE5C/W1zSfs= Received: from DLEE107.ent.ti.com (dlee107.ent.ti.com [157.170.170.37]) by fllv0035.itg.ti.com (8.15.2/8.15.2) with ESMTP id 03RHSbnS067353; Mon, 27 Apr 2020 12:28:37 -0500 Received: from DLEE104.ent.ti.com (157.170.170.34) by DLEE107.ent.ti.com (157.170.170.37) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.1979.3; Mon, 27 Apr 2020 12:28:36 -0500 Received: from fllv0039.itg.ti.com (10.64.41.19) by DLEE104.ent.ti.com (157.170.170.34) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.1979.3 via Frontend Transport; Mon, 27 Apr 2020 12:28:36 -0500 Received: from uda0131933.dhcp.ti.com (ileax41-snat.itg.ti.com [10.172.224.153]) by fllv0039.itg.ti.com (8.15.2/8.15.2) with ESMTP id 03RHSX69017392; Mon, 27 Apr 2020 12:28:34 -0500 From: Lokesh Vutla To: , Tony Lindgren CC: Tero Kristo , Sekhar Nori , Lokesh Vutla , Suman Anna , Linux OMAP Mailing List , Subject: [PATCH] clocksource/drivers/timer-ti-dm: Do one override clock parent in prepare() Date: Mon, 27 Apr 2020 22:58:31 +0530 Message-ID: <20200427172831.16546-1-lokeshvutla@ti.com> X-Mailer: git-send-email 2.23.0 MIME-Version: 1.0 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 Sender: linux-omap-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-omap@vger.kernel.org omap_dm_timer_prepare() is setting up the parent 32KHz clock. This prepare() gets called by request_timer in the client's driver. Because of this, the timer clock parent that is set with assigned-clock-parent is being overwritten. So drop this default setting of parent in prepare(). Signed-off-by: Lokesh Vutla --- - As per the discussion happened here[0], dropping the default setting. [0] https://patchwork.kernel.org/patch/11379875/#23309493 drivers/clocksource/timer-ti-dm.c | 4 +--- 1 file changed, 1 insertion(+), 3 deletions(-) diff --git a/drivers/clocksource/timer-ti-dm.c b/drivers/clocksource/timer-ti-dm.c index 2531eab3d6d7..60aff087947a 100644 --- a/drivers/clocksource/timer-ti-dm.c +++ b/drivers/clocksource/timer-ti-dm.c @@ -258,9 +258,7 @@ static int omap_dm_timer_prepare(struct omap_dm_timer *timer) __omap_dm_timer_enable_posted(timer); omap_dm_timer_disable(timer); - rc = omap_dm_timer_set_source(timer, OMAP_TIMER_SRC_32_KHZ); - - return rc; + return 0; } static inline u32 omap_dm_timer_reserved_systimer(int id)