From patchwork Sat Feb 29 03:44:19 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Anson Huang X-Patchwork-Id: 212697 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-9.8 required=3.0 tests=HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_PATCH, MAILING_LIST_MULTI, SIGNED_OFF_BY, SPF_HELO_NONE, SPF_PASS, USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id CA7D5C3F2C6 for ; Sat, 29 Feb 2020 03:50:43 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 9FEDB246B6 for ; Sat, 29 Feb 2020 03:50:43 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726752AbgB2Dum (ORCPT ); Fri, 28 Feb 2020 22:50:42 -0500 Received: from inva020.nxp.com ([92.121.34.13]:41226 "EHLO inva020.nxp.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726631AbgB2Dum (ORCPT ); Fri, 28 Feb 2020 22:50:42 -0500 Received: from inva020.nxp.com (localhost [127.0.0.1]) by inva020.eu-rdc02.nxp.com (Postfix) with ESMTP id 40B881A04DD; Sat, 29 Feb 2020 04:50:40 +0100 (CET) Received: from invc005.ap-rdc01.nxp.com (invc005.ap-rdc01.nxp.com [165.114.16.14]) by inva020.eu-rdc02.nxp.com (Postfix) with ESMTP id 39F401A04E7; Sat, 29 Feb 2020 04:50:24 +0100 (CET) Received: from localhost.localdomain (shlinux2.ap.freescale.net [10.192.224.44]) by invc005.ap-rdc01.nxp.com (Postfix) with ESMTP id 820A2402CB; Sat, 29 Feb 2020 11:50:10 +0800 (SGT) From: Anson Huang To: rui.zhang@intel.com, daniel.lezcano@linaro.org, amit.kucheria@verdurent.com, robh+dt@kernel.org, mark.rutland@arm.com, shawnguo@kernel.org, s.hauer@pengutronix.de, kernel@pengutronix.de, festevam@gmail.com, catalin.marinas@arm.com, will@kernel.org, leonard.crestez@nxp.com, daniel.baluta@nxp.com, peng.fan@nxp.com, aford173@gmail.com, ping.bai@nxp.com, jun.li@nxp.com, shengjiu.wang@nxp.com, bjorn.andersson@linaro.org, olof@lixom.net, vkoul@kernel.org, dinguyen@kernel.org, marcin.juszkiewicz@linaro.org, linux-pm@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org Cc: Linux-imx@nxp.com Subject: [PATCH V2 RESEND 1/4] dt-bindings: thermal: imx8mm-thermal: Add binding doc for i.MX8MM Date: Sat, 29 Feb 2020 11:44:19 +0800 Message-Id: <1582947862-11073-1-git-send-email-Anson.Huang@nxp.com> X-Mailer: git-send-email 2.7.4 X-Virus-Scanned: ClamAV using ClamSMTP Sender: linux-pm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-pm@vger.kernel.org Add thermal binding doc for Freescale's i.MX8MM Thermal Monitoring Unit. Signed-off-by: Anson Huang Reviewed-by: Rob Herring --- No change. --- .../devicetree/bindings/thermal/imx8mm-thermal.txt | 15 +++++++++++++++ 1 file changed, 15 insertions(+) create mode 100644 Documentation/devicetree/bindings/thermal/imx8mm-thermal.txt diff --git a/Documentation/devicetree/bindings/thermal/imx8mm-thermal.txt b/Documentation/devicetree/bindings/thermal/imx8mm-thermal.txt new file mode 100644 index 0000000..d09ae82 --- /dev/null +++ b/Documentation/devicetree/bindings/thermal/imx8mm-thermal.txt @@ -0,0 +1,15 @@ +* Thermal Monitoring Unit (TMU) on Freescale i.MX8MM SoC + +Required properties: +- compatible : Must be "fsl,imx8mm-tmu". +- reg : Address range of TMU registers. +- clocks : TMU's clock source. +- #thermal-sensor-cells : Should be 0. See ./thermal.txt for a description. + +Example: +tmu: tmu@30260000 { + compatible = "fsl,imx8mm-tmu"; + reg = <0x30260000 0x10000>; + clocks = <&clk IMX8MM_CLK_TMU_ROOT>; + #thermal-sensor-cells = <0>; +}; From patchwork Sat Feb 29 03:44:20 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Anson Huang X-Patchwork-Id: 212696 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-9.8 required=3.0 tests=HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_PATCH, MAILING_LIST_MULTI, SIGNED_OFF_BY, SPF_HELO_NONE, SPF_PASS, USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 5545EC3F2D3 for ; Sat, 29 Feb 2020 03:50:56 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 36A68246C1 for ; Sat, 29 Feb 2020 03:50:56 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726890AbgB2Duq (ORCPT ); Fri, 28 Feb 2020 22:50:46 -0500 Received: from inva021.nxp.com ([92.121.34.21]:35332 "EHLO inva021.nxp.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726631AbgB2Dup (ORCPT ); Fri, 28 Feb 2020 22:50:45 -0500 Received: from inva021.nxp.com (localhost [127.0.0.1]) by inva021.eu-rdc02.nxp.com (Postfix) with ESMTP id BD6922004F2; Sat, 29 Feb 2020 04:50:42 +0100 (CET) Received: from invc005.ap-rdc01.nxp.com (invc005.ap-rdc01.nxp.com [165.114.16.14]) by inva021.eu-rdc02.nxp.com (Postfix) with ESMTP id 4C4342004F3; Sat, 29 Feb 2020 04:50:26 +0100 (CET) Received: from localhost.localdomain (shlinux2.ap.freescale.net [10.192.224.44]) by invc005.ap-rdc01.nxp.com (Postfix) with ESMTP id 9C4CE402DE; Sat, 29 Feb 2020 11:50:12 +0800 (SGT) From: Anson Huang To: rui.zhang@intel.com, daniel.lezcano@linaro.org, amit.kucheria@verdurent.com, robh+dt@kernel.org, mark.rutland@arm.com, shawnguo@kernel.org, s.hauer@pengutronix.de, kernel@pengutronix.de, festevam@gmail.com, catalin.marinas@arm.com, will@kernel.org, leonard.crestez@nxp.com, daniel.baluta@nxp.com, peng.fan@nxp.com, aford173@gmail.com, ping.bai@nxp.com, jun.li@nxp.com, shengjiu.wang@nxp.com, bjorn.andersson@linaro.org, olof@lixom.net, vkoul@kernel.org, dinguyen@kernel.org, marcin.juszkiewicz@linaro.org, linux-pm@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org Cc: Linux-imx@nxp.com Subject: [PATCH V2 RESEND 2/4] thermal: imx8mm: Add support for i.MX8MM thermal monitoring unit Date: Sat, 29 Feb 2020 11:44:20 +0800 Message-Id: <1582947862-11073-2-git-send-email-Anson.Huang@nxp.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1582947862-11073-1-git-send-email-Anson.Huang@nxp.com> References: <1582947862-11073-1-git-send-email-Anson.Huang@nxp.com> X-Virus-Scanned: ClamAV using ClamSMTP Sender: linux-pm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-pm@vger.kernel.org i.MX8MM has a thermal monitoring unit(TMU) inside, it ONLY has one sensor for CPU, add support for reading immediate temperature of this sensor. Signed-off-by: Anson Huang --- Change since V1: - update copyright year and add author; - remove unnecessary sleep in .get_temp. --- drivers/thermal/Kconfig | 10 +++ drivers/thermal/Makefile | 1 + drivers/thermal/imx8mm_thermal.c | 131 +++++++++++++++++++++++++++++++++++++++ 3 files changed, 142 insertions(+) create mode 100644 drivers/thermal/imx8mm_thermal.c diff --git a/drivers/thermal/Kconfig b/drivers/thermal/Kconfig index 3502ee8..165b7d6 100644 --- a/drivers/thermal/Kconfig +++ b/drivers/thermal/Kconfig @@ -262,6 +262,16 @@ config IMX_SC_THERMAL sensor. It supports one critical trip point and one passive trip point for each thermal sensor. +config IMX8MM_THERMAL + tristate "Temperature sensor driver for Freescale i.MX8MM SoC" + depends on ARCH_MXC + depends on OF + help + Support for Thermal Monitoring Unit (TMU) found on Freescale i.MX8MM SoC. + It supports one critical trip point and one passive trip point. The + cpufreq is used as the cooling device to throttle CPUs when the passive + trip is crossed. + config MAX77620_THERMAL tristate "Temperature sensor driver for Maxim MAX77620 PMIC" depends on MFD_MAX77620 diff --git a/drivers/thermal/Makefile b/drivers/thermal/Makefile index a11a6d8..120a05e 100644 --- a/drivers/thermal/Makefile +++ b/drivers/thermal/Makefile @@ -44,6 +44,7 @@ obj-$(CONFIG_ARMADA_THERMAL) += armada_thermal.o obj-$(CONFIG_TANGO_THERMAL) += tango_thermal.o obj-$(CONFIG_IMX_THERMAL) += imx_thermal.o obj-$(CONFIG_IMX_SC_THERMAL) += imx_sc_thermal.o +obj-$(CONFIG_IMX8MM_THERMAL) += imx8mm_thermal.o obj-$(CONFIG_MAX77620_THERMAL) += max77620_thermal.o obj-$(CONFIG_QORIQ_THERMAL) += qoriq_thermal.o obj-$(CONFIG_DA9062_THERMAL) += da9062-thermal.o diff --git a/drivers/thermal/imx8mm_thermal.c b/drivers/thermal/imx8mm_thermal.c new file mode 100644 index 0000000..d597ceb --- /dev/null +++ b/drivers/thermal/imx8mm_thermal.c @@ -0,0 +1,131 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * Copyright 2020 NXP. + * + * Author: Anson Huang + */ + +#include +#include +#include +#include +#include +#include +#include +#include + +#include "thermal_core.h" + +#define TER 0x0 /* TMU enable */ +#define TRITSR 0x20 /* TMU immediate temp */ + +#define TER_EN BIT(31) +#define TRITSR_VAL_MASK 0xff + +#define TEMP_LOW_LIMIT 10 + +struct imx8mm_tmu { + struct thermal_zone_device *tzd; + void __iomem *base; + struct clk *clk; +}; + +static int tmu_get_temp(void *data, int *temp) +{ + struct imx8mm_tmu *tmu = data; + u32 val; + + val = readl_relaxed(tmu->base + TRITSR) & TRITSR_VAL_MASK; + if (val < TEMP_LOW_LIMIT) + return -EAGAIN; + + *temp = val * 1000; + + return 0; +} + +static struct thermal_zone_of_device_ops tmu_tz_ops = { + .get_temp = tmu_get_temp, +}; + +static int imx8mm_tmu_probe(struct platform_device *pdev) +{ + struct imx8mm_tmu *tmu; + u32 val; + int ret; + + tmu = devm_kzalloc(&pdev->dev, sizeof(struct imx8mm_tmu), GFP_KERNEL); + if (!tmu) + return -ENOMEM; + + tmu->base = devm_platform_ioremap_resource(pdev, 0); + if (IS_ERR(tmu->base)) + return PTR_ERR(tmu->base); + + tmu->clk = devm_clk_get(&pdev->dev, NULL); + if (IS_ERR(tmu->clk)) { + ret = PTR_ERR(tmu->clk); + if (ret != -EPROBE_DEFER) + dev_err(&pdev->dev, + "failed to get tmu clock: %d\n", ret); + return ret; + } + + ret = clk_prepare_enable(tmu->clk); + if (ret) { + dev_err(&pdev->dev, "failed to enable tmu clock: %d\n", ret); + return ret; + } + + tmu->tzd = devm_thermal_zone_of_sensor_register(&pdev->dev, 0, + tmu, &tmu_tz_ops); + if (IS_ERR(tmu->tzd)) { + dev_err(&pdev->dev, + "failed to register thermal zone sensor: %d\n", ret); + return PTR_ERR(tmu->tzd); + } + + platform_set_drvdata(pdev, tmu); + + /* enable the monitor */ + val = readl_relaxed(tmu->base + TER); + val |= TER_EN; + writel_relaxed(val, tmu->base + TER); + + return 0; +} + +static int imx8mm_tmu_remove(struct platform_device *pdev) +{ + struct imx8mm_tmu *tmu = platform_get_drvdata(pdev); + u32 val; + + /* disable TMU */ + val = readl_relaxed(tmu->base + TER); + val &= ~TER_EN; + writel_relaxed(val, tmu->base + TER); + + clk_disable_unprepare(tmu->clk); + platform_set_drvdata(pdev, NULL); + + return 0; +} + +static const struct of_device_id imx8mm_tmu_table[] = { + { .compatible = "fsl,imx8mm-tmu", }, + { }, +}; + +static struct platform_driver imx8mm_tmu = { + .driver = { + .name = "i.mx8mm_thermal", + .of_match_table = imx8mm_tmu_table, + }, + .probe = imx8mm_tmu_probe, + .remove = imx8mm_tmu_remove, +}; +module_platform_driver(imx8mm_tmu); + +MODULE_AUTHOR("Anson Huang "); +MODULE_DESCRIPTION("i.MX8MM Thermal Monitor Unit driver"); +MODULE_LICENSE("GPL v2");