From patchwork Wed Sep 13 05:20:38 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Masahiro Yamada X-Patchwork-Id: 112405 Delivered-To: patch@linaro.org Received: by 10.140.106.117 with SMTP id d108csp535757qgf; Tue, 12 Sep 2017 22:23:46 -0700 (PDT) X-Google-Smtp-Source: ADKCNb5csioo7T8JUmMP6RpoN8ifvtAkblD4MqLHkes+eKmkEXnsyQR0uvILQv4gp9KdmvKdbQZ4 X-Received: by 10.99.3.212 with SMTP id 203mr16665701pgd.270.1505280226422; Tue, 12 Sep 2017 22:23:46 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1505280226; cv=none; d=google.com; s=arc-20160816; b=IU5E5P27ZIDKltCemxdUmbBEFxJMbuT700k4ZPxDg6FH4/Tne2Vxc+/ogleN+VuN7Y rlX0HHhLQh4exNsdKYTmk0/vrjLDsXGgrWqBOcA8UZTETNMhW3YLNaK9eG7OYoJnqD0H rrCCHwOJNUAF/LKX6BZIXHOE/Hx78lZciwovtilnE+F2oOnldFu1CMNKG8TtA/4BS8YH pfu44cVHdVh6TujRurlpku/kGAM7AApNlI3snesfLT/3Drn2qKuqv1a8w+fnFuYLY5Ch P5AmnclsjrxXpwlgQxNiIZVl3Mk6agIRH+e80Gv3t6c8/u0mLmacCuAkcnLnkbcE8Tmc PA2A== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:references:in-reply-to:message-id:date :subject:cc:to:from:dkim-signature:dkim-filter :arc-authentication-results; bh=jQQQxSecA6Q5ovCRIaC2UvnM2j63/is96LE1R2hVxsM=; b=asKoKL56LE9zuOMEGezgBsE7G/XWEJ5vOkukwh049FLS1KkvCoq/jNQ7PJAas90aN0 Kp2xO08+gOui68QoFKxeyWrP3W4ImxAKIojyfvTakMZykpijDcimhWjcmzUxJXMzWAdN vvGidtOG8dWvKnboigDxbSsAN8zPsQJq92miYtPGyDsm0eEhHfp3mlwvll/hxpWRFqYb dZ3pU6aN4KLEyII0Xk3d+Hg/Cx4L8+GLFRX6Um2WrwS8zDS1GScWDtLLoVbuKuQ01Nu9 bKhgkKFv9e87dvkzobWCHpxfR0kdgjZ2DYz2YJuzhNDu67YrBNgtP6gRADql0Kk1FpGv H82g== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@nifty.com header.s=dec2015msa header.b=BtBvtVP2; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id n13si8633763pgc.270.2017.09.12.22.23.46; Tue, 12 Sep 2017 22:23:46 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@nifty.com header.s=dec2015msa header.b=BtBvtVP2; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751507AbdIMFXE (ORCPT + 26 others); Wed, 13 Sep 2017 01:23:04 -0400 Received: from conuserg-12.nifty.com ([210.131.2.79]:35929 "EHLO conuserg-12.nifty.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751250AbdIMFW4 (ORCPT ); Wed, 13 Sep 2017 01:22:56 -0400 Received: from pug.e01.socionext.com (p14092-ipngnfx01kyoto.kyoto.ocn.ne.jp [153.142.97.92]) (authenticated) by conuserg-12.nifty.com with ESMTP id v8D5Kpx0010397; Wed, 13 Sep 2017 14:20:52 +0900 DKIM-Filter: OpenDKIM Filter v2.10.3 conuserg-12.nifty.com v8D5Kpx0010397 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=nifty.com; s=dec2015msa; t=1505280052; bh=jQQQxSecA6Q5ovCRIaC2UvnM2j63/is96LE1R2hVxsM=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=BtBvtVP2Lti29Jqtozi0yCLSmNc0P/5VSUeNJrjsQwLzB0xJtQhLYxz7anhNUceny H8/6i4hynsRM8MLShc7P1vNefBmCb8+0slPPINBXjfYOxHDuth+2ZbeV0wnAPp45gX fAiegDD1l4vmq1teMpETUCV0fAj2EZSpNRqzrmInsvLh8EmuOx77GTR/KAeXB3/7yk VTdaFyC9y55ExEmM8m9a+6mnGfhj1e1om18884i4ecjuvvo1J+ua/cw8rGj2/s1kDx ta89UZDLsz+orfMUXFxiD2LxJ5aJDEui9RXBpKTuQWObFd5fCFrLqF4xmPjS086XI1 RRvEupA4pQlkg== X-Nifty-SrcIP: [153.142.97.92] From: Masahiro Yamada To: linux-mtd@lists.infradead.org Cc: Masahiro Yamada , Cyrille Pitchen , linux-kernel@vger.kernel.org, Boris Brezillon , Marek Vasut , Brian Norris , Richard Weinberger , David Woodhouse Subject: [PATCH 1/9] mtd: nand: denali: squash setup_ecc_for_xfer() helper into caller Date: Wed, 13 Sep 2017 14:20:38 +0900 Message-Id: <1505280046-16608-2-git-send-email-yamada.masahiro@socionext.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1505280046-16608-1-git-send-email-yamada.masahiro@socionext.com> References: <1505280046-16608-1-git-send-email-yamada.masahiro@socionext.com> Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org The setup_ecc_for_xfer() is only called from denali_data_xfer(). This helper is small enough, so squash it into the caller. This looks cleaner to me. Signed-off-by: Masahiro Yamada --- drivers/mtd/nand/denali.c | 22 +++------------------- 1 file changed, 3 insertions(+), 19 deletions(-) -- 2.7.4 diff --git a/drivers/mtd/nand/denali.c b/drivers/mtd/nand/denali.c index aefdc83..d847ae4 100644 --- a/drivers/mtd/nand/denali.c +++ b/drivers/mtd/nand/denali.c @@ -208,24 +208,6 @@ static uint32_t denali_check_irq(struct denali_nand_info *denali) return irq_status; } -/* - * This helper function setups the registers for ECC and whether or not - * the spare area will be transferred. - */ -static void setup_ecc_for_xfer(struct denali_nand_info *denali, bool ecc_en, - bool transfer_spare) -{ - int ecc_en_flag, transfer_spare_flag; - - /* set ECC, transfer spare bits if needed */ - ecc_en_flag = ecc_en ? ECC_ENABLE__FLAG : 0; - transfer_spare_flag = transfer_spare ? TRANSFER_SPARE_REG__FLAG : 0; - - /* Enable spare area/ECC per user's request. */ - iowrite32(ecc_en_flag, denali->reg + ECC_ENABLE); - iowrite32(transfer_spare_flag, denali->reg + TRANSFER_SPARE_REG); -} - static void denali_read_buf(struct mtd_info *mtd, uint8_t *buf, int len) { struct denali_nand_info *denali = mtd_to_denali(mtd); @@ -659,7 +641,9 @@ static int denali_dma_xfer(struct denali_nand_info *denali, void *buf, static int denali_data_xfer(struct denali_nand_info *denali, void *buf, size_t size, int page, int raw, int write) { - setup_ecc_for_xfer(denali, !raw, raw); + iowrite32(raw ? 0 : ECC_ENABLE__FLAG, denali->reg + ECC_ENABLE); + iowrite32(raw ? TRANSFER_SPARE_REG__FLAG : 0, + denali->reg + TRANSFER_SPARE_REG); if (denali->dma_avail) return denali_dma_xfer(denali, buf, size, page, raw, write); From patchwork Wed Sep 13 05:20:40 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Masahiro Yamada X-Patchwork-Id: 112402 Delivered-To: patch@linaro.org Received: by 10.140.106.117 with SMTP id d108csp535349qgf; Tue, 12 Sep 2017 22:23:17 -0700 (PDT) X-Google-Smtp-Source: ADKCNb6OBCF3AlvzKmhi0MZ3X06vPRJmJM7eGWiObyGht8RYoPeK5yC6KLeaO6CmeutDh/wh995v X-Received: by 10.101.90.138 with SMTP id c10mr16749414pgt.350.1505280197788; Tue, 12 Sep 2017 22:23:17 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1505280197; cv=none; d=google.com; s=arc-20160816; b=yVUwYyrl+ukaI34cpRF4gvfrmLZG5m2rlNvQIdQjjP1SI0HPL2BL7e2TkmqNPyIiFU FQpMtZK7+eomgvkpmj5UQWYKU/ydjZkEUFBTnDhCPC29ZUQzjYyps/jvSKll0swxWKar LjxtlsS4gYfgRuQDQtr8boPO4MrASyQ6RuCSZfXcocHzS1MtNBZOvIIPWnI+6kzngugx F4Z+OHC/x/8APnG/njQrZMYJSEQoAI4qDjfxcGh5Xui8aXasMd0Q9M97BPL08Z3hkK2O BJnc7HkK0jMxQxKx4SQz+y0rNSqklN8/3oT4gkT+K0bX7sTAsQ4RjHS94Dyz+wt0NBMn cOFg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:references:in-reply-to:message-id:date :subject:cc:to:from:dkim-signature:dkim-filter :arc-authentication-results; bh=tLS1pa4oIL0QczfIUx+d+hkkz1w0Ufp8LN3JuPDAuAM=; b=QTA8fy6jsKr7Zc/MHv6dKGWesAnpE5vNGVoGzLEpvtXBkU77B/Kzzu2I2cb2IAyn0y 2QifCuVKP7xWJM+vgmcFJeKuGgU4kYUACu9Z8pSoSSiAnJiGuy5OfpbMCfiszlD/l3rd s4sW6nqoXHxGSqbd6Km/5xlOOSIbGEejoggWyc1UF6xNojkgm9cVTk8AaQJQprXAcCNr WYRyt/SNMpIDXpC1tvrjc5OSyEqJvV50BrYioMWHgdHj0bGt1YtqfxLsbEzI+S7dClq0 Oo0ZL3LVrDyZZDmAWrtKTMrPbm6F4jRGV4nAonizAJ0iXeNh7OqZfyr9zCZ/j8iYKsbS /ZLw== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@nifty.com header.s=dec2015msa header.b=fcuuUvkP; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. 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Also, sort them alphabetically. , , turned out bogus, so removed. Signed-off-by: Masahiro Yamada --- drivers/mtd/nand/denali.c | 12 +++++++----- drivers/mtd/nand/denali.h | 3 +++ drivers/mtd/nand/denali_dt.c | 3 ++- drivers/mtd/nand/denali_pci.c | 3 +++ 4 files changed, 15 insertions(+), 6 deletions(-) -- 2.7.4 diff --git a/drivers/mtd/nand/denali.c b/drivers/mtd/nand/denali.c index 48193f9..4daeb7f 100644 --- a/drivers/mtd/nand/denali.c +++ b/drivers/mtd/nand/denali.c @@ -16,14 +16,16 @@ * 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA. * */ -#include -#include + +#include #include -#include -#include -#include +#include +#include #include +#include +#include #include +#include #include "denali.h" diff --git a/drivers/mtd/nand/denali.h b/drivers/mtd/nand/denali.h index 9239e67..dc3f970 100644 --- a/drivers/mtd/nand/denali.h +++ b/drivers/mtd/nand/denali.h @@ -21,7 +21,10 @@ #define __DENALI_H__ #include +#include #include +#include +#include #define DEVICE_RESET 0x0 #define DEVICE_RESET__BANK(bank) BIT(bank) diff --git a/drivers/mtd/nand/denali_dt.c b/drivers/mtd/nand/denali_dt.c index 56e2e17..01e0100 100644 --- a/drivers/mtd/nand/denali_dt.c +++ b/drivers/mtd/nand/denali_dt.c @@ -12,15 +12,16 @@ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for * more details. */ + #include #include #include #include #include #include -#include #include #include +#include #include "denali.h" diff --git a/drivers/mtd/nand/denali_pci.c b/drivers/mtd/nand/denali_pci.c index 81370c7..7d5600b 100644 --- a/drivers/mtd/nand/denali_pci.c +++ b/drivers/mtd/nand/denali_pci.c @@ -11,6 +11,9 @@ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for * more details. */ + +#include +#include #include #include #include From patchwork Wed Sep 13 05:20:41 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Masahiro Yamada X-Patchwork-Id: 112403 Delivered-To: patch@linaro.org Received: by 10.140.106.117 with SMTP id d108csp535372qgf; Tue, 12 Sep 2017 22:23:19 -0700 (PDT) X-Google-Smtp-Source: ADKCNb5dFjFzYkOXRzRFMQetZLMKDjlgadsqO5ROv6waAToLY9QWkK2/qSUcj1GF155Qs7CT/UPB X-Received: by 10.101.83.4 with SMTP id m4mr9358320pgq.266.1505280199049; Tue, 12 Sep 2017 22:23:19 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1505280199; cv=none; d=google.com; s=arc-20160816; b=G3uvQYJWcf0JD/aDEwCBd2xdc+K8c6/EOvZZZAHxgHdVQi4+1kmkLVZT/Bx2PHoaRN HC3Cwt/9GMM1IOxMOIrj/j9NjL5+/SoPf3IUbNM7c9ooDLiiafElOD5uUVPgkTMNqvFq TtHbhPEK1pm8Luc2SEbrnbU2IxeXsR1haqQ9dnU1e3hwPkcDduBHgl1oGzJzE/o10AXN lx6rFwOqRtAI5it8xaGkwebuhBRq5kmoCSxzMvE59Nc58Vb+4WMzY70kvMX/N0CjbPCs I1Ju/JC9wikLsoONiSzqI7vgkejxfaWoAK+Zgzh3vPOqY8Kp+sx679hAcLq6Rm9CcFBq fBag== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:references:in-reply-to:message-id:date :subject:cc:to:from:dkim-signature:dkim-filter :arc-authentication-results; bh=UsmtvXFLh1VYoEpkB1cXxBkVIZ+LB34uuLv5OvakrN8=; b=YpGSwuPMpPZlk37xQWUo9+mW1KHSz3Cr2cW3uCobz4xAgRKOOsYOSeK4CWHSbP3VqC 4KpPNwmBml8Ix3xkWQsE8587MWjadHu1NMuaAhMDHf2beaWn7U/mM7rdnfvT7I/yARHC DH5NCl2Qq5fxfyQ8X0Lrp3HVRFiht8jvIjZK34wmCcma0Hi8sV84q7FOi70ge+yX4ccy UY+CO+UB8rh8VkxBj7/NNJGBNf29m3Be0DREmqdBXpYmYRsy0Xa0IwBg4wRUZr89cUrF Z2LSBiPsh80cCXuGrfgQVgUwr9N1s+xC16eYn+Qj+QLvbLzbUEh+VurkVxK6UeoGUs5r fQzQ== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@nifty.com header.s=dec2015msa header.b=mZ6PtYmJ; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id u27si8980760pfa.361.2017.09.12.22.23.18; Tue, 12 Sep 2017 22:23:19 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@nifty.com header.s=dec2015msa header.b=mZ6PtYmJ; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751687AbdIMFXI (ORCPT + 26 others); Wed, 13 Sep 2017 01:23:08 -0400 Received: from conuserg-12.nifty.com ([210.131.2.79]:35954 "EHLO conuserg-12.nifty.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751253AbdIMFW5 (ORCPT ); Wed, 13 Sep 2017 01:22:57 -0400 Received: from pug.e01.socionext.com (p14092-ipngnfx01kyoto.kyoto.ocn.ne.jp [153.142.97.92]) (authenticated) by conuserg-12.nifty.com with ESMTP id v8D5Kpx3010397; Wed, 13 Sep 2017 14:20:54 +0900 DKIM-Filter: OpenDKIM Filter v2.10.3 conuserg-12.nifty.com v8D5Kpx3010397 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=nifty.com; s=dec2015msa; t=1505280055; bh=UsmtvXFLh1VYoEpkB1cXxBkVIZ+LB34uuLv5OvakrN8=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=mZ6PtYmJrwOigXUgsvjpM1aFePJUuGx/sO0NS+Yypni4k1EHPHUE0dPEeZxu5EZSZ Slz5jkXDNkadXk+DqtbeI9J0e6/gRnvXa2zzJLyq6gJtnY3gqdsqZ45xa6957S1B/M R2PXx3eCIUV50ulMXDHVk58vH6ioWB15ZYoZ9a+AQUScTD2W6koDJm4qQj/q8b4R8O yzZzvq1fI7lUO1+Tie0ZtYpxuUsjGCi8yABXy87uTgNg12NtXv1bLPwEFcuwZ/30vI FmHg0qTAGX9QVqhekmAOWDG7Ilbw9mP8WAWhM40D2roQ+F+WhRPi6wA5z6QtAnkSud +5LG3qSc3lPLA== X-Nifty-SrcIP: [153.142.97.92] From: Masahiro Yamada To: linux-mtd@lists.infradead.org Cc: Masahiro Yamada , Cyrille Pitchen , linux-kernel@vger.kernel.org, Boris Brezillon , Marek Vasut , Brian Norris , Richard Weinberger , David Woodhouse Subject: [PATCH 4/9] mtd: nand: denali: squash denali_enable_dma() helper into caller Date: Wed, 13 Sep 2017 14:20:41 +0900 Message-Id: <1505280046-16608-5-git-send-email-yamada.masahiro@socionext.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1505280046-16608-1-git-send-email-yamada.masahiro@socionext.com> References: <1505280046-16608-1-git-send-email-yamada.masahiro@socionext.com> Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org This helper just sets/clears a flag of DMA_ENABLE register (with register read-back, I do not know why it is necessary). Move the register write code to the caller, and remove the helper. It works for me without the register read-back. Signed-off-by: Masahiro Yamada --- drivers/mtd/nand/denali.c | 12 +++--------- 1 file changed, 3 insertions(+), 9 deletions(-) -- 2.7.4 diff --git a/drivers/mtd/nand/denali.c b/drivers/mtd/nand/denali.c index 4daeb7f..e7b25de 100644 --- a/drivers/mtd/nand/denali.c +++ b/drivers/mtd/nand/denali.c @@ -465,13 +465,6 @@ static int denali_sw_ecc_fixup(struct mtd_info *mtd, return max_bitflips; } -/* programs the controller to either enable/disable DMA transfers */ -static void denali_enable_dma(struct denali_nand_info *denali, bool en) -{ - iowrite32(en ? DMA_ENABLE__FLAG : 0, denali->reg + DMA_ENABLE); - ioread32(denali->reg + DMA_ENABLE); -} - static void denali_setup_dma64(struct denali_nand_info *denali, dma_addr_t dma_addr, int page, int write) { @@ -619,7 +612,7 @@ static int denali_dma_xfer(struct denali_nand_info *denali, void *buf, ecc_err_mask = INTR__ECC_ERR; } - denali_enable_dma(denali, true); + iowrite32(DMA_ENABLE__FLAG, denali->reg + DMA_ENABLE); denali_reset_irq(denali); denali_setup_dma(denali, dma_addr, page, write); @@ -631,7 +624,8 @@ static int denali_dma_xfer(struct denali_nand_info *denali, void *buf, else if (irq_status & ecc_err_mask) ret = -EBADMSG; - denali_enable_dma(denali, false); + iowrite32(0, denali->reg + DMA_ENABLE); + dma_unmap_single(denali->dev, dma_addr, size, dir); if (irq_status & INTR__ERASED_PAGE) From patchwork Wed Sep 13 05:20:43 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Masahiro Yamada X-Patchwork-Id: 112407 Delivered-To: patch@linaro.org Received: by 10.140.106.117 with SMTP id d108csp536561qgf; Tue, 12 Sep 2017 22:24:43 -0700 (PDT) X-Google-Smtp-Source: ADKCNb5C42A6kY4sPuzdH/AybLRuhCn/s+XeWV0ZBfRYF1RRlJfOnKr13DK44SMpSAv0fNg18xGq X-Received: by 10.99.54.7 with SMTP id d7mr17086304pga.115.1505280283395; Tue, 12 Sep 2017 22:24:43 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1505280283; cv=none; d=google.com; s=arc-20160816; b=xNr3hYBsbT0ISJHTT+HJNYZrQkbXFisU0YYaZMUszrl7tJomfWKporr9rBu0XDVRvW +idk8WxSY4EpTuk9a8Tps7BxVwR00DXuLci5lFD7d5YJ1gla8mX0VZWYhWcI1gEkGv0H swL8Z/YOavDh0uHLmJGffO7zfX5r6b2mMazdF6BdJNrRWYufz/8lF0L2Dagfjq/0kFIK Gvtw19H8DTkaJzidU+3rnyHv/WMdPetcc3E+0xBN+qcQbPASRIO6JokbMnewY8rUja0d b1LuVkmzq62GfhJV1Cfc2+xFmnqrQgzxKNPIdT0PUGz6vmdhmnL+QzHrRMt2J1bNwqcS eNlg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:references:in-reply-to:message-id:date :subject:cc:to:from:dkim-signature:dkim-filter :arc-authentication-results; bh=rPYi00FdhFvB5jlz8bzB2Hvp8WgSMWRgU9fFEH4ZVXE=; b=bjR6miGxglvahDT6rpkIm5/ALbklR002d7i2t0WHzxVRaP0ppNDr2r2D9dIk9Aayvv mAG+VBgVL2S/nMi/YhKwqmMcKtkFLxmH8LTbsbPE6rBJGjG8+Xc3YrreOuMWvYk9Rsjf c18oFqSCzKYZBlcrvUwzFTrGFKoGiNg2wPzcPuBldsIC1LbZ1xvQyIc5FpwF33S5LiNI eQtQyS5m2s1NTzC+jaUtDYbnuW+4hDkloTjYbfLy015e6i/YjS7MtHOTPWRY+VApLDQc WOUk9u2cG1unOtIZPC/AxAbQffPHvm29lmj4b7m4CZVKqHGOQjMLc5z2cAw+WkonRucx xSZQ== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@nifty.com header.s=dec2015msa header.b=mB0Gc+Db; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id a77si9078872pfg.419.2017.09.12.22.24.43; Tue, 12 Sep 2017 22:24:43 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@nifty.com header.s=dec2015msa header.b=mB0Gc+Db; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751953AbdIMFYl (ORCPT + 26 others); Wed, 13 Sep 2017 01:24:41 -0400 Received: from conuserg-12.nifty.com ([210.131.2.79]:35991 "EHLO conuserg-12.nifty.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751326AbdIMFW6 (ORCPT ); Wed, 13 Sep 2017 01:22:58 -0400 Received: from pug.e01.socionext.com (p14092-ipngnfx01kyoto.kyoto.ocn.ne.jp [153.142.97.92]) (authenticated) by conuserg-12.nifty.com with ESMTP id v8D5Kpx5010397; Wed, 13 Sep 2017 14:20:56 +0900 DKIM-Filter: OpenDKIM Filter v2.10.3 conuserg-12.nifty.com v8D5Kpx5010397 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=nifty.com; s=dec2015msa; t=1505280057; bh=rPYi00FdhFvB5jlz8bzB2Hvp8WgSMWRgU9fFEH4ZVXE=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=mB0Gc+Db66kuo8WJM0ZtwJ0DC/0QZyF5FiEEggJxrFoVCbBuN31oC1ydHEs9qdvbB +nCAwDY1x1vFq/zVJCn7BGEbALuj2PdrJsT29jtOhbnyAO1kTYMWtsh1POk2EDUVRe si8tF9W6GdWlPUKyHPBpbJFcoSjqZ6Ws2XzN4LynaxR1BkPpSWypvdYtzSqizp6d2W L+r9CE9uQpLwxv3gdpV9eqTBqV1mgfzq1IEVlFBai8nRS+1D1ZlTSYEr8iADoYnSky Z7T7zEB35BI+BN1f90/hy0ShTVN86NEX/rj9LAw7NyCSN8r1yeab9+ffhz81ywRWD/ gGN6rM1EGEExA== X-Nifty-SrcIP: [153.142.97.92] From: Masahiro Yamada To: linux-mtd@lists.infradead.org Cc: Masahiro Yamada , Cyrille Pitchen , linux-kernel@vger.kernel.org, Boris Brezillon , Marek Vasut , Brian Norris , Richard Weinberger , David Woodhouse Subject: [PATCH 6/9] mtd: nand: denali: clean up macros with Date: Wed, 13 Sep 2017 14:20:43 +0900 Message-Id: <1505280046-16608-7-git-send-email-yamada.masahiro@socionext.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1505280046-16608-1-git-send-email-yamada.masahiro@socionext.com> References: <1505280046-16608-1-git-send-email-yamada.masahiro@socionext.com> Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org All the register offsets and bitfield masks are defined in denali.h, but the driver code ended up with additional crappy macros such as MAKE_ECC_CORRECTION(), ECC_SECTOR(), etc. The reason is apparent - accessing a register field requires mask and shift pair. The denali.h only provides mask. However, defining both is tedious. provides a convenient way to get register fields only with a single shifted mask. Now use it. While I am here, I shortened some macros. Signed-off-by: Masahiro Yamada --- drivers/mtd/nand/denali.c | 25 +++++++++++-------------- drivers/mtd/nand/denali.h | 13 +++++-------- 2 files changed, 16 insertions(+), 22 deletions(-) -- 2.7.4 diff --git a/drivers/mtd/nand/denali.c b/drivers/mtd/nand/denali.c index 3cc56de..1525c4e 100644 --- a/drivers/mtd/nand/denali.c +++ b/drivers/mtd/nand/denali.c @@ -17,6 +17,7 @@ * */ +#include #include #include #include @@ -386,13 +387,6 @@ static int denali_hw_ecc_fixup(struct mtd_info *mtd, return max_bitflips; } -#define ECC_SECTOR(x) (((x) & ECC_ERROR_ADDRESS__SECTOR_NR) >> 12) -#define ECC_BYTE(x) (((x) & ECC_ERROR_ADDRESS__OFFSET)) -#define ECC_CORRECTION_VALUE(x) ((x) & ERR_CORRECTION_INFO__BYTEMASK) -#define ECC_ERROR_UNCORRECTABLE(x) ((x) & ERR_CORRECTION_INFO__ERROR_TYPE) -#define ECC_ERR_DEVICE(x) (((x) & ERR_CORRECTION_INFO__DEVICE_NR) >> 8) -#define ECC_LAST_ERR(x) ((x) & ERR_CORRECTION_INFO__LAST_ERR_INFO) - static int denali_sw_ecc_fixup(struct mtd_info *mtd, struct denali_nand_info *denali, unsigned long *uncor_ecc_flags, uint8_t *buf) @@ -410,18 +404,20 @@ static int denali_sw_ecc_fixup(struct mtd_info *mtd, do { err_addr = ioread32(denali->reg + ECC_ERROR_ADDRESS); - err_sector = ECC_SECTOR(err_addr); - err_byte = ECC_BYTE(err_addr); + err_sector = FIELD_GET(ECC_ERROR_ADDRESS__SECTOR, err_addr); + err_byte = FIELD_GET(ECC_ERROR_ADDRESS__OFFSET, err_addr); err_cor_info = ioread32(denali->reg + ERR_CORRECTION_INFO); - err_cor_value = ECC_CORRECTION_VALUE(err_cor_info); - err_device = ECC_ERR_DEVICE(err_cor_info); + err_cor_value = FIELD_GET(ERR_CORRECTION_INFO__BYTE, + err_cor_info); + err_device = FIELD_GET(ERR_CORRECTION_INFO__DEVICE, + err_cor_info); /* reset the bitflip counter when crossing ECC sector */ if (err_sector != prev_sector) bitflips = 0; - if (ECC_ERROR_UNCORRECTABLE(err_cor_info)) { + if (err_cor_info & ERR_CORRECTION_INFO__UNCOR) { /* * Check later if this is a real ECC error, or * an erased sector. @@ -451,7 +447,7 @@ static int denali_sw_ecc_fixup(struct mtd_info *mtd, } prev_sector = err_sector; - } while (!ECC_LAST_ERR(err_cor_info)); + } while (!(err_cor_info & ERR_CORRECTION_INFO__LAST_ERR)); /* * Once handle all ecc errors, controller will trigger a @@ -1351,7 +1347,8 @@ int denali_init(struct denali_nand_info *denali) "chosen ECC settings: step=%d, strength=%d, bytes=%d\n", chip->ecc.size, chip->ecc.strength, chip->ecc.bytes); - iowrite32(MAKE_ECC_CORRECTION(chip->ecc.strength, 1), + iowrite32(FIELD_PREP(ECC_CORRECTION__ERASE_THRESHOLD, 1) | + FIELD_PREP(ECC_CORRECTION__VALUE, chip->ecc.strength), denali->reg + ECC_CORRECTION); iowrite32(mtd->erasesize / mtd->writesize, denali->reg + PAGES_PER_BLOCK); diff --git a/drivers/mtd/nand/denali.h b/drivers/mtd/nand/denali.h index dc3f970..73aad3a 100644 --- a/drivers/mtd/nand/denali.h +++ b/drivers/mtd/nand/denali.h @@ -114,9 +114,6 @@ #define ECC_CORRECTION 0x1b0 #define ECC_CORRECTION__VALUE GENMASK(4, 0) #define ECC_CORRECTION__ERASE_THRESHOLD GENMASK(31, 16) -#define MAKE_ECC_CORRECTION(val, thresh) \ - (((val) & (ECC_CORRECTION__VALUE)) | \ - (((thresh) << 16) & (ECC_CORRECTION__ERASE_THRESHOLD))) #define READ_MODE 0x1c0 #define READ_MODE__VALUE GENMASK(3, 0) @@ -258,13 +255,13 @@ #define ECC_ERROR_ADDRESS 0x630 #define ECC_ERROR_ADDRESS__OFFSET GENMASK(11, 0) -#define ECC_ERROR_ADDRESS__SECTOR_NR GENMASK(15, 12) +#define ECC_ERROR_ADDRESS__SECTOR GENMASK(15, 12) #define ERR_CORRECTION_INFO 0x640 -#define ERR_CORRECTION_INFO__BYTEMASK GENMASK(7, 0) -#define ERR_CORRECTION_INFO__DEVICE_NR GENMASK(11, 8) -#define ERR_CORRECTION_INFO__ERROR_TYPE BIT(14) -#define ERR_CORRECTION_INFO__LAST_ERR_INFO BIT(15) +#define ERR_CORRECTION_INFO__BYTE GENMASK(7, 0) +#define ERR_CORRECTION_INFO__DEVICE GENMASK(11, 8) +#define ERR_CORRECTION_INFO__UNCOR BIT(14) +#define ERR_CORRECTION_INFO__LAST_ERR BIT(15) #define ECC_COR_INFO(bank) (0x650 + (bank) / 2 * 0x10) #define ECC_COR_INFO__SHIFT(bank) ((bank) % 2 * 8) From patchwork Wed Sep 13 05:20:44 2017 Content-Type: text/plain; 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[209.132.180.67]) by mx.google.com with ESMTP id u27si8980760pfa.361.2017.09.12.22.23.19; Tue, 12 Sep 2017 22:23:19 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@nifty.com header.s=dec2015msa header.b=z254Um2x; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751748AbdIMFXM (ORCPT + 26 others); Wed, 13 Sep 2017 01:23:12 -0400 Received: from conuserg-12.nifty.com ([210.131.2.79]:36014 "EHLO conuserg-12.nifty.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751330AbdIMFW7 (ORCPT ); Wed, 13 Sep 2017 01:22:59 -0400 Received: from pug.e01.socionext.com (p14092-ipngnfx01kyoto.kyoto.ocn.ne.jp [153.142.97.92]) (authenticated) by conuserg-12.nifty.com with ESMTP id v8D5Kpx6010397; Wed, 13 Sep 2017 14:20:57 +0900 DKIM-Filter: OpenDKIM Filter v2.10.3 conuserg-12.nifty.com v8D5Kpx6010397 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=nifty.com; s=dec2015msa; t=1505280057; bh=7Wo3Jfxi3nNtoxkLx7hG8rEGbq39a8jyMr1IRBQZVTQ=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=z254Um2xSoMTvxbWPGyX2Vvn3S+9xbc74vwp2Ji1BJBzgignx5efajX4juSzJccOK e5EVPORvrSPw1Ebk/Qa8MSFEeLSHSVEs2GabdY2C5sPQU/1gRFlOYJNseXYdsFfJ/m 62VDYAYfO2+dUNKSRCGK5TMUD2nX8jUiBAr3z97OFEwSaTNUQSQwdzYRpg/le/C0ep KpdNPBenxqJQdFofnXfHg8TyfhQyrh/5Giaon8WxbIBcfQEmRJ7iLK4YpQEcejA3HD Ho6hjU59/RbRxotq8BWL34HmFAuZ/04wsVGaLzUODWcXAGAU7yIG8Wfc69r5BUH13F eYGH6T1gHm91w== X-Nifty-SrcIP: [153.142.97.92] From: Masahiro Yamada To: linux-mtd@lists.infradead.org Cc: Masahiro Yamada , Cyrille Pitchen , linux-kernel@vger.kernel.org, Boris Brezillon , Marek Vasut , Brian Norris , Richard Weinberger , David Woodhouse Subject: [PATCH 7/9] mtd: nand: denali: use more FIELD_PREP / FIELD_GET where appropriate Date: Wed, 13 Sep 2017 14:20:44 +0900 Message-Id: <1505280046-16608-8-git-send-email-yamada.masahiro@socionext.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1505280046-16608-1-git-send-email-yamada.masahiro@socionext.com> References: <1505280046-16608-1-git-send-email-yamada.masahiro@socionext.com> Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org In several places in this driver, the register fields are retrieved as follows: val = reg & FOO_MASK; Then, modified as follows: reg &= ~FOO_MASK; reg |= val; This code relies on its shift is 0, which we will never know until we check the definition of FOO_MASK. Use FIELD_PREP / FIELD_GET where appropriate. Signed-off-by: Masahiro Yamada --- drivers/mtd/nand/denali.c | 22 +++++++++++----------- 1 file changed, 11 insertions(+), 11 deletions(-) -- 2.7.4 diff --git a/drivers/mtd/nand/denali.c b/drivers/mtd/nand/denali.c index 1525c4e..ca98015 100644 --- a/drivers/mtd/nand/denali.c +++ b/drivers/mtd/nand/denali.c @@ -88,7 +88,7 @@ static void denali_detect_max_banks(struct denali_nand_info *denali) { uint32_t features = ioread32(denali->reg + FEATURES); - denali->max_banks = 1 << (features & FEATURES__N_BANKS); + denali->max_banks = 1 << FIELD_GET(FEATURES__N_BANKS, features); /* the encoding changed from rev 5.0 to 5.1 */ if (denali->revision < 0x0501) @@ -374,7 +374,7 @@ static int denali_hw_ecc_fixup(struct mtd_info *mtd, return 0; } - max_bitflips = ecc_cor & ECC_COR_INFO__MAX_ERRORS; + max_bitflips = FIELD_GET(ECC_COR_INFO__MAX_ERRORS, ecc_cor); /* * The register holds the maximum of per-sector corrected bitflips. @@ -985,7 +985,7 @@ static int denali_setup_data_interface(struct mtd_info *mtd, int chipnr, tmp = ioread32(denali->reg + ACC_CLKS); tmp &= ~ACC_CLKS__VALUE; - tmp |= acc_clks; + tmp |= FIELD_PREP(ACC_CLKS__VALUE, acc_clks); iowrite32(tmp, denali->reg + ACC_CLKS); /* tRWH -> RE_2_WE */ @@ -994,7 +994,7 @@ static int denali_setup_data_interface(struct mtd_info *mtd, int chipnr, tmp = ioread32(denali->reg + RE_2_WE); tmp &= ~RE_2_WE__VALUE; - tmp |= re_2_we; + tmp |= FIELD_PREP(RE_2_WE__VALUE, re_2_we); iowrite32(tmp, denali->reg + RE_2_WE); /* tRHZ -> RE_2_RE */ @@ -1003,7 +1003,7 @@ static int denali_setup_data_interface(struct mtd_info *mtd, int chipnr, tmp = ioread32(denali->reg + RE_2_RE); tmp &= ~RE_2_RE__VALUE; - tmp |= re_2_re; + tmp |= FIELD_PREP(RE_2_RE__VALUE, re_2_re); iowrite32(tmp, denali->reg + RE_2_RE); /* tWHR -> WE_2_RE */ @@ -1012,7 +1012,7 @@ static int denali_setup_data_interface(struct mtd_info *mtd, int chipnr, tmp = ioread32(denali->reg + TWHR2_AND_WE_2_RE); tmp &= ~TWHR2_AND_WE_2_RE__WE_2_RE; - tmp |= we_2_re; + tmp |= FIELD_PREP(TWHR2_AND_WE_2_RE__WE_2_RE, we_2_re); iowrite32(tmp, denali->reg + TWHR2_AND_WE_2_RE); /* tADL -> ADDR_2_DATA */ @@ -1026,8 +1026,8 @@ static int denali_setup_data_interface(struct mtd_info *mtd, int chipnr, addr_2_data = min_t(int, addr_2_data, addr_2_data_mask); tmp = ioread32(denali->reg + TCWAW_AND_ADDR_2_DATA); - tmp &= ~addr_2_data_mask; - tmp |= addr_2_data; + tmp &= ~TCWAW_AND_ADDR_2_DATA__ADDR_2_DATA; + tmp |= FIELD_PREP(TCWAW_AND_ADDR_2_DATA__ADDR_2_DATA, addr_2_data); iowrite32(tmp, denali->reg + TCWAW_AND_ADDR_2_DATA); /* tREH, tWH -> RDWR_EN_HI_CNT */ @@ -1037,7 +1037,7 @@ static int denali_setup_data_interface(struct mtd_info *mtd, int chipnr, tmp = ioread32(denali->reg + RDWR_EN_HI_CNT); tmp &= ~RDWR_EN_HI_CNT__VALUE; - tmp |= rdwr_en_hi; + tmp |= FIELD_PREP(RDWR_EN_HI_CNT__VALUE, rdwr_en_hi); iowrite32(tmp, denali->reg + RDWR_EN_HI_CNT); /* tRP, tWP -> RDWR_EN_LO_CNT */ @@ -1051,7 +1051,7 @@ static int denali_setup_data_interface(struct mtd_info *mtd, int chipnr, tmp = ioread32(denali->reg + RDWR_EN_LO_CNT); tmp &= ~RDWR_EN_LO_CNT__VALUE; - tmp |= rdwr_en_lo; + tmp |= FIELD_PREP(RDWR_EN_LO_CNT__VALUE, rdwr_en_lo); iowrite32(tmp, denali->reg + RDWR_EN_LO_CNT); /* tCS, tCEA -> CS_SETUP_CNT */ @@ -1062,7 +1062,7 @@ static int denali_setup_data_interface(struct mtd_info *mtd, int chipnr, tmp = ioread32(denali->reg + CS_SETUP_CNT); tmp &= ~CS_SETUP_CNT__VALUE; - tmp |= cs_setup; + tmp |= FIELD_PREP(CS_SETUP_CNT__VALUE, cs_setup); iowrite32(tmp, denali->reg + CS_SETUP_CNT); return 0; From patchwork Wed Sep 13 05:20:45 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Masahiro Yamada X-Patchwork-Id: 112406 Delivered-To: patch@linaro.org Received: by 10.140.106.117 with SMTP id d108csp536138qgf; Tue, 12 Sep 2017 22:24:13 -0700 (PDT) X-Google-Smtp-Source: ADKCNb7RXPbIBB0nNMO4vvbNL/e+vdfIlw5AQe0GQbMmxY3eBT4h0WvvZFkiCFutPFJuf0TwsOEV X-Received: by 10.84.232.8 with SMTP id h8mr19683374plk.423.1505280253675; Tue, 12 Sep 2017 22:24:13 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1505280253; 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[209.132.180.67]) by mx.google.com with ESMTP id n79si9044344pfj.340.2017.09.12.22.24.13; Tue, 12 Sep 2017 22:24:13 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@nifty.com header.s=dec2015msa header.b=SgtByf/9; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751931AbdIMFYM (ORCPT + 26 others); Wed, 13 Sep 2017 01:24:12 -0400 Received: from conuserg-12.nifty.com ([210.131.2.79]:36009 "EHLO conuserg-12.nifty.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751328AbdIMFW7 (ORCPT ); Wed, 13 Sep 2017 01:22:59 -0400 Received: from pug.e01.socionext.com (p14092-ipngnfx01kyoto.kyoto.ocn.ne.jp [153.142.97.92]) (authenticated) by conuserg-12.nifty.com with ESMTP id v8D5Kpx7010397; Wed, 13 Sep 2017 14:20:58 +0900 DKIM-Filter: OpenDKIM Filter v2.10.3 conuserg-12.nifty.com v8D5Kpx7010397 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=nifty.com; s=dec2015msa; t=1505280058; bh=a0NCciFOCqGCblZwHbVdaatk1W95UNaMPT+UBGaChEA=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=SgtByf/9beqbXr7tqfz53iuW4qbyDFGFvLe7HxjzbK/hpBht/GyS8bJzPUBVtLy9I Ti8gg3Zq1/ShCjh4MXOtZDUqr35oYfzV18mjLhomeZSYvQIdpd5j1aOPxomkjPBmRk 1K5d1h8dPZlVMT2TyNvYMI8cbvI79Jqare/SkU6vgMk9Wwe6ku4xSdbkaQ3Opcce8g pLaIYPiTmw9rhwijhK+7aUrq2nFl3KcLntWkfuWVsW9lZ9lY0t9GK70K4SxysOykRR s0xW7QqY5i2ycUoYwjLDg6/6qQzk4a9o09YQ4JBa7+35NP/tCybmTCzTzZl7dtMXuS 0tZwxkQdDFAbw== X-Nifty-SrcIP: [153.142.97.92] From: Masahiro Yamada To: linux-mtd@lists.infradead.org Cc: Masahiro Yamada , Cyrille Pitchen , linux-kernel@vger.kernel.org, Boris Brezillon , Marek Vasut , Brian Norris , Richard Weinberger , David Woodhouse Subject: [PATCH 8/9] mtd: nand: denali: clean up comments Date: Wed, 13 Sep 2017 14:20:45 +0900 Message-Id: <1505280046-16608-9-git-send-email-yamada.masahiro@socionext.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1505280046-16608-1-git-send-email-yamada.masahiro@socionext.com> References: <1505280046-16608-1-git-send-email-yamada.masahiro@socionext.com> Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org This driver explains too much about what is apparent from the code. Comments around basic APIs such as init_completion(), spin_lock_init(), etc. seem unneeded lessons to kernel developers. (With those comments dropped, denali_drv_init() is small enough, so it has been merged into the probe function.) Also, NAND driver developers should know the NAND init procedure, so there is no need to explain nand_scan_ident/tail. I removed FSF's address from the license blocks, and added a simple comment to the spinlock as "checkpatch.pl --strict" suggested so. Signed-off-by: Masahiro Yamada --- drivers/mtd/nand/denali.c | 52 +++++-------------------------------------- drivers/mtd/nand/denali.h | 7 +----- drivers/mtd/nand/denali_dt.c | 1 - drivers/mtd/nand/denali_pci.c | 2 -- 4 files changed, 6 insertions(+), 56 deletions(-) -- 2.7.4 diff --git a/drivers/mtd/nand/denali.c b/drivers/mtd/nand/denali.c index ca98015..02ce310 100644 --- a/drivers/mtd/nand/denali.c +++ b/drivers/mtd/nand/denali.c @@ -10,11 +10,6 @@ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for * more details. - * - * You should have received a copy of the GNU General Public License along with - * this program; if not, write to the Free Software Foundation, Inc., - * 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA. - * */ #include @@ -64,10 +59,6 @@ MODULE_LICENSE("GPL"); */ #define DENALI_CLK_X_MULT 6 -/* - * this macro allows us to convert from an MTD structure to our own - * device context (denali) structure. - */ static inline struct denali_nand_info *mtd_to_denali(struct mtd_info *mtd) { return container_of(mtd_to_nand(mtd), struct denali_nand_info, nand); @@ -450,9 +441,8 @@ static int denali_sw_ecc_fixup(struct mtd_info *mtd, } while (!(err_cor_info & ERR_CORRECTION_INFO__LAST_ERR)); /* - * Once handle all ecc errors, controller will trigger a - * ECC_TRANSACTION_DONE interrupt, so here just wait for - * a while for this interrupt + * Once handle all ECC errors, controller will trigger an + * ECC_TRANSACTION_DONE interrupt. */ irq_status = denali_wait_for_irq(denali, INTR__ECC_TRANSACTION_DONE); if (!(irq_status & INTR__ECC_TRANSACTION_DONE)) @@ -613,7 +603,6 @@ static int denali_dma_xfer(struct denali_nand_info *denali, void *buf, denali_reset_irq(denali); denali_setup_dma(denali, dma_addr, page, write); - /* wait for operation to complete */ irq_status = denali_wait_for_irq(denali, irq_mask); if (!(irq_status & INTR__DMA_CMD_COMP)) ret = -EIO; @@ -1185,22 +1174,6 @@ static const struct mtd_ooblayout_ops denali_ooblayout_ops = { .free = denali_ooblayout_free, }; -/* initialize driver data structures */ -static void denali_drv_init(struct denali_nand_info *denali) -{ - /* - * the completion object will be used to notify - * the callee that the interrupt is done - */ - init_completion(&denali->complete); - - /* - * the spinlock will be used to synchronize the ISR with any - * element that might be access shared data (interrupt status) - */ - spin_lock_init(&denali->irq_lock); -} - static int denali_multidev_fixup(struct denali_nand_info *denali) { struct nand_chip *chip = &denali->nand; @@ -1260,11 +1233,12 @@ int denali_init(struct denali_nand_info *denali) mtd->dev.parent = denali->dev; denali_hw_init(denali); - denali_drv_init(denali); + + init_completion(&denali->complete); + spin_lock_init(&denali->irq_lock); denali_clear_irq_all(denali); - /* Request IRQ after all the hardware initialization is finished */ ret = devm_request_irq(denali->dev, denali->irq, denali_isr, IRQF_SHARED, DENALI_NAND_NAME, denali); if (ret) { @@ -1282,7 +1256,6 @@ int denali_init(struct denali_nand_info *denali) if (!mtd->name) mtd->name = "denali-nand"; - /* register the driver with the NAND core subsystem */ chip->select_chip = denali_select_chip; chip->read_byte = denali_read_byte; chip->write_byte = denali_write_byte; @@ -1295,11 +1268,6 @@ int denali_init(struct denali_nand_info *denali) if (denali->clk_x_rate) chip->setup_data_interface = denali_setup_data_interface; - /* - * scan for NAND devices attached to the controller - * this is the first stage in a two step process to register - * with the nand subsystem - */ ret = nand_scan_ident(mtd, denali->max_banks, NULL); if (ret) goto disable_irq; @@ -1323,18 +1291,9 @@ int denali_init(struct denali_nand_info *denali) chip->buf_align = 16; } - /* - * second stage of the NAND scan - * this stage requires information regarding ECC and - * bad block management. - */ - chip->bbt_options |= NAND_BBT_USE_FLASH; chip->bbt_options |= NAND_BBT_NO_OOB; - chip->ecc.mode = NAND_ECC_HW_SYNDROME; - - /* no subpage writes on denali */ chip->options |= NAND_NO_SUBPAGE_WRITE; ret = denali_ecc_setup(mtd, chip, denali); @@ -1418,7 +1377,6 @@ int denali_init(struct denali_nand_info *denali) } EXPORT_SYMBOL(denali_init); -/* driver exit point */ void denali_remove(struct denali_nand_info *denali) { struct mtd_info *mtd = nand_to_mtd(&denali->nand); diff --git a/drivers/mtd/nand/denali.h b/drivers/mtd/nand/denali.h index 73aad3a..c761b5e 100644 --- a/drivers/mtd/nand/denali.h +++ b/drivers/mtd/nand/denali.h @@ -10,11 +10,6 @@ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for * more details. - * - * You should have received a copy of the GNU General Public License along with - * this program; if not, write to the Free Software Foundation, Inc., - * 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA. - * */ #ifndef __DENALI_H__ @@ -313,7 +308,7 @@ struct denali_nand_info { /* elements used by ISR */ struct completion complete; - spinlock_t irq_lock; + spinlock_t irq_lock; /* protect irq_mask and irq_status */ uint32_t irq_mask; uint32_t irq_status; int irq; diff --git a/drivers/mtd/nand/denali_dt.c b/drivers/mtd/nand/denali_dt.c index 01e0100..cfd33e6 100644 --- a/drivers/mtd/nand/denali_dt.c +++ b/drivers/mtd/nand/denali_dt.c @@ -156,7 +156,6 @@ static struct platform_driver denali_dt_driver = { .of_match_table = denali_nand_dt_ids, }, }; - module_platform_driver(denali_dt_driver); MODULE_LICENSE("GPL"); diff --git a/drivers/mtd/nand/denali_pci.c b/drivers/mtd/nand/denali_pci.c index 7d5600b..57fb7ae 100644 --- a/drivers/mtd/nand/denali_pci.c +++ b/drivers/mtd/nand/denali_pci.c @@ -109,7 +109,6 @@ static int denali_pci_probe(struct pci_dev *dev, const struct pci_device_id *id) return ret; } -/* driver exit point */ static void denali_pci_remove(struct pci_dev *dev) { struct denali_nand_info *denali = pci_get_drvdata(dev); @@ -125,5 +124,4 @@ static struct pci_driver denali_pci_driver = { .probe = denali_pci_probe, .remove = denali_pci_remove, }; - module_pci_driver(denali_pci_driver);