From patchwork Wed Sep 13 08:56:29 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Masahiro Yamada X-Patchwork-Id: 112414 Delivered-To: patch@linaro.org Received: by 10.80.202.13 with SMTP id d13csp713062edi; Wed, 13 Sep 2017 01:58:28 -0700 (PDT) X-Google-Smtp-Source: ADKCNb4C/jD5dygysI7DTZVKw+RFtDEm2uSGMyNusyHRKFazHA+Nrj2cRAU+MqTHTNfH4RAd6gHk X-Received: by 10.98.62.196 with SMTP id y65mr17355262pfj.282.1505293108816; Wed, 13 Sep 2017 01:58:28 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1505293108; cv=none; d=google.com; s=arc-20160816; b=ohZFdyotBIkNgSgwd4kE/9rhMTz3YEllMNhopp1y+jN7XwXdGGRu23q380SBvaoNsi /YgQlfxPnwH5YT55uNKzw8R3n68cRTNg7kK6cYxSytMmtzlNpE0hWxPFQ2C28tjvqkdR RfeaWBeG8kAoRkNICznsvMsuQmqhPWp31uEa9Izy2XtO8N06BJ8p7KKj/gkK9PY3kJPG YEcI7fpmmMXSh3WfcY8fblwhworBCFGOcN1Vm6DGYA1DWSiWGZ1XJbB6jpsfnImlmnSB tLMbhwkEnRhUBL8x2dIUJW6nCfyvSZEqq1I/QYd7jDRG7aQDZ1GfWF6ffQqSiUUudCw4 5H0A== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:references:in-reply-to:message-id:date :subject:cc:to:from:dkim-signature:dkim-filter :arc-authentication-results; bh=jHi0LBa5TJt3S5fC9Cfwk1llVJoE42jargOlqAW6BZA=; b=qwwXv6BoJbxy6GMa1v4sVK6p/g3jfAz3bM6HP5DVSZ3WyOR4NIYRKsh8jJmwvGbylR XLtP4aALAZY9BqGxPrGeCmOr/dLbCPvxXltMKjCGXUS8zddEpkxPWfRdH5kamREShP5v pp64Vj3QkqwjOaCJPT2zsJ/0Io9wy4EFwQ3V2G77WsMB6SD+uSv7CkjspHS2uYvz1aaB q/EMSEdSe2GuzX9R6HAC7WkwzaeZnB2ltyhadvbI/w1sPlB57zl8cVjaqoAA6g7cH7H7 GC/GqjQQAs5r0ryl0RvTHggF189sRC8zv8X5/MQiNH7bH7Yni9MYRKobEhXM42Vh+VI2 XBhQ== ARC-Authentication-Results: i=1; mx.google.com; dkim=neutral (body hash did not verify) header.i=@nifty.com header.s=dec2015msa header.b=W8vj1DGI; spf=pass (google.com: best guess record for domain of devicetree-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id 69si9194372pfl.351.2017.09.13.01.58.28; Wed, 13 Sep 2017 01:58:28 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of devicetree-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=neutral (body hash did not verify) header.i=@nifty.com header.s=dec2015msa header.b=W8vj1DGI; spf=pass (google.com: best guess record for domain of devicetree-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751738AbdIMI61 (ORCPT + 6 others); Wed, 13 Sep 2017 04:58:27 -0400 Received: from conuserg-09.nifty.com ([210.131.2.76]:64446 "EHLO conuserg-09.nifty.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751545AbdIMI60 (ORCPT ); Wed, 13 Sep 2017 04:58:26 -0400 Received: from pug.e01.socionext.com (p14092-ipngnfx01kyoto.kyoto.ocn.ne.jp [153.142.97.92]) (authenticated) by conuserg-09.nifty.com with ESMTP id v8D8ugqk027391; Wed, 13 Sep 2017 17:56:45 +0900 DKIM-Filter: OpenDKIM Filter v2.10.3 conuserg-09.nifty.com v8D8ugqk027391 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=nifty.com; s=dec2015msa; t=1505293006; bh=uqRbxwC4hXNT6RP9MedPBl4zsX5Man5LRcidVTDUkKQ=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=W8vj1DGIEcYVS2BuGp4TJJYt0QkthUe+pO6aJX4zdnvzRcYus+WlB7+N4+axgWxC6 CiQhC3b4xbk12E7bHbDY8t6veV8rAjoMxcqEXrNWMDdfTaXwDDyef7v8os7j/8Nvke m9dAex2YpAiB8w8wiuOjj7j5931K+smLbc8iYllVEs44AOkJ5Liwjn0Lxz8klJd2aX 2PrYRV2AJX74jshmE0J3yJJC72MESjxstFGSB6L5Io5e+zaxt1jg7BQZ6ziHUGVyjQ 7qMu+T2kCgPlqEnM8/qbmn4AlOZEekZZV0WtCvTBvaq5bf5xDfhLgTD66332cGf4aO OpEmRcsztkAog== X-Nifty-SrcIP: [153.142.97.92] From: Masahiro Yamada To: Marc Zyngier , linux-gpio@vger.kernel.org Cc: Thomas Gleixner , Jason Cooper , Rob Herring , Linus Walleij , David Daney , Masami Hiramatsu , Jassi Brar , Masahiro Yamada , devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Rob Herring , Mark Rutland , linux-arm-kernel@lists.infradead.org Subject: [PATCH v5 2/3] dt-bindings: gpio: uniphier: add UniPhier GPIO binding Date: Wed, 13 Sep 2017 17:56:29 +0900 Message-Id: <1505292990-22957-3-git-send-email-yamada.masahiro@socionext.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1505292990-22957-1-git-send-email-yamada.masahiro@socionext.com> References: <1505292990-22957-1-git-send-email-yamada.masahiro@socionext.com> Sender: devicetree-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org This GPIO controller is used on UniPhier SoC family. Signed-off-by: Masahiro Yamada Acked-by: Rob Herring --- .../devicetree/bindings/gpio/gpio-uniphier.txt | 43 ++++++++++++++++++++++ 1 file changed, 43 insertions(+) create mode 100644 Documentation/devicetree/bindings/gpio/gpio-uniphier.txt -- 2.7.4 -- To unsubscribe from this list: send the line "unsubscribe devicetree" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html diff --git a/Documentation/devicetree/bindings/gpio/gpio-uniphier.txt b/Documentation/devicetree/bindings/gpio/gpio-uniphier.txt new file mode 100644 index 0000000..0a371bdd --- /dev/null +++ b/Documentation/devicetree/bindings/gpio/gpio-uniphier.txt @@ -0,0 +1,43 @@ +UniPhier GPIO controller + +Required properties: +- compatible: Should be "socionext,uniphier-gpio". +- reg: Specifies offset and length of the register set for the device. +- gpio-controller: Marks the device node as a GPIO controller. +- #gpio-cells: Should be 2. The first cell is the pin number and the second + cell is used to specify optional parameters. +- interrupt-parent: Specifies the parent interrupt controller. +- interrupts: Specifies interrupts connected to the parent interrupt controller. +- interrupt-controller: Marks the device node as an interrupt controller. +- #interrupt-cells: Should be 2. The first cell defines the interrupt number. + The second cell bits[3:0] is used to specify trigger type as follows: + 1 = low-to-high edge triggered + 2 = high-to-low edge triggered + 4 = active high level-sensitive + 8 = active low level-sensitive + Valid combinations are 1, 2, 3, 4, 8. +- ngpios: Specifies the number of GPIO lines. +- gpio-ranges: Mapping to pin controller pins (as described in gpio.txt) + +Optional properties: +- gpio-ranges-group-names: Used for named gpio ranges (as described in gpio.txt) + +Example: + gpio: gpio@55000000 { + compatible = "socionext,uniphier-gpio"; + reg = <0x55000000 0x200>; + interrupt-parent = <&aidet>; + interrupts = <48 0>, <49 0>, <50 0>, <51 0>, + <52 0>, <53 0>, <54 0>, <55 0>, + <56 0>, <57 0>, <58 0>, <59 0>, + <60 0>, <61 0>, <62 0>, <63 0>, + <154 0>, <155 0>, <156 0>, <157 0>, + <158 0>; + interrupt-controller; + #interrupt-cells = <2>; + gpio-controller; + #gpio-cells = <2>; + gpio-ranges = <&pinctrl 0 0 0>; + gpio-ranges-group-names = "gpio_range"; + ngpios = <248>; + };