From patchwork Wed Sep 27 02:40:21 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Masahiro Yamada X-Patchwork-Id: 114311 Delivered-To: patch@linaro.org Received: by 10.140.106.117 with SMTP id d108csp4524466qgf; Tue, 26 Sep 2017 19:42:04 -0700 (PDT) X-Google-Smtp-Source: AOwi7QCpOOG5YCkhIKLhq+zeygm0alYup7J6/CAq2udQ8aJWYiLOtg4pgRxs6HIi/hrR0CcLuWB6 X-Received: by 10.84.238.204 with SMTP id l12mr12564373pln.196.1506480124463; Tue, 26 Sep 2017 19:42:04 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1506480124; cv=none; d=google.com; s=arc-20160816; b=B297ie5WnQ2Am8EkhLSbaJXOWXkBZ0miF7rh0x1njkCiZY55bTdjTlPFiKtIT6SoQH j485J1obXCDDHA8IAhHlyPFchJI7mUBGV7ehQIsaLsj2GXd+vzD35mmlMKlNwZoo+12d k+utTPNN4RiwhJ/mjheVzB//KweOTLSDxR8r6R6p8PZ2BcnAKNPOUShF8iDV86MoGLeO QgDIujwj4mNA7GBpn3Lnzev9N+mfqe+UXSDwM8Due3RHdjyOWjdDuEl3+sW9ACERNKi1 BJ/w/0Yfve97U0CmrBOmECDdMO+NQKCi8OTUB7wTiIuUYFevwYWhv/RK50PGIlV/Gnq0 aH1g== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:references:in-reply-to:message-id:date :subject:cc:to:from:dkim-signature:dkim-filter :arc-authentication-results; bh=YflsBo9H41eva1+o0Zy6PJptFnx3sw5dGhIFVFb+phg=; b=PbzSzTpx7aRwZz4+k8YpTtWSvkXXMPis4U8p/QGCxcPEG8OQweaSeziIStv7z3xipj Tr6Nb7J6Fi7Ms2BvqWDZv3DTfwhyL6jP3gMFCCcVIpGJnI5LNlrDfBYBNUaUJK65Oh8h bOeAThxQTh00sRruwF9+3iIz5e5Wjn3znQPJsXzbA1oQdK9MQK0VDZdf2n+liZ7r39zT Wz1/IaLnfMXU1NOvSTymBcGsDmg4u317YNcfvP9VpzCsfRHZMCRUuKNhMwC5r6dhyLWl Idf7tMgvowMVq6T0SvUrsfpWFvB7KrCMExClzFLozk8JHhgX+7AgOcPb+peQfn2fLtkr iAhw== ARC-Authentication-Results: i=1; mx.google.com; dkim=neutral (body hash did not verify) header.i=@nifty.com header.s=dec2015msa header.b=TTVzQitU; spf=pass (google.com: best guess record for domain of linux-gpio-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-gpio-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id 127si48995pge.666.2017.09.26.19.42.03; Tue, 26 Sep 2017 19:42:04 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-gpio-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=neutral (body hash did not verify) header.i=@nifty.com header.s=dec2015msa header.b=TTVzQitU; spf=pass (google.com: best guess record for domain of linux-gpio-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-gpio-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S967819AbdI0CmB (ORCPT + 5 others); Tue, 26 Sep 2017 22:42:01 -0400 Received: from conuserg-08.nifty.com ([210.131.2.75]:58527 "EHLO conuserg-08.nifty.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S967799AbdI0CmA (ORCPT ); Tue, 26 Sep 2017 22:42:00 -0400 Received: from pug.e01.socionext.com (p14092-ipngnfx01kyoto.kyoto.ocn.ne.jp [153.142.97.92]) (authenticated) by conuserg-08.nifty.com with ESMTP id v8R2eoYR029272; Wed, 27 Sep 2017 11:40:51 +0900 DKIM-Filter: OpenDKIM Filter v2.10.3 conuserg-08.nifty.com v8R2eoYR029272 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=nifty.com; s=dec2015msa; t=1506480052; bh=P4nFzQKMWibQFU0QwvqMPvI6Eei29vRx/+/3NWAsb+8=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=TTVzQitUKN0bv9QOvQBAVkpfim61qr4U6AzCBuLkNNyZkjrtyhUkNDVickBc3NRcD rcPApjllA5TowAuY3iQjLDEZYoSHgQ5bo3eeV611s7CVUA3cr5oEBSCfRD1qUrJfoo WQB6KjgwhsybaZNovMyQjqjWSFt8GpbNYp/CByn7GT1jLeZtb+KmW01cmgCsp66V1c G2ZDPRr5l/DTZbitH1oYJyse1ZBdGKZUoUdjnDGLJE7mmVo0gRuyFF9wwmUoSPawy+ pRIdweIHPnwXa5L3zV3jPMGVTv4EJR7YazSUuwSPrzq48EpTtjcuGJmMwPDeZarJrc BetAmCA/HUgBA== X-Nifty-SrcIP: [153.142.97.92] From: Masahiro Yamada To: linux-gpio@vger.kernel.org Cc: devicetree@vger.kernel.org, Rob Herring , Masami Hiramatsu , Jassi Brar , Masahiro Yamada , Linus Walleij , linux-kernel@vger.kernel.org, Rob Herring , Mark Rutland , linux-arm-kernel@lists.infradead.org Subject: [PATCH v6 1/2] dt-bindings: gpio: uniphier: add UniPhier GPIO binding Date: Wed, 27 Sep 2017 11:40:21 +0900 Message-Id: <1506480022-8995-2-git-send-email-yamada.masahiro@socionext.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1506480022-8995-1-git-send-email-yamada.masahiro@socionext.com> References: <1506480022-8995-1-git-send-email-yamada.masahiro@socionext.com> Sender: linux-gpio-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-gpio@vger.kernel.org This GPIO controller is used on UniPhier SoC family. The vendor specific property "socionext,interrupt-ranges" is for specifying interrupt mapping to the parent interrupt controller because the mapping is not contiguous. It works like "ranges", but transforms "interrupts" instead of "reg". Signed-off-by: Masahiro Yamada Acked-by: Rob Herring --- .../devicetree/bindings/gpio/gpio-uniphier.txt | 40 ++++++++++++++++++++++ 1 file changed, 40 insertions(+) create mode 100644 Documentation/devicetree/bindings/gpio/gpio-uniphier.txt -- 2.7.4 -- To unsubscribe from this list: send the line "unsubscribe linux-gpio" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html diff --git a/Documentation/devicetree/bindings/gpio/gpio-uniphier.txt b/Documentation/devicetree/bindings/gpio/gpio-uniphier.txt new file mode 100644 index 0000000..6d9251a --- /dev/null +++ b/Documentation/devicetree/bindings/gpio/gpio-uniphier.txt @@ -0,0 +1,40 @@ +UniPhier GPIO controller + +Required properties: +- compatible: Should be "socionext,uniphier-gpio". +- reg: Specifies offset and length of the register set for the device. +- gpio-controller: Marks the device node as a GPIO controller. +- #gpio-cells: Should be 2. The first cell is the pin number and the second + cell is used to specify optional parameters. +- interrupt-parent: Specifies the parent interrupt controller. +- interrupt-controller: Marks the device node as an interrupt controller. +- #interrupt-cells: Should be 2. The first cell defines the interrupt number. + The second cell bits[3:0] is used to specify trigger type as follows: + 1 = low-to-high edge triggered + 2 = high-to-low edge triggered + 4 = active high level-sensitive + 8 = active low level-sensitive + Valid combinations are 1, 2, 3, 4, 8. +- ngpios: Specifies the number of GPIO lines. +- gpio-ranges: Mapping to pin controller pins (as described in gpio.txt) +- socionext,interrupt-ranges: Specifies an interrupt number mapping between + this GPIO controller and its interrupt parent, in the form of arbitrary + number of triplets. + +Optional properties: +- gpio-ranges-group-names: Used for named gpio ranges (as described in gpio.txt) + +Example: + gpio: gpio@55000000 { + compatible = "socionext,uniphier-gpio"; + reg = <0x55000000 0x200>; + interrupt-parent = <&aidet>; + interrupt-controller; + #interrupt-cells = <2>; + gpio-controller; + #gpio-cells = <2>; + gpio-ranges = <&pinctrl 0 0 0>; + gpio-ranges-group-names = "gpio_range"; + ngpios = <248>; + socionext,interrupt-ranges = <0 48 16>, <16 154 5>, <21 217 3>; + };