From patchwork Wed Sep 27 02:45:42 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Masahiro Yamada X-Patchwork-Id: 114314 Delivered-To: patch@linaro.org Received: by 10.140.106.117 with SMTP id d108csp4527115qgf; Tue, 26 Sep 2017 19:46:45 -0700 (PDT) X-Google-Smtp-Source: AOwi7QDSEprVkck1MUQ5WoeyfXmvDBXAlGn0q2jPVJYdbBqSRmpR0wSldi6Cs3jWmB9yDfimPZ83 X-Received: by 10.84.131.69 with SMTP id 63mr12713966pld.364.1506480405386; Tue, 26 Sep 2017 19:46:45 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1506480405; cv=none; d=google.com; s=arc-20160816; b=dk0pvolAypnt5gW/1pw59T+Bnb09/hsKx7l9A82ibjN/L0VMe/dLBjiEv7x7/qobUC 9klu+z/BOsU7WaRbVIImiVJT9NDRl7w4ftTbYUA81ItHs+sexJFepk+i1C16Qa6Iw2Cm zGbeddfChTZPROblgNbDx7ecXUDBpIuo4Ph2uRvGS7BMVgmAmrQN/m/dztUdNcLZ66EN 23cJxOW3IClMf4BZWpT/i7zsYNutaZBWByM5NlHz8rmCAna9XLNU3a80vngAkAqnJ5gU JfqJlzXW3hk3yZuHkKU2nQg6AmIchg5RDiZV/FwQJwE1VJMQqfEPlJITyJtxqn8UtYT8 yQmQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:references:in-reply-to:message-id:date :subject:cc:to:from:dkim-signature:dkim-filter :arc-authentication-results; bh=tjPN28I9ENuKd7xqDyzVfdOlhOCDlA7xrnufl1UTFWU=; b=ucvZv1lIimneB4joK1zyZtB7XQM0gPb0n5QkFyp1FW465ctjaLbDjXJJHpqEbgDcXU Y2Y0nWNZ0PmQDy+wHL5I5/6ITWPH0gWVj9W19gHcHg/pDFzIP3o+tDbU8eDbn+ndx2lf HKKEz6uYnIXmlOIxS3NqmQG/6pQuhuhbopRkM4r3IIJL4HQz2FT3xePD2NEKfa+izx1J i8pZ0FEpsnvPGDPNWDszTI+eT9wTtpIFVfkU7dzgtOgRjU/WGIDRYr4sN4gRr2LA02MV NWHvuLY5qJbJ+ZEU6h+9hUKmbjRC6a68SlpJuJ9iz5UsAbVsCJsKClHvn/mhq5xyKHUn MTKA== ARC-Authentication-Results: i=1; mx.google.com; dkim=neutral (body hash did not verify) header.i=@nifty.com header.s=dec2015msa header.b=OMKhOMyx; spf=pass (google.com: best guess record for domain of devicetree-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id y10si731176pgq.455.2017.09.26.19.46.45; Tue, 26 Sep 2017 19:46:45 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of devicetree-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=neutral (body hash did not verify) header.i=@nifty.com header.s=dec2015msa header.b=OMKhOMyx; spf=pass (google.com: best guess record for domain of devicetree-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S967571AbdI0Cqo (ORCPT + 6 others); Tue, 26 Sep 2017 22:46:44 -0400 Received: from conuserg-07.nifty.com ([210.131.2.74]:56376 "EHLO conuserg-07.nifty.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S934771AbdI0Cqn (ORCPT ); Tue, 26 Sep 2017 22:46:43 -0400 Received: from pug.e01.socionext.com (p14092-ipngnfx01kyoto.kyoto.ocn.ne.jp [153.142.97.92]) (authenticated) by conuserg-07.nifty.com with ESMTP id v8R2jiYN009483; Wed, 27 Sep 2017 11:45:46 +0900 DKIM-Filter: OpenDKIM Filter v2.10.3 conuserg-07.nifty.com v8R2jiYN009483 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=nifty.com; s=dec2015msa; t=1506480346; bh=P4nFzQKMWibQFU0QwvqMPvI6Eei29vRx/+/3NWAsb+8=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=OMKhOMyx+qu56E/CzE71+76xOwkzI6+QiVgNnZ/wCFQQhiPlzbLpc+ei0kpSe64/n m37oIVSeEo6Cb9va2Mgcyf2lHzOGbcW21AjTmmwabzixCZG1/nX+YjJLt7BRUzeM8n sS/LCtSKGq9LU5whH+9U6VFRfY1Z0As8QPOLl6C5I8g91cxd/pxQhYnMgUbKr6YIdp qbkLhZOG/702uscgDknoWZsPpa9X3wc2tcgvIaY34yRXuVYCpv9tJLKpIzrP4sYrpe LxjHLMi8FntsSobbxM3W5p2l5zeUyGDNwvMigk3HYOnrVHN96Q1MDUGaPlWp1YQ7a1 5tp6o1oz7LQ7g== X-Nifty-SrcIP: [153.142.97.92] From: Masahiro Yamada To: linux-gpio@vger.kernel.org Cc: devicetree@vger.kernel.org, Rob Herring , Masami Hiramatsu , Jassi Brar , Masahiro Yamada , Linus Walleij , linux-kernel@vger.kernel.org, Rob Herring , Mark Rutland , linux-arm-kernel@lists.infradead.org Subject: [PATCH v7 1/2] dt-bindings: gpio: uniphier: add UniPhier GPIO binding Date: Wed, 27 Sep 2017 11:45:42 +0900 Message-Id: <1506480343-9597-2-git-send-email-yamada.masahiro@socionext.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1506480343-9597-1-git-send-email-yamada.masahiro@socionext.com> References: <1506480343-9597-1-git-send-email-yamada.masahiro@socionext.com> Sender: devicetree-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org This GPIO controller is used on UniPhier SoC family. The vendor specific property "socionext,interrupt-ranges" is for specifying interrupt mapping to the parent interrupt controller because the mapping is not contiguous. It works like "ranges", but transforms "interrupts" instead of "reg". Signed-off-by: Masahiro Yamada Acked-by: Rob Herring --- .../devicetree/bindings/gpio/gpio-uniphier.txt | 40 ++++++++++++++++++++++ 1 file changed, 40 insertions(+) create mode 100644 Documentation/devicetree/bindings/gpio/gpio-uniphier.txt -- 2.7.4 -- To unsubscribe from this list: send the line "unsubscribe devicetree" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html diff --git a/Documentation/devicetree/bindings/gpio/gpio-uniphier.txt b/Documentation/devicetree/bindings/gpio/gpio-uniphier.txt new file mode 100644 index 0000000..6d9251a --- /dev/null +++ b/Documentation/devicetree/bindings/gpio/gpio-uniphier.txt @@ -0,0 +1,40 @@ +UniPhier GPIO controller + +Required properties: +- compatible: Should be "socionext,uniphier-gpio". +- reg: Specifies offset and length of the register set for the device. +- gpio-controller: Marks the device node as a GPIO controller. +- #gpio-cells: Should be 2. The first cell is the pin number and the second + cell is used to specify optional parameters. +- interrupt-parent: Specifies the parent interrupt controller. +- interrupt-controller: Marks the device node as an interrupt controller. +- #interrupt-cells: Should be 2. The first cell defines the interrupt number. + The second cell bits[3:0] is used to specify trigger type as follows: + 1 = low-to-high edge triggered + 2 = high-to-low edge triggered + 4 = active high level-sensitive + 8 = active low level-sensitive + Valid combinations are 1, 2, 3, 4, 8. +- ngpios: Specifies the number of GPIO lines. +- gpio-ranges: Mapping to pin controller pins (as described in gpio.txt) +- socionext,interrupt-ranges: Specifies an interrupt number mapping between + this GPIO controller and its interrupt parent, in the form of arbitrary + number of triplets. + +Optional properties: +- gpio-ranges-group-names: Used for named gpio ranges (as described in gpio.txt) + +Example: + gpio: gpio@55000000 { + compatible = "socionext,uniphier-gpio"; + reg = <0x55000000 0x200>; + interrupt-parent = <&aidet>; + interrupt-controller; + #interrupt-cells = <2>; + gpio-controller; + #gpio-cells = <2>; + gpio-ranges = <&pinctrl 0 0 0>; + gpio-ranges-group-names = "gpio_range"; + ngpios = <248>; + socionext,interrupt-ranges = <0 48 16>, <16 154 5>, <21 217 3>; + };