From patchwork Tue Apr 28 09:38:03 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Patrice CHOTARD X-Patchwork-Id: 238713 List-Id: U-Boot discussion From: patrice.chotard at st.com (Patrice Chotard) Date: Tue, 28 Apr 2020 11:38:03 +0200 Subject: [PATCH v2] cmd: cache: Fix non-cached memory cachability Message-ID: <20200428093804.20773-1-patrice.chotard@st.com> If dcache is switched OFF to ON state and if non-cached memory is used, this non-cached memory must be re-declared as uncached to mmu each time dcache is set ON. Introduce noncached_set_region() to set this non-cached region's mmu settings. Let architecture override it by defining it as a weak function. For ARM architecture, noncached_set_region() defines all noncached region as non-cacheable. Issue found on STM32MP1 platform using dwc_eth_qos ethernet driver, when going from dcache OFF to dcache ON state, ethernet driver issued TX timeout errors when performing dhcp or ping. It can be reproduced with the following sequence: dhcp while true ; do ping 192.168.1.300 ; dcache off ; ping 192.168.1.300 ; dcache on ; done Signed-off-by: Patrice Chotard Cc: Marek Vasut Cc: Joe Hershberger Cc: Ramon Fried Cc: Stephen Warren Reviewed-by: Marek Vasut --- Changes in v2: - make noncached_set_region a weak function arch/arm/lib/cache.c | 13 ++++++++++--- cmd/cache.c | 5 +++++ 2 files changed, 15 insertions(+), 3 deletions(-) diff --git a/arch/arm/lib/cache.c b/arch/arm/lib/cache.c index 44dde26065..224f2aef14 100644 --- a/arch/arm/lib/cache.c +++ b/arch/arm/lib/cache.c @@ -75,6 +75,15 @@ static unsigned long noncached_start; static unsigned long noncached_end; static unsigned long noncached_next; +void noncached_set_region(void) +{ +#if !CONFIG_IS_ENABLED(SYS_DCACHE_OFF) + mmu_set_region_dcache_behaviour(noncached_start, + noncached_end - noncached_start, + DCACHE_OFF); +#endif +} + void noncached_init(void) { phys_addr_t start, end; @@ -91,9 +100,7 @@ void noncached_init(void) noncached_end = end; noncached_next = start; -#if !CONFIG_IS_ENABLED(SYS_DCACHE_OFF) - mmu_set_region_dcache_behaviour(noncached_start, size, DCACHE_OFF); -#endif + noncached_set_region(); } phys_addr_t noncached_alloc(size_t size, size_t align) diff --git a/cmd/cache.c b/cmd/cache.c index 27dcec0931..7678615dd8 100644 --- a/cmd/cache.c +++ b/cmd/cache.c @@ -20,6 +20,10 @@ void __weak invalidate_icache_all(void) puts("No arch specific invalidate_icache_all available!\n"); } +__weak void noncached_set_region(void) +{ +} + static int do_icache(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) { switch (argc) { @@ -64,6 +68,7 @@ static int do_dcache(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) break; case 1: dcache_enable(); + noncached_set_region(); break; case 2: flush_dcache_all();