From patchwork Tue Oct 3 09:11:54 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Linus Walleij X-Patchwork-Id: 114672 Delivered-To: patch@linaro.org Received: by 10.140.22.163 with SMTP id 32csp1644328qgn; Tue, 3 Oct 2017 02:12:07 -0700 (PDT) X-Received: by 10.84.129.68 with SMTP id 62mr16834520plb.186.1507021926998; Tue, 03 Oct 2017 02:12:06 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1507021926; cv=none; d=google.com; s=arc-20160816; b=qXvGlxSjZ2/IxoSmfqTqRX3FGcoOGxc22RzaUovAvWQpu9M1GyJFPE5DXh19WLWitN Wc+wYonRFHzJevdl5oTYNw8ryDqrJiqfBY0UCOMH6lmRl6A/Oubt0jtP99W1LSu+/MXU FJZqPksZwO6F0ixvGgwO83pjdUrcLCO1EOJZyz5AIx+Ut+OfC89FUPz1rtaEDgiTkw/g AMV9CQ7Bsgd382wKijhhADg8gSkmQDwBVg6TsxZ8ESgPRHkG7o4+4u89LHMetUZTMpDk ci7VoNS1ykF1szGxwalcBbEKIzIfyKUXztIEhyXN6Xy+YQ6os4MwNsp2BEMPjGdIImlS cMZg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:message-id:date:subject:cc:to:from :dkim-signature:arc-authentication-results; bh=ACHtLs8k4JVWbkirFMdGwjSABu7hBEL+NveYxEDAQBI=; b=RWT7zOlNcAn4TD/cl2w+iXOWYnYgZ2j3OSXKqgsG1NCvITiq1KqWxuPaUOhyiGenE2 jzsgjstemWg+0l+lxLT4ccJtXs4rlS3zLZqm8QjYHFOHO+FsNeTE4lGy55COhu9+5Y/v c89VywqtEtK7Jq/X5LGWlsUgdDlsF2BqDX5SIvmqSwun90mLzpP5rPm93eL3NTmjnWbO mwC0az4yiyXE1Tlf1gHIJcaoAlvT6diBH5PEBxoh/xw7S7ffDsSuSVkawdWypVR7Rxeo 5bSO5LZvgmYfDPxYcaPPHk6XxEWAuLX0Bs4KuWRQtfjv7rwIYMZufOexOHm19quC1GtW XS3g== ARC-Authentication-Results: i=1; mx.google.com; dkim=neutral (body hash did not verify) header.i=@linaro.org header.s=google header.b=HsRwdhna; spf=pass (google.com: best guess record for domain of linux-arm-msm-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-arm-msm-owner@vger.kernel.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id b6si10335893pll.661.2017.10.03.02.12.06; Tue, 03 Oct 2017 02:12:06 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-arm-msm-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=neutral (body hash did not verify) header.i=@linaro.org header.s=google header.b=HsRwdhna; spf=pass (google.com: best guess record for domain of linux-arm-msm-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-arm-msm-owner@vger.kernel.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751392AbdJCJMF (ORCPT + 11 others); Tue, 3 Oct 2017 05:12:05 -0400 Received: from mail-lf0-f51.google.com ([209.85.215.51]:55657 "EHLO mail-lf0-f51.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751194AbdJCJME (ORCPT ); Tue, 3 Oct 2017 05:12:04 -0400 Received: by mail-lf0-f51.google.com with SMTP id p184so8643856lfe.12 for ; Tue, 03 Oct 2017 02:12:04 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id; bh=Ym4ShgO+nrt0uaL+qCNuiBFalLp9kEZiOvNp0+6Dgzk=; b=HsRwdhna/TRoQ71JM9utrRN0SEu1wzzYkazpMIYF9kP99iEmT709DKfa57aSd2mMTK hEhE+gqBlsyuhGxazsNrHK1qvHfYvPiBZmnOorPygq04V8IJfuhG7ZGiX6ptTYVGgAaE +9QdjeJOic3eXnKki8HN9OvCYsFLoUErqaz5w= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id; bh=Ym4ShgO+nrt0uaL+qCNuiBFalLp9kEZiOvNp0+6Dgzk=; b=F+41dRbQbbUhdzLh1+Efl91karvOEu1+0KHndruTm/u+DdUrXsTnQIXLMqrQ/vbppy 60P8zyiHeAPjV9wwGJcxDKgR7J1fq22DWt1fSNk4+Tya51AsFRIuRxHWlrhFdyJ64S3d KlcKpJBwQ6x+TtWpmzanuBY3ktHvJSnYGW/HpEu4R28eOzFAy7CTvTVwn1RjSLDFU75o Px1WEJf4XXMqMu/u+d3Uc0BgKorcWxOIgkj08YvXp9T6zGaIcELwcZoML0OR1yGv/WCS cd39sYyVBUci0Z26HhQVxbNXr45n1Rd46u13BJ4e0AixyUB7VxTykwegzoV2g5VQS6GY 8vsA== X-Gm-Message-State: AMCzsaUEHOUs8dDKhnpqAchtbqxDhVfB85hzVbCAfvw3455Mg7I+9edC w18OyeGW4mGci8cFBtn/NV571w== X-Google-Smtp-Source: AOwi7QAJe5pGAxhvPEAbGebXwNDfQeOTmClHLvMLukLM0C81W3tuiKXzhp3xgaZLNy8nyZe7pn9L3g== X-Received: by 10.25.56.1 with SMTP id f1mr3597885lfa.17.1507021923298; Tue, 03 Oct 2017 02:12:03 -0700 (PDT) Received: from genomnajs.ideon.se ([85.235.10.227]) by smtp.gmail.com with ESMTPSA id k184sm1942678lfg.53.2017.10.03.02.12.02 (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Tue, 03 Oct 2017 02:12:02 -0700 (PDT) From: Linus Walleij To: linux-arm-kernel@lists.infradead.org, linux-arm-msm@vger.kernel.org, Andy Gross , David Brown Cc: Stephen Boyd , Bjorn Andersson , linux-soc@vger.kernel.org, Linus Walleij Subject: [PATCH 1/2] arm64: qcom: sbc: Name GPIO lines Date: Tue, 3 Oct 2017 11:11:54 +0200 Message-Id: <20171003091155.7138-1-linus.walleij@linaro.org> X-Mailer: git-send-email 2.13.5 Sender: linux-arm-msm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org This names the GPIO lines on the APQ8016 "SBC" also known as the DragonBoard 410c, according to the schematic. This is necessary for a conforming userspace looking across all GPIO chips for the GPIO lines named "GPIO-A" thru "GPIO-L". Signed-off-by: Linus Walleij --- I don't have this hardware available, you can test it easily by compiling tools/gpio/* and issue "lsgpio" to see the GPIO line names in the console. Please apply this even if you're not applying the second patch renaming the DTS files. --- arch/arm64/boot/dts/qcom/apq8016-sbc.dts | 167 +++++++++++++++++++++++++++++++ 1 file changed, 167 insertions(+) -- 2.13.5 -- To unsubscribe from this list: send the line "unsubscribe linux-arm-msm" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html diff --git a/arch/arm64/boot/dts/qcom/apq8016-sbc.dts b/arch/arm64/boot/dts/qcom/apq8016-sbc.dts index 825f489a2af7..40b0d62861bb 100644 --- a/arch/arm64/boot/dts/qcom/apq8016-sbc.dts +++ b/arch/arm64/boot/dts/qcom/apq8016-sbc.dts @@ -19,3 +19,170 @@ model = "Qualcomm Technologies, Inc. APQ 8016 SBC"; compatible = "qcom,apq8016-sbc", "qcom,apq8016", "qcom,sbc"; }; + +/* + * Legend: proper name = the GPIO line is used as GPIO + * NC = not connected (pin out but not routed from the chip to + * anything the board) + * "[PER]" = pin is muxed for [peripheral] (not GPIO) + * "" = no idea, schematic doesn't say, could be + * unrouted (not connected to any external pin) + * LSEC = Low Speed External Connector + * HSEC = High Speed External Connector + * + * Line names are taken from the schematic "DragonBoard410c" + * dated monday, august 31, 2015. Page 5 in particular. + * + * For the lines routed to the external connectors the + * lines are named after the 96Boards CE Specification 1.0, + * Appendix "Expansion Connector Signal Description". + * + * When the 96Board naming of a line and the schematic name of + * the same line are in conflict, the 96Board specification + * takes precedence, which means that the external UART on the + * LSEC is named UART0 while the schematic and SoC names this + * UART3. This is only for the informational lines i.e. "[FOO]", + * the GPIO named lines "GPIO-A" thru "GPIO-L" are the only + * ones actually used for GPIO. + */ +&msmgpio { + gpio-line-names = + "[UART0_TX]", /* GPIO 0, LSEC pin 1 */ + "[UART0_RX]", + "[UART0_CTS_N]", + "[UART0_RTS_N]", + "[UART1_TX]", + "[UART1_RX]", + "[I2C0_SDA]", + "[I2C0_SCL]", + "[SPI1_MOSI]", + "[SPI1_MISO]", + "[SPI1_CS_N]", /* GPIO 10 */ + "[SPI1_CLK]", + "GPIO-B", + "GPIO-C", + "[I2C3_SDA]", + "[I2C3_SCL]", + "[SPI0_MOSI]", + "[SPI0_MISO]", + "[SPI0_CS_N]", + "[SPI0_CLK]", + "HDMI_HPD_N", /* GPIO 20 */ + "USR_LED_1_CTRL", + "[I2C1_SDA]", + "[I2C1_SCL]", + "GPIO-G", + "GPIO-H", + "[CSI0_MCLK]", + "[CSI1_MCLK]", + "GPIO-K", + "[I2C2_SDA]", + "[I2C2_SCL]", /* GPIO 30 */ + "DSI2HDMI_INT_N", + "DSI_SW_SEL_APQ", + "GPIO-L", + "GPIO-J", + "GPIO-I", + "GPIO-A", /* GPIO_36 */ + "FORCED_USB_BOOT", + "SD_CARD_DET_N", + "[WCSS_BT_SSBI]", + "[WCSS_WLAN_DATA_2]", /* GPIO 40 */ + "[WCSS_WLAN_DATA_1]", + "[WCSS_WLAN_DATA_0]", + "[WCSS_WLAN_SET]", + "[WCSS_WLAN_CLK]", + "[WCSS_FM_SSBI]", + "[WCSS_FM_SDI]", + "[WCSS_BT_DAT_CTL]", + "[WCSS_BT_DAT_STB]", + "NC", + "NC", /* GPIO 50 */ + "NC", + "NC", + "NC", + "NC", + "NC", + "NC", + "NC", + "NC", + "NC", + "NC", /* GPIO 60 */ + "NC", + "NC", + "[CDC_PDM0_CLK]", + "[CDC_PDM0_SYNC]", + "[CDC_PDM0_TX0]", + "[CDC_PDM0_RX0]", + "[CDC_PDM0_RX1]", + "[CDC_PDM0_RX2]", + "GPIO-D", + "NC", /* GPIO 70 */ + "NC", + "NC", + "NC", + "NC", /* GPIO 74 */ + "NC", + "NC", + "NC", + "NC", + "NC", + "BOOT_CONFIG_0", /* GPIO 80 */ + "BOOT_CONFIG_1", + "BOOT_CONFIG_2", + "BOOT_CONFIG_3", + "NC", + "NC", + "BOOT_CONFIG_5", + "NC", + "NC", + "NC", + "NC", /* GPIO 90 */ + "NC", + "NC", + "NC", + "NC", + "NC", + "NC", + "NC", + "NC", + "NC", + "NC", /* GPIO 100 */ + "NC", + "NC", + "NC", + "SSBI_GPS", + "NC", + "NC", + "KEY_VOLP_N", + "NC", + "NC", + "[LS_EXP_MI2S_WS]", /* GPIO 110 */ + "NC", + "NC", + "[LS_EXP_MI2S_SCK]", + "[LS_EXP_MI2S_DATA0]", + "GPIO-E", + "NC", + "[DSI2HDMI_MI2S_WS]", + "[DSI2HDMI_MI2S_SCK]", + "[DSI2HDMI_MI2S_DATA0]", + "USR_LED_2_CTRL", /* GPIO 120 */ + "USB_HS_ID"; +}; + +&pm8916_gpios { + gpio-line-names = + "USR_LED_3_CTRL", + "USR_LED_4_CTRL", + "USB_HUB_RESET_N_PM", + "USB_SW_SEL_PM"; +}; + +&pm8916_mpps { + gpio-line-names = + "VDD_PX_BIAS", + "WLAN_LED_CTRL", + "BT_LED_CTRL", + "GPIO-F"; +}; From patchwork Tue Oct 3 09:11:55 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Linus Walleij X-Patchwork-Id: 114673 Delivered-To: patch@linaro.org Received: by 10.140.22.163 with SMTP id 32csp1644430qgn; Tue, 3 Oct 2017 02:12:16 -0700 (PDT) X-Received: by 10.84.248.152 with SMTP id q24mr10236922pll.75.1507021935914; Tue, 03 Oct 2017 02:12:15 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1507021935; cv=none; d=google.com; s=arc-20160816; b=um7LK/8xXAgPoPgU5hRLZgAS4wvvy6wCB3akXIaR913DB6TdOZelFtdTl5NWhRqQS0 0Eoh4exTrvSBndXUpxfjrG7AnICoCvoyZ/IhMsEixau/50zW+RmyigJynAFJpiKROlGW f1qMK7K734N+wtOIsijPJp21bd1dveND0Y48eCdrmGiVDe8BejwiCxi4fCoG+PKukDyN wzYYr9fd47wr7cKeffkC6ZIae7d9ZffZpLCEKzqN1jjopxFfnSHmvctf7lJpy1X2TM1A 7CNdqL2Bf489tNy0eds7/ZlOwykdry8tyWleMdAO/+rf99tSMMErDdhtymqI97Wz/iXm j4sQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:references:in-reply-to:message-id:date :subject:cc:to:from:dkim-signature:arc-authentication-results; bh=R1cbsRSs4FRcIxemqNPfKX4XWC0+7DWDl6l+7wH1iuo=; b=hDA1Vb5DpTLURgx3Hh55YhEnPfPX303eifo7hTa1JkCxiN0dmj4OWOltnPokNQu7Y9 cJ6wRG2BRlEevivdBbiT1fmB3X2XfXuLJ1aW3pBMtmvYmWf7WnZfW0ueWG/CARLzxfL7 GT0hLoLgEM52Ds/heX6NYLlFb9cSsvctqnFQlbI8AEyBLx/+Pj5WHVdWUZfb3Fb7lgwS UXHFNRBvNR/hICxDxlxZPZyYBPledU2mqlGePjDDtzKTe80/uyKSWIfZFAJhy5YApR+s qqd4sjDNU/Qj7PtH8EdpKQRFRS1D33vNk6l+1ckf52guFwyf7M69GW+dj2dEERTFZ+hz V0Eg== ARC-Authentication-Results: i=1; mx.google.com; dkim=neutral (body hash did not verify) header.i=@linaro.org header.s=google header.b=ABhZt6TV; spf=pass (google.com: best guess record for domain of linux-arm-msm-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-arm-msm-owner@vger.kernel.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id s11si9273593pgo.335.2017.10.03.02.12.15; Tue, 03 Oct 2017 02:12:15 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-arm-msm-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=neutral (body hash did not verify) header.i=@linaro.org header.s=google header.b=ABhZt6TV; spf=pass (google.com: best guess record for domain of linux-arm-msm-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-arm-msm-owner@vger.kernel.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751454AbdJCJMI (ORCPT + 11 others); Tue, 3 Oct 2017 05:12:08 -0400 Received: from mail-lf0-f52.google.com ([209.85.215.52]:56739 "EHLO mail-lf0-f52.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751409AbdJCJMH (ORCPT ); Tue, 3 Oct 2017 05:12:07 -0400 Received: by mail-lf0-f52.google.com with SMTP id 90so726074lfs.13 for ; Tue, 03 Oct 2017 02:12:06 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=k9JB6z+b2NkeeJFR76Kh4ffN1t4e1uq/vzwubSHHvkQ=; b=ABhZt6TVOK+ClufaDwdTEwTtvxh7zcuobkzwkwkA18AlbITVJMOiR0l30kXh2ujgCD wvZrNvQ+aLy+d9odgtL/JdH2eCPip8CjF9O3GwDqLUDX9pCm6p7MCCvkrs2Sr7VLODkP XeRDCRjhJo3hDjnXqHZuO0F5cTP+tlY8gZtuE= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=k9JB6z+b2NkeeJFR76Kh4ffN1t4e1uq/vzwubSHHvkQ=; b=fGL76cpgohuFVM1fDHd/EREAFujGSQkWR/n52GHG/AsrV+Hm7FQZKXgX2320NTfO3s EBlh1XJyInFCbgcMxOKsJgSD/pHypukeyNxIzD01rwA+hbfI8p1PqSDEI7UDJLcnhaf/ YDbWDEDut2eD5jO8D6R87aTlYOgjkhaGU8d6P6pFVOZ07VQg2WCwNsjjwBCj/STxXSco MmSLZUkA+7AQ6NSufYsn3PqjEqTRSlmsvWE7+wBBLZ15wouSQHfJOnsQa03h0vIrgpnu FWAGV4hYmOphZnAIm/WIbx/vyOW0tMwhKH2GpVCXL/UO861LOvDC3ErMeIQuJktIQ5h/ tNig== X-Gm-Message-State: AHPjjUi1PB3zZEVX695M0Fo7kO9+N5NJVpIzYFF1TEF2aaxyvXkm9SUv W6HlNHSgTcdUi5t+gnc202fSQw== X-Google-Smtp-Source: AOwi7QC8a7EVH1BRopwwTmedizD/iZKapoX5w63OCNdCkf4XGJxh9ZkFZJuebDDc4SH5ML96QiRN0A== X-Received: by 10.25.235.90 with SMTP id j87mr4970370lfh.251.1507021925770; Tue, 03 Oct 2017 02:12:05 -0700 (PDT) Received: from genomnajs.ideon.se ([85.235.10.227]) by smtp.gmail.com with ESMTPSA id k184sm1942678lfg.53.2017.10.03.02.12.04 (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Tue, 03 Oct 2017 02:12:05 -0700 (PDT) From: Linus Walleij To: linux-arm-kernel@lists.infradead.org, linux-arm-msm@vger.kernel.org, Andy Gross , David Brown Cc: Stephen Boyd , Bjorn Andersson , linux-soc@vger.kernel.org, Linus Walleij Subject: [PATCH 2/2] arm64: dts: qcom: Rename SBC to DragonBoard 410c Date: Tue, 3 Oct 2017 11:11:55 +0200 Message-Id: <20171003091155.7138-2-linus.walleij@linaro.org> X-Mailer: git-send-email 2.13.5 In-Reply-To: <20171003091155.7138-1-linus.walleij@linaro.org> References: <20171003091155.7138-1-linus.walleij@linaro.org> Sender: linux-arm-msm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org Naming the DragonBoard 410c "SBC" (I guess "single board computer") is not very helpful for users looking for their device tree in the kernel. Also the db820c is named properly. Rectify this, simply, do not change the compatible strings but name the DTS files in a consistent manner. Signed-off-by: Linus Walleij --- It's not like I don't understand that people will be nitpicky about this. I was looking for the DragonBoard 410c devicetree and could not find it until I realized this hopeless idiomatic naming. It cost me time and effort, and it is going to cost others time and effort. Fixing it. The other patch naming the GPIO lines can be applied without this one. --- arch/arm64/boot/dts/qcom/Makefile | 2 +- .../{apq8016-sbc-pmic-pins.dtsi => apq8016-db410c-pmic-pins.dtsi} | 0 .../qcom/{apq8016-sbc-soc-pins.dtsi => apq8016-db410c-soc-pins.dtsi} | 0 arch/arm64/boot/dts/qcom/{apq8016-sbc.dts => apq8016-db410c.dts} | 5 +++-- arch/arm64/boot/dts/qcom/{apq8016-sbc.dtsi => apq8016-db410c.dtsi} | 4 ++-- 5 files changed, 6 insertions(+), 5 deletions(-) rename arch/arm64/boot/dts/qcom/{apq8016-sbc-pmic-pins.dtsi => apq8016-db410c-pmic-pins.dtsi} (100%) rename arch/arm64/boot/dts/qcom/{apq8016-sbc-soc-pins.dtsi => apq8016-db410c-soc-pins.dtsi} (100%) rename arch/arm64/boot/dts/qcom/{apq8016-sbc.dts => apq8016-db410c.dts} (95%) rename arch/arm64/boot/dts/qcom/{apq8016-sbc.dtsi => apq8016-db410c.dtsi} (99%) -- 2.13.5 -- To unsubscribe from this list: send the line "unsubscribe linux-arm-msm" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Acked-by: Srinivas Kandagatla Acked-by: Bjorn Andersson diff --git a/arch/arm64/boot/dts/qcom/Makefile b/arch/arm64/boot/dts/qcom/Makefile index ff81d7e5805e..fc46ab79acd9 100644 --- a/arch/arm64/boot/dts/qcom/Makefile +++ b/arch/arm64/boot/dts/qcom/Makefile @@ -1,4 +1,4 @@ -dtb-$(CONFIG_ARCH_QCOM) += apq8016-sbc.dtb +dtb-$(CONFIG_ARCH_QCOM) += apq8016-db410c.dtb dtb-$(CONFIG_ARCH_QCOM) += apq8096-db820c.dtb dtb-$(CONFIG_ARCH_QCOM) += ipq8074-hk01.dtb dtb-$(CONFIG_ARCH_QCOM) += msm8916-mtp.dtb diff --git a/arch/arm64/boot/dts/qcom/apq8016-sbc-pmic-pins.dtsi b/arch/arm64/boot/dts/qcom/apq8016-db410c-pmic-pins.dtsi similarity index 100% rename from arch/arm64/boot/dts/qcom/apq8016-sbc-pmic-pins.dtsi rename to arch/arm64/boot/dts/qcom/apq8016-db410c-pmic-pins.dtsi diff --git a/arch/arm64/boot/dts/qcom/apq8016-sbc-soc-pins.dtsi b/arch/arm64/boot/dts/qcom/apq8016-db410c-soc-pins.dtsi similarity index 100% rename from arch/arm64/boot/dts/qcom/apq8016-sbc-soc-pins.dtsi rename to arch/arm64/boot/dts/qcom/apq8016-db410c-soc-pins.dtsi diff --git a/arch/arm64/boot/dts/qcom/apq8016-sbc.dts b/arch/arm64/boot/dts/qcom/apq8016-db410c.dts similarity index 95% rename from arch/arm64/boot/dts/qcom/apq8016-sbc.dts rename to arch/arm64/boot/dts/qcom/apq8016-db410c.dts index 40b0d62861bb..86cfae4d2b9d 100644 --- a/arch/arm64/boot/dts/qcom/apq8016-sbc.dts +++ b/arch/arm64/boot/dts/qcom/apq8016-db410c.dts @@ -13,10 +13,11 @@ /dts-v1/; -#include "apq8016-sbc.dtsi" +#include "apq8016-db410c.dtsi" / { - model = "Qualcomm Technologies, Inc. APQ 8016 SBC"; + model = "Qualcomm Technologies, Inc. APQ 8016 DragonBoard 410c"; + /* The "SBC" (Single Board Computer) is another name for this board */ compatible = "qcom,apq8016-sbc", "qcom,apq8016", "qcom,sbc"; }; diff --git a/arch/arm64/boot/dts/qcom/apq8016-sbc.dtsi b/arch/arm64/boot/dts/qcom/apq8016-db410c.dtsi similarity index 99% rename from arch/arm64/boot/dts/qcom/apq8016-sbc.dtsi rename to arch/arm64/boot/dts/qcom/apq8016-db410c.dtsi index 1d63e6b879de..1300c11e5f0e 100644 --- a/arch/arm64/boot/dts/qcom/apq8016-sbc.dtsi +++ b/arch/arm64/boot/dts/qcom/apq8016-db410c.dtsi @@ -13,8 +13,8 @@ #include "msm8916.dtsi" #include "pm8916.dtsi" -#include "apq8016-sbc-soc-pins.dtsi" -#include "apq8016-sbc-pmic-pins.dtsi" +#include "apq8016-db410c-soc-pins.dtsi" +#include "apq8016-db410c-pmic-pins.dtsi" #include #include #include