From patchwork Fri Jun 19 11:17:16 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: MarkLee X-Patchwork-Id: 242664 List-Id: U-Boot discussion From: Mark-MC.Lee at mediatek.com (MarkLee) Date: Fri, 19 Jun 2020 19:17:16 +0800 Subject: [U-boot, V2, 1/2] eth: mtk-eth: enable mt7629 sgmii mode support in mediatek eth driver In-Reply-To: <20200619111717.29291-1-Mark-MC.Lee@mediatek.com> References: <20200619111717.29291-1-Mark-MC.Lee@mediatek.com> Message-ID: <20200619111717.29291-2-Mark-MC.Lee@mediatek.com> The sgmii mode init flow is almost the same for all mediatek SoC, the only difference is the register offset(SGMSYS_GEN2_SPEED) is 0x2028 in the old chip(mt7622) but changed to 0x128 for the newer chip(mt7629 and the following chips). Signed-off-by: MarkLee --- V2: use driver private data from dts to decide the register offset (SGMSYS_GEN2_SPEED) instead of check #ifdefs in drivers. --- drivers/net/mtk_eth.c | 3 ++- drivers/net/mtk_eth.h | 1 + 2 files changed, 3 insertions(+), 1 deletion(-) diff --git a/drivers/net/mtk_eth.c b/drivers/net/mtk_eth.c index 5ffcc5313d..f73db4ff12 100644 --- a/drivers/net/mtk_eth.c +++ b/drivers/net/mtk_eth.c @@ -1090,7 +1090,8 @@ static int mtk_phy_probe(struct udevice *dev) static void mtk_sgmii_init(struct mtk_eth_priv *priv) { /* Set SGMII GEN2 speed(2.5G) */ - clrsetbits_le32(priv->sgmii_base + SGMSYS_GEN2_SPEED, + clrsetbits_le32(priv->sgmii_base + ((priv->soc == SOC_MT7622) ? + SGMSYS_GEN2_SPEED : SGMSYS_GEN2_SPEED_V2), SGMSYS_SPEED_2500, SGMSYS_SPEED_2500); /* Disable SGMII AN */ diff --git a/drivers/net/mtk_eth.h b/drivers/net/mtk_eth.h index f2940c9996..6149fec07e 100644 --- a/drivers/net/mtk_eth.h +++ b/drivers/net/mtk_eth.h @@ -45,6 +45,7 @@ #define SGMII_PHYA_PWD BIT(4) #define SGMSYS_GEN2_SPEED 0x2028 +#define SGMSYS_GEN2_SPEED_V2 0x128 #define SGMSYS_SPEED_2500 BIT(2) /* Frame Engine Registers */ From patchwork Fri Jun 19 11:17:17 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: MarkLee X-Patchwork-Id: 242665 List-Id: U-Boot discussion From: Mark-MC.Lee at mediatek.com (MarkLee) Date: Fri, 19 Jun 2020 19:17:17 +0800 Subject: [U-boot, V2, 2/2] arm: dts: mediatek: enable sgmii mode and mt7531 switch for mt7629 In-Reply-To: <20200619111717.29291-1-Mark-MC.Lee@mediatek.com> References: <20200619111717.29291-1-Mark-MC.Lee@mediatek.com> Message-ID: <20200619111717.29291-3-Mark-MC.Lee@mediatek.com> This patch enable sgmii mode and mt7531 switch support in mt7629 ethernet dts node Signed-off-by: MarkLee --- V2: no changes --- arch/arm/dts/mt7629-rfb.dts | 12 +++++++----- 1 file changed, 7 insertions(+), 5 deletions(-) diff --git a/arch/arm/dts/mt7629-rfb.dts b/arch/arm/dts/mt7629-rfb.dts index 687fe1c029..5864f5551b 100644 --- a/arch/arm/dts/mt7629-rfb.dts +++ b/arch/arm/dts/mt7629-rfb.dts @@ -24,12 +24,14 @@ ð { status = "okay"; - mediatek,gmac-id = <1>; - phy-mode = "gmii"; - phy-handle = <&phy0>; + mediatek,gmac-id = <0>; + phy-mode = "sgmii"; + mediatek,switch = "mt7531"; + reset-gpios = <&gpio 28 GPIO_ACTIVE_HIGH>; - phy0: ethernet-phy at 0 { - reg = <0>; + fixed-link { + speed = <1000>; + full-duplex; }; };