From patchwork Fri Mar 20 17:59:21 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Andy Shevchenko X-Patchwork-Id: 244026 List-Id: U-Boot discussion From: andriy.shevchenko at linux.intel.com (Andy Shevchenko) Date: Fri, 20 Mar 2020 19:59:21 +0200 Subject: [PATCH v2] =?utf-8?q?x86=3A_acpi=3A_Add_I=C2=B2C_timings_to_Intel?= =?utf-8?q?_Merrifield_platform?= Message-ID: <20200320175921.34422-1-andriy.shevchenko@linux.intel.com> There is established way to provide I?C timings, or actually counters, to the OS via ACPI. Fill them for Intel Merrifield platform. Signed-off-by: Andy Shevchenko --- v2: added high speed mode counters .../asm/arch-tangier/acpi/southcluster.asl | 30 +++++++++++++++++++ 1 file changed, 30 insertions(+) diff --git a/arch/x86/include/asm/arch-tangier/acpi/southcluster.asl b/arch/x86/include/asm/arch-tangier/acpi/southcluster.asl index c622783f44..6ccdc25136 100644 --- a/arch/x86/include/asm/arch-tangier/acpi/southcluster.asl +++ b/arch/x86/include/asm/arch-tangier/acpi/southcluster.asl @@ -240,6 +240,21 @@ Device (PCI0) Return (STA_VISIBLE) } + Name (SSCN, Package () + { + 0x02F8, 0x037B, Zero, + }) + + Name (FMCN, Package () + { + 0x0087, 0x010A, Zero, + }) + + Name (HSCN, Package () + { + 0x0008, 0x0020, Zero, + }) + Name (RBUF, ResourceTemplate() { FixedDMA(0x0009, 0x0000, Width32bit, ) @@ -260,6 +275,21 @@ Device (PCI0) { Return (STA_VISIBLE) } + + Name (SSCN, Package () + { + 0x02F8, 0x037B, Zero, + }) + + Name (FMCN, Package () + { + 0x0087, 0x010A, Zero, + }) + + Name (HSCN, Package () + { + 0x0008, 0x0020, Zero, + }) } Device (GPIO)