From patchwork Mon Feb 13 14:28:16 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Peter Maydell X-Patchwork-Id: 93889 Delivered-To: patches@linaro.org Received: by 10.140.20.99 with SMTP id 90csp1121373qgi; Mon, 13 Feb 2017 06:28:25 -0800 (PST) X-Received: by 10.99.55.91 with SMTP id g27mr27221064pgn.65.1486996105880; Mon, 13 Feb 2017 06:28:25 -0800 (PST) Return-Path: Received: from orth.archaic.org.uk (orth.archaic.org.uk. [2001:8b0:1d0::2]) by mx.google.com with ESMTPS id z1si10205373pll.224.2017.02.13.06.28.25 for (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Mon, 13 Feb 2017 06:28:25 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of pm215@archaic.org.uk designates 2001:8b0:1d0::2 as permitted sender) client-ip=2001:8b0:1d0::2; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of pm215@archaic.org.uk designates 2001:8b0:1d0::2 as permitted sender) smtp.mailfrom=pm215@archaic.org.uk; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from pm215 by orth.archaic.org.uk with local (Exim 4.84_2) (envelope-from ) id 1cdHc5-00014d-2h; Mon, 13 Feb 2017 14:28:21 +0000 From: Peter Maydell To: qemu-arm@nongnu.org, qemu-devel@nongnu.org Cc: patches@linaro.org, Eduardo Habkost Subject: [PATCH 1/4] cpu: add cpu_generic_new() Date: Mon, 13 Feb 2017 14:28:16 +0000 Message-Id: <1486996099-15820-2-git-send-email-peter.maydell@linaro.org> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1486996099-15820-1-git-send-email-peter.maydell@linaro.org> References: <1486996099-15820-1-git-send-email-peter.maydell@linaro.org> From: Michael Davidsaver Add a new API cpu_generic_new() which creates a QOM CPU object (including calling the CPU class parse_features method) but does not realize it, and reimplement cpu_generic_init() to simply call cpu_generic_new() and then immediately realize. the CPU. The motivation for this is that there is currently no way for board code to take advantage of the cpu_generic_init() convenience function if it needs to set QOM properties on the created CPU. Instead it has to do it all manually, which is prone to bugs like that fixed in commit 00909b585861 (where a board code forgot to call parse_features which meant that command line +feature,-feature flags were ignored). Signed-off-by: Michael Davidsaver [PMM: renamed new function to cpu_generic_new(), rewrote commit message] Signed-off-by: Peter Maydell --- include/qom/cpu.h | 17 +++++++++++++++++ qom/cpu.c | 27 ++++++++++++++++++--------- 2 files changed, 35 insertions(+), 9 deletions(-) -- 2.7.4 diff --git a/include/qom/cpu.h b/include/qom/cpu.h index 45bcf21..e900586 100644 --- a/include/qom/cpu.h +++ b/include/qom/cpu.h @@ -599,11 +599,28 @@ void cpu_reset(CPUState *cpu); ObjectClass *cpu_class_by_name(const char *typename, const char *cpu_model); /** + * cpu_generic_new: + * @typename: The CPU base type. + * @cpu_model: The model string including optional parameters. + * + * Instantiates a CPU, processes optional parameters but does not realize it. + * This is the recommended way to create a CPU object which needs to be + * configured by then setting QOM properties on it. The configured CPU can + * then be realized in the usual way by calling + * object_property_set_bool(cpuobj, true, "realized", &err); + * + * Returns: A #CPUState or %NULL if an error occurred. + */ +CPUState *cpu_generic_new(const char *typename, const char *cpu_model); + +/** * cpu_generic_init: * @typename: The CPU base type. * @cpu_model: The model string including optional parameters. * * Instantiates a CPU, processes optional parameters and realizes the CPU. + * This is equivalent to calling cpu_generic_new() and then immediately + * realizing the CPU object. * * Returns: A #CPUState or %NULL if an error occurred. */ diff --git a/qom/cpu.c b/qom/cpu.c index 0e19b1a..a783aec 100644 --- a/qom/cpu.c +++ b/qom/cpu.c @@ -47,6 +47,22 @@ bool cpu_exists(int64_t id) CPUState *cpu_generic_init(const char *typename, const char *cpu_model) { + CPUState *cpu = cpu_generic_new(typename, cpu_model); + if (cpu) { + Error *err = NULL; + object_property_set_bool(OBJECT(cpu), true, "realized", &err); + + if (err != NULL) { + error_report_err(err); + object_unref(OBJECT(cpu)); + return NULL; + } + } + return cpu; +} + +CPUState *cpu_generic_new(const char *typename, const char *cpu_model) +{ char *str, *name, *featurestr; CPUState *cpu = NULL; ObjectClass *oc; @@ -70,19 +86,12 @@ CPUState *cpu_generic_init(const char *typename, const char *cpu_model) cc->parse_features(object_class_get_name(oc), featurestr, &err); g_free(str); if (err != NULL) { - goto out; - } - - cpu = CPU(object_new(object_class_get_name(oc))); - object_property_set_bool(OBJECT(cpu), true, "realized", &err); - -out: - if (err != NULL) { error_report_err(err); - object_unref(OBJECT(cpu)); return NULL; } + cpu = CPU(object_new(object_class_get_name(oc))); + return cpu; } From patchwork Mon Feb 13 14:28:17 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Peter Maydell X-Patchwork-Id: 93891 Delivered-To: patches@linaro.org Received: by 10.140.20.99 with SMTP id 90csp1121385qgi; Mon, 13 Feb 2017 06:28:27 -0800 (PST) X-Received: by 10.84.133.69 with SMTP id 63mr29945961plf.97.1486996107144; Mon, 13 Feb 2017 06:28:27 -0800 (PST) Return-Path: Received: from orth.archaic.org.uk (orth.archaic.org.uk. [2001:8b0:1d0::2]) by mx.google.com with ESMTPS id t25si10159115pgo.353.2017.02.13.06.28.26 for (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Mon, 13 Feb 2017 06:28:27 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of pm215@archaic.org.uk designates 2001:8b0:1d0::2 as permitted sender) client-ip=2001:8b0:1d0::2; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of pm215@archaic.org.uk designates 2001:8b0:1d0::2 as permitted sender) smtp.mailfrom=pm215@archaic.org.uk; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from pm215 by orth.archaic.org.uk with local (Exim 4.84_2) (envelope-from ) id 1cdHc5-00014o-HG; Mon, 13 Feb 2017 14:28:21 +0000 From: Peter Maydell To: qemu-arm@nongnu.org, qemu-devel@nongnu.org Cc: patches@linaro.org, Eduardo Habkost Subject: [PATCH 2/4] cpu: Clarify TODO comment in cpu_generic_new() Date: Mon, 13 Feb 2017 14:28:17 +0000 Message-Id: <1486996099-15820-3-git-send-email-peter.maydell@linaro.org> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1486996099-15820-1-git-send-email-peter.maydell@linaro.org> References: <1486996099-15820-1-git-send-email-peter.maydell@linaro.org> The TODO comment in cpu_generic_new() suggests that we want to move to having all callers do the parse_features work by hand. In fact the intention is that we would prefer to have this happen automatically via machine core work or similar common code changes. In the meantime boards should use the cpu_generic_new() wrapper rather than calling parse_features themselves, because this means we only need to change one place in future if we change how parse_features gets called. Signed-off-by: Peter Maydell --- Change based on email conversation with Eduardo...hopefully I have understood the intention here correctly. --- qom/cpu.c | 10 ++++++++-- 1 file changed, 8 insertions(+), 2 deletions(-) -- 2.7.4 diff --git a/qom/cpu.c b/qom/cpu.c index a783aec..eacce5e 100644 --- a/qom/cpu.c +++ b/qom/cpu.c @@ -80,8 +80,14 @@ CPUState *cpu_generic_new(const char *typename, const char *cpu_model) cc = CPU_CLASS(oc); featurestr = strtok(NULL, ","); - /* TODO: all callers of cpu_generic_init() need to be converted to - * call parse_features() only once, before calling cpu_generic_init(). + /* TODO: we should really arrange to have parse_features() called + * only once, since it needs only to be called once per CPU class + * rather than once per instance of that class. Perhaps this would + * be done by changes to how machine core code works or by doing + * something in main(). In the meantime, board code should prefer + * to use this function rather than calling parse_features() + * manually, so that refactoring how we handle this is easier in + * future. */ cc->parse_features(object_class_get_name(oc), featurestr, &err); g_free(str); From patchwork Mon Feb 13 14:28:18 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Peter Maydell X-Patchwork-Id: 93888 Delivered-To: patches@linaro.org Received: by 10.140.20.99 with SMTP id 90csp1121361qgi; Mon, 13 Feb 2017 06:28:23 -0800 (PST) X-Received: by 10.28.227.133 with SMTP id a127mr35795471wmh.104.1486996103657; Mon, 13 Feb 2017 06:28:23 -0800 (PST) Return-Path: Received: from orth.archaic.org.uk (orth.archaic.org.uk. [2001:8b0:1d0::2]) by mx.google.com with ESMTPS id s17si14052081wra.167.2017.02.13.06.28.23 for (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Mon, 13 Feb 2017 06:28:23 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of pm215@archaic.org.uk designates 2001:8b0:1d0::2 as permitted sender) client-ip=2001:8b0:1d0::2; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of pm215@archaic.org.uk designates 2001:8b0:1d0::2 as permitted sender) smtp.mailfrom=pm215@archaic.org.uk; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from pm215 by orth.archaic.org.uk with local (Exim 4.84_2) (envelope-from ) id 1cdHc5-00014z-Va; Mon, 13 Feb 2017 14:28:21 +0000 From: Peter Maydell To: qemu-arm@nongnu.org, qemu-devel@nongnu.org Cc: patches@linaro.org, Eduardo Habkost Subject: [PATCH 3/4] hw/arm/integrator: Use new cpu_generic_new() Date: Mon, 13 Feb 2017 14:28:18 +0000 Message-Id: <1486996099-15820-4-git-send-email-peter.maydell@linaro.org> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1486996099-15820-1-git-send-email-peter.maydell@linaro.org> References: <1486996099-15820-1-git-send-email-peter.maydell@linaro.org> Use the new cpu_generic_new() function rather than doing the work of creating it and calling parse_features by hand. Signed-off-by: Peter Maydell --- hw/arm/integratorcp.c | 22 ++-------------------- 1 file changed, 2 insertions(+), 20 deletions(-) -- 2.7.4 diff --git a/hw/arm/integratorcp.c b/hw/arm/integratorcp.c index 5610ffc..beffaf4 100644 --- a/hw/arm/integratorcp.c +++ b/hw/arm/integratorcp.c @@ -577,42 +577,24 @@ static void integratorcp_init(MachineState *machine) const char *kernel_filename = machine->kernel_filename; const char *kernel_cmdline = machine->kernel_cmdline; const char *initrd_filename = machine->initrd_filename; - char **cpustr; - ObjectClass *cpu_oc; - CPUClass *cc; Object *cpuobj; ARMCPU *cpu; - const char *typename; MemoryRegion *address_space_mem = get_system_memory(); MemoryRegion *ram = g_new(MemoryRegion, 1); MemoryRegion *ram_alias = g_new(MemoryRegion, 1); qemu_irq pic[32]; DeviceState *dev, *sic, *icp; int i; - Error *err = NULL; if (!cpu_model) { cpu_model = "arm926"; } - cpustr = g_strsplit(cpu_model, ",", 2); - - cpu_oc = cpu_class_by_name(TYPE_ARM_CPU, cpustr[0]); - if (!cpu_oc) { + cpuobj = OBJECT(cpu_generic_new(TYPE_ARM_CPU, cpu_model)); + if (!cpuobj) { fprintf(stderr, "Unable to find CPU definition\n"); exit(1); } - typename = object_class_get_name(cpu_oc); - - cc = CPU_CLASS(cpu_oc); - cc->parse_features(typename, cpustr[1], &err); - g_strfreev(cpustr); - if (err) { - error_report_err(err); - exit(1); - } - - cpuobj = object_new(typename); /* By default ARM1176 CPUs have EL3 enabled. This board does not * currently support EL3 so the CPU EL3 property is disabled before From patchwork Mon Feb 13 14:28:19 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Peter Maydell X-Patchwork-Id: 93890 Delivered-To: patches@linaro.org Received: by 10.140.20.99 with SMTP id 90csp1121383qgi; Mon, 13 Feb 2017 06:28:26 -0800 (PST) X-Received: by 10.99.213.81 with SMTP id v17mr26868698pgi.130.1486996106863; Mon, 13 Feb 2017 06:28:26 -0800 (PST) Return-Path: Received: from orth.archaic.org.uk (orth.archaic.org.uk. [2001:8b0:1d0::2]) by mx.google.com with ESMTPS id 3si10194666plz.256.2017.02.13.06.28.26 for (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Mon, 13 Feb 2017 06:28:26 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of pm215@archaic.org.uk designates 2001:8b0:1d0::2 as permitted sender) client-ip=2001:8b0:1d0::2; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of pm215@archaic.org.uk designates 2001:8b0:1d0::2 as permitted sender) smtp.mailfrom=pm215@archaic.org.uk; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from pm215 by orth.archaic.org.uk with local (Exim 4.84_2) (envelope-from ) id 1cdHc6-00015A-Do; Mon, 13 Feb 2017 14:28:22 +0000 From: Peter Maydell To: qemu-arm@nongnu.org, qemu-devel@nongnu.org Cc: patches@linaro.org, Eduardo Habkost Subject: [PATCH 4/4] hw/arm/virt: Use new cpu_generic_new() Date: Mon, 13 Feb 2017 14:28:19 +0000 Message-Id: <1486996099-15820-5-git-send-email-peter.maydell@linaro.org> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1486996099-15820-1-git-send-email-peter.maydell@linaro.org> References: <1486996099-15820-1-git-send-email-peter.maydell@linaro.org> Use the new cpu_generic_new() rather than calling parse_features by hand. Signed-off-by: Peter Maydell --- hw/arm/virt.c | 24 ++---------------------- 1 file changed, 2 insertions(+), 22 deletions(-) -- 2.7.4 diff --git a/hw/arm/virt.c b/hw/arm/virt.c index f3440f2..bcb9a6d 100644 --- a/hw/arm/virt.c +++ b/hw/arm/virt.c @@ -172,7 +172,6 @@ static const char *valid_cpus[] = { static bool cpuname_valid(const char *cpu) { int i; - for (i = 0; i < ARRAY_SIZE(valid_cpus); i++) { if (strcmp(cpu, valid_cpus[i]) == 0) { return true; @@ -1206,10 +1205,6 @@ static void machvirt_init(MachineState *machine) MemoryRegion *ram = g_new(MemoryRegion, 1); const char *cpu_model = machine->cpu_model; char **cpustr; - ObjectClass *oc; - const char *typename; - CPUClass *cc; - Error *err = NULL; bool firmware_loaded = bios_name || drive_get(IF_PFLASH, 0, 0); uint8_t clustersz; @@ -1240,6 +1235,7 @@ static void machvirt_init(MachineState *machine) error_report("mach-virt: CPU %s not supported", cpustr[0]); exit(1); } + g_strfreev(cpustr); /* If we have an EL3 boot ROM then the assumption is that it will * implement PSCI itself, so disable QEMU's internal implementation @@ -1309,24 +1305,8 @@ static void machvirt_init(MachineState *machine) create_fdt(vms); - oc = cpu_class_by_name(TYPE_ARM_CPU, cpustr[0]); - if (!oc) { - error_report("Unable to find CPU definition"); - exit(1); - } - typename = object_class_get_name(oc); - - /* convert -smp CPU options specified by the user into global props */ - cc = CPU_CLASS(oc); - cc->parse_features(typename, cpustr[1], &err); - g_strfreev(cpustr); - if (err) { - error_report_err(err); - exit(1); - } - for (n = 0; n < smp_cpus; n++) { - Object *cpuobj = object_new(typename); + Object *cpuobj = OBJECT(cpu_generic_new(TYPE_ARM_CPU, cpu_model)); if (!vmc->disallow_affinity_adjustment) { /* Adjust MPIDR like 64-bit KVM hosts, which incorporate the * GIC's target-list limitations. 32-bit KVM hosts currently