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[209.51.188.17]) by mx.google.com with ESMTPS id x3si10476646ybt.216.2020.07.31.05.53.22 for (version=TLS1_2 cipher=ECDHE-ECDSA-CHACHA20-POLY1305 bits=256/256); Fri, 31 Jul 2020 05:53:22 -0700 (PDT) Received-SPF: pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; Authentication-Results: mx.google.com; dkim=fail header.i=@linaro.org header.s=google header.b=AMJcKRtE; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from localhost ([::1]:53382 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1k1UXJ-0006ks-Jr for patch@linaro.org; Fri, 31 Jul 2020 08:53:21 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:58666) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1k1UVo-0004x0-87 for qemu-devel@nongnu.org; Fri, 31 Jul 2020 08:51:48 -0400 Received: from mail-pl1-x634.google.com ([2607:f8b0:4864:20::634]:34045) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1k1UVm-0003Z7-Gg for qemu-devel@nongnu.org; Fri, 31 Jul 2020 08:51:47 -0400 Received: by mail-pl1-x634.google.com with SMTP id o1so17310136plk.1 for ; Fri, 31 Jul 2020 05:51:46 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=o9V0JUllgC3h//GHZoYXd1Im5qo2kMrDGKs9+A1PleI=; b=AMJcKRtEwj0sl6R0HDH8pA9Z1k5CQ2jkU1QfgeaFl6NWrFXLlZoR5hTjQ2rZdICtpk BIhqT0BvGKRMEKABieW3LuX7jTTMCgyOgsHs4NOyckfgyL5gimUwvEDgAciFWIgXrSnU NsaMOCiU7uGc15lbILz3EuSqFjSHMnBWcWvg7OMAcZeDO7hnAGg2j++UsnW30AX9ZBPX s5wCy/dE/PUUfHETaISR76Sd53ikhmdk//h1rhhraNqQgoAmUyR4rcNdAFa45mOQG8Lg iN7Df7+I0/FNVrgnqmLATjILf1SmpLfWmTYONxOVaj6MUXgPq/gUBxFKHXqEw3oJOino IHgw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=o9V0JUllgC3h//GHZoYXd1Im5qo2kMrDGKs9+A1PleI=; b=hIg3PfANZGBnXVFL/COaEcCe5UQdCxEwrdw5Lie19f7w2rIuyMQQQq+hrDcROcitVH MgwoeDdoEZIAYivn7Eux4adl6HMCmEGUQZPHic/N8rvk4PsUEOWnUGUbFjrwp5+SG9zK TvTLtYRFKJ0piw3z73o2N6KyvlOuZV+IZb88Pd7Y1jv5TctH2hsKLYmxnQcaBH3/Pt6J 65gAor6f5rjNxED/snhKyPgFv2ifXR0yLGYXVp+Xo7VyfrPocdXMdHzwPY2pQLpc7yWx xhVKuJgBFnv+BORgWGtHzZq1HcGfBXqodUy3S1LRdzyVrBt/GJhrRnFB/2hYkVV5SFEV Hk1g== X-Gm-Message-State: AOAM5300EHgd1q7QAlKuG4x6u6ouuDeivlN/CuwWDMGG3P+SPq/PZOEI iZjFztzqMzD22w0Ui1I4lr37w2unccc= X-Received: by 2002:a17:90a:4f45:: with SMTP id w5mr3953129pjl.11.1596199904310; Fri, 31 Jul 2020 05:51:44 -0700 (PDT) Received: from Rfoley-MA01.hsd1.ma.comcast.net (c-73-47-162-176.hsd1.ma.comcast.net. [73.47.162.176]) by smtp.gmail.com with ESMTPSA id v11sm9733646pgs.22.2020.07.31.05.51.42 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 31 Jul 2020 05:51:43 -0700 (PDT) From: Robert Foley To: qemu-devel@nongnu.org Subject: [PATCH 1/2] hw/core: Add bql_interrupt flag to CPUClass Date: Fri, 31 Jul 2020 08:51:26 -0400 Message-Id: <20200731125127.30866-2-robert.foley@linaro.org> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20200731125127.30866-1-robert.foley@linaro.org> References: <20200731125127.30866-1-robert.foley@linaro.org> Received-SPF: pass client-ip=2607:f8b0:4864:20::634; envelope-from=robert.foley@linaro.org; helo=mail-pl1-x634.google.com X-detected-operating-system: by eggs.gnu.org: No matching host in p0f cache. That's all we know. X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: robert.foley@linaro.org, Eduardo Habkost , cota@braap.org, pbonzini@redhat.com, peter.puhov@linaro.org, alex.bennee@linaro.org, rth@twiddle.net Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" The new flag bql_interrupt, allows the CPUClass to determine if the BQL should be held during calls to cpu_exec_interrupt or do_interrupt. This is being added in preparation for changes in cpu_handle_interrupt, which will use this flag. Signed-off-by: Robert Foley --- hw/core/cpu.c | 1 + include/hw/core/cpu.h | 8 ++++++++ 2 files changed, 9 insertions(+) -- 2.17.1 diff --git a/hw/core/cpu.c b/hw/core/cpu.c index 8707ce2c34..7ab88caa97 100644 --- a/hw/core/cpu.c +++ b/hw/core/cpu.c @@ -425,6 +425,7 @@ static void cpu_class_init(ObjectClass *klass, void *data) k->cpu_exec_exit = cpu_common_noop; k->cpu_exec_interrupt = cpu_common_exec_interrupt; k->adjust_watchpoint_address = cpu_adjust_watchpoint_address; + k->bql_interrupt = true; set_bit(DEVICE_CATEGORY_CPU, dc->categories); dc->realize = cpu_common_realizefn; dc->unrealize = cpu_common_unrealizefn; diff --git a/include/hw/core/cpu.h b/include/hw/core/cpu.h index 6a2c77682f..d2c426ee5d 100644 --- a/include/hw/core/cpu.h +++ b/include/hw/core/cpu.h @@ -157,6 +157,8 @@ struct TranslationBlock; * @disas_set_info: Setup architecture specific components of disassembly info * @adjust_watchpoint_address: Perform a target-specific adjustment to an * address before attempting to match it against watchpoints. + * @bql_interrupt: Hold BQL while performing the cpu_exec_interrupt + * or do_interrupt call. * * Represents a CPU family or model. */ @@ -227,6 +229,7 @@ typedef struct CPUClass { /* Keep non-pointer data at the end to minimize holes. */ int gdb_num_core_regs; bool gdb_stop_before_watchpoint; + bool bql_interrupt; } CPUClass; /* @@ -589,6 +592,11 @@ static inline void cpu_tb_jmp_cache_clear(CPUState *cpu) } } +static inline void cpu_class_enable_bql_interrupt(CPUClass *cc) +{ + cc->bql_interrupt = true; +} + /** * qemu_tcg_mttcg_enabled: * Check whether we are running MultiThread TCG or not. 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[73.47.162.176]) by smtp.gmail.com with ESMTPSA id v11sm9733646pgs.22.2020.07.31.05.51.44 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 31 Jul 2020 05:51:45 -0700 (PDT) From: Robert Foley To: qemu-devel@nongnu.org Subject: [PATCH 2/2] accel/tcg: interrupt/exception handling uses bql_interrupt flag Date: Fri, 31 Jul 2020 08:51:27 -0400 Message-Id: <20200731125127.30866-3-robert.foley@linaro.org> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20200731125127.30866-1-robert.foley@linaro.org> References: <20200731125127.30866-1-robert.foley@linaro.org> Received-SPF: pass client-ip=2607:f8b0:4864:20::642; envelope-from=robert.foley@linaro.org; helo=mail-pl1-x642.google.com X-detected-operating-system: by eggs.gnu.org: No matching host in p0f cache. That's all we know. X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: robert.foley@linaro.org, cota@braap.org, pbonzini@redhat.com, peter.puhov@linaro.org, alex.bennee@linaro.org, rth@twiddle.net Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" This change removes the implied BQL from the cpu_handle_interrupt, and cpu_handle_exception paths. We can now select per-arch if the BQL is needed or not by using the bql_interrupt flag. By default, the core code holds the BQL. One benefit of this change is that it leaves it up to the arch to make the change to remove BQL when it makes sense. Signed-off-by: Robert Foley --- accel/tcg/cpu-exec.c | 34 ++++++++++++++++++++++++++-------- 1 file changed, 26 insertions(+), 8 deletions(-) -- 2.17.1 diff --git a/accel/tcg/cpu-exec.c b/accel/tcg/cpu-exec.c index 80d0e649b2..cde27ee0bf 100644 --- a/accel/tcg/cpu-exec.c +++ b/accel/tcg/cpu-exec.c @@ -517,9 +517,13 @@ static inline bool cpu_handle_exception(CPUState *cpu, int *ret) #else if (replay_exception()) { CPUClass *cc = CPU_GET_CLASS(cpu); - qemu_mutex_lock_iothread(); + if (cc->bql_interrupt) { + qemu_mutex_lock_iothread(); + } cc->do_interrupt(cpu); - qemu_mutex_unlock_iothread(); + if (cc->bql_interrupt) { + qemu_mutex_unlock_iothread(); + } cpu->exception_index = -1; if (unlikely(cpu->singlestep_enabled)) { @@ -558,7 +562,7 @@ static inline bool cpu_handle_interrupt(CPUState *cpu, if (unlikely(cpu_interrupt_request(cpu))) { int interrupt_request; - qemu_mutex_lock_iothread(); + cpu_mutex_lock(cpu); interrupt_request = cpu_interrupt_request(cpu); if (unlikely(cpu->singlestep_enabled & SSTEP_NOIRQ)) { /* Mask out external interrupts for this step. */ @@ -567,7 +571,7 @@ static inline bool cpu_handle_interrupt(CPUState *cpu, if (interrupt_request & CPU_INTERRUPT_DEBUG) { cpu_reset_interrupt(cpu, CPU_INTERRUPT_DEBUG); cpu->exception_index = EXCP_DEBUG; - qemu_mutex_unlock_iothread(); + cpu_mutex_unlock(cpu); return true; } if (replay_mode == REPLAY_MODE_PLAY && !replay_has_interrupt()) { @@ -577,13 +581,15 @@ static inline bool cpu_handle_interrupt(CPUState *cpu, cpu_reset_interrupt(cpu, CPU_INTERRUPT_HALT); cpu_halted_set(cpu, 1); cpu->exception_index = EXCP_HLT; - qemu_mutex_unlock_iothread(); + cpu_mutex_unlock(cpu); return true; } #if defined(TARGET_I386) else if (interrupt_request & CPU_INTERRUPT_INIT) { X86CPU *x86_cpu = X86_CPU(cpu); CPUArchState *env = &x86_cpu->env; + cpu_mutex_unlock(cpu); + qemu_mutex_lock_iothread(); replay_interrupt(); cpu_svm_check_intercept_param(env, SVM_EXIT_INIT, 0, 0); do_cpu_init(x86_cpu); @@ -595,7 +601,7 @@ static inline bool cpu_handle_interrupt(CPUState *cpu, else if (interrupt_request & CPU_INTERRUPT_RESET) { replay_interrupt(); cpu_reset(cpu); - qemu_mutex_unlock_iothread(); + cpu_mutex_unlock(cpu); return true; } #endif @@ -604,7 +610,15 @@ static inline bool cpu_handle_interrupt(CPUState *cpu, True when it is, and we should restart on a new TB, and via longjmp via cpu_loop_exit. */ else { + cpu_mutex_unlock(cpu); + if (cc->bql_interrupt) { + qemu_mutex_lock_iothread(); + } if (cc->cpu_exec_interrupt(cpu, interrupt_request)) { + if (cc->bql_interrupt) { + qemu_mutex_unlock_iothread(); + } + cpu_mutex_lock(cpu); replay_interrupt(); /* * After processing the interrupt, ensure an EXCP_DEBUG is @@ -614,6 +628,11 @@ static inline bool cpu_handle_interrupt(CPUState *cpu, cpu->exception_index = (cpu->singlestep_enabled ? EXCP_DEBUG : -1); *last_tb = NULL; + } else { + if (cc->bql_interrupt) { + qemu_mutex_unlock_iothread(); + } + cpu_mutex_lock(cpu); } /* The target hook may have updated the 'cpu->interrupt_request'; * reload the 'interrupt_request' value */ @@ -627,7 +646,7 @@ static inline bool cpu_handle_interrupt(CPUState *cpu, } /* If we exit via cpu_loop_exit/longjmp it is reset in cpu_exec */ - qemu_mutex_unlock_iothread(); + cpu_mutex_unlock(cpu); } /* Finally, check if we need to exit to the main loop. */ @@ -691,7 +710,6 @@ static inline void cpu_loop_exec_tb(CPUState *cpu, TranslationBlock *tb, } #endif } - /* main execution loop */ int cpu_exec(CPUState *cpu)