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[209.132.180.67]) by mx.google.com with ESMTP id m61si425307plb.586.2017.10.10.01.39.33; Tue, 10 Oct 2017 01:39:33 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-arm-msm-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=neutral (body hash did not verify) header.i=@linaro.org header.s=google header.b=S7n0Osct; spf=pass (google.com: best guess record for domain of linux-arm-msm-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-arm-msm-owner@vger.kernel.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752087AbdJJIjc (ORCPT + 11 others); Tue, 10 Oct 2017 04:39:32 -0400 Received: from mail-lf0-f49.google.com ([209.85.215.49]:52297 "EHLO mail-lf0-f49.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751398AbdJJIjb (ORCPT ); Tue, 10 Oct 2017 04:39:31 -0400 Received: by mail-lf0-f49.google.com with SMTP id b190so4815154lfg.9 for ; Tue, 10 Oct 2017 01:39:30 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id; bh=EtjMNszmc9+/fLGUgM491x9fOc3x0nWVngfojxAw8OM=; b=S7n0OsctwoMfHc3xhOeMWqbdvnRB4aaO5fWFPrHKmKf2OGOFoBtsFqYWXA/IxIaSz5 U1jGI/ehax+14c6JsJNUnNV+U1WKvurn3qU6tsDgnicbzVfHrBC5O2fT6pFImcoYWqdI qd3q4w2am3YPJy8rCYbl/1bmw0jHkcO5LZHFg= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id; bh=EtjMNszmc9+/fLGUgM491x9fOc3x0nWVngfojxAw8OM=; b=XR0YoIXX5wMSAVBK29JwRYhpA23oD6yJMmh45yVQ7jJvvJ0kk0QSJ9IKFgg+Fy/f15 kq1Rf/z4Jvs2IlCf2MMks71pXIZDrwIkyJDwIhEeSqVTOpn7yVOpiAldK+EusGj/h1y8 ygI9Rb38XwrlFwTKsoE9QkJ6QE5HhbICmVCAoVSOmV/2jivP6q+LRRO7owHirfmnx1AT orYmau6mHpR/avP0LiVgbteyuHKiRNoFhOT4PFw/GLINArNgwUo6+cPYinLH4Ntt2C0b Gv8tVg0Y+LrzeUgDMy73m3CFeoyrBVEV1+6X1P8gOSA0likUC2ErGcvhono4xhWG0xYl VZnQ== X-Gm-Message-State: AMCzsaV0THiV3NgYhStWouvOEw1+sc7W/QnO9X7oQElqWInXMQ6cQIfz jRXapmyQq4prC1ECuOneZeshHw== X-Google-Smtp-Source: AOwi7QDgetHJdk35bid1qCeNHtLM6iC5kJjAkg6CJXessnvnsdj21GM1PTCj/nb3guHQDrIqWvSuLQ== X-Received: by 10.25.90.77 with SMTP id o74mr4700807lfb.212.1507624770192; Tue, 10 Oct 2017 01:39:30 -0700 (PDT) Received: from genomnajs.ideon.se ([85.235.10.227]) by smtp.gmail.com with ESMTPSA id n63sm1899340ljb.1.2017.10.10.01.39.28 (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Tue, 10 Oct 2017 01:39:29 -0700 (PDT) From: Linus Walleij To: linux-arm-kernel@lists.infradead.org, linux-arm-msm@vger.kernel.org, Andy Gross , David Brown Cc: Stephen Boyd , Bjorn Andersson , linux-soc@vger.kernel.org, Linus Walleij Subject: [PATCH] ARM: dts: qcom: add MSM8660 GSBI6 and GSBI7 Date: Tue, 10 Oct 2017 10:39:24 +0200 Message-Id: <20171010083924.19244-1-linus.walleij@linaro.org> X-Mailer: git-send-email 2.13.5 Sender: linux-arm-msm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org This adds the GSBI6 and GSBI7 IO blocks to the MSM8660 DTSI file. On the APQ8060 DragonBoard, GSBI6 DM is used for Bluetooth UART, and GSBI7 I2C is used for FM radio I2C. Signed-off-by: Linus Walleij --- arch/arm/boot/dts/qcom-msm8660.dtsi | 67 +++++++++++++++++++++++++++++++++++++ 1 file changed, 67 insertions(+) -- 2.13.5 -- To unsubscribe from this list: send the line "unsubscribe linux-arm-msm" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Acked-by: Bjorn Andersson diff --git a/arch/arm/boot/dts/qcom-msm8660.dtsi b/arch/arm/boot/dts/qcom-msm8660.dtsi index 1b5d31b33b5e..4f02489bcb2e 100644 --- a/arch/arm/boot/dts/qcom-msm8660.dtsi +++ b/arch/arm/boot/dts/qcom-msm8660.dtsi @@ -123,6 +123,73 @@ reg = <0x900000 0x4000>; }; + gsbi6: gsbi@16500000 { + compatible = "qcom,gsbi-v1.0.0"; + cell-index = <12>; + reg = <0x16500000 0x100>; + clocks = <&gcc GSBI6_H_CLK>; + clock-names = "iface"; + #address-cells = <1>; + #size-cells = <1>; + ranges; + + syscon-tcsr = <&tcsr>; + + gsbi6_serial: serial@16540000 { + compatible = "qcom,msm-uartdm-v1.3", "qcom,msm-uartdm"; + reg = <0x16540000 0x1000>, + <0x16500000 0x1000>; + interrupts = ; + clocks = <&gcc GSBI6_UART_CLK>, <&gcc GSBI6_H_CLK>; + clock-names = "core", "iface"; + status = "disabled"; + }; + + gsbi6_i2c: i2c@16580000 { + compatible = "qcom,i2c-qup-v1.1.1"; + reg = <0x16580000 0x1000>; + interrupts = ; + clocks = <&gcc GSBI6_QUP_CLK>, <&gcc GSBI6_H_CLK>; + clock-names = "core", "iface"; + #address-cells = <1>; + #size-cells = <0>; + status = "disabled"; + }; + }; + + gsbi7: gsbi@16600000 { + compatible = "qcom,gsbi-v1.0.0"; + cell-index = <12>; + reg = <0x16600000 0x100>; + clocks = <&gcc GSBI7_H_CLK>; + clock-names = "iface"; + #address-cells = <1>; + #size-cells = <1>; + ranges; + + syscon-tcsr = <&tcsr>; + + gsbi7_serial: serial@16640000 { + compatible = "qcom,msm-uartdm-v1.3", "qcom,msm-uartdm"; + reg = <0x16640000 0x1000>, + <0x16600000 0x1000>; + interrupts = ; + clocks = <&gcc GSBI7_UART_CLK>, <&gcc GSBI7_H_CLK>; + clock-names = "core", "iface"; + status = "disabled"; + }; + + gsbi7_i2c: i2c@16680000 { + compatible = "qcom,i2c-qup-v1.1.1"; + reg = <0x16680000 0x1000>; + interrupts = ; + clocks = <&gcc GSBI7_QUP_CLK>, <&gcc GSBI7_H_CLK>; + clock-names = "core", "iface"; + #address-cells = <1>; + #size-cells = <0>; + status = "disabled"; + }; + }; gsbi8: gsbi@19800000 { compatible = "qcom,gsbi-v1.0.0";