From patchwork Thu Sep 10 07:54:32 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Peter Ujfalusi X-Patchwork-Id: 249578 Delivered-To: patch@linaro.org Received: by 2002:a17:906:6011:0:0:0:0 with SMTP id o17csp1166595ejj; Thu, 10 Sep 2020 00:55:20 -0700 (PDT) X-Google-Smtp-Source: ABdhPJx2ja58mCz4wxeqr9XKk9D1y7ZEEzgLwZPuWzED8c26idE8VO7AbJczvvXzMqi+/HHRHQcm X-Received: by 2002:a50:9b5e:: with SMTP id a30mr7816975edj.49.1599724520768; Thu, 10 Sep 2020 00:55:20 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1599724520; cv=none; d=google.com; s=arc-20160816; b=shuocEdkIh9Ceywp4ApVaD9HHM/FWjMO0StVHujwoL9QDK+q0EWLYbVSMcJeQnaMox pv6ZgJu9h/b0xRTSv2dHhv3oJKZzvCHQpcdN1vI0PoikYKEzNb7Y7GraPEi9ArJmy9+f P2o9YPkJyLkSbRZm31q+m38w5tCvoMC5M/2zu2U0SjFpykB3QCn8Zn+vML7VxC7MHH2/ SwuOMujbbpEkB9C0qODU2JZIG61BgwYw7Q65kQSTXB+OyL2lYYcp1bpjIRf9y7mp53ki mx/VEsqOHRzLANW1gnprFd2Tp06eZQ6/0QPeAe2X2ChPn1f25q93Iv9snZ5GSjYo38S5 Q+Ww== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=RBWE7U0tlwFef9YzggYph/v9AwzgqEVQs2QRRG5UVLo=; b=XxuRvQP8Ibi/YtY7dr5IUnNXf+laSDnOxMk7uDB4WymAHDxmSXjxMWC9/Q8lDcYIlG cfEk1e7x63SDjZAyAFam4Q2V07ClcqCFJuSuuFR4QyUVXyeOtL+wBikWULdDQEDqo462 o4ZXpJ5QH6c3Vl3IaQ6rISwc/KWWgqNAYeTZlpJPQongICGbTn1JMHlt12DlqjSQFoAF sVw+4crh+18sVmzHRHuJGvgC1NEt/OtEupsj4ydNwPv7DzQnFTJn8IvqRcfd56sixS8c RZjkJkLs12i7SwRWALPEfHddp5bz/gFvKQie5N9jEVzqXYiM8RSkHjNDxif3pUGpnFK0 XXlA== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@ti.com header.s=ti-com-17Q1 header.b=vRYROEqu; spf=pass (google.com: domain of devicetree-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=NONE dis=NONE) header.from=ti.com Return-Path: Received: from vger.kernel.org (vger.kernel.org. [23.128.96.18]) by mx.google.com with ESMTP id l2si3117516ejc.209.2020.09.10.00.55.20; Thu, 10 Sep 2020 00:55:20 -0700 (PDT) Received-SPF: pass (google.com: domain of devicetree-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18; Authentication-Results: mx.google.com; dkim=pass header.i=@ti.com header.s=ti-com-17Q1 header.b=vRYROEqu; spf=pass (google.com: domain of devicetree-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=NONE dis=NONE) header.from=ti.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1730279AbgIJHy4 (ORCPT + 6 others); Thu, 10 Sep 2020 03:54:56 -0400 Received: from lelv0142.ext.ti.com ([198.47.23.249]:55074 "EHLO lelv0142.ext.ti.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1729525AbgIJHyr (ORCPT ); Thu, 10 Sep 2020 03:54:47 -0400 Received: from fllv0035.itg.ti.com ([10.64.41.0]) by lelv0142.ext.ti.com (8.15.2/8.15.2) with ESMTP id 08A7scYT036046; Thu, 10 Sep 2020 02:54:38 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ti.com; s=ti-com-17Q1; t=1599724478; bh=RBWE7U0tlwFef9YzggYph/v9AwzgqEVQs2QRRG5UVLo=; h=From:To:CC:Subject:Date:In-Reply-To:References; b=vRYROEquBYJZJnAP1oqqT6tAelB4vnEw/DMqRmsk64/sWF4pVCMVrdkHmjA+0KfA8 xNAofxLNWYBhGFSJGzY2hF4Y63YgTvACyl+1b8OfTADlN3tRRPYRYzdGcYHwbWwAAC HWBqhFnR7rjhCriWBbaw14l01FvscGiBPuKJsDnM= Received: from DLEE105.ent.ti.com (dlee105.ent.ti.com [157.170.170.35]) by fllv0035.itg.ti.com (8.15.2/8.15.2) with ESMTP id 08A7scLr110132; Thu, 10 Sep 2020 02:54:38 -0500 Received: from DLEE113.ent.ti.com (157.170.170.24) by DLEE105.ent.ti.com (157.170.170.35) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.1979.3; Thu, 10 Sep 2020 02:54:37 -0500 Received: from lelv0327.itg.ti.com (10.180.67.183) by DLEE113.ent.ti.com (157.170.170.24) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.1979.3 via Frontend Transport; Thu, 10 Sep 2020 02:54:37 -0500 Received: from feketebors.ti.com (ileax41-snat.itg.ti.com [10.172.224.153]) by lelv0327.itg.ti.com (8.15.2/8.15.2) with ESMTP id 08A7sXCT123142; Thu, 10 Sep 2020 02:54:36 -0500 From: Peter Ujfalusi To: , , CC: , , Subject: [PATCH 1/2] ASoC: dt-bindings: ti, j721e-cpb-audio: Document support for j7200-cpb Date: Thu, 10 Sep 2020 10:54:32 +0300 Message-ID: <20200910075433.26718-2-peter.ujfalusi@ti.com> X-Mailer: git-send-email 2.28.0 In-Reply-To: <20200910075433.26718-1-peter.ujfalusi@ti.com> References: <20200910075433.26718-1-peter.ujfalusi@ti.com> MIME-Version: 1.0 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 Sender: devicetree-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org j721e or j7200 SOM can be attached to the same Common Processor Board (CPB) With the j7200 SOM only the 48KHz family parent clock is available and McASP0 is used for the audio. Signed-off-by: Peter Ujfalusi --- .../bindings/sound/ti,j721e-cpb-audio.yaml | 92 ++++++++++++++----- 1 file changed, 70 insertions(+), 22 deletions(-) -- Peter Texas Instruments Finland Oy, Porkkalankatu 22, 00180 Helsinki. Y-tunnus/Business ID: 0615521-4. Kotipaikka/Domicile: Helsinki diff --git a/Documentation/devicetree/bindings/sound/ti,j721e-cpb-audio.yaml b/Documentation/devicetree/bindings/sound/ti,j721e-cpb-audio.yaml index d52cfbeb2d07..805da4d6a88e 100644 --- a/Documentation/devicetree/bindings/sound/ti,j721e-cpb-audio.yaml +++ b/Documentation/devicetree/bindings/sound/ti,j721e-cpb-audio.yaml @@ -18,18 +18,25 @@ description: | PLL15 (for 44.1KHz). The same PLLs are used for McASP10's AUXCLK clock via different HSDIVIDER. - Clocking setup for 48KHz family: - PLL4 ---> PLL4_HSDIV0 ---> MCASP10_AUXCLK ---> McASP10.auxclk - |-> PLL4_HSDIV2 ---> AUDIO_REFCLK2 ---> pcm3168a.SCKI + Clocking setup for j721e: + 48KHz family: + PLL4 ---> PLL4_HSDIV0 ---> MCASP10_AUXCLK ---> McASP10.auxclk + |-> PLL4_HSDIV2 ---> AUDIO_REFCLK2 ---> pcm3168a.SCKI - Clocking setup for 44.1KHz family: - PLL15 ---> PLL15_HSDIV0 ---> MCASP10_AUXCLK ---> McASP10.auxclk - |-> PLL15_HSDIV2 ---> AUDIO_REFCLK2 ---> pcm3168a.SCKI + 44.1KHz family: + PLL15 ---> PLL15_HSDIV0 ---> MCASP10_AUXCLK ---> McASP10.auxclk + |-> PLL15_HSDIV2 ---> AUDIO_REFCLK2 ---> pcm3168a.SCKI + + Clocking setup for j7200: + 48KHz family: + PLL4 ---> PLL4_HSDIV0 ---> MCASP0_AUXCLK ---> McASP0.auxclk + |-> PLL4_HSDIV2 ---> AUDIO_REFCLK2 ---> pcm3168a.SCKI properties: compatible: - items: - - const: ti,j721e-cpb-audio + enum: + - ti,j721e-cpb-audio + - ti,j7200-cpb-audio model: $ref: /schemas/types.yaml#/definitions/string @@ -44,22 +51,12 @@ properties: $ref: /schemas/types.yaml#/definitions/phandle clocks: - items: - - description: AUXCLK clock for McASP used by CPB audio - - description: Parent for CPB_McASP auxclk (for 48KHz) - - description: Parent for CPB_McASP auxclk (for 44.1KHz) - - description: SCKI clock for the pcm3168a codec on CPB - - description: Parent for CPB_SCKI clock (for 48KHz) - - description: Parent for CPB_SCKI clock (for 44.1KHz) + minItems: 4 + maxItems: 6 clock-names: - items: - - const: cpb-mcasp-auxclk - - const: cpb-mcasp-auxclk-48000 - - const: cpb-mcasp-auxclk-44100 - - const: cpb-codec-scki - - const: cpb-codec-scki-48000 - - const: cpb-codec-scki-44100 + minItems: 4 + maxItems: 6 required: - compatible @@ -71,6 +68,57 @@ required: additionalProperties: false +allOf: + - if: + properties: + compatible: + contains: + const: ti,j721e-cpb-audio + + then: + properties: + clocks: + minItems: 6 + items: + - description: AUXCLK clock for McASP used by CPB audio + - description: Parent for CPB_McASP auxclk (for 48KHz) + - description: Parent for CPB_McASP auxclk (for 44.1KHz) + - description: SCKI clock for the pcm3168a codec on CPB + - description: Parent for CPB_SCKI clock (for 48KHz) + - description: Parent for CPB_SCKI clock (for 44.1KHz) + + clock-names: + items: + - const: cpb-mcasp-auxclk + - const: cpb-mcasp-auxclk-48000 + - const: cpb-mcasp-auxclk-44100 + - const: cpb-codec-scki + - const: cpb-codec-scki-48000 + - const: cpb-codec-scki-44100 + + - if: + properties: + compatible: + contains: + const: ti,j7200-cpb-audio + + then: + properties: + clocks: + maxItems: 4 + items: + - description: AUXCLK clock for McASP used by CPB audio + - description: Parent for CPB_McASP auxclk (for 48KHz) + - description: SCKI clock for the pcm3168a codec on CPB + - description: Parent for CPB_SCKI clock (for 48KHz) + + clock-names: + items: + - const: cpb-mcasp-auxclk + - const: cpb-mcasp-auxclk-48000 + - const: cpb-codec-scki + - const: cpb-codec-scki-48000 + examples: - |+ sound { From patchwork Thu Sep 10 07:54:33 2020 Content-Type: text/plain; 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[23.128.96.18]) by mx.google.com with ESMTP id g8si3258778ejm.633.2020.09.10.00.54.56; Thu, 10 Sep 2020 00:54:56 -0700 (PDT) Received-SPF: pass (google.com: domain of devicetree-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18; Authentication-Results: mx.google.com; dkim=pass header.i=@ti.com header.s=ti-com-17Q1 header.b=IOqH2X26; spf=pass (google.com: domain of devicetree-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=NONE dis=NONE) header.from=ti.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1729622AbgIJHyz (ORCPT + 6 others); Thu, 10 Sep 2020 03:54:55 -0400 Received: from fllv0016.ext.ti.com ([198.47.19.142]:34066 "EHLO fllv0016.ext.ti.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726792AbgIJHyp (ORCPT ); Thu, 10 Sep 2020 03:54:45 -0400 Received: from lelv0266.itg.ti.com ([10.180.67.225]) by fllv0016.ext.ti.com (8.15.2/8.15.2) with ESMTP id 08A7sen9078068; Thu, 10 Sep 2020 02:54:40 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ti.com; s=ti-com-17Q1; t=1599724480; bh=xLqhM8JuqWpOLMHetzz/8/24VkctoaW/pS2UjG1I9j0=; h=From:To:CC:Subject:Date:In-Reply-To:References; b=IOqH2X26tjkpkVPLBtpXQLFa0xKbnADsV53eCehLtJlDidoAlrsbZM5oIpPkPt2Si 33/J6ruOJ/ZuSSmsUugEAly3/FZwgxc9WHel6iN0GlnEinS5HEjWsWoaloIO+iNBMl Re74c0JC1DYdpZ1Dc5Mfhe/KXYJZipznuZ0xVGxk= Received: from DFLE103.ent.ti.com (dfle103.ent.ti.com [10.64.6.24]) by lelv0266.itg.ti.com (8.15.2/8.15.2) with ESMTPS id 08A7se6s086300 (version=TLSv1.2 cipher=AES256-GCM-SHA384 bits=256 verify=FAIL); Thu, 10 Sep 2020 02:54:40 -0500 Received: from DFLE113.ent.ti.com (10.64.6.34) by DFLE103.ent.ti.com (10.64.6.24) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.1979.3; Thu, 10 Sep 2020 02:54:39 -0500 Received: from lelv0327.itg.ti.com (10.180.67.183) by DFLE113.ent.ti.com (10.64.6.34) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.1979.3 via Frontend Transport; Thu, 10 Sep 2020 02:54:39 -0500 Received: from feketebors.ti.com (ileax41-snat.itg.ti.com [10.172.224.153]) by lelv0327.itg.ti.com (8.15.2/8.15.2) with ESMTP id 08A7sXCU123142; Thu, 10 Sep 2020 02:54:38 -0500 From: Peter Ujfalusi To: , , CC: , , Subject: [PATCH 2/2] ASoC: ti: j721e-evm: Add support for j7200-cpb audio Date: Thu, 10 Sep 2020 10:54:33 +0300 Message-ID: <20200910075433.26718-3-peter.ujfalusi@ti.com> X-Mailer: git-send-email 2.28.0 In-Reply-To: <20200910075433.26718-1-peter.ujfalusi@ti.com> References: <20200910075433.26718-1-peter.ujfalusi@ti.com> MIME-Version: 1.0 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 Sender: devicetree-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org When j7200 SOM is attached to the CPB we only have parent clock for 48KHz family and the rate of the parent clock is 2359296000Hz. Signed-off-by: Peter Ujfalusi --- sound/soc/ti/j721e-evm.c | 11 +++++++++++ 1 file changed, 11 insertions(+) -- Peter Texas Instruments Finland Oy, Porkkalankatu 22, 00180 Helsinki. Y-tunnus/Business ID: 0615521-4. Kotipaikka/Domicile: Helsinki diff --git a/sound/soc/ti/j721e-evm.c b/sound/soc/ti/j721e-evm.c index cb074af47a7d..f66674fd5f64 100644 --- a/sound/soc/ti/j721e-evm.c +++ b/sound/soc/ti/j721e-evm.c @@ -525,6 +525,14 @@ static const struct j721e_audio_match_data j721e_cpb_ivi_data = { }, }; +static const struct j721e_audio_match_data j7200_cpb_data = { + .board_type = J721E_BOARD_CPB, + .num_links = 2, /* CPB pcm3168a */ + .pll_rates = { + [J721E_CLK_PARENT_48000] = 2359296000, /* PLL4 */ + }, +}; + static const struct of_device_id j721e_audio_of_match[] = { { .compatible = "ti,j721e-cpb-audio", @@ -532,6 +540,9 @@ static const struct of_device_id j721e_audio_of_match[] = { }, { .compatible = "ti,j721e-cpb-ivi-audio", .data = &j721e_cpb_ivi_data, + }, { + .compatible = "ti,j7200-cpb-audio", + .data = &j7200_cpb_data, }, { }, };