From patchwork Thu Sep 10 09:55:18 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Viresh Kumar X-Patchwork-Id: 249580 Delivered-To: patch@linaro.org Received: by 2002:a05:6e02:ecf:0:0:0:0 with SMTP id i15csp566212ilk; Thu, 10 Sep 2020 03:01:08 -0700 (PDT) X-Google-Smtp-Source: ABdhPJwz3Y/w3W4oSitSD3FK7W06L+qWPpmPVmnljTWSIYTrbkCNxtAIfPRIQwNpLAdmHgcpUbHG X-Received: by 2002:a17:906:b317:: with SMTP id n23mr7828080ejz.6.1599732068359; Thu, 10 Sep 2020 03:01:08 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1599732068; cv=none; d=google.com; s=arc-20160816; b=RU7DJxAtEDtKSbFCWkcXqY8ZtVD31Y75Q8L4+bNPMuhZiqSQh1du9FAqBBY1f9jEuP Zvu0kC3bjTbZ5EY/neRC8AUbOO3yTYW0hrtYA/kFKSuAwVTyag7BKOX3M0o7s8hnA3C8 3jkPoeP92sMEpun2pFrzzElWFOQPXTiP070VDf8BRWLBEN+89F7sg1b8XyKq9TJexYlu fzmpK+8f40MdeBInjlj0+PKQLCw3md+LYgh/dhobjGgMOk2i9Jl2yN1pP4qqe9tslOyn QhhCEsU1pW2MqDgOyOaE9macttyOuaAjRHsd8vCif44yrn2vT5lPHcrkzzbCSg6gSuNY 9iRg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:content-transfer-encoding:mime-version :message-id:date:subject:cc:to:from:dkim-signature; bh=JlPu/fma8Wv6beiC8BOJ1wqv04CLGFnXPqAwT28bt3I=; b=N9Jtc8SEWL3fp5uiH00AXDTsbQPBbpebYzom6LTTjAwGIeOrT2bfxYu21zFOLpbrZ/ jFxjPPMMT5pzG24XtBgREFUN/Mlc6uT/wJZ/SmwEHcg76U13cgd4x5qxEYrfKVIp6BqC TcHL94mtHgdIYBI9f8gm5vVx3FHTQq4dNVUHR8JWEP37rM9V9ZbWReEtAOLrz3gGXy1A IK3DO/ITuPdHTE1sn3jAhoaOpeyI7Ns35JehXX5Qkd5qpYKbjqqpL9qpxU1PrGG8X8EZ pwUKo8ZuCe4PaOqLlV+sKGl1Zg8jeL864WcjTzM/t3o7pbuYn1fD+Q16M5un34267v3/ YHug== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=z1sBxW4Y; spf=pass (google.com: domain of devicetree-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [23.128.96.18]) by mx.google.com with ESMTP id u2si3366218edy.251.2020.09.10.03.01.08; Thu, 10 Sep 2020 03:01:08 -0700 (PDT) Received-SPF: pass (google.com: domain of devicetree-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=z1sBxW4Y; spf=pass (google.com: domain of devicetree-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1730397AbgIJKBF (ORCPT + 6 others); Thu, 10 Sep 2020 06:01:05 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:41178 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1730755AbgIJJzm (ORCPT ); Thu, 10 Sep 2020 05:55:42 -0400 Received: from mail-pj1-x1041.google.com (mail-pj1-x1041.google.com [IPv6:2607:f8b0:4864:20::1041]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id C8040C06179E for ; Thu, 10 Sep 2020 02:55:40 -0700 (PDT) Received: by mail-pj1-x1041.google.com with SMTP id mm21so2763389pjb.4 for ; Thu, 10 Sep 2020 02:55:40 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:mime-version :content-transfer-encoding; bh=JlPu/fma8Wv6beiC8BOJ1wqv04CLGFnXPqAwT28bt3I=; b=z1sBxW4YmZIfGKvGOaW+5n71uktXLJCGKxaf7EZOkF/QMUsaop7A7jbUPm1eT8eZ9Q SbHkISTOMhMREIR9ItHocN9Rtur8xd+Z5fiqCODgObYKEPsCQnEOYqOTDduWw/+4Oqof jIN9ThdeaKOu1o1jBtTIVK6zzBTJJlsHs/uwt4Jn2mFbzTgdqcW4s5RqAJZK+qaL0NYP YVaWi9cvts4IkHJ7FX5LZ8/HaR7zw59DrhKwrSaRSLCHniHafoFe1VUIU8V4kIoOyNug jQzy7Ce4c+Q1F1wu1R4G4P/RMRd88bDqUmqLWMoYee9P4c2ykJTF1QbgE5ssKYVtziUI OHXg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:mime-version :content-transfer-encoding; bh=JlPu/fma8Wv6beiC8BOJ1wqv04CLGFnXPqAwT28bt3I=; b=VRCZU26iv43UYLGDZuLxjLknEr+ONGO4gzWmRkPhXVs3LrU0dJ6qrd+O2ahYX8IBpZ LsWNWhOXuLwHYMYaso364Drhx+LKDiWnJOiU3MbIZ8UKej8rv5TWivBVbvu0uj3T7/CN RREIKM7P51dYCrm+F7wbjUoCF8sE2YezaDV5PCaBST4i1We6xRwmlbyMMU1iHI/vsYi9 wpFZUW1OAU0f1bf3NjOdkNb5yFoJqSRSPdq01Lk5iPgo0IbNUwanIGDRw/APbFuvXVLT xOlv2dYUySsYVar4NnIWte3O2MZJtkx/dLDkAom4+gPFF928KAfWNPNDmAv2AfPDkmk1 yNuA== X-Gm-Message-State: AOAM531D7qx9bVMeKdnmlS0+Lo0OOYti6b1lgSRSgTrSkvxapigUFCIr Y6AxVPKh5q9M07IoRTfYWVl+WA== X-Received: by 2002:a17:902:bb84:: with SMTP id m4mr4626014pls.90.1599731738712; Thu, 10 Sep 2020 02:55:38 -0700 (PDT) Received: from localhost ([122.181.54.133]) by smtp.gmail.com with ESMTPSA id l123sm4443187pgl.24.2020.09.10.02.55.37 (version=TLS1_2 cipher=ECDHE-ECDSA-AES128-GCM-SHA256 bits=128/128); Thu, 10 Sep 2020 02:55:38 -0700 (PDT) From: Viresh Kumar To: Rob Herring , Jassi Brar , Jassi Brar Cc: Viresh Kumar , Vincent Guittot , Arnd Bergmann , Frank Rowand , Bjorn Andersson , linux-arm-kernel@lists.infradead.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH V3 1/2] dt-bindings: mailbox : arm, mhu: Convert to Json-schema Date: Thu, 10 Sep 2020 15:25:18 +0530 Message-Id: <7f50b23d157a97242c79bd8f2ab649a9272b9b59.1599731645.git.viresh.kumar@linaro.org> X-Mailer: git-send-email 2.25.0.rc1.19.g042ed3e048af MIME-Version: 1.0 Sender: devicetree-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Convert the DT binding over to Json-schema. Signed-off-by: Viresh Kumar --- V3: New patch. .../devicetree/bindings/mailbox/arm,mhu.yaml | 86 +++++++++++++++++++ .../devicetree/bindings/mailbox/arm-mhu.txt | 43 ---------- 2 files changed, 86 insertions(+), 43 deletions(-) create mode 100644 Documentation/devicetree/bindings/mailbox/arm,mhu.yaml delete mode 100644 Documentation/devicetree/bindings/mailbox/arm-mhu.txt -- 2.25.0.rc1.19.g042ed3e048af diff --git a/Documentation/devicetree/bindings/mailbox/arm,mhu.yaml b/Documentation/devicetree/bindings/mailbox/arm,mhu.yaml new file mode 100644 index 000000000000..4e840cedb2e4 --- /dev/null +++ b/Documentation/devicetree/bindings/mailbox/arm,mhu.yaml @@ -0,0 +1,86 @@ +# SPDX-License-Identifier: GPL-2.0 +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/mailbox/arm,mhu.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: ARM MHU Mailbox Controller + +maintainers: + - Jassi Brar + +description: | + The ARM's Message-Handling-Unit (MHU) is a mailbox controller that has 3 + independent channels/links to communicate with remote processor(s). MHU links + are hardwired on a platform. A link raises interrupt for any received data. + However, there is no specified way of knowing if the sent data has been read + by the remote. This driver assumes the sender polls STAT register and the + remote clears it after having read the data. The last channel is specified to + be a 'Secure' resource, hence can't be used by Linux running NS. + +# We need a select here so we don't match all nodes with 'arm,primecell' +select: + properties: + compatible: + contains: + const: arm,mhu + required: + - compatible + +properties: + compatible: + items: + - const: arm,mhu + - const: arm,primecell + + reg: + maxItems: 1 + + interrupts: + description: | + Interrupt information corresponding to each of the 3 links of MHU, + low-priority non-secure, high-priority non-secure, and secure. + maxItems: 3 + + clocks: + maxItems: 1 + + clock-names: + items: + - const: apb_pclk + + '#mbox-cells': + description: Index of the channel. + const: 1 + +required: + - compatible + - reg + - interrupts + - '#mbox-cells' + +additionalProperties: false + +examples: + - | + soc { + #address-cells = <2>; + #size-cells = <2>; + + mhuA: mailbox@2b1f0000 { + #mbox-cells = <1>; + compatible = "arm,mhu", "arm,primecell"; + reg = <0 0x2b1f0000 0 0x1000>; + interrupts = <0 36 4>, /* LP-NonSecure */ + <0 35 4>, /* HP-NonSecure */ + <0 37 4>; /* Secure */ + clocks = <&clock 0 2 1>; + clock-names = "apb_pclk"; + }; + + mhu_client_scb: scb@2e000000 { + compatible = "fujitsu,mb86s70-scb-1.0"; + reg = <0 0x2e000000 0 0x4000>; + mboxes = <&mhuA 1>; /* HP-NonSecure */ + }; + }; diff --git a/Documentation/devicetree/bindings/mailbox/arm-mhu.txt b/Documentation/devicetree/bindings/mailbox/arm-mhu.txt deleted file mode 100644 index 4971f03f0b33..000000000000 --- a/Documentation/devicetree/bindings/mailbox/arm-mhu.txt +++ /dev/null @@ -1,43 +0,0 @@ -ARM MHU Mailbox Driver -====================== - -The ARM's Message-Handling-Unit (MHU) is a mailbox controller that has -3 independent channels/links to communicate with remote processor(s). - MHU links are hardwired on a platform. A link raises interrupt for any -received data. However, there is no specified way of knowing if the sent -data has been read by the remote. This driver assumes the sender polls -STAT register and the remote clears it after having read the data. -The last channel is specified to be a 'Secure' resource, hence can't be -used by Linux running NS. - -Mailbox Device Node: -==================== - -Required properties: --------------------- -- compatible: Shall be "arm,mhu" & "arm,primecell" -- reg: Contains the mailbox register address range (base - address and length) -- #mbox-cells Shall be 1 - the index of the channel needed. -- interrupts: Contains the interrupt information corresponding to - each of the 3 links of MHU. - -Example: --------- - - mhu: mailbox@2b1f0000 { - #mbox-cells = <1>; - compatible = "arm,mhu", "arm,primecell"; - reg = <0 0x2b1f0000 0x1000>; - interrupts = <0 36 4>, /* LP-NonSecure */ - <0 35 4>, /* HP-NonSecure */ - <0 37 4>; /* Secure */ - clocks = <&clock 0 2 1>; - clock-names = "apb_pclk"; - }; - - mhu_client: scb@2e000000 { - compatible = "fujitsu,mb86s70-scb-1.0"; - reg = <0 0x2e000000 0x4000>; - mboxes = <&mhu 1>; /* HP-NonSecure */ - }; From patchwork Thu Sep 10 09:55:19 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Viresh Kumar X-Patchwork-Id: 249579 Delivered-To: patch@linaro.org Received: by 2002:a05:6e02:ecf:0:0:0:0 with SMTP id i15csp566177ilk; Thu, 10 Sep 2020 03:01:06 -0700 (PDT) X-Google-Smtp-Source: ABdhPJzqlYDFvoi67d1NhcKxhT9b7azQETuANVBk+S+TbKu9L0COv4VGlpKtswM7S/NeBh9SCEyF X-Received: by 2002:a50:8c66:: with SMTP id p93mr8629257edp.156.1599732066737; Thu, 10 Sep 2020 03:01:06 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1599732066; cv=none; d=google.com; s=arc-20160816; b=lFhISOeLabPJzg/iAzFVk9BLnVogbrZQN+fyMDGjwlDIy4nu7oJQwQTiQ8a+5RrQz0 kXlWlIk//DJiNy5P+yNVKfepvi1SF8GqGViAbOmm1G9w9S5L/JtZEn9nOJExGe5d7/zI V2AuhgqzGmsA3OMgi6VeMjoWcr4kK4PTCurGucGrJNhVpU4szF9p8Rr+H8p414bKL6EP m3LgqBawPtIabxueY87ZrN1YW0aHPFaUl8DkoieaBBImNGBM0PSPjjb8Xv3RcDOsMPRy BrK0oJCyYpqmspAwJFNuLEaGkEXXjJhubHlZNAGk2ppyIMlWA3PogsUYhau0TR11W/AJ owjA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=IaGTFnDJBMBefRV/KyfCTUkPl/xUCziFjmJJ4w4CjXw=; b=nLCsi7P3qrR3h/Wj4TQIX5zENmrMzpIuK1cyTSQjv9pVbA4bzaaTuUVbMbNLRq74Ag TVscRXQjPQtMi0vP16SAfBteFGWWY77Eefws+lqqr6ZrHDQCSo9XGBlw5SPzOThkhLTV eG1ni542U3hMrvgwdHxW0wV1bcZqc/3hFm5aZrV0Ugh1eKngqjG1K1++jlt4zDOQcVbZ aLQe3aYSMuiI429zv1dWzUwAkppbh8NgiK7221yy3P8v8QHiv8dg8uU4BX2oh4ejA61i kCRSGPpCa976GwcIlx3mnTvkrYBhFzozMDdee6nEJzQprQ4fopwo2/OcTriEldLh9hDP mtBQ== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=Edlxp9JS; spf=pass (google.com: domain of devicetree-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [23.128.96.18]) by mx.google.com with ESMTP id u2si3366218edy.251.2020.09.10.03.01.06; Thu, 10 Sep 2020 03:01:06 -0700 (PDT) Received-SPF: pass (google.com: domain of devicetree-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=Edlxp9JS; spf=pass (google.com: domain of devicetree-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1730400AbgIJKBE (ORCPT + 6 others); Thu, 10 Sep 2020 06:01:04 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:41174 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1730500AbgIJJzr (ORCPT ); Thu, 10 Sep 2020 05:55:47 -0400 Received: from mail-pl1-x629.google.com (mail-pl1-x629.google.com [IPv6:2607:f8b0:4864:20::629]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 2B851C061573 for ; Thu, 10 Sep 2020 02:55:47 -0700 (PDT) Received: by mail-pl1-x629.google.com with SMTP id u9so660750plk.4 for ; Thu, 10 Sep 2020 02:55:47 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=IaGTFnDJBMBefRV/KyfCTUkPl/xUCziFjmJJ4w4CjXw=; b=Edlxp9JSKyIwQ3d/65GRMff66HrC1LW3hK1xF7+fYi4S6Ae7V+W1mIakpvOTcZon4U uKl4ve/gMbyjqYC5YhLJXnXlJlPCtCu7YZDE0yKdmiBUnG/ZlxdUXJkg596ZDVjZwwhe bh1seKT7/YWFj3gVY1RAzKdf1BvZPtlp5fuylziTmuSW7fJ0uqXqO0Hl9rYrYZhzt6vK lAnwIFGqCsHGlHUHQSWZ++lQAX0n7wKlwA5octgAgeiMFwjkAnfwvmLXDjpsLbFj6YQb BHICuApDFIBstBzxunt/ssewC+a8+qyGh0mam78c+TCYgHB+iRq57dCkJAQL2qOzYCLR FlzQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=IaGTFnDJBMBefRV/KyfCTUkPl/xUCziFjmJJ4w4CjXw=; b=akjdyJ0NPyvjDbO5CBaePzNl43l5nQ4Uvme7PtsPLBLywpAzkK6sNpgimb+18yPDL1 edT+GOpznokMiPlJNRQlzGzqDg6YW8sR4HgNKiWUFphr7/5Sl02K1l6r2c7KnbExWiBi 1TIQCn+e5dB5ae3x+PAHFUDhAW28LdMkJNWNZiL8N5pIBqDfdKMty2stSe7u3fQ1nBgR ajIvmWG/gfhcd70SqtaXjvdGUGjvynW0JbQicn9pJFnZ/66T011s/KoF4I+OlJX827t6 RQcgyiW9JN3dLs9bHvkx7tAjFeNsAIoDxCeTSsqElUkzWy2eKdDnpNQjopoWeEfparTj u7vg== X-Gm-Message-State: AOAM530QnGRQ9+Hf75I7yUrNLJ9QL3OA7fWZPvCGM68S8eaIr8La8hk4 Fczgd75l7QCTX8iQkrUxh7XhoQ== X-Received: by 2002:a17:90b:3105:: with SMTP id gc5mr4616714pjb.225.1599731746660; Thu, 10 Sep 2020 02:55:46 -0700 (PDT) Received: from localhost ([122.181.54.133]) by smtp.gmail.com with ESMTPSA id s3sm5385018pfe.116.2020.09.10.02.55.45 (version=TLS1_2 cipher=ECDHE-ECDSA-AES128-GCM-SHA256 bits=128/128); Thu, 10 Sep 2020 02:55:46 -0700 (PDT) From: Viresh Kumar To: Rob Herring , Jassi Brar , Jassi Brar Cc: Viresh Kumar , Vincent Guittot , Arnd Bergmann , Frank Rowand , Bjorn Andersson , linux-arm-kernel@lists.infradead.org, Sudeep Holla , devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH V3 2/2] dt-bindings: mailbox: add doorbell support to ARM MHU Date: Thu, 10 Sep 2020 15:25:19 +0530 Message-Id: <5d448f579a41345130ae25d01bb94a6e293a6460.1599731645.git.viresh.kumar@linaro.org> X-Mailer: git-send-email 2.25.0.rc1.19.g042ed3e048af In-Reply-To: <7f50b23d157a97242c79bd8f2ab649a9272b9b59.1599731645.git.viresh.kumar@linaro.org> References: <7f50b23d157a97242c79bd8f2ab649a9272b9b59.1599731645.git.viresh.kumar@linaro.org> MIME-Version: 1.0 Sender: devicetree-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org From: Sudeep Holla The ARM MHU's reference manual states following: "The MHU drives the signal using a 32-bit register, with all 32 bits logically ORed together. The MHU provides a set of registers to enable software to set, clear, and check the status of each of the bits of this register independently. The use of 32 bits for each interrupt line enables software to provide more information about the source of the interrupt. For example, each bit of the register can be associated with a type of event that can contribute to raising the interrupt." This patch thus extends the MHU controller's DT binding to add support for doorbell mode. Though the same MHU hardware controller is used in the two modes, A new compatible string is added here to represent the combination of the MHU hardware and the firmware sitting on the other side (which expects each bit to represent a different signal now). Signed-off-by: Sudeep Holla Co-developed-by: Viresh Kumar Signed-off-by: Viresh Kumar --- V3: Update the json schema and fix number of interrupt lines. .../devicetree/bindings/mailbox/arm,mhu.yaml | 60 +++++++++++++++++-- 1 file changed, 54 insertions(+), 6 deletions(-) -- 2.25.0.rc1.19.g042ed3e048af Reviewed-by: Rob Herring diff --git a/Documentation/devicetree/bindings/mailbox/arm,mhu.yaml b/Documentation/devicetree/bindings/mailbox/arm,mhu.yaml index 4e840cedb2e4..88980ba005a4 100644 --- a/Documentation/devicetree/bindings/mailbox/arm,mhu.yaml +++ b/Documentation/devicetree/bindings/mailbox/arm,mhu.yaml @@ -18,20 +18,40 @@ description: | remote clears it after having read the data. The last channel is specified to be a 'Secure' resource, hence can't be used by Linux running NS. + The MHU hardware also allows operations in doorbell mode. The MHU drives the + interrupt signal using a 32-bit register, with all 32-bits logically ORed + together. It provides a set of registers to enable software to set, clear and + check the status of each of the bits of this register independently. The use + of 32 bits per interrupt line enables software to provide more information + about the source of the interrupt. For example, each bit of the register can + be associated with a type of event that can contribute to raising the + interrupt. Each of the 32-bits can be used as "doorbell" to alert the remote + processor. + # We need a select here so we don't match all nodes with 'arm,primecell' select: properties: compatible: contains: - const: arm,mhu + enum: + - arm,mhu + - arm,mhu-doorbell required: - compatible properties: compatible: - items: - - const: arm,mhu - - const: arm,primecell + oneOf: + - description: Data transfer mode + items: + - const: arm,mhu + - const: arm,primecell + + - description: Doorbell mode + items: + - const: arm,mhu-doorbell + - const: arm,primecell + reg: maxItems: 1 @@ -50,8 +70,11 @@ description: | - const: apb_pclk '#mbox-cells': - description: Index of the channel. - const: 1 + description: | + Set to 1 in data transfer mode and represents index of the channel. + Set to 2 in doorbell mode and represents index of the channel and doorbell + number. + enum: [ 1, 2 ] required: - compatible @@ -62,6 +85,7 @@ description: | additionalProperties: false examples: + # Data transfer mode. - | soc { #address-cells = <2>; @@ -84,3 +108,27 @@ additionalProperties: false mboxes = <&mhuA 1>; /* HP-NonSecure */ }; }; + + # Doorbell mode. + - | + soc { + #address-cells = <2>; + #size-cells = <2>; + + mhuB: mailbox@2b2f0000 { + #mbox-cells = <2>; + compatible = "arm,mhu-doorbell", "arm,primecell"; + reg = <0 0x2b2f0000 0 0x1000>; + interrupts = <0 36 4>, /* LP-NonSecure */ + <0 35 4>, /* HP-NonSecure */ + <0 37 4>; /* Secure */ + clocks = <&clock 0 2 1>; + clock-names = "apb_pclk"; + }; + + mhu_client_scpi: scpi@2f000000 { + compatible = "arm,scpi"; + reg = <0 0x2f000000 0 0x200>; + mboxes = <&mhuB 1 4>; /* HP-NonSecure, 5th doorbell */ + }; + };