From patchwork Wed Feb 15 10:55:08 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Baoyou Xie X-Patchwork-Id: 93986 Delivered-To: patch@linaro.org Received: by 10.140.20.99 with SMTP id 90csp1966551qgi; Wed, 15 Feb 2017 02:55:58 -0800 (PST) X-Received: by 10.99.178.89 with SMTP id t25mr37270441pgo.183.1487156158369; Wed, 15 Feb 2017 02:55:58 -0800 (PST) Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id k186si3406101pgd.113.2017.02.15.02.55.58; Wed, 15 Feb 2017 02:55:58 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of devicetree-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=neutral (body hash did not verify) header.i=@linaro.org; spf=pass (google.com: best guess record for domain of devicetree-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751687AbdBOKz5 (ORCPT + 7 others); Wed, 15 Feb 2017 05:55:57 -0500 Received: from mail-pf0-f175.google.com ([209.85.192.175]:34354 "EHLO mail-pf0-f175.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751452AbdBOKz4 (ORCPT ); Wed, 15 Feb 2017 05:55:56 -0500 Received: by mail-pf0-f175.google.com with SMTP id e4so30890584pfg.1 for ; Wed, 15 Feb 2017 02:55:56 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id; bh=4bd0Qv0Zu3db8pr04peKN6F8u5bt3uOwGKgbD0KR3Ug=; b=Exw1UiMHtg2zYb9TOwNYCOTRDK3bb9Vv9tclVv4IArowdIB/WEX7M9E32iRHvUY9fC 8aKeuZP78qLBCLTtQ/5gr6FGLu9yMVUX8sNfr5mGd84rG9yUzsYnWdeAvZafj/I6ENtm En4EixLN2dEEEtUv2Ge1YwFtB8GgvO+6iwjL8= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id; bh=4bd0Qv0Zu3db8pr04peKN6F8u5bt3uOwGKgbD0KR3Ug=; b=CvG0Oc104Q9aODzGhWdfeLjZtt1rywo81hb5VdEAnMpnt0ApXVlP/FjJZvOyx2qUFc K22vIxJB9NH3XIYyO17zMH2y41UoDWoPohkvdUqXMicpC1plG8OywFABRl5C1hyTLyb9 lc8Mn6FQVeHWNnSUvAYkK1ryKdjwtzzwvfoveCfNx5tzcz14UPlUvC0Y+J5KfDPIX6kB cNdjGoFw4E6cQrAHrHZOwjYT3g4+0eYkcjNmhb/K77BkLC4DDV8kMiTV8Y+/1MB0UgAr rNoKCtHpIHKa2Ycz2lNzfiT67DBDHo0+qogRusRAiUsgA0IQiT7fxtOzS5HjZHXgRElv QMag== X-Gm-Message-State: AMke39lULbJK+ZNwtfjfuOZPV3y/zKi1icOP12LzixLgUklsIKv+eh13rjjQ77C6PRezqZ7J X-Received: by 10.84.168.131 with SMTP id f3mr42855748plb.163.1487156155715; Wed, 15 Feb 2017 02:55:55 -0800 (PST) Received: from localhost.localdomain ([45.56.152.11]) by smtp.gmail.com with ESMTPSA id f65sm6814031pfk.5.2017.02.15.02.55.31 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Wed, 15 Feb 2017 02:55:55 -0800 (PST) From: Baoyou Xie To: jun.nie@linaro.org, lgirdwood@gmail.com, broonie@kernel.org, robh+dt@kernel.org, mark.rutland@arm.com, perex@perex.cz, tiwai@suse.com, lars@metafoo.de, arnd@arndb.de, kuninori.morimoto.gx@renesas.com, ckeepax@opensource.wolfsonmicro.com, bardliao@realtek.com, nh6z@nh6z.net, Paul.Handrigan@cirrus.com, oder_chiou@realtek.com, axel.lin@ingics.com, petr@barix.com, yesanishhere@gmail.com, srinivas.kandagatla@linaro.org Cc: linux-arm-kernel@lists.infradead.org, alsa-devel@alsa-project.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, shawnguo@kernel.org, baoyou.xie@linaro.org, xie.baoyou@zte.com.cn, chen.chaokai@zte.com.cn, wang.qiang01@zte.com.cn Subject: [PATCH v1 1/3] ASoC: zx-96p22: add documentation for zte's aud96p22 controller Date: Wed, 15 Feb 2017 18:55:08 +0800 Message-Id: <1487156110-12840-1-git-send-email-baoyou.xie@linaro.org> X-Mailer: git-send-email 2.7.4 Sender: devicetree-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org This patch adds dt-binding documentation for zte's aud96p22 controller. Signed-off-by: Baoyou Xie --- .../devicetree/bindings/sound/zte,zx-96p22.txt | 24 ++++++++++++++++++++++ 1 file changed, 24 insertions(+) create mode 100644 Documentation/devicetree/bindings/sound/zte,zx-96p22.txt -- 2.7.4 -- To unsubscribe from this list: send the line "unsubscribe devicetree" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html diff --git a/Documentation/devicetree/bindings/sound/zte,zx-96p22.txt b/Documentation/devicetree/bindings/sound/zte,zx-96p22.txt new file mode 100644 index 0000000..4184566 --- /dev/null +++ b/Documentation/devicetree/bindings/sound/zte,zx-96p22.txt @@ -0,0 +1,24 @@ +ZTE zx96p22 controller + +Required properties: + - compatible : Must be "zte,zx-aud96p22" + - #sound-dai-cells: Should be 0 + - reg : Offset of I2C register for zx96p22 + +Example: + + audio_i2c0: audio_i2c0@1486000 { + compatible = "zte,zx296718-i2c"; + reg = <0x01486000 0x1000>; + interrupts = ; + #address-cells = <1>; + #size-cells = <0>; + clocks = <&audiocrm AUDIO_I2C0_WCLK>; + clock-frequency = <1600000>; + status = "ok"; + inner_codec: aud96p22@22 { + compatible = "zte,zx-aud96p22"; + #sound-dai-cells = <0>; + reg = <0x22>; + }; + }; From patchwork Wed Feb 15 10:55:09 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Baoyou Xie X-Patchwork-Id: 93987 Delivered-To: patch@linaro.org Received: by 10.140.20.99 with SMTP id 90csp1966659qgi; Wed, 15 Feb 2017 02:56:19 -0800 (PST) X-Received: by 10.84.137.165 with SMTP id 34mr43202585pln.24.1487156179482; Wed, 15 Feb 2017 02:56:19 -0800 (PST) Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id k191si3409246pgc.159.2017.02.15.02.56.19; Wed, 15 Feb 2017 02:56:19 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of devicetree-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=neutral (body hash did not verify) header.i=@linaro.org; spf=pass (google.com: best guess record for domain of devicetree-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751818AbdBOK4N (ORCPT + 7 others); Wed, 15 Feb 2017 05:56:13 -0500 Received: from mail-pg0-f53.google.com ([74.125.83.53]:33033 "EHLO mail-pg0-f53.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751643AbdBOK4M (ORCPT ); Wed, 15 Feb 2017 05:56:12 -0500 Received: by mail-pg0-f53.google.com with SMTP id 204so36254899pge.0 for ; Wed, 15 Feb 2017 02:56:12 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=EZCgFepV3f6SNepMMPQKwFGOVl2Depp/MGuJD36Ek6U=; b=akJOvIUJuYmuiG1eeMibxTxrjTAQ1U/+sT6HAYC3N5hhh1f7bKTiO9uYWX99RMg94V FcHHkfLVuEx1Rn5q/KUPwNFZX4uROqTkk8mCCgUXIyofGfRpBKm6jTBHscXAA3ESnNBg WDsi7Oknzbn3Z2s+FlTWfzDw+YbtzdVWfYE14= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=EZCgFepV3f6SNepMMPQKwFGOVl2Depp/MGuJD36Ek6U=; b=S1prKkHnbgf/OCzKKzS8uQeD/k0UXPFFB843oTEczRjMQyvIPvZ3FmDzM7mr182yOc VM3v1F/nQMhonZhfVryW3n6S+ToaxPu0zIMN0to6UWBa62agHeDnmNiRJiLR9mi+9bvg fZcZAL4i7UypgzcVy7IozJPRgYHQpqrazS2rhB7LJBy150Uv8+Jo8rTMqBX9CgHGklvR RTgHXx5pU4epEL295BaNXZkXhc9sXizGfrcc1yTDjtolHf2Cz5GFgEeNVYfbdGC6vizj mjHPlARpi5LmVohJ68WL+8TXq1L5gpyG0tu5PxRnyUbnPnfWosx9QsPEvAVGp8r7QOrI VWxg== X-Gm-Message-State: AMke39mveqggQTdpcfr+q3IX5ngOYW8HGvyrVAkDgHxhp6JIdnj7lTxkOnXXMnInuUCH/M/f X-Received: by 10.84.136.34 with SMTP id 31mr42397092plk.52.1487156171636; Wed, 15 Feb 2017 02:56:11 -0800 (PST) Received: from localhost.localdomain ([45.56.152.11]) by smtp.gmail.com with ESMTPSA id f65sm6814031pfk.5.2017.02.15.02.55.56 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Wed, 15 Feb 2017 02:56:11 -0800 (PST) From: Baoyou Xie To: jun.nie@linaro.org, lgirdwood@gmail.com, broonie@kernel.org, robh+dt@kernel.org, mark.rutland@arm.com, perex@perex.cz, tiwai@suse.com, lars@metafoo.de, arnd@arndb.de, kuninori.morimoto.gx@renesas.com, ckeepax@opensource.wolfsonmicro.com, bardliao@realtek.com, nh6z@nh6z.net, Paul.Handrigan@cirrus.com, oder_chiou@realtek.com, axel.lin@ingics.com, petr@barix.com, yesanishhere@gmail.com, srinivas.kandagatla@linaro.org Cc: linux-arm-kernel@lists.infradead.org, alsa-devel@alsa-project.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, shawnguo@kernel.org, baoyou.xie@linaro.org, xie.baoyou@zte.com.cn, chen.chaokai@zte.com.cn, wang.qiang01@zte.com.cn Subject: [PATCH v1 2/3] MAINTAINERS: add zte 96p22 controller driver to ARM ZTE architecture Date: Wed, 15 Feb 2017 18:55:09 +0800 Message-Id: <1487156110-12840-2-git-send-email-baoyou.xie@linaro.org> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1487156110-12840-1-git-send-email-baoyou.xie@linaro.org> References: <1487156110-12840-1-git-send-email-baoyou.xie@linaro.org> Sender: devicetree-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Add the zte 96p22 controller driver as maintained by ARM ZTE architecture maintainers, as they're parts of the core IP. Signed-off-by: Baoyou Xie --- MAINTAINERS | 2 ++ 1 file changed, 2 insertions(+) -- 2.7.4 -- To unsubscribe from this list: send the line "unsubscribe devicetree" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html diff --git a/MAINTAINERS b/MAINTAINERS index e63063b..8146377 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -1991,7 +1991,9 @@ F: drivers/soc/zte/ F: Documentation/devicetree/bindings/arm/zte.txt F: Documentation/devicetree/bindings/clock/zx296702-clk.txt F: Documentation/devicetree/bindings/soc/zte/ +F: Documentation/devicetree/bindings/sound/zte,zx-96p22.txt F: include/dt-bindings/soc/zx*.h +F: sound/soc/codecs/zx_aud96p22.c ARM/ZYNQ ARCHITECTURE M: Michal Simek From patchwork Wed Feb 15 10:55:10 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Baoyou Xie X-Patchwork-Id: 93988 Delivered-To: patch@linaro.org Received: by 10.140.20.99 with SMTP id 90csp1966876qgi; Wed, 15 Feb 2017 02:56:55 -0800 (PST) X-Received: by 10.99.99.5 with SMTP id x5mr37887160pgb.225.1487156215908; Wed, 15 Feb 2017 02:56:55 -0800 (PST) Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id x1si3419816pfi.115.2017.02.15.02.56.55; Wed, 15 Feb 2017 02:56:55 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of devicetree-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=neutral (body hash did not verify) header.i=@linaro.org; spf=pass (google.com: best guess record for domain of devicetree-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751599AbdBOK4y (ORCPT + 7 others); Wed, 15 Feb 2017 05:56:54 -0500 Received: from mail-pf0-f170.google.com ([209.85.192.170]:33785 "EHLO mail-pf0-f170.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751525AbdBOK4x (ORCPT ); Wed, 15 Feb 2017 05:56:53 -0500 Received: by mail-pf0-f170.google.com with SMTP id c73so27555836pfb.0 for ; Wed, 15 Feb 2017 02:56:53 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=jtF5crYtW4ulX2wQu6LHVZPRdK1uPu9x2Z9p2RBt9hw=; b=i/fJvCvU5kQwQTz7Aj06XlEUjLNzWmfMJdjTNzr4yLcaZR5HnSJg/qsZDOcUCOM3+8 VtCbbpv2fcwXB2NmekH7S9yXCQ3mnrMVHr4Ys7XF60DqmN76Qmb+ouUgxh+QR2nPFjiq tzdzvMpwB8i6B/6BaMYjMsHbYndYoalPkPp1M= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=jtF5crYtW4ulX2wQu6LHVZPRdK1uPu9x2Z9p2RBt9hw=; b=JlIHPtJsJdm76ZsHjdMAvh3fPa9EaIO95KsAOyaRm6h6uwZUIkXheIygmIOhoO1gsV B8yBF59ejBCT2rs5aNCHWw6S9gFgorTmWjp3YDYZx+UnRLgiOLG1IAtSIU4ki7TVi0At MZ9SdocLvmsnNY9dSx0wahL9TglWdC/KpI5CSOxodOG+PTC0Vzrqh0nrdGQPKJUtm7df Z6nPsGRNsRw5bjVtH9fCKf2Doxtg1PnMEBdEPeMQ8BQsFNo5ZNH62QGp0iJzo+l6KUob YYMEOkjfD1NX0JllFlbFw1Qe5NjUrNZXvyANSttkpQA++hEp7OGHZt9VL/ff3If5bTow 3d2w== X-Gm-Message-State: AMke39kccM/bN3mecsKfwBwFdP/qiJqpAK2gWwpMEDfKBJ0PJoyxOJONrt+MoIqY9xy02yDd X-Received: by 10.98.92.4 with SMTP id q4mr36441682pfb.151.1487156212706; Wed, 15 Feb 2017 02:56:52 -0800 (PST) Received: from localhost.localdomain ([45.56.152.11]) by smtp.gmail.com with ESMTPSA id f65sm6814031pfk.5.2017.02.15.02.56.11 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Wed, 15 Feb 2017 02:56:52 -0800 (PST) From: Baoyou Xie To: jun.nie@linaro.org, lgirdwood@gmail.com, broonie@kernel.org, robh+dt@kernel.org, mark.rutland@arm.com, perex@perex.cz, tiwai@suse.com, lars@metafoo.de, arnd@arndb.de, kuninori.morimoto.gx@renesas.com, ckeepax@opensource.wolfsonmicro.com, bardliao@realtek.com, nh6z@nh6z.net, Paul.Handrigan@cirrus.com, oder_chiou@realtek.com, axel.lin@ingics.com, petr@barix.com, yesanishhere@gmail.com, srinivas.kandagatla@linaro.org Cc: linux-arm-kernel@lists.infradead.org, alsa-devel@alsa-project.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, shawnguo@kernel.org, baoyou.xie@linaro.org, xie.baoyou@zte.com.cn, chen.chaokai@zte.com.cn, wang.qiang01@zte.com.cn Subject: [PATCH v1 3/3] ASoC: zx-96p22: add zte's aud96p22 controller driver Date: Wed, 15 Feb 2017 18:55:10 +0800 Message-Id: <1487156110-12840-3-git-send-email-baoyou.xie@linaro.org> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1487156110-12840-1-git-send-email-baoyou.xie@linaro.org> References: <1487156110-12840-1-git-send-email-baoyou.xie@linaro.org> Sender: devicetree-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org This patch adds aud96p22 controller driver for zte's SoC family. Signed-off-by: Baoyou Xie --- sound/soc/codecs/Kconfig | 4 + sound/soc/codecs/Makefile | 2 + sound/soc/codecs/zx_aud96p22.c | 588 +++++++++++++++++++++++++++++++++++++++++ 3 files changed, 594 insertions(+) create mode 100644 sound/soc/codecs/zx_aud96p22.c -- 2.7.4 -- To unsubscribe from this list: send the line "unsubscribe devicetree" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html diff --git a/sound/soc/codecs/Kconfig b/sound/soc/codecs/Kconfig index cfc108e..120af32 100644 --- a/sound/soc/codecs/Kconfig +++ b/sound/soc/codecs/Kconfig @@ -1116,4 +1116,8 @@ config SND_SOC_TPA6130A2 tristate "Texas Instruments TPA6130A2 headphone amplifier" depends on I2C +config SND_SOC_ZX96P22 + tristate "ZTE Inner AUD96P22 CODEC" + depends on I2C + endmenu diff --git a/sound/soc/codecs/Makefile b/sound/soc/codecs/Makefile index 2624c73..dbc3818 100644 --- a/sound/soc/codecs/Makefile +++ b/sound/soc/codecs/Makefile @@ -219,6 +219,7 @@ snd-soc-wm9705-objs := wm9705.o snd-soc-wm9712-objs := wm9712.o snd-soc-wm9713-objs := wm9713.o snd-soc-wm-hubs-objs := wm_hubs.o +snd-soc-zx96p22-objs := zx_aud96p22.o # Amp snd-soc-max9877-objs := max9877.o snd-soc-max98504-objs := max98504.o @@ -444,6 +445,7 @@ obj-$(CONFIG_SND_SOC_WM9712) += snd-soc-wm9712.o obj-$(CONFIG_SND_SOC_WM9713) += snd-soc-wm9713.o obj-$(CONFIG_SND_SOC_WM_ADSP) += snd-soc-wm-adsp.o obj-$(CONFIG_SND_SOC_WM_HUBS) += snd-soc-wm-hubs.o +obj-$(CONFIG_SND_SOC_ZX96P22) += snd-soc-zx96p22.o # Amp obj-$(CONFIG_SND_SOC_MAX9877) += snd-soc-max9877.o diff --git a/sound/soc/codecs/zx_aud96p22.c b/sound/soc/codecs/zx_aud96p22.c new file mode 100644 index 0000000..f2979df --- /dev/null +++ b/sound/soc/codecs/zx_aud96p22.c @@ -0,0 +1,588 @@ +/* + * ZTE's audio 96p22 driver + * + * Copyright (C) 2017 ZTE Ltd + * + * Author: Baoyou Xie + * + * License terms: GNU General Public License (GPL) version 2 + */ + +#include +#include +#include +#include +#include +#include + +#define BGPIO64 (64) +#define snd_kcontrol_dev(kcontrol) \ + ((struct device *)((kcontrol)->private_value)) + +struct i2c_reg { + unsigned char addr; + unsigned char high_data; + unsigned char low_data; +}; + +struct zx_aud96p22_info { + struct device *dev; + int gpio; + bool capture; +}; + +static struct i2c_reg i2c_dac_master_volume_table[] = { + { 0x34, 0xe7, 0xe7 }, +}; + +static struct i2c_reg i2c_adc_master_volume_table[] = { + { 0x24, 0xbf, 0xbf }, +}; + +static struct i2c_reg i2c_dac_headset_volume_table[] = { + { 0x38, 0x0d, 0x0d }, +}; + +static struct i2c_reg i2c_dac_sleep_table[] = { + { 0x18, 0x00, 0x00 }, //play power down +}; + +static struct i2c_reg i2c_dac_wakeup_table[] = { + { 0x18, 0x00, 0xff }, //play power up +}; + +static struct i2c_reg i2c_adc_sleep_table[] = { + { 0x16, 0x00, 0x00 }, //record power down +}; + +static struct i2c_reg i2c_adc_wakeup_table[] = { + { 0x16, 0x00, 0x0f }, //record power up +}; + +static struct i2c_reg i2c_codec_start_table[] = { + { 0x15, 0x00, 0x00 }, //power down control + { 0x47, 0x00, 0x00 }, //record path slect + { 0x24, 0xbf, 0xbf }, //record volume control + { 0x26, 0x30, 0x30 }, //record pga volume control + { 0xc8, 0x00, 0x00 }, //ALC control + { 0xce, 0x00, 0xf5 }, //record noise gate + { 0xf3, 0x00, 0xc0 }, //dac noise dithe + { 0xcd, 0x00, 0x20 }, //max record volume + { 0x15, 0x00, 0x01 }, //power down control + { 0x18, 0x00, 0xff }, //play power control + { 0x16, 0x00, 0x0f }, //record power up + { 0x19, 0x00, 0x04 }, //power down control + { 0x02, 0x00, 0x05 }, //ext clock slect + { 0x01, 0x00, 0x05 }, //ext clock slect + { 0x00, 0x00, 0x00 }, //adc dpz reset + { 0x00, 0x00, 0x03 }, //dac dpz reset + { 0x04, 0x00, 0x40 }, //clk div + { 0x05, 0x00, 0x04 }, //clk div0x4 + { 0x06, 0x00, 0x40 }, //clk div + { 0x07, 0x00, 0x04 }, //clk div 0x4 + { 0x03, 0x00, 0x01 }, //slave 16bit i2s + { 0x00, 0x00, 0x00 }, //adc dpz reset + { 0x00, 0x00, 0x03 }, //dac dpz reset +}; + +static int zx_aud96p22_i2c_write(struct i2c_client *i2c_client, + const void *data, size_t count) +{ + int xfer; + + xfer = i2c_master_send(i2c_client, data, count); + if (xfer == count) + return 0; + else if (xfer < 0) + return xfer; + else + return -EIO; +} + +static int zx_aud96p22_i2c_read(struct i2c_client *i2c_client, + unsigned char addr) +{ + int xfer; + + xfer = i2c_smbus_read_word_data(i2c_client, addr); + if (xfer < 0) + dev_warn(&i2c_client->dev, "transfer error %d\n", xfer); + + return xfer; +} + +static int zx_aud96p22_i2c_update(struct i2c_client *i2c_client, + const struct i2c_reg *tbl, unsigned int tbl_size) +{ + int xfer; + unsigned int i = 0; + unsigned char buf[3]; + + for (i = 0; i < tbl_size; i++) { + buf[0] = tbl[i].addr; + buf[1] = tbl[i].low_data; + buf[2] = tbl[i].high_data; + + xfer = zx_aud96p22_i2c_write(i2c_client, buf, ARRAY_SIZE(buf)); + if (xfer < 0) { + dev_err(&i2c_client->dev, "write error %d\n", xfer); + return -EIO; + } + } + + return 0; +} + +static void +zx_aud96p22_i2c_dac_amp_run_enable(struct i2c_client *i2c_client, bool on) +{ + int ret = 0; + + ret = gpio_request(BGPIO64, "dac"); + if (ret) { + dev_err(&i2c_client->dev, "request gpio BGPIO64 failed %d\n", + ret); + return; + } + + /* + * write 1 to gpio 64 to set MUTE_CTL for enable play. + * otherwise disable it. + */ + if (on) + gpiod_direction_output(gpio_to_desc(BGPIO64), 1); + else + gpiod_direction_output(gpio_to_desc(BGPIO64), 0); + + gpio_free(BGPIO64); +} + +static void +zx_aud96p22_i2c_dac_sleep_enable(struct i2c_client *i2c_client, bool on) +{ + if (on) + zx_aud96p22_i2c_update(i2c_client, i2c_dac_sleep_table, + ARRAY_SIZE(i2c_dac_sleep_table)); + else + zx_aud96p22_i2c_update(i2c_client, i2c_dac_wakeup_table, + ARRAY_SIZE(i2c_dac_wakeup_table)); +} + +static void +zx_aud96p22_i2c_adc_sleep_enable(struct i2c_client *i2c_client, bool on) +{ + if (on) + zx_aud96p22_i2c_update(i2c_client, i2c_adc_sleep_table, + ARRAY_SIZE(i2c_adc_sleep_table)); + else + zx_aud96p22_i2c_update(i2c_client, i2c_adc_wakeup_table, + ARRAY_SIZE(i2c_adc_wakeup_table)); +} + +static void +zx_aud96p22_i2c_codec_run_enable(struct i2c_client *i2c_client) +{ + zx_aud96p22_i2c_update(i2c_client, i2c_codec_start_table, + ARRAY_SIZE(i2c_codec_start_table)); +} + +static int zx_aud96p22_hw_params(struct snd_pcm_substream *substream, + struct snd_pcm_hw_params *params, + struct snd_soc_dai *socdai) +{ + struct device *dev = socdai->dev; + struct i2c_client *i2c_client = to_i2c_client(dev); + struct zx_aud96p22_info *zx_aud96p22 = dev_get_drvdata(socdai->dev); + bool capture = (substream->stream == SNDRV_PCM_STREAM_CAPTURE); + + zx_aud96p22->capture = capture; + snd_soc_dai_set_drvdata(socdai, zx_aud96p22); + + zx_aud96p22_i2c_adc_sleep_enable(i2c_client, false); + if (!capture) + zx_aud96p22_i2c_dac_amp_run_enable(i2c_client, true); + + return 0; +} + +static int zx_aud96p22_startup(struct snd_pcm_substream *substream, + struct snd_soc_dai *dai) +{ + struct device *dev = dai->dev; + struct i2c_client *i2c_client = to_i2c_client(dev); + bool capture = (substream->stream == SNDRV_PCM_STREAM_CAPTURE); + + zx_aud96p22_i2c_dac_sleep_enable(i2c_client, false); + if (!capture) + zx_aud96p22_i2c_dac_amp_run_enable(i2c_client, true); + + return 0; +} + +static void zx_aud96p22_shutdown(struct snd_pcm_substream *substream, + struct snd_soc_dai *dai) +{ + struct device *dev = dai->dev; + struct i2c_client *i2c_client = to_i2c_client(dev); + bool capture = (substream->stream == SNDRV_PCM_STREAM_CAPTURE); + + zx_aud96p22_i2c_dac_sleep_enable(i2c_client, true); + if (!capture) + zx_aud96p22_i2c_dac_amp_run_enable(i2c_client, false); +} + +static int +zx_aud96p22_i2c_read_regs(struct i2c_client *i2c_client, + struct i2c_reg *tbl, unsigned int tbl_size) +{ + int xfer = 0; + unsigned int i; + + for (i = 0; i < tbl_size; i++) { + xfer = zx_aud96p22_i2c_read(i2c_client, tbl[i].addr); + if (xfer < 0) { + dev_err(&i2c_client->dev, + "read 0x%x, error is %d\n", tbl[i].addr, xfer); + return -EIO; + } + tbl[i].low_data = xfer & 0xff; + tbl[i].high_data = (xfer >> 8) & 0xff; + } + + return 0; +} + +static int +zx_aud96p22_headset_playback_info_volsw(struct snd_kcontrol *kcontrol, + struct snd_ctl_elem_info *uinfo) +{ + uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER; + uinfo->count = 1; + uinfo->value.integer.min = 0; + uinfo->value.integer.max = 0xf; + + return 0; +} + +static int +zx_aud96p22_headset_playback_get_volsw(struct snd_kcontrol *kcontrol, + struct snd_ctl_elem_value *ucontrol) +{ + struct device *dev = snd_kcontrol_dev(kcontrol); + struct i2c_client *i2c_client = to_i2c_client(dev); + int ret; + int l; + int r; + + ret = zx_aud96p22_i2c_read_regs(i2c_client, + i2c_dac_headset_volume_table, + ARRAY_SIZE(i2c_dac_headset_volume_table)); + if (ret) + return ret; + + l = i2c_dac_headset_volume_table[0].low_data; + r = i2c_dac_headset_volume_table[0].high_data; + + /* make sure value fall in (0x0,0xf) */ + l = clamp(l, 0, 0xf); + r = clamp(r, 0, 0xf); + + ucontrol->value.integer.value[0] = l; + ucontrol->value.integer.value[1] = r; + + return 0; +} + +static int +zx_aud96p22_headset_playback_put_volsw(struct snd_kcontrol *kcontrol, + struct snd_ctl_elem_value *ucontrol) +{ + struct device *dev = snd_kcontrol_dev(kcontrol); + struct i2c_client *i2c_client = to_i2c_client(dev); + int l; + int r; + + l = r = ucontrol->value.integer.value[0]; + + /* make sure value fall in (0x0,0xf) */ + l = clamp(l, 0, 0xf); + r = clamp(r, 0, 0xf); + + i2c_dac_headset_volume_table[0].low_data = l; + i2c_dac_headset_volume_table[0].high_data = r; + + zx_aud96p22_i2c_update(i2c_client, i2c_dac_headset_volume_table, + ARRAY_SIZE(i2c_dac_headset_volume_table)); + return 0; +} + + +static int +zx_aud96p22_master_playback_info_volsw(struct snd_kcontrol *kcontrol, + struct snd_ctl_elem_info *uinfo) +{ + uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER; + uinfo->count = 1; + uinfo->value.integer.min = 0; + uinfo->value.integer.max = 0xff; + + return 0; +} + +static int +zx_aud96p22_master_playback_get_volsw(struct snd_kcontrol *kcontrol, + struct snd_ctl_elem_value *ucontrol) +{ + struct device *dev = snd_kcontrol_dev(kcontrol); + struct i2c_client *i2c_client = to_i2c_client(dev); + int l; + int r; + + zx_aud96p22_i2c_read_regs(i2c_client, + i2c_dac_master_volume_table, + ARRAY_SIZE(i2c_dac_master_volume_table)); + + l = i2c_dac_master_volume_table[0].low_data; + r = i2c_dac_master_volume_table[0].high_data; + + /* make sure value fall in (0x0,0xf) */ + l = clamp(l, 0, 0xff); + r = clamp(r, 0, 0xff); + + ucontrol->value.integer.value[0] = l; + ucontrol->value.integer.value[1] = r; + + return 0; +} + +static int +zx_aud96p22_master_playback_put_volsw(struct snd_kcontrol *kcontrol, + struct snd_ctl_elem_value *ucontrol) +{ + struct device *dev = snd_kcontrol_dev(kcontrol); + struct i2c_client *i2c_client = to_i2c_client(dev); + int l; + int r; + + l = r = ucontrol->value.integer.value[0]; + + /* make sure value fall in (0x0,0xf) */ + l = clamp(l, 0, 0xff); + r = clamp(r, 0, 0xff); + + i2c_dac_master_volume_table[0].low_data = l; + i2c_dac_master_volume_table[0].high_data = r; + + zx_aud96p22_i2c_update(i2c_client, + i2c_dac_master_volume_table, + ARRAY_SIZE(i2c_dac_master_volume_table)); + return 0; +} + +static int zx_aud96p22_master_record_info_volsw(struct snd_kcontrol *kcontrol, + struct snd_ctl_elem_info *uinfo) +{ + uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER; + uinfo->count = 1; + uinfo->value.integer.min = 0; + uinfo->value.integer.max = 0xff; + + return 0; +} + +static int zx_aud96p22_master_record_get_volsw(struct snd_kcontrol *kcontrol, + struct snd_ctl_elem_value *ucontrol) +{ + struct device *dev = snd_kcontrol_dev(kcontrol); + struct i2c_client *i2c_client = to_i2c_client(dev); + int l; + int r; + + zx_aud96p22_i2c_read_regs(i2c_client, + i2c_adc_master_volume_table, + ARRAY_SIZE(i2c_adc_master_volume_table)); + + l = i2c_adc_master_volume_table[0].low_data; + r = i2c_adc_master_volume_table[0].high_data; + + /* make sure value fall in (0x0,0xf) */ + l = clamp(l, 0, 0xff); + r = clamp(r, 0, 0xff); + + ucontrol->value.integer.value[0] = l; + ucontrol->value.integer.value[1] = r; + + return 0; +} + + +static int zx_aud96p22_master_record_put_volsw(struct snd_kcontrol *kcontrol, + struct snd_ctl_elem_value *ucontrol) +{ + struct device *dev = snd_kcontrol_dev(kcontrol); + struct i2c_client *i2c_client = to_i2c_client(dev); + int l; + int r; + + l = r = ucontrol->value.integer.value[0]; + + /* make sure value fall in (0x0,0xf) */ + l = clamp(l, 0, 0xff); + r = clamp(r, 0, 0xff); + + i2c_adc_master_volume_table[0].low_data = l; + i2c_adc_master_volume_table[0].high_data = r; + + return zx_aud96p22_i2c_update(i2c_client, i2c_adc_master_volume_table, + ARRAY_SIZE(i2c_adc_master_volume_table)); +} +static struct snd_kcontrol_new zx_playback_controls[] = { + /* Headset volume */ + { + .iface = SNDRV_CTL_ELEM_IFACE_MIXER, + .name = "Headset Playback Volume", + .info = zx_aud96p22_headset_playback_info_volsw, + .get = zx_aud96p22_headset_playback_get_volsw, + .put = zx_aud96p22_headset_playback_put_volsw, + }, + /* Master volume */ + { + .iface = SNDRV_CTL_ELEM_IFACE_MIXER, + .name = "Master Playback Volume", + .info = zx_aud96p22_master_playback_info_volsw, + .get = zx_aud96p22_master_playback_get_volsw, + .put = zx_aud96p22_master_playback_put_volsw, + }, +}; + +static struct snd_kcontrol_new zx_record_controls[] = { + /* Master record volume */ + { + .iface = SNDRV_CTL_ELEM_IFACE_MIXER, + .name = "Master Capture Volume", + .info = zx_aud96p22_master_record_info_volsw, + .get = zx_aud96p22_master_record_get_volsw, + .put = zx_aud96p22_master_record_put_volsw, + }, +}; + +static int zx_aud96p22_probe(struct snd_soc_codec *codec) +{ + struct device *dev = codec->dev; + struct i2c_client *i2c_client = to_i2c_client(dev); + int ret = 0; + struct zx_aud96p22_info *zx_aud96p22; + int i; + + zx_aud96p22 = devm_kzalloc(dev, sizeof(*zx_aud96p22), GFP_KERNEL); + if (!zx_aud96p22) + return -ENOMEM; + + zx_aud96p22->dev = dev; + dev_set_drvdata(dev, zx_aud96p22); + zx_aud96p22_i2c_dac_amp_run_enable(i2c_client, false); + zx_aud96p22_i2c_codec_run_enable(i2c_client); + + for (i = 0; i < ARRAY_SIZE(zx_playback_controls); i++) + zx_playback_controls[i].private_value = (unsigned long)dev; + snd_soc_add_codec_controls(codec, zx_playback_controls, + ARRAY_SIZE(zx_playback_controls)); + + for (i = 0; i < ARRAY_SIZE(zx_record_controls); i++) + zx_record_controls[i].private_value = (unsigned long)dev; + snd_soc_add_codec_controls(codec, zx_record_controls, + ARRAY_SIZE(zx_record_controls)); + + return ret; +} + +static struct snd_soc_codec_driver zx_aud96p22_driver = { + .probe = zx_aud96p22_probe, +}; + +static int zx_aud96p22_dai_probe(struct snd_soc_dai *dai) +{ + struct zx_aud96p22_info *zx_aud96p22 = dev_get_drvdata(dai->dev); + + snd_soc_dai_set_drvdata(dai, zx_aud96p22); + + return 0; +} + +static struct snd_soc_dai_ops zx_aud96p22_dai_ops = { + .hw_params = zx_aud96p22_hw_params, + .startup = zx_aud96p22_startup, + .shutdown = zx_aud96p22_shutdown, +}; + +#define ZX_I2S_RATES \ + (SNDRV_PCM_RATE_8000 | SNDRV_PCM_RATE_11025 | SNDRV_PCM_RATE_16000 | \ + SNDRV_PCM_RATE_22050 | SNDRV_PCM_RATE_32000 | SNDRV_PCM_RATE_44100 | \ + SNDRV_PCM_RATE_48000 | SNDRV_PCM_RATE_88200 | SNDRV_PCM_RATE_96000| \ + SNDRV_PCM_RATE_176400 | SNDRV_PCM_RATE_192000) + +#define ZX_I2S_FMTBIT \ + (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S24_LE | \ + SNDRV_PCM_FMTBIT_S32_LE) + +static struct snd_soc_dai_driver zx_aud96p22_dai = { + .name = "zx-aud96p22-dai", + .probe = zx_aud96p22_dai_probe, + .playback = { + .channels_min = 1, + .channels_max = 2, + .rates = ZX_I2S_RATES, + .formats = ZX_I2S_FMTBIT, + }, + .capture = { + .channels_min = 1, + .channels_max = 2, + .rates = ZX_I2S_RATES, + .formats = ZX_I2S_FMTBIT, + }, + .ops = &zx_aud96p22_dai_ops, +}; + +static int zx_aud96p22_i2c_probe(struct i2c_client *i2c_client, + const struct i2c_device_id *id) +{ + int ret = 0; + struct device *pdev = &i2c_client->dev; + + if (!i2c_client) + return -ENODEV; + + ret = snd_soc_register_codec(pdev, &zx_aud96p22_driver, + &zx_aud96p22_dai, 1); + + return ret; +} + +static int zx_aud96p22_i2c_remove(struct i2c_client *i2c_client) +{ + struct device *pdev = &i2c_client->dev; + + snd_soc_unregister_codec(pdev); + + return 0; +} + +const struct of_device_id zx_aud96p22_of_dt_ids[] = { + { .compatible = "zte,zx-aud96p22", }, + { } +}; +MODULE_DEVICE_TABLE(of, zx_aud96p22_of_dt_ids); + +static struct i2c_driver aud96p22_i2c_driver = { + .driver = { + .name = "zx-aud96p22", + .of_match_table = zx_aud96p22_of_dt_ids, + }, + .probe = zx_aud96p22_i2c_probe, + .remove = zx_aud96p22_i2c_remove, +}; +module_i2c_driver(aud96p22_i2c_driver); + +MODULE_DESCRIPTION("ZTE ASoC AUD96P22 driver"); +MODULE_AUTHOR("Baoyou Xie "); +MODULE_LICENSE("GPL v2");